Commit Graph
49 Commits
Author SHA1 Message Date
Frédéric Desbiens 3fc28d8979 Allowed a BASEPRI-masked interrupt to wake the Cortex-M idle loop from WFI (#711)
The idle loop in _tx_thread_schedule masks interrupts before re-reading
_tx_thread_execute_ptr, so that an interrupt cannot make a thread ready
between that read and the WFI and then be lost. With PRIMASK that is safe:
the architecture excludes PRIMASK from the WFI wake-up condition, so the
interrupt still wakes the processor and is taken as soon as the loop
re-enables interrupts.

BASEPRI is not excluded. When TX_PORT_USE_BASEPRI is defined, the mask
written at the top of the loop is still in place at the WFI, so any
interrupt at or below TX_PORT_BASEPRI fails to wake the processor at all.
On a system where every interrupt is managed by ThreadX, that is every
interrupt, and the processor stays in WFI or in the low power mode entered
by tx_low_power_enter until something outside the mask happens.

Set PRIMASK and clear BASEPRI for the duration of the WFI, then restore
BASEPRI and clear PRIMASK. Interrupts remain masked across the whole
window, so the original race is still closed, but the wake-up condition is
now evaluated with BASEPRI clear and any enabled interrupt can end the wait.
A pending interrupt is taken at the CPSIE i, or at the existing unmask
further down the loop if it falls below TX_PORT_BASEPRI.

The change is made in the ARMv7-M and ARMv8-M sources under ports_arch,
including the module manager, and propagated to the generated ports with
the copy scripts. The ghs and keil ports do not implement
TX_PORT_USE_BASEPRI, and Cortex-M0/M0+/M23 have no BASEPRI register, so
those ports are unaffected.

Verified by assembling every patched GNU port for Cortex-M3, M4, M7, M33,
M55 and M85, with and without TX_PORT_USE_BASEPRI, TX_LOW_POWER and
TX_ENABLE_EXECUTION_CHANGE_NOTIFY, and by checking the disassembly of the
idle loop.

Fixes #279

Assisted-by: Copilot (Opus 5) <noreply@github.com>
2026-09-09 11:29:14 -04:00
Frédéric Desbiens b0ec8bfbb9 Fixed the invalid module data pointers in the absolute module load (#699)
An absolutely located module has its code and its data placed at two
independent fixed addresses by the module's linker script. The module
preamble carries the code and data sizes but not the data address, so
_txm_module_manager_absolute_load() could not determine where the
module's data area was. It computed txm_module_instance_data_start
from the code size and the preamble size, which yields a size rather
than an address, and it set txm_module_instance_module_data_base_address
one past the end of the byte pool allocation.

Added _txm_module_manager_absolute_load_extended(), which accepts the
module's data area address from the caller. Deprecated
_txm_module_manager_absolute_load(), which now forwards to the extended
service with an unknown data area location and rejects modules that
request memory protection, since the memory protection hardware cannot
be programmed to cover an unknown data area.

Fixes #450

Assisted-by: Copilot (Opus 5) <noreply@github.com>
2026-09-08 10:03:45 -04:00
Frédéric Desbiens 508af549da Fixed the incorrect loop bound constant in the IAR file lock support (#695)
The IAR multithreaded library support code allocates its file lock
mutexes from an array of _MAX_FLOCK entries, but the wrap-around check
and the exhaustion check in __iar_file_Mtxinit() both compared against
_MAX_LOCK, the bound of the unrelated system lock mutex array.

When _MAX_FLOCK is greater than _MAX_LOCK, the free mutex index wrapped
early and the exhaustion check reported failure while free entries
remained, so *m was set to TX_NULL and the application faulted the first
time a file lock was taken.  When _MAX_FLOCK is smaller than _MAX_LOCK,
the free mutex index was allowed to run past the end of
__tx_iar_file_lock_mutexes and the exhaustion check could never fire.

Corrected all four comparisons in each of the 27 copies of tx_iar.c.

Fixes #444

Assisted-by: Copilot (Opus 5) <noreply@github.com>
2026-09-03 13:50:31 -04:00
Frédéric Desbiens c469a7756b Fixed the missing immediate prefix on MOV in Cortex-M schedulers (#693)
The BASEPRI-masking path in tx_thread_schedule wrote "MOV r0, 0" rather
than "MOV r0, #0". UAL requires the "#" prefix on an immediate operand.
GNU as and the LLVM-based assemblers accept the unprefixed form and emit
the intended encoding, but stricter assemblers reject it outright, so the
affected ports could not be built with those toolchains.

The GNU and AC6 sources had already been corrected; this brings the IAR
and AC5 sources into line. Verified that both spellings assemble to the
same Thumb-2 encoding (f04f 0000), so this is a source-correctness fix
with no change in generated code or runtime behaviour.

Covers 31 occurrences across the Cortex-M3, M4, M7, M33, M52, M55 and M85
ports, their module manager counterparts, and the shared ARMv7-M and
ARMv8-M architecture sources.

Fixes #461

Assisted-by: Copilot (Opus 5) <noreply@github.com>
2026-09-03 11:44:27 -04:00
Frédéric Desbiens 9c32abb17d Assembled the module ports, which no check had ever compiled (#672)
scripts/check_clang.sh globbed ports_module/*/gnu/src, which does not exist --
the module ports keep their assembly in module_manager/src. The [ -d ] guard
skipped it in silence, so 116 assembly files across nine Arm module ports were
assembled by no check, with either compiler, in the script whose own comments
state three times that "a port that is simply absent from the count reads as
covered". Stage 1 goes from 724 of 724 to 840 of 840; the feature-macro stage
had the same gap and goes from 412 files to 469.

Correcting the path exposed five defects, and only one of them was a build
failure. The other four assembled cleanly and did the wrong thing, because GAS
runs the C preprocessor on .S and not on .s:

  ports_smp/cortex_a7_smp/gnu/src/tx_thread_smp_unprotect.s, the only .s in a
  directory of twenty-one .S, ignored all four of its own feature macros. It
  wrote the caller's LR into the protection structure on every unprotect -- a
  store guarded by TX_MPCORE_DEBUG_ENABLE -- sent an unconditional SEV, and
  returned through both BX lr and MOV pc, lr. Its cortex_a5_smp and
  cortex_a9_smp siblings are .S.

  ports_module/cortex_m33/.../tx_thread_stack_build.s emitted both arms of an
  #ifdef TX_SINGLE_MODE_SECURE, so the non-secure LR value overwrote the secure
  one and the secure build got the wrong frame.

  ports_module/cortex_m23/.../tx_thread_context_{save,restore}.S carried the
  POP {r0, lr} that check_clang.sh's own comment describes as the reason the
  feature-macro stage exists. The 16-bit Thumb POP takes r0-r7 and pc only.
  The identical fix already sits in ports/cortex_m23/gnu/src; the module copy
  never got it because nothing scanned it.

  ports_module/cortex_m23/.../tx_thread_secure_stack_initialize.S used MOV
  rather than MOVS for an 8-bit immediate, latent behind TX_SINGLE_MODE_SECURE.
  Both siblings in the same directory already use MOVS.

  ports_module/cortex_a7/gnu/module_manager/src is the one that failed to
  assemble, on GCC 14.3 as well as on LLVM: #define SYS_MODE was never
  expanded, so #SYS_MODE reached the assembler as an undefined symbol.

Twenty-nine .s files under gnu trees are renamed to .S. Every one of them is
already named .S by the build scripts that compile it, so this repairs those
scripts rather than churning them -- ports_module/cortex_a7's build_threadx.bat
names all eighteen with a capital S, and works today only on a case-insensitive
filesystem. Renaming rather than converting the #defines to GNU assignments is
what fixes the #ifdef blocks as well as the constants; the assignments would
have fixed two files and left twenty-seven silently ignoring their macros.

Files with no preprocessor directives are left as .s: they are not broken, and
check_ports.sh gains a check that keeps them that way. Only the gnu trees are
checked there -- the IAR, Arm Compiler 5 and Keil assemblers preprocess .s
themselves, and about three hundred files in this repository rely on that.

Verified with both toolchains on the same tree: 840 of 840 assembled by
ATfE 22.1.0 and by arm-gnu-toolchain 14.3.rel1, all five stages of
check_clang.sh green, and check_ports.sh green including the reproducibility
check. The new check was shown to fail by planting a copy of the file it was
written for.

No regression test accompanies this. The assembly it covers is executed by no
host test, and the check itself going from 724 files to 840 is the coverage
AGENTS.md asks for -- together with the new check_ports.sh section, which is
what stops the class recurring.

Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
2026-08-28 09:24:30 -04:00
Frédéric Desbiens 20d4b977f2 Removed generated build output and per-user IDE state, and fixed two stale link lines (#618)
* Removed generated build output and stopped two scripts naming deleted archives

Three kinds of file in the tree are produced by a build rather than written by
hand, and one pair of scripts still links archives that were deleted years ago.

Keil writes ThreadX_Library.plg on every build; the two committed copies are
HTML build logs from someone's machine. Code Composer generates the makefiles
under ports/c667x/ccs/example_build/tx/Release from the project files beside
them, so makefile, objects.mk, sources.mk, subdir_rules.mk, subdir_vars.mk and
ccsObjs.opt are all regenerated output.

The arm9 and arm11 sample builds link libc.a, libgcc.a and, for arm11,
libnosys.a from their own example_build directories. Those archives were removed
in 6.1.10 under "Removal of unneeded files", and libnosys.a in #594, but the link
lines were never updated, so both examples fail immediately with

    arm-none-eabi-ld: cannot find libc.a: No such file or directory

Link through the compiler driver instead, the shape every other example in the
tree uses since #594: the driver supplies libc and libgcc, and SYSCALL_LIB is
already defined in both scripts.

That does not make either example link, and the fix stops short of that on
purpose. With the archives no longer named, both now fail on

    undefined reference to `_fini'

because their linker scripts define the .init and .fini sections but not the
_init and _fini symbols, which live in crti.o and crtn.o and are omitted by
-nostartfiles. Making those two old cores build is a separate question from
removing a stale reference, so they stay in EXAMPLES_EXPECTED_TO_FAIL, with the
comment there corrected: it blamed newlib multilib packaging, which is true of
cortex_r4 and cortex_r5 but was never the reason for arm9 and arm11.

Reproduced throughout with arm-none-eabi-gcc 13.2.1.

Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>

* Removed the Keil per-user state files and ignored them

Every Keil project in the tree carried a second file holding per-user state:
25 .uvoptx beside the 25 .uvprojx, 9 .uvopt beside the 9 .uvproj, and 3 .uvgui
multi-project workspace files. uVision rewrites all of them whenever a project is
opened, so they record whoever last had it open rather than anything about the
port: debugger selection, breakpoints, watch windows, window geometry.

Nothing in the tree references them, and every affected directory keeps its
.uvprojx or .uvproj, which is the file that actually describes the project.

Add ignore rules so they do not come back the next time someone opens a project
and commits.

1.4 MB across 37 files.

Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
2026-08-15 16:40:19 -04:00
yf13 1491705269 Removed a few binary files in source tree. (#403)
This drops a few archive files from the source tree as they belong
to the toolchain.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2026-08-15 16:39:37 -04:00
Frédéric Desbiens 31fbe21d20 Removed developer machine paths from the shipped project files (#603)
The Arm Development Studio launch configurations and the IAR project files
carried absolute paths from the machines they were last opened on: four
individuals' home directories, a Broadcom support build tree, and directories
such as C:\release\threadx, C:\temp1702\tx and D:\threadx. They are published in
the repository and none of them resolves for anyone else.

In the launch files all of it is saved session state, which files that were never
opened in a debugger simply do not have:

  breakpoints                  72 files, saved breakpoints anchored to source
                               paths under cortex_a35 on one machine. Emptied
                               rather than deleted, matching the 27 launch files
                               that already carry an empty list.
  scripts_view_script_links    70 files, a scripts view cache. The script the
                               launch actually runs is named one line earlier
                               through ${workspace_loc:...}, which is portable.
  substitutePath               65 files, source lookup remapping. 30 map a path
                               to itself, and the rest point at one machine's
                               copy of libgloss or a build directory.
  TREE_NODE_PROPERTIES         39 files, which rows the variables view had
                               expanded.
  DebugCommandLine.History      2 files, the debug console command history,
                               including a typed absolute path.

The two IAR cases are not session state and are corrected rather than removed:

  IarchiveOutput               23 files. The librarian output path pointed at
                               another machine, so the library was written
                               outside the project. Set to ###Unitialized###,
                               which 86 other option blocks already use, letting
                               IAR derive $EXE_DIR$\$PROJ_FNAME$.a.
  IlinkIcfFile                  1 file. The linker configuration file is load
                               bearing, so the file name is kept and the path
                               made project relative, as 33 other option blocks
                               spell it.

Seven of the files are ports_arch templates, so the generators would otherwise
have copied the paths back.

Verified: all 162 launch and IAR project files in the tree parse as well-formed
XML afterwards, no tracked launch or project file mentions any of the four user
names, and scripts/check_ports.sh passes, so the templates and their generated
copies still agree.

Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
2026-08-11 19:39:41 -04:00
Frédéric Desbiens eb4ec4e3b5 Restored ports_arch as the source of truth for the Cortex-M ports (#590)
The Cortex-M ports under ports/ are generated. scripts/copy_armv7_m.sh copies
one tx_port.h and the per tool sources to fifteen M3, M4 and M7 targets, and
scripts/copy_armv8_m.sh does the same for nine M33, M55 and M85 targets. The
ports_arch_check workflow runs both scripts and fails if the tree is not
reproducible, so those copies are meant never to be edited directly.

They were. Every Cortex-M fix since #523 was applied to the generated copies
and not to the source, so the source fell behind and the check went red:
running the three scripts on dev changes 35 files. The check triggers only on
pull requests targeting master, which is why nothing caught it while the fixes
were merged into dev.

Left alone, the next run of these scripts would have reverted three separate
pieces of work: the memory barriers and clobbers from #523, the correction of
the IAR assembly header to use the assembler's own comment syntax, and the move
of tx_initialize_low_level.S into example_build for the M33, M55 and M85 GNU
ports from #514.

Bring the sources up to what the ports carry today, and regenerate. Two
behavioural changes come with that, both deliberate. The barriers from #523
reach the ac5 and keil variants of M3, M4 and M7, which were outside the scope
of that fix and never received it. The barrier that follows restoring the
interrupt posture, which #523 gave only to the GNU ports because GNU was the
only toolchain that could be tested, now applies to every tool; the identical
asm statement already shipped in the AC6 and IAR ports, so this adds a pipeline
flush rather than any new compiler exposure.

Regenerating also drops a stray #endif at the end of the Cortex-M85 IAR
tx_port.h, added by #523, which left that header with one more #endif than #if
and unable to compile. Every other ARMv8-M port was balanced.

Verified that the scripts are idempotent afterwards, that ports_arch_check
would pass, that no port loses a barrier or a clobber, that every regenerated
header is preprocessor balanced, and that every Cortex-M port covered by the
two scripts now carries the entry barrier.

Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
2026-08-09 10:42:54 -04:00
Frédéric DesbiensandCodex a33f6efc48 Updated Cortex-R4 Thumb bit immediates (#565)
Use explicit immediate syntax when testing the Thumb bit in AC6 Cortex-R4 stack build assembly.

Co-authored-by: Codex <codex@openai.com>
2026-06-29 16:22:52 -04:00
Frédéric DesbiensandCodex 3fcfb4e4c9 Updated Cortex-M BASEPRI zero immediates (#564)
Use explicit immediate syntax when clearing BASEPRI in GNU and AC6 Cortex-M scheduler assembly.

Co-authored-by: Codex <codex@openai.com>
2026-06-29 16:07:12 -04:00
d9e7dfea89 Add SysTick counter reset in Cortex-M ports (#561)
* Add SysTick counter reset in Cortex-M ports

The SysTick counter value (SYST_CVR @0xE000E018) is indeterminate after
reset. Without clearing it prior to enabling the counter, the first tick
interval becomes unpredictable.

* Fixed missing comment and added generated-by header in Cortex-M0/AC6 port

Added the missing inline comment on the LDR r1, =0 instruction
(Build value for SysTick reset) and the required AI-generated
attribution comment under the copyright header.

---------

Co-authored-by: Frédéric Desbiens <frederic.desbiens@eclipse-foundation.org>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
2026-06-24 12:16:51 -04:00
Frédéric DesbiensandCopilot df30b8b96e Release 6.5.1.202602a preparation (#547)
* Updated version number constants

* Updated port version strings

---------

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
2026-06-08 16:59:04 +02:00
Frédéric DesbiensandCopilot 730b61874b Added copyright headers to files missing them
Applied the standard MIT license header to all project-owned C, header,
assembly, shell, and Python files that were missing a copyright notice.
Third-party, toolchain startup, and auto-generated files were excluded.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
2026-06-06 21:48:06 +02:00
Frédéric DesbiensandCopilot de1c6e9bbe Release 6.5.1.202602 preparation (#543)
* Updated version number constants
* Updated port version strings

---------

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
2026-06-03 16:55:01 -04:00
Frédéric Desbiens c3259a2160 Updated copyright headers and version number constants (#509)
* Updated version number constants

* Removed revision history from all files

* Added Eclipse ThreadX contributors' copyright header
2026-03-05 10:46:30 +01:00
Frédéric Desbiens f4051070db Added ax attribute to ThreadX module example build preamble.S files 2026-02-27 10:25:05 -05:00
ericminnerath 67e415648e initial commit 2025-08-27 17:15:42 -05:00
Frédéric Desbiens 376e26be29 Updated ports version to v6.4.2. 2025-02-24 13:31:48 -05:00
TiejunZhou 27f0ce9ca2 Update version number to 6.4.1 2024-02-27 06:00:58 +00:00
bo chen 039a346397 Update the copyright for all assembly files. 2024-02-23 09:39:05 +08:00
Bo Chen (from Dev Box) 3e1da1f0b0 Update version id string. 2024-01-30 08:39:18 +08:00
Bo Chen (from Dev Box) 8276bcf711 Update copyright. 2024-01-29 13:51:15 +08:00
TiejunZhou d9ffb0f97d Update release date and version (#338)
* Update version number in API header

* Update release date and version
2023-12-28 10:51:29 +08:00
Yajun Xia cd87763dbd Removed redudant sample_threadX project from Cortex A7 ports_module IAR example_build. (#312)
https://msazure.visualstudio.com/One/_workitems/edit/25784627
2023-11-10 10:31:03 +08:00
TiejunZhou 13b700fd3e Update release version to 6.3.0 and date to 10-31-2023 (#308) 2023-10-23 15:31:03 +08:00
yajunxiaMS bc8bed494d Added thumb mode support under IAR for module manager on Cortex-A7 pl… (#289)
* Added thumb mode support under IAR for module manager on Cortex-A7 platform.

* update code for comments.
2023-08-07 17:35:31 +08:00
yajunxiaMS 7fa087d061 Added thumb mode support under GNU for module manager on Cortex-A7 pl… (#287)
* Added thumb mode support under GNU for module manager on Cortex-A7 platform.

* update code for comment.
2023-07-21 09:26:22 +08:00
Xiuwen Cai 361590dc40 Export _tx_handler_svc_unrecognized as weak symbol. (#264) 2023-05-19 11:06:50 +08:00
TiejunZhou e2a8334f96 Include tx_user.h in cortex_m3/4/7 IAR and AC5 port (#255)
* Include tx_user.h in ARMv7-M IAR port

* Include tx_user.h in ARMv7-M AC5 port

* Include tx_user.h in cortex_m3/4/7 IAR and AC5 port
2023-04-24 09:33:00 +08:00
Tiejun Zhou ac3b6b326c Update on 31 Mar 2023. Expand to see details.
af5702cbf Include tx_user.h only when TX_INCLUDE_USER_DEFINE_FILE is defined for assembly files
2023-03-31 07:34:47 +00:00
Tiejun Zhou 2aa19f3de0 Release 6.2.1 on 08 Mar 2023. Expand to see details.
cee19603d Include tx_user.h conditionally.
e40e08007 Update owners
d69641273 Update release date and version
394aee52f Add tx_user.h to GNU port assembly files
5cca2ddd0 RISC-V 64 bit port for Microchip
e0f2c373c Link Winmm.lib that required by the high-resolution timer.
6af472a68 Update Win32 port with high resolution timer.
aea7b556a Add DMB ISH barrier inst in ARMv8-A SMP scheduler
19091a262 Add .section .preamble to m3 m4 m7 module ports
ced60e1b7 Add missing parenthesis in ports assembly file
309dc77ca Modules Cortex-A7 IAR new port
c752a4063 Modules Cortex-A7 GNU new port
dc224b90f Fix race condition in tx_thread_wait_abort and update regression test
6e261f5b7 create threadx cmsis-pack
2023-03-08 08:26:22 +00:00
Scott Larson 37f6d0b39c Update on 18 Jan 2023. Expand to see details.
9c3acb6ce armv8-m compile time FPU fix
37daa35e7 added tx_trace.h include to module stop.c
39824289f Remove internal deprecated files.
fe2f80f43 Add a notice for not released file.
7fdd3782a Upgrade to the latest Container Images.
2023-01-18 08:39:40 +00:00
Tiejun Zhou 3e8e85cdc1 Release 6.2.0 2022-10-26 23:41:13 +00:00
JideshMSFT b6fb0b8e09 Delete tx_simulator_startup.s 2022-07-29 12:51:43 -07:00
JideshMSFT 35cfbfbd58 Delete cortexm_crt0.s 2022-07-29 12:48:58 -07:00
Yuxin Zhou 8c3c08f108 Release 6.1.12 2022-07-26 02:04:40 +00:00
Yuxin Zhou cef9cb22a5 Release 6.1.11 2022-04-20 05:07:02 +00:00
Scott Larson db11aba063 update RX modules 2022-02-02 11:45:04 -08:00
Yuxin Zhou f7f0957188 Release 6.1.10 2022-01-29 00:24:03 +00:00
Yuxin Zhou 1af8404c54 Release 6.1.9 2021-10-14 00:51:26 +00:00
Yuxin Zhou d0dab58250 Release 6.1.8 2021-07-28 07:24:02 +00:00
Bo Chen f5056f4923 Release 6.1.7 2021-06-02 06:45:05 +00:00
Yuxin Zhou b12bd44faa Release 6.1.6 2021-04-03 01:03:21 +00:00
Yuxin Zhou 10a7932b9d Release 6.1.5 2021-03-05 05:38:33 +00:00
Scott Larson f108ebdbaf update to v6.1.3 2021-01-08 13:31:36 -08:00
Scott Larson 9b050d00ed patch release 6.1.2 2020-11-10 13:25:20 -08:00
Scott Larson 1b5816a206 6.1 minor release 2020-09-30 15:42:41 -07:00
Scott Larson 6f61053f2a add SMP, Modules, and more processor/tools releases 2020-08-07 16:56:45 -07:00