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Add SysTick counter reset in Cortex-M ports (#561)

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* Add SysTick counter reset in Cortex-M ports

The SysTick counter value (SYST_CVR @0xE000E018) is indeterminate after
reset. Without clearing it prior to enabling the counter, the first tick
interval becomes unpredictable.

* Fixed missing comment and added generated-by header in Cortex-M0/AC6 port

Added the missing inline comment on the LDR r1, =0 instruction
(Build value for SysTick reset) and the required AI-generated
attribution comment under the copyright header.

---------

Co-authored-by: Frédéric Desbiens <frederic.desbiens@eclipse-foundation.org>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
This commit is contained in:
hefanbo
2026-06-24 12:16:51 -04:00
committed by GitHub
co-authored by Frédéric Desbiens Copilot
parent 2dfe5acfb0
commit d9e7dfea89
66 changed files with 199 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
ports/cortex_m0/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+4
View File
@@ -7,6 +7,7 @@
@ *
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
@ // Some portions generated by GitHub Copilot (Claude Sonnet 4.6).
@
@
@/**************************************************************************/
@@ -111,6 +112,9 @@ _tx_initialize_low_level:
@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
@
LDR r0, =0xE000E000 @ Build address of NVIC registers
LDR r1, =0 @ Build value for SysTick reset
STR r1, [r0, #0x10] @ Reset SysTick Control
STR r1, [r0, #0x18] @ Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] @ Setup SysTick Reload Value
LDR r1, =0x7 @ Build SysTick Control Enable Value
ports/cortex_m23/ac6/example_build/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOVW r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m23/gnu/src/tx_initialize_low_level.S
+3
View File
@@ -107,6 +107,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOVW r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m23/iar/src/tx_initialize_low_level.s
+3
View File
@@ -104,6 +104,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m3/ac5/example_build/tx_initialize_low_level.s
+3
View File
@@ -162,6 +162,9 @@ _tx_initialize_low_level
; /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports/cortex_m3/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+3
View File
@@ -116,6 +116,9 @@ _tx_initialize_low_level:
@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
@
MOV r0, #0xE000E000 @ Build address of NVIC registers
MOV r1, #0 @ Build value for SysTick reset
STR r1, [r0, #0x10] @ Reset SysTick Control
STR r1, [r0, #0x18] @ Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] @ Setup SysTick Reload Value
MOV r1, #0x7 @ Build SysTick Control Enable Value
ports/cortex_m3/ghs/example_build/tx_initialize_low_level.arm
+3
View File
@@ -107,6 +107,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r1, 0 ; Build value for SysTick reset
STR r1, [r0, 0x10] ; Reset SysTick Control
STR r1, [r0, 0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, 0x14] ; Setup SysTick Reload Value
MOV r1, 0x7 ; Build SysTick Control Enable Value
ports/cortex_m3/gnu/example_build/tx_initialize_low_level.S
+3
View File
@@ -108,6 +108,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m3/iar/example_build/tx_initialize_low_level.s
+3
View File
@@ -113,6 +113,9 @@ _tx_initialize_low_level:
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports/cortex_m3/keil/example_build/tx_initialize_low_level.s
+3
View File
@@ -161,6 +161,9 @@ _tx_initialize_low_level
; /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports/cortex_m33/ac6/example_build/tx_initialize_low_level.S
+3
View File
@@ -103,6 +103,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m33/ac6/src/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m33/gnu/example_build/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m33/iar/src/tx_initialize_low_level.s
+3
View File
@@ -108,6 +108,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m4/ac5/example_build/tx_initialize_low_level.s
+3
View File
@@ -166,6 +166,9 @@ _tx_initialize_low_level
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports/cortex_m4/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+3
View File
@@ -116,6 +116,9 @@ _tx_initialize_low_level:
@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
@
MOV r0, #0xE000E000 @ Build address of NVIC registers
MOV r1, #0 @ Build value for SysTick reset
STR r1, [r0, #0x10] @ Reset SysTick Control
STR r1, [r0, #0x18] @ Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] @ Setup SysTick Reload Value
MOV r1, #0x7 @ Build SysTick Control Enable Value
ports/cortex_m4/ghs/example_build/tx_initialize_low_level.arm
+3
View File
@@ -107,6 +107,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r1, 0 ; Build value for SysTick reset
STR r1, [r0, 0x10] ; Reset SysTick Control
STR r1, [r0, 0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, 0x14] ; Setup SysTick Reload Value
MOV r1, 0x7 ; Build SysTick Control Enable Value
ports/cortex_m4/gnu/example_build/tx_initialize_low_level.S
+3
View File
@@ -118,6 +118,9 @@ _tx_initialize_low_level:
@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
@
MOV r0, #0xE000E000 @ Build address of NVIC registers
MOV r1, #0 @ Build value for SysTick reset
STR r1, [r0, #0x10] @ Reset SysTick Control
STR r1, [r0, #0x18] @ Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] @ Setup SysTick Reload Value
MOV r1, #0x7 @ Build SysTick Control Enable Value
ports/cortex_m4/iar/example_build/tx_initialize_low_level.s
+3
View File
@@ -113,6 +113,9 @@ _tx_initialize_low_level:
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports/cortex_m4/keil/example_build/tx_initialize_low_level.s
+3
View File
@@ -181,6 +181,9 @@ _tx_initialize_low_level
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports/cortex_m55/ac6/example_build/tx_initialize_low_level.S
+3
View File
@@ -103,6 +103,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m55/ac6/src/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m55/gnu/example_build/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m55/iar/src/tx_initialize_low_level.s
+3
View File
@@ -108,6 +108,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m7/ac5/example_build/tx_initialize_low_level.s
+3
View File
@@ -171,6 +171,9 @@ _tx_initialize_low_level
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports/cortex_m7/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+3
View File
@@ -116,6 +116,9 @@ _tx_initialize_low_level:
@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
@
MOV r0, #0xE000E000 @ Build address of NVIC registers
MOV r1, #0 @ Build value for SysTick reset
STR r1, [r0, #0x10] @ Reset SysTick Control
STR r1, [r0, #0x18] @ Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] @ Setup SysTick Reload Value
MOV r1, #0x7 @ Build SysTick Control Enable Value
ports/cortex_m7/ghs/example_build/tx_initialize_low_level.arm
+3
View File
@@ -107,6 +107,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r1, 0 ; Build value for SysTick reset
STR r1, [r0, 0x10] ; Reset SysTick Control
STR r1, [r0, 0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, 0x14] ; Setup SysTick Reload Value
MOV r1, 0x7 ; Build SysTick Control Enable Value
ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S
+3
View File
@@ -108,6 +108,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m7/iar/example_build/tx_initialize_low_level.s
+3
View File
@@ -113,6 +113,9 @@ _tx_initialize_low_level:
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports/cortex_m85/ac6/src/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m85/gnu/example_build/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports/cortex_m85/iar/src/tx_initialize_low_level.s
+3
View File
@@ -108,6 +108,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_arch/ARMv7-M/threadx/ac5/example_build/tx_initialize_low_level.s
+3
View File
@@ -165,6 +165,9 @@ _tx_initialize_low_level
#ifndef TX_NO_TIMER
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_arch/ARMv7-M/threadx/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+3
View File
@@ -107,6 +107,9 @@ _tx_initialize_low_level:
#ifndef TX_NO_TIMER
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_arch/ARMv7-M/threadx/ghs/example_build/tx_initialize_low_level.arm
+3
View File
@@ -107,6 +107,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r1, 0 ; Build value for SysTick reset
STR r1, [r0, 0x10] ; Reset SysTick Control
STR r1, [r0, 0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, 0x14] ; Setup SysTick Reload Value
MOV r1, 0x7 ; Build SysTick Control Enable Value
ports_arch/ARMv7-M/threadx/gnu/example_build/tx_initialize_low_level.S
+3
View File
@@ -104,6 +104,9 @@ _tx_initialize_low_level:
#ifndef TX_NO_TIMER
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_arch/ARMv7-M/threadx/iar/example_build/tx_initialize_low_level.s
+3
View File
@@ -98,6 +98,9 @@ _tx_initialize_low_level:
#ifndef TX_NO_TIMER
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_arch/ARMv8-M/threadx/ac6/src/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_arch/ARMv8-M/threadx/gnu/src/tx_initialize_low_level.S
+3
View File
@@ -106,6 +106,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_arch/ARMv8-M/threadx/iar/src/tx_initialize_low_level.s
+3
View File
@@ -108,6 +108,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m0+/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+3
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@@ -117,6 +117,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r1, =0
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
MOVS r2, #0x14
STR r1, [r0, r2] // Setup SysTick Reload Value
ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+3
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@@ -118,6 +118,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r1, =0
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
MOVS r2, #0x14
STR r1, [r0, r2] // Setup SysTick Reload Value
ports_module/cortex_m0+/gnu/example_build/sample_threadx/tx_initialize_low_level.S
+3
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@@ -119,6 +119,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r1, =0
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
MOVS r2, #0x14
STR r1, [r0, r2] // Setup SysTick Reload Value
ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+3
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@@ -119,6 +119,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r1, =0
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
MOVS r2, #0x14
STR r1, [r0, r2] // Setup SysTick Reload Value
ports_module/cortex_m0+/iar/example_build/tx_initialize_low_level.s
+3
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@@ -123,6 +123,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r1, =0
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
MOVS r2, #0x14
STR r1, [r0, r2] // Setup SysTick Reload Value
ports_module/cortex_m23/ac6/example_build/tx_initialize_low_level.S
+3
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@@ -103,6 +103,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOVW r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m23/gnu/module_manager/src/tx_initialize_low_level.S
+3
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@@ -105,6 +105,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOVW r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m23/iar/example_build/tx_initialize_low_level.s
+3
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@@ -104,6 +104,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
LDR r0, =0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m3/ac5/example_build/tx_initialize_low_level.S
+3
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@@ -185,6 +185,9 @@ _tx_initialize_low_level
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports_module/cortex_m3/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+3
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@@ -116,6 +116,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m3/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+3
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@@ -116,6 +116,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m3/gnu/example_build/tx_initialize_low_level.S
+3
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@@ -109,6 +109,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, #0xE000E000 @ Build address of NVIC registers
MOV r1, #0 @ Build value for SysTick reset
STR r1, [r0, #0x10] @ Reset SysTick Control
STR r1, [r0, #0x18] @ Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] @ Setup SysTick Reload Value
MOV r1, #0x7 @ Build SysTick Control Enable Value
ports_module/cortex_m3/iar/example_build/tx_initialize_low_level.s
+3
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@@ -123,6 +123,9 @@ _tx_initialize_low_level:
; /* Configure SysTick. */
;
MOV r0, #0xE000E000 ; Build address of NVIC registers
MOV r1, #0 ; Build value for SysTick reset
STR r1, [r0, #0x10] ; Reset SysTick Control
STR r1, [r0, #0x18] ; Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
MOV r1, #0x7 ; Build SysTick Control Enable Value
ports_module/cortex_m33/ac6/example_build/tx_initialize_low_level.S
+3
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@@ -103,6 +103,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m33/gnu/module_manager/src/tx_initialize_low_level.S
+3
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@@ -103,6 +103,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m33/iar/example_build/tx_initialize_low_level.s
+3
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@@ -104,6 +104,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m4/ac5/example_build/tx_initialize_low_level.S
+3
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@@ -171,6 +171,9 @@ _tx_initialize_low_level
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m4/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+3
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@@ -116,6 +116,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+3
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@@ -116,6 +116,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m4/gnu/example_build/tx_initialize_low_level.S
+3
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@@ -115,6 +115,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m4/iar/example_build/tx_initialize_low_level.s
+3
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@@ -110,6 +110,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m7/ac5/example_build/tx_initialize_low_level.S
+3
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@@ -171,6 +171,9 @@ _tx_initialize_low_level
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m7/ac6/example_build/sample_threadx/tx_initialize_low_level.S
+3
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@@ -116,6 +116,9 @@ _tx_initialize_low_level:
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m7/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+3
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@@ -116,6 +116,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m7/gnu/example_build/tx_initialize_low_level.S
+3
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@@ -115,6 +115,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value
ports_module/cortex_m7/iar/example_build/tx_initialize_low_level.s
+3
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@@ -110,6 +110,9 @@ _tx_initialize_low_level:
/* Configure SysTick. */
MOV r0, #0xE000E000 // Build address of NVIC registers
MOV r1, #0 // Build value for SysTick reset
STR r1, [r0, #0x10] // Reset SysTick Control
STR r1, [r0, #0x18] // Reset SysTick Counter Value
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] // Setup SysTick Reload Value
MOV r1, #0x7 // Build SysTick Control Enable Value