mirror of
https://github.com/eclipse-threadx/threadx.git
synced 2026-10-06 06:59:08 +08:00
update to v6.1.3
This commit is contained in:
Scott Larson
@@ -36,7 +36,7 @@ $ git clone https://github.com/azure-rtos/threadx.git
|
||||
|
||||
## Building as a static library
|
||||
|
||||
Each component of Azure RTOS comes with a composible CMake-based build system that supports many different MCUs and host systems. Integrating any of these components into your device app code is as simple as adding a git submodule and then including it in your build using the CMake command `add_subdirectory()`.
|
||||
Each component of Azure RTOS comes with a composable CMake-based build system that supports many different MCUs and host systems. Integrating any of these components into your device app code is as simple as adding a git submodule and then including it in your build using the CMake command `add_subdirectory()`.
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||||
|
||||
While the typical usage pattern is to include threadx into your device code source tree to be built & linked with your code, you can compile this project as a standalone static library to confirm your build is set up correctly.
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||||
|
||||
@@ -103,7 +103,7 @@ The following are references to additional Azure RTOS and Azure IoT in general:
|
||||
| | |
|
||||
|---|---|
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||||
| TraceX Installer | https://aka.ms/azrtos-tracex-installer |
|
||||
| Azure RTOS Documenation and Guides: | https://docs.microsoft.com/azure/rtos |
|
||||
| Azure RTOS Documentation and Guides: | https://docs.microsoft.com/azure/rtos |
|
||||
| Azure RTOS Website: | https://azure.microsoft.com/services/rtos/ |
|
||||
| Azure RTOS Sales Questions: | https://azure-rtos.ms-iot-contact.com/ |
|
||||
| For technical questions check out Microsoft Q/A for Azure IoT: | https://aka.ms/QnA/azure-rtos |
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||||
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+5
-2
@@ -26,7 +26,7 @@
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||||
/* APPLICATION INTERFACE DEFINITION RELEASE */
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||||
/* */
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||||
/* tx_api.h PORTABLE C */
|
||||
/* 6.1.2 */
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||||
/* 6.1.3 */
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||||
/* AUTHOR */
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||||
/* */
|
||||
/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -58,6 +58,9 @@
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||||
/* moved TX_THREAD_GET_SYSTEM_ */
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||||
/* STATE to tx_api.h, */
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||||
/* resulting in version 6.1.2 */
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||||
/* 12-31-2020 William E. Lamie Modified comment(s), and */
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||||
/* increased patch version, */
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||||
/* resulting in version 6.1.3 */
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||||
/* */
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||||
/**************************************************************************/
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||||
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@@ -90,7 +93,7 @@ extern "C" {
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#define AZURE_RTOS_THREADX
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#define THREADX_MAJOR_VERSION 6
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#define THREADX_MINOR_VERSION 1
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#define THREADX_PATCH_VERSION 2
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#define THREADX_PATCH_VERSION 3
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/* Define the following symbol for backward compatibility */
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#define EL_PRODUCT_THREADX
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@@ -10,37 +10,40 @@
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/**************************************************************************/
|
||||
|
||||
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||||
/**************************************************************************/
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||||
/**************************************************************************/
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||||
/** */
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/** ThreadX Component */
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/** */
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/** Module Interface (API) */
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/** */
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||||
/**************************************************************************/
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/**************************************************************************/
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||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
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||||
/** ThreadX Component */
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/** */
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/** Module Interface (API) */
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/** */
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/**************************************************************************/
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||||
/**************************************************************************/
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||||
|
||||
|
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/**************************************************************************/
|
||||
/* */
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||||
/* APPLICATION INTERFACE DEFINITION RELEASE */
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/* */
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/* txm_module.h PORTABLE C */
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||||
/* 6.1 */
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/**************************************************************************/
|
||||
/* */
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||||
/* APPLICATION INTERFACE DEFINITION RELEASE */
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||||
/* */
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||||
/* txm_module.h PORTABLE C */
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||||
/* 6.1.3 */
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||||
/* AUTHOR */
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||||
/* */
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||||
/* Scott Larson, Microsoft Corporation */
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||||
/* */
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||||
/* DESCRIPTION */
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||||
/* */
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||||
/* This file defines the basic module constants, interface structures, */
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||||
/* and function prototypes. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file defines the basic module constants, interface structures, */
|
||||
/* and function prototypes. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
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||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 12-31-2020 Scott Larson Modified comment(s), added */
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||||
/* port-specific extension, */
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||||
/* resulting in version 6.1.3 */
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/* */
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||||
/**************************************************************************/
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@@ -329,6 +332,8 @@ extern "C" {
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#define TXM_MODULE_OBJECT_ALLOCATE_CALL 95
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#define TXM_MODULE_OBJECT_DEALLOCATE_CALL 96
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#define TXM_MODULE_PORT_EXTENSION_API_ID_START 500
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#define TXM_MODULE_PORT_EXTENSION_API_ID_END 999
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/* Determine the API call IDs for other components. */
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@@ -508,7 +513,7 @@ typedef struct TXM_MODULE_ALLOCATED_OBJECT_STRUCT
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*txm_module_allocated_object_next,
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*txm_module_allocated_object_previous;
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ULONG txm_module_object_size;
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} TXM_MODULE_ALLOCATED_OBJECT;
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} TXM_MODULE_ALLOCATED_OBJECT;
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/* Determine if module code is being compiled. If so, remap the ThreadX API to
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@@ -571,6 +576,7 @@ VOID _txm_module_usbx_duo_callback_request(TXM_MODULE_CALLBACK_MESSAGE *callbac
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resident portion of the application. */
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#define txm_module_manager_initialize _txm_module_manager_initialize
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#define txm_module_manager_absolute_load _txm_module_manager_absolute_load
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#define txm_module_manager_in_place_load _txm_module_manager_in_place_load
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#define txm_module_manager_file_load _txm_module_manager_file_load
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#define txm_module_manager_memory_load _txm_module_manager_memory_load
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@@ -607,6 +613,7 @@ UINT _txm_module_manager_application_request(ULONG request, ALIGN_TYPE param_1,
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UINT _txm_module_manager_file_load(TXM_MODULE_INSTANCE *module_instance, CHAR *module_name, FX_MEDIA *media_ptr, CHAR *file_name);
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#endif
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UINT _txm_module_manager_initialize(VOID *module_memory_start, ULONG module_memory_size);
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UINT _txm_module_manager_absolute_load(TXM_MODULE_INSTANCE *module_instance, CHAR *name, VOID *module_location);
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UINT _txm_module_manager_in_place_load(TXM_MODULE_INSTANCE *module_instance, CHAR *name, VOID *module_location);
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UINT _txm_module_manager_internal_load(TXM_MODULE_INSTANCE *module_instance, CHAR *name, VOID *module_location,
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ULONG code_size, VOID *code_allocation_ptr, ULONG code_allocation_size);
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File diff suppressed because it is too large
Load Diff
@@ -12,8 +12,8 @@
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/**************************************************************************/
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||||
/**************************************************************************/
|
||||
/** */
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||||
/** ThreadX Component */
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||||
/** */
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||||
/** ThreadX Component */
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||||
/** */
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||||
/** Module Manager */
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||||
/** */
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||||
@@ -36,50 +36,53 @@
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||||
#include "txm_module_manager_util.h"
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#include "txm_module_manager_dispatch.h"
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||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_kernel_dispatch PORTABLE C */
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||||
/* 6.1 */
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||||
/**************************************************************************/
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||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_kernel_dispatch PORTABLE C */
|
||||
/* 6.1.3 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function dispatches the module's kernel request based upon the */
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||||
/* ID and parameters specified in the request. */
|
||||
/* */
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||||
/* INPUT */
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||||
/* */
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||||
/* kernel_request Module's kernel request */
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||||
/* param_1 First parameter */
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/* param_2 Second parameter */
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||||
/* param_3 Third parameter */
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||||
/* */
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||||
/* OUTPUT */
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||||
/* */
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||||
/* status Completion status */
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||||
/* */
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||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_manager_application_request Application-specific req */
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||||
/* _txm_module_manager_object_pointer_get Find object pointer */
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||||
/* _txm_module_manager_thread_create Module thread create */
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||||
/* [_txm_module_manager_*_dispatch] Optional external */
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||||
/* component dispatch */
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||||
/* ThreadX API Calls */
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||||
/* */
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||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function dispatches the module's kernel request based upon the */
|
||||
/* ID and parameters specified in the request. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* kernel_request Module's kernel request */
|
||||
/* param_1 First parameter */
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||||
/* param_2 Second parameter */
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||||
/* param_3 Third parameter */
|
||||
/* */
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||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_manager_application_request Application-specific req */
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||||
/* _txm_module_manager_object_pointer_get Find object pointer */
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||||
/* _txm_module_manager_thread_create Module thread create */
|
||||
/* [_txm_module_manager_*_dispatch] Optional external */
|
||||
/* component dispatch */
|
||||
/* ThreadX API Calls */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 12-31-2020 Scott Larson Modified comment(s), added */
|
||||
/* port-specific dispatch, */
|
||||
/* resulting in version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ALIGN_TYPE _txm_module_manager_kernel_dispatch(ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2)
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@@ -679,6 +682,15 @@ TXM_MODULE_INSTANCE *module_instance;
|
||||
|
||||
default:
|
||||
{
|
||||
#ifdef TXM_MODULE_PORT_DISPATCH
|
||||
/* Is this a port-specific request? */
|
||||
if ((kernel_request >= TXM_MODULE_PORT_EXTENSION_API_ID_START) && (kernel_request <= TXM_MODULE_PORT_EXTENSION_API_ID_END))
|
||||
{
|
||||
/* Yes, call the port-specific dispatcher. */
|
||||
return_value = (ALIGN_TYPE) _txm_module_manager_port_dispatch(module_instance, kernel_request, param_0, param_1, param_2);
|
||||
}
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||||
#endif
|
||||
|
||||
/* Determine if an application request is present. */
|
||||
if (kernel_request >= TXM_APPLICATION_REQUEST_ID_BASE)
|
||||
{
|
||||
|
||||
@@ -10,15 +10,15 @@
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
@@ -29,47 +29,48 @@
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_start PORTABLE C */
|
||||
/* 6.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_start PORTABLE C */
|
||||
/* 6.1.3 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function starts execution of the specified module. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Module instance pointer */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_manager_name_build Build module:thread name */
|
||||
/* _txm_module_manager_thread_create Module thread create */
|
||||
/* _tx_mutex_get Get protection mutex */
|
||||
/* _tx_mutex_put Release protection mutex */
|
||||
/* _tx_queue_create Create module callback queue */
|
||||
/* _tx_queue_delete Delete module callback queue */
|
||||
/* _tx_thread_resume Resume start thread */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function starts execution of the specified module. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Module instance pointer */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_manager_thread_create Module thread create */
|
||||
/* _tx_mutex_get Get protection mutex */
|
||||
/* _tx_mutex_put Release protection mutex */
|
||||
/* _tx_queue_create Create module callback queue */
|
||||
/* _tx_queue_delete Delete module callback queue */
|
||||
/* _tx_thread_resume Resume start thread */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 12-31-2020 Scott Larson Modified comment(s), */
|
||||
/* resulting in version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UINT _txm_module_manager_start(TXM_MODULE_INSTANCE *module_instance)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -26,7 +26,7 @@
|
||||
/* APPLICATION INTERFACE DEFINITION RELEASE */
|
||||
/* */
|
||||
/* tx_api.h PORTABLE SMP */
|
||||
/* 6.1.1 */
|
||||
/* 6.1.3 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -47,6 +47,9 @@
|
||||
/* 10-16-2020 William E. Lamie Modified comment(s), and */
|
||||
/* increased patch version, */
|
||||
/* resulting in version 6.1.1 */
|
||||
/* 12-31-2020 William E. Lamie Modified comment(s), and */
|
||||
/* increased patch version, */
|
||||
/* resulting in version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
@@ -86,7 +89,7 @@ extern "C" {
|
||||
#define AZURE_RTOS_THREADX
|
||||
#define THREADX_MAJOR_VERSION 6
|
||||
#define THREADX_MINOR_VERSION 1
|
||||
#define THREADX_PATCH_VERSION 1
|
||||
#define THREADX_PATCH_VERSION 3
|
||||
|
||||
/* Define the following symbol for backward compatibility */
|
||||
#define EL_PRODUCT_THREADX
|
||||
|
||||
@@ -12,8 +12,8 @@
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
@@ -32,58 +32,61 @@
|
||||
#include "tx_initialize.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_create PORTABLE SMP */
|
||||
/* 6.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_create PORTABLE SMP */
|
||||
/* 6.1.3 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* William E. Lamie, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function creates a thread and places it on the list of created */
|
||||
/* threads. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* thread_ptr Thread control block pointer */
|
||||
/* name_ptr Pointer to thread name string */
|
||||
/* entry_function Entry function of the thread */
|
||||
/* entry_input 32-bit input value to thread */
|
||||
/* stack_start Pointer to start of stack */
|
||||
/* stack_size Stack size in bytes */
|
||||
/* priority Priority of thread (0-31) */
|
||||
/* */
|
||||
/* This function creates a thread and places it on the list of created */
|
||||
/* threads. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* thread_ptr Thread control block pointer */
|
||||
/* name_ptr Pointer to thread name string */
|
||||
/* entry_function Entry function of the thread */
|
||||
/* entry_input 32-bit input value to thread */
|
||||
/* stack_start Pointer to start of stack */
|
||||
/* stack_size Stack size in bytes */
|
||||
/* priority Priority of thread (0-31) */
|
||||
/* preempt_threshold Preemption threshold */
|
||||
/* time_slice Thread time-slice value */
|
||||
/* auto_start Automatic start selection */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* return status Thread create return status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_thread_smp_rebalance_execute_list Rebalance execution list */
|
||||
/* _tx_thread_stack_build Build initial thread stack */
|
||||
/* _tx_thread_system_resume Resume automatic start thread */
|
||||
/* _tx_thread_system_ni_resume Noninterruptable resume thread*/
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application Code */
|
||||
/* _tx_timer_initialize Create system timer thread */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* time_slice Thread time-slice value */
|
||||
/* auto_start Automatic start selection */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* return status Thread create return status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_thread_smp_rebalance_execute_list Rebalance execution list */
|
||||
/* _tx_thread_stack_build Build initial thread stack */
|
||||
/* _tx_thread_system_resume Resume automatic start thread */
|
||||
/* _tx_thread_system_ni_resume Noninterruptable resume thread*/
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application Code */
|
||||
/* _tx_timer_initialize Create system timer thread */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
/* 12-31-2020 Andres Mlinar Modified comment(s), */
|
||||
/* resulting in version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UINT _tx_thread_create(TX_THREAD *thread_ptr, CHAR *name_ptr, VOID (*entry_function)(ULONG id), ULONG entry_input,
|
||||
UINT _tx_thread_create(TX_THREAD *thread_ptr, CHAR *name_ptr,
|
||||
VOID (*entry_function)(ULONG id), ULONG entry_input,
|
||||
VOID *stack_start, ULONG stack_size, UINT priority, UINT preempt_threshold,
|
||||
ULONG time_slice, UINT auto_start)
|
||||
{
|
||||
@@ -135,7 +138,7 @@ ALIGN_TYPE updated_stack_start;
|
||||
list. */
|
||||
|
||||
/* Initialize thread control block to all zeros. */
|
||||
TX_MEMSET(thread_ptr, 0, (sizeof(TX_THREAD)));
|
||||
TX_MEMSET(thread_ptr, 0, sizeof(TX_THREAD));
|
||||
|
||||
/* Place the supplied parameters into the thread's control block. */
|
||||
thread_ptr -> tx_thread_name = name_ptr;
|
||||
@@ -190,7 +193,7 @@ ALIGN_TYPE updated_stack_start;
|
||||
disable all preemption. */
|
||||
thread_ptr -> tx_thread_preempt_threshold = ((UINT) 0);
|
||||
thread_ptr -> tx_thread_user_preempt_threshold = ((UINT) 0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
@@ -207,7 +210,7 @@ ALIGN_TYPE updated_stack_start;
|
||||
TX_THREAD_CREATE_TIMEOUT_SETUP(thread_ptr)
|
||||
|
||||
/* Perform any additional thread setup activities for tool or user purpose. */
|
||||
TX_THREAD_CREATE_INTERNAL_EXTENSION(thread_ptr)
|
||||
TX_THREAD_CREATE_INTERNAL_EXTENSION(thread_ptr)
|
||||
|
||||
/* Call the target specific stack frame building routine to build the
|
||||
thread's initial stack and to setup the actual stack pointer in the
|
||||
@@ -249,7 +252,7 @@ ALIGN_TYPE updated_stack_start;
|
||||
|
||||
/* Setup this thread's created links. */
|
||||
thread_ptr -> tx_thread_created_previous = previous_thread;
|
||||
thread_ptr -> tx_thread_created_next = next_thread;
|
||||
thread_ptr -> tx_thread_created_next = next_thread;
|
||||
}
|
||||
|
||||
/* Increment the thread created count. */
|
||||
@@ -272,7 +275,7 @@ ALIGN_TYPE updated_stack_start;
|
||||
/* Temporarily disable preemption. */
|
||||
_tx_thread_preempt_disable++;
|
||||
#endif
|
||||
|
||||
|
||||
/* Determine if an automatic start was requested. If so, call the resume
|
||||
thread function and then check for a preemption condition. */
|
||||
if (auto_start == TX_AUTO_START)
|
||||
@@ -294,13 +297,13 @@ ALIGN_TYPE updated_stack_start;
|
||||
/* Perform any additional activities for tool or user purpose. */
|
||||
TX_THREAD_CREATE_EXTENSION(thread_ptr)
|
||||
|
||||
/* Call the resume thread function to make this thread ready. */
|
||||
/* Call the resume thread function to make this thread ready. */
|
||||
_tx_thread_system_resume(thread_ptr);
|
||||
|
||||
|
||||
/* Disable interrupts again. */
|
||||
TX_DISABLE
|
||||
#endif
|
||||
|
||||
|
||||
/* Determine if the execution list needs to be re-evaluated. */
|
||||
if (_tx_thread_smp_current_state_get() >= TX_INITIALIZE_IN_PROGRESS)
|
||||
{
|
||||
@@ -325,7 +328,7 @@ ALIGN_TYPE updated_stack_start;
|
||||
/* Debug entry. */
|
||||
_tx_thread_smp_debug_entry_insert(12, 0, thread_ptr);
|
||||
#endif
|
||||
|
||||
|
||||
/* Get the core index. */
|
||||
core_index = TX_SMP_CORE_ID;
|
||||
|
||||
@@ -337,7 +340,7 @@ ALIGN_TYPE updated_stack_start;
|
||||
/* Debug entry. */
|
||||
_tx_thread_smp_debug_entry_insert(13, 0, thread_ptr);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
#ifndef TX_NOT_INTERRUPTABLE
|
||||
|
||||
@@ -377,7 +380,7 @@ ALIGN_TYPE updated_stack_start;
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Always return a success. */
|
||||
/* Return success. */
|
||||
return(TX_SUCCESS);
|
||||
}
|
||||
|
||||
|
||||
@@ -38,7 +38,7 @@
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_smp_high_level_initialize PORTABLE SMP */
|
||||
/* 6.1 */
|
||||
/* 6.1.3 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -69,6 +69,10 @@
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
/* 12-31-2020 William E. Lamie Modified comments, added */
|
||||
/* cast to address a MISRA */
|
||||
/* compliant issue, */
|
||||
/* resulting in version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
void _tx_thread_smp_high_level_initialize(void)
|
||||
@@ -95,7 +99,7 @@ void _tx_thread_smp_high_level_initialize(void)
|
||||
TX_MEMSET(&_tx_thread_smp_protect_wait_list[0], 0xff, sizeof(_tx_thread_smp_protect_wait_list));
|
||||
|
||||
/* Set the wait list size so we can access it from assembly functions. */
|
||||
_tx_thread_smp_protect_wait_list_size = TX_THREAD_SMP_PROTECT_WAIT_LIST_SIZE;
|
||||
_tx_thread_smp_protect_wait_list_size = ((ULONG) TX_THREAD_SMP_PROTECT_WAIT_LIST_SIZE);
|
||||
|
||||
#ifndef TX_THREAD_SMP_DYNAMIC_CORE_MAX
|
||||
|
||||
|
||||
@@ -12,8 +12,8 @@
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Timer */
|
||||
/** */
|
||||
@@ -26,47 +26,48 @@
|
||||
/* Include necessary system files. */
|
||||
|
||||
#include "tx_api.h"
|
||||
#ifdef TX_MISRA_ENABLE
|
||||
#include "tx_trace.h"
|
||||
#include "tx_timer.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_time_get PORTABLE C */
|
||||
/* 6.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_time_get PORTABLE C */
|
||||
/* 6.1.3 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* William E. Lamie, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function retrieves the internal, free-running, system clock */
|
||||
/* and returns it to the caller. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* _tx_timer_system_clock Returns the system clock value */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application Code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* */
|
||||
/* This function retrieves the internal, free-running, system clock */
|
||||
/* and returns it to the caller. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* _tx_timer_system_clock Returns the system clock value */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application Code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
/* 12-31-2020 Andres Mlinar Modified comment(s), */
|
||||
/* resulting in version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _tx_time_get(VOID)
|
||||
@@ -98,5 +99,4 @@ ULONG temp_time;
|
||||
/* Return the time. */
|
||||
return(temp_time);
|
||||
}
|
||||
#endif /* TX_MISRA_ENABLE */
|
||||
|
||||
|
||||
@@ -35,7 +35,7 @@
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_timer_interrupt ARCv2_EM/MetaWare */
|
||||
;/* 6.1 */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -72,6 +72,10 @@
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* 12-31-2020 Scott Larson Modified comment(s), remove */
|
||||
;/* unneeded load of */
|
||||
;/* _tx_thread_preempt_disable, */
|
||||
;/* resulting in version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_timer_interrupt(VOID)
|
||||
@@ -187,7 +191,6 @@ __tx_something_expired:
|
||||
; {
|
||||
;
|
||||
ld r2, [gp, _tx_timer_expired@sda] ; Pickup timer expired flag
|
||||
ld r4, [gp, _tx_thread_preempt_disable@sda] ; Pickup preempt disable
|
||||
breq r2, 0, __tx_timer_dont_activate ; If not set, skip expiration processing
|
||||
;
|
||||
; /* Process the timer expiration. */
|
||||
|
||||
@@ -35,7 +35,7 @@
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_timer_interrupt ARC_HS/MetaWare */
|
||||
;/* 6.1 */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -72,6 +72,10 @@
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* 12-31-2020 Scott Larson Modified comment(s), remove */
|
||||
;/* unneeded load of */
|
||||
;/* _tx_thread_preempt_disable, */
|
||||
;/* resulting in version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_timer_interrupt(VOID)
|
||||
@@ -187,7 +191,6 @@ __tx_something_expired:
|
||||
; {
|
||||
;
|
||||
ld r2, [gp, _tx_timer_expired@sda] ; Pickup timer expired flag
|
||||
ld r4, [gp, _tx_thread_preempt_disable@sda] ; Pickup preempt disable
|
||||
breq r2, 0, __tx_timer_dont_activate ; If not set, skip expiration processing
|
||||
;
|
||||
; /* Process the timer expiration. */
|
||||
|
||||
@@ -1,48 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
|
||||
<configuration id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048" name="Debug">
|
||||
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
|
||||
<provider class="com.arm.eclipse.builder.armcc.discovery.ArmCompiler6LanguageSettingsProvider" console="false" env-hash="-890320463837788586" id="com.arm.eclipse.builder.armcc.v6.langprovider" keep-relative-paths="false" name="Arm Compiler 6 Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
|
||||
<language-scope id="com.arm.eclipse.builder.armcc.lang.c.ac6"/>
|
||||
|
||||
<language-scope id="com.arm.eclipse.builder.armcc.lang.cpp.ac6"/>
|
||||
|
||||
</provider>
|
||||
|
||||
</extension>
|
||||
|
||||
</configuration>
|
||||
|
||||
<configuration id="com.arm.eclipse.build.config.v6.exe.release.base.262471578" name="Release">
|
||||
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
|
||||
<provider class="com.arm.eclipse.builder.armcc.discovery.ArmCompiler6LanguageSettingsProvider" console="false" env-hash="-936373864897685072" id="com.arm.eclipse.builder.armcc.v6.langprovider" keep-relative-paths="false" name="Arm Compiler 6 Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
|
||||
<language-scope id="com.arm.eclipse.builder.armcc.lang.c.ac6"/>
|
||||
|
||||
<language-scope id="com.arm.eclipse.builder.armcc.lang.cpp.ac6"/>
|
||||
|
||||
</provider>
|
||||
|
||||
</extension>
|
||||
|
||||
</configuration>
|
||||
|
||||
</project>
|
||||
@@ -1,48 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
|
||||
<configuration id="com.arm.eclipse.build.config.v6.lib.debug.base.332565915" name="Debug">
|
||||
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
|
||||
<provider class="com.arm.eclipse.builder.armcc.discovery.ArmCompiler6LanguageSettingsProvider" console="false" env-hash="-890320463837788586" id="com.arm.eclipse.builder.armcc.v6.langprovider" keep-relative-paths="false" name="Arm Compiler 6 Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
|
||||
<language-scope id="com.arm.eclipse.builder.armcc.lang.c.ac6"/>
|
||||
|
||||
<language-scope id="com.arm.eclipse.builder.armcc.lang.cpp.ac6"/>
|
||||
|
||||
</provider>
|
||||
|
||||
</extension>
|
||||
|
||||
</configuration>
|
||||
|
||||
<configuration id="com.arm.eclipse.build.config.v6.lib.release.base.979090268" name="Release">
|
||||
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
|
||||
<provider class="com.arm.eclipse.builder.armcc.discovery.ArmCompiler6LanguageSettingsProvider" console="false" env-hash="-936373864897685072" id="com.arm.eclipse.builder.armcc.v6.langprovider" keep-relative-paths="false" name="Arm Compiler 6 Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
|
||||
<language-scope id="com.arm.eclipse.builder.armcc.lang.c.ac6"/>
|
||||
|
||||
<language-scope id="com.arm.eclipse.builder.armcc.lang.cpp.ac6"/>
|
||||
|
||||
</provider>
|
||||
|
||||
</extension>
|
||||
|
||||
</configuration>
|
||||
|
||||
</project>
|
||||
File diff suppressed because it is too large
Load Diff
@@ -26,7 +26,7 @@
|
||||
/* PORT SPECIFIC C INFORMATION RELEASE */
|
||||
/* */
|
||||
/* tx_port.h Cortex-M23/GNU */
|
||||
/* 6.1 */
|
||||
/* 6.1.3 */
|
||||
/* */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
@@ -48,6 +48,10 @@
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 12-31-2020 Scott Larson Modified comment(s), */
|
||||
/* remove unneeded headers, */
|
||||
/* use builtins, */
|
||||
/* resulting in version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
@@ -67,8 +71,6 @@
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <arm_compat.h>
|
||||
#include "ARMCM23_TZ.h" /* For intrinsic functions. */
|
||||
|
||||
/* Define ThreadX basic types for this port. */
|
||||
|
||||
@@ -275,8 +277,6 @@ ULONG _tx_misra_time_stamp_get(VOID);
|
||||
|
||||
#ifndef TX_MISRA_ENABLE
|
||||
|
||||
//register unsigned int _ipsr __asm ("MRS %[result], ipsr" : [result] "=r" (_ipsr) : );
|
||||
inline static unsigned int _get_ipsr(void);
|
||||
inline static unsigned int _get_ipsr(void)
|
||||
{
|
||||
unsigned int _ipsr;
|
||||
@@ -352,7 +352,7 @@ extern void _tx_thread_secure_stack_initialize(void);
|
||||
|
||||
#ifndef TX_DISABLE_INLINE
|
||||
|
||||
#define TX_LOWEST_SET_BIT_CALCULATE(m, b) (b) = (UINT) __clz(__rbit((m)));
|
||||
#define TX_LOWEST_SET_BIT_CALCULATE(m, b) (b) = (UINT) __builtin_ctz(m);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -364,41 +364,73 @@ extern void _tx_thread_secure_stack_initialize(void);
|
||||
is used to define a local function save area for the disable and restore
|
||||
macros. */
|
||||
|
||||
#ifdef TX_DISABLE_INLINE
|
||||
#ifndef TX_DISABLE_INLINE
|
||||
|
||||
UINT _tx_thread_interrupt_disable(VOID);
|
||||
VOID _tx_thread_interrupt_restore(UINT previous_posture);
|
||||
/* Define GNU specific macros, with in-line assembly for performance. */
|
||||
|
||||
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save;
|
||||
__attribute__( ( always_inline ) ) static inline unsigned int __disable_interrupts(void)
|
||||
{
|
||||
|
||||
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
|
||||
unsigned int primask_value;
|
||||
|
||||
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
|
||||
__asm__ volatile (" MRS %0,PRIMASK ": "=r" (primask_value) );
|
||||
__asm__ volatile (" CPSID i" : : : "memory" );
|
||||
return(primask_value);
|
||||
}
|
||||
|
||||
#else
|
||||
__attribute__( ( always_inline ) ) static inline void __restore_interrupts(unsigned int primask_value)
|
||||
{
|
||||
|
||||
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
|
||||
#define TX_DISABLE was_masked = __disable_irq();
|
||||
#define TX_RESTORE if (was_masked == 0) __enable_irq();
|
||||
__asm__ volatile (" MSR PRIMASK,%0": : "r" (primask_value): "memory" );
|
||||
}
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline unsigned int __get_primask_value(void)
|
||||
{
|
||||
|
||||
unsigned int primask_value;
|
||||
|
||||
__asm__ volatile (" MRS %0,PRIMASK ": "=r" (primask_value) );
|
||||
return(primask_value);
|
||||
}
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline void __enable_interrupts(void)
|
||||
{
|
||||
|
||||
__asm__ volatile (" CPSIE i": : : "memory" );
|
||||
}
|
||||
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline void _tx_thread_system_return_inline(void)
|
||||
{
|
||||
unsigned int interrupt_save;
|
||||
|
||||
*((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
|
||||
if (_get_ipsr() == 0)
|
||||
{
|
||||
interrupt_save = __get_primask_value();
|
||||
__enable_interrupts();
|
||||
__restore_interrupts(interrupt_save);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
|
||||
|
||||
#define TX_DISABLE interrupt_save = __disable_interrupts();
|
||||
#define TX_RESTORE __restore_interrupts(interrupt_save);
|
||||
|
||||
|
||||
/* Redefine _tx_thread_system_return for improved performance. */
|
||||
|
||||
#define _tx_thread_system_return _tx_thread_system_return_inline
|
||||
|
||||
|
||||
static void _tx_thread_system_return_inline(void)
|
||||
{
|
||||
unsigned int was_masked;
|
||||
#else
|
||||
|
||||
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
|
||||
|
||||
/* Set PendSV to invoke ThreadX scheduler. */
|
||||
*((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
|
||||
if (_get_ipsr() == 0)
|
||||
{
|
||||
was_masked = __disable_irq();
|
||||
__enable_irq();
|
||||
if (was_masked != 0)
|
||||
__disable_irq();
|
||||
}
|
||||
}
|
||||
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
|
||||
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
|
||||
#endif
|
||||
|
||||
|
||||
@@ -406,7 +438,7 @@ unsigned int was_masked;
|
||||
|
||||
#ifdef TX_THREAD_INIT
|
||||
CHAR _tx_version_id[] =
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/GNU Version 6.1 *";
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/GNU Version 6.1.3 *";
|
||||
#else
|
||||
#ifdef TX_MISRA_ENABLE
|
||||
extern CHAR _tx_version_id[100];
|
||||
|
||||
@@ -5,12 +5,12 @@
|
||||
|
||||
1. Building the ThreadX run-time Library
|
||||
|
||||
|
||||
An example .bat file is in the example_build directory.
|
||||
|
||||
|
||||
2. Demonstration System
|
||||
|
||||
|
||||
No demonstration example is provided.
|
||||
|
||||
|
||||
3. System Initialization
|
||||
@@ -127,6 +127,18 @@ For generic code revision information, please refer to the readme_threadx_generi
|
||||
file, which is included in your distribution. The following details the revision
|
||||
information associated with this specific port of ThreadX:
|
||||
|
||||
12-31-2020 The following files were
|
||||
changed/added for port specific version 6.1.3:
|
||||
|
||||
|
||||
tx_port.h Remove unneeded include files,
|
||||
use builtin functions,
|
||||
modified comments.
|
||||
|
||||
tx_thread_secure_stack.c Remove unneeded include file,
|
||||
use inline get/set functions,
|
||||
modified comments.
|
||||
|
||||
09-30-2020 Initial ThreadX 6.1 version for Cortex-M23 using GNU tools.
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,175 @@
|
||||
Microsoft's Azure RTOS ThreadX for Renesas RXv2
|
||||
|
||||
Using the CC-RX Tools
|
||||
|
||||
1. Building the ThreadX run-time Library
|
||||
|
||||
Please see the Samples repository on GitHub for the Azure RTOS demonstrations
|
||||
for the RXv2.
|
||||
|
||||
|
||||
2. Demonstration System
|
||||
|
||||
Please see the Samples repository on GitHub for the Azure RTOS demonstrations
|
||||
for the RXv2
|
||||
|
||||
|
||||
3. System Initialization
|
||||
|
||||
The system entry point using Renesas tools is at the label _PowerON_Reset_PC.
|
||||
Use the resetprg.c file that comes with your release. Most notable is that Threadx
|
||||
applications run in supervisor mode and do not use user mode. Hence switching to
|
||||
user mode has been commented out.
|
||||
|
||||
The vector area is set up using either intprg.c or in the file tx_initialize_low_level.src.
|
||||
The file tx_initialize_low_level.src is responsible for setting up various system data
|
||||
structures, interrupt vectors, and a periodic timer. This is the ideal place add
|
||||
application specific hardware initialization code.
|
||||
|
||||
ThreadX utilizes CMT0 as a periodic timer interrupt source. The CMT0 interrupt is
|
||||
typically setup for 10ms periodic interrupts and the interrupt priority level is set to
|
||||
level 7. You may change any of the timer parameters to suit your needs.
|
||||
|
||||
In addition, _tx_initialize_low_level determines the first available address for use by
|
||||
the application, which is supplied as the sole input parameter to your application
|
||||
definition function, tx_application_define(). The mechanism is implemented by creating the
|
||||
FREEMEM section, this section should be linked last in the RAM area. tx_initialize_low_level
|
||||
will pick up the starting label of this section and put it in the global variable:
|
||||
_tx_initialize_unused_memory
|
||||
|
||||
|
||||
4. Context Switch, Register Usage and Stack Frames
|
||||
|
||||
The RXv2 port for ThreadX uses the first software interrupt, SWINT, i.e., interrupt #17,
|
||||
to perform context switch. This ISR is thus reserved when using ThreadX and the SWINT
|
||||
should not be manipulated in any way by the application. The port will setup the
|
||||
interrupt within _tx_initialize_low_level and the compiler will automatically install
|
||||
the necessary interrupt vector. As such no additional initialization is necessary by the
|
||||
application.
|
||||
|
||||
The following defines the saved context stack frame used by the ThreadX port. The
|
||||
state of the CPU registers at the time of a context switch is saved on the running
|
||||
thread's stack The top of the suspended thread's stack is pointed to by
|
||||
tx_thread_stack_ptr in the associated thread control block TX_THREAD.
|
||||
|
||||
Offset Interrupted Stack Frame
|
||||
|
||||
0x00 1
|
||||
0x04 ACC0
|
||||
0x08 ACC1
|
||||
0x0C R6
|
||||
0x10 R7
|
||||
0x14 R8
|
||||
0x18 R9
|
||||
0x1C R10
|
||||
0x20 R11
|
||||
0x24 R12
|
||||
0x28 R13
|
||||
0x2C FPSW
|
||||
0x30 R14
|
||||
0x34 R15
|
||||
0x38 R3
|
||||
0x3C R4
|
||||
0x40 R5
|
||||
0x44 R1
|
||||
0x48 R2
|
||||
0x4C PC - return address
|
||||
0x50 PSW
|
||||
|
||||
Note: By default ccrx does not save the state of the accumulator registers ACC0 and ACC1
|
||||
when entering an ISR. This means that if the ISR uses any of the DSP instructions the
|
||||
content of those registers could be corrupted. Saving and restoring of the acummulators
|
||||
can be enabled by adding the -save_acc command line option.
|
||||
|
||||
|
||||
5. Improving Performance
|
||||
|
||||
The distribution version of ThreadX is built without any compiler
|
||||
optimizations. This makes it easy to debug because you can trace or set
|
||||
breakpoints inside of ThreadX itself. Of course, this costs some
|
||||
performance. To make ThreadX run faster, you can change the ThreadX Library
|
||||
project to disable debug information and enable the desired optimizations.
|
||||
|
||||
In addition, you can eliminate the ThreadX basic API error checking by
|
||||
compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING
|
||||
defined before tx_api.h is included.
|
||||
|
||||
|
||||
6. Timer Processing
|
||||
|
||||
Timer processign is performed by calling __tx_timer_interrupt(). This should usually be done
|
||||
from within the callback of a periodic timer with a period of 100Hz. In the sample projects
|
||||
a Renesas Fit CMT periodic timer module (rx_cmt) is used as the timer source.
|
||||
|
||||
|
||||
7. Interrupt Handling
|
||||
|
||||
Interrupt handling is unaffected by the ThreadX port as such user interrupts can be
|
||||
written according to the toolchain's documentation. It is recommended not to use interrupt
|
||||
priority 15 as this is the priority of the context switch interrupt. However using interrupt
|
||||
priority 15 won't cause any negative side effectd but doing so may may slightly reduce
|
||||
performance. Please refer to the toolchain documentation for additional details on how to
|
||||
define interupt service routines.
|
||||
|
||||
|
||||
8. Execution Profiling
|
||||
|
||||
The RX port adds support for the Execution Profiling Kit (EPK). The EPK consists
|
||||
of the files tx_execution_profile.c and tx_execution_profile.h. See the documentation
|
||||
of the EPK for generic usage details.
|
||||
|
||||
To add the EPK to your RXv2 release make the following modifications:
|
||||
|
||||
* Enable the following define for both the Threadx library and the application
|
||||
TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
* in tx_port.h, change around line 183
|
||||
change #define TX_THREAD_EXTENSION_3
|
||||
into #include "tx_execution_profile.h"
|
||||
|
||||
* Setup CMT1 as a free running 16 bit timer.
|
||||
|
||||
* In tx_execution_profile.h, change following around line 74:
|
||||
|
||||
#ifdef TX_EXECUTION_64BIT_TIME
|
||||
typedef unsigned long long EXECUTION_TIME;
|
||||
#define TX_THREAD_EXTENSION_3 unsigned long long tx_thread_execution_time_total; \
|
||||
unsigned long long tx_thread_execution_time_last_start;
|
||||
#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFFFFFFFFFFFFFF
|
||||
#else
|
||||
typedef unsigned long EXECUTION_TIME;
|
||||
#define TX_THREAD_EXTENSION_3 unsigned long tx_thread_execution_time_total; \
|
||||
unsigned long tx_thread_execution_time_last_start;
|
||||
#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFF
|
||||
#endif
|
||||
|
||||
/* Define basic constants for the execution profile kit. */
|
||||
|
||||
#define TX_EXECUTION_TIME_SOURCE (EXECUTION_TIME) *((USHORT *) 0x8800A)
|
||||
|
||||
Rebuild the Threadx library and the application.
|
||||
Refer to the EPK documentation how to interpret the results.
|
||||
|
||||
|
||||
9. Revision History
|
||||
|
||||
For generic code revision information, please refer to the readme_threadx_generic.txt
|
||||
file, which is included in your distribution. The following details the revision
|
||||
information associated with this specific port of ThreadX:
|
||||
|
||||
For generic code revision information, please refer to the readme_threadx_generic.txt
|
||||
file, which is included in your distribution. The following details the revision
|
||||
information associated with this specific port of ThreadX:
|
||||
|
||||
|
||||
12-31-2020 Initial ThreadX release for the RXv2 using CC-RXX tools, version 6.1.3
|
||||
|
||||
|
||||
Copyright(c) 1996-2020 Microsoft Corporation
|
||||
|
||||
|
||||
https://azure.com/rtos
|
||||
|
||||
|
||||
|
||||
www.expresslogic.com
|
||||
@@ -0,0 +1,101 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Initialize */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
|
||||
.GLB __tx_initialize_unused_memory
|
||||
|
||||
IPR03 .EQU 87303H
|
||||
IEN03 .EQU 87203H
|
||||
|
||||
.SECTION P,CODE
|
||||
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_initialize_low_level RX/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for any low-level processor */
|
||||
;/* initialization, including setting up interrupt vectors, setting */
|
||||
;/* up a periodic timer interrupt source, saving the system stack */
|
||||
;/* pointer for use in ISR processing later, and finding the first */
|
||||
;/* available RAM memory address for tx_application_define. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
|
||||
.GLB __tx_initialize_low_level
|
||||
__tx_initialize_low_level:
|
||||
;
|
||||
; /* Save the first available memory address. */
|
||||
; _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
|
||||
;
|
||||
MOV.L #free_mem_start, R1 ; Pickup unused memory address
|
||||
MOV.L #__tx_initialize_unused_memory,R2
|
||||
MOV.L R1,[R2] ; Save first free memory address
|
||||
|
||||
; /* Set priority of SWINT to 1. */
|
||||
MOV.L #IPR03, r1
|
||||
MOV.L #1, r2
|
||||
MOV.B r2, [r1]
|
||||
|
||||
; /* Enable SWINT. */
|
||||
MOV.L #IEN03,r1
|
||||
MOV.B [r1], r2
|
||||
OR #(1 << 3), r2
|
||||
MOV.B r2, [r1]
|
||||
|
||||
RTS
|
||||
|
||||
.SECTION FREEMEM ,DATA, ALIGN=4
|
||||
free_mem_start:
|
||||
.BLKL 8 ; this section is last in the link map so we can access the end of RAM memory
|
||||
|
||||
.END
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,171 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
.GLB __tx_thread_system_state
|
||||
.GLB __tx_thread_current_ptr
|
||||
.GLB __tx_thread_system_stack_ptr
|
||||
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_context_save RX/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function saves the context of an executing thread in the */
|
||||
;/* beginning of interrupt processing. The function also ensures that */
|
||||
;/* the system stack is used upon return to the calling ISR. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ISRs */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_context_save(VOID)
|
||||
;{
|
||||
.GLB __tx_thread_context_save
|
||||
__tx_thread_context_save:
|
||||
;
|
||||
; /* Upon entry to this routine, it is assumed that interrupts are locked
|
||||
; out and the (interrupt) stack frame looks like the following:
|
||||
;
|
||||
; (lower address) SP -> [return address of this call]
|
||||
; SP+4 -> Saved R1
|
||||
; SP+8 -> Saved R2
|
||||
; SP+12-> Interrupted PC
|
||||
; SP+16-> Interrupted PSW
|
||||
;
|
||||
; /* Check for a nested interrupt condition. */
|
||||
; if (_tx_thread_system_state++)
|
||||
; {
|
||||
;
|
||||
|
||||
MOV.L #__tx_thread_system_state, R1 ; pick up address of system state
|
||||
MOV.L [R1], R2 ; pick up system state
|
||||
CMP #0, R2 ; 0 -> no nesting
|
||||
BEQ __tx_thread_not_nested_save
|
||||
;
|
||||
; /* Nested interrupt condition. */
|
||||
;
|
||||
ADD #1, r2 ; _tx_thread_system_state++
|
||||
MOV.L r2, [r1]
|
||||
|
||||
;
|
||||
; /* Save the rest of the scratch registers on the interrupt stack and return to the
|
||||
; calling ISR. */
|
||||
POP R1 ; recuperate return address from stack
|
||||
PUSHM R3-R5
|
||||
PUSHM R14-R15
|
||||
PUSHC FPSW ; (top) FPSW, R14, R15, R3, R4, R5, R1, R2, PC, PSW (bottom)
|
||||
JMP R1 ; return address was preserved in R1
|
||||
|
||||
;
|
||||
__tx_thread_not_nested_save:
|
||||
; }
|
||||
;
|
||||
; /* Otherwise, not nested, check to see if a thread was running. */
|
||||
; else if (_tx_thread_current_ptr)
|
||||
; {
|
||||
;
|
||||
ADD #1, R2 ; _tx_thread_system_state++
|
||||
MOV.L R2, [R1]
|
||||
|
||||
MOV.L #__tx_thread_current_ptr, R2 ; Pickup current thread pointer
|
||||
MOV.L [R2], R2
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_idle_system_save ; Yes, idle system is running - idle restore
|
||||
;
|
||||
; /* Move stack frame over to the current threads stack. */
|
||||
; /* complete stack frame with registers not saved yet (R3-R5, R14-R15, FPSW) */
|
||||
;
|
||||
MVFC USP, R1 ; pick up user stack pointer
|
||||
MOV.L 16[R0], R2
|
||||
MOV.L R2, [-R1] ; save PSW on thread stack
|
||||
MOV.L 12[R0], R2
|
||||
MOV.L R2, [-R1] ; save PC on thread stack
|
||||
MOV.L 8[R0], R2
|
||||
MOV.L R2, [-R1] ; save R2 on thread stack
|
||||
MOV.L 4[R0], R2
|
||||
MOV.L R2, [-R1] ; save R1 on thread stack
|
||||
MOV.L R5, [-R1] ; save R5 on thread stack
|
||||
MOV.L R4, [-R1] ; save R4 on thread stack
|
||||
MOV.L R3, [-R1] ; save R3 on thread stack
|
||||
MOV.L R15, [-R1] ; save R15 on thread stack
|
||||
MOV.L R14, [-R1] ; save R14 on thread stack
|
||||
MVFC FPSW, R3
|
||||
MOV.L R3, [-R1] ; save FPSW on thread stack
|
||||
|
||||
POP R2 ; pick up return address from interrupt stack
|
||||
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom
|
||||
MVTC R1, USP ; set user/thread stack pointer
|
||||
JMP R2 ; return to ISR
|
||||
|
||||
; }
|
||||
; else
|
||||
; {
|
||||
;
|
||||
__tx_thread_idle_system_save:
|
||||
;
|
||||
; /* Interrupt occurred in the scheduling loop. */
|
||||
;
|
||||
POP R1 ; pick up return address
|
||||
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
|
||||
JMP R1 ; return to caller
|
||||
;
|
||||
; }
|
||||
;}
|
||||
.END
|
||||
|
||||
@@ -0,0 +1,96 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_interrupt_control RX/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for changing the interrupt lockout */
|
||||
;/* posture of the system. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* new_posture New interrupt lockout posture */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* old_posture Old interrupt lockout posture */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* Application Code */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
;{
|
||||
|
||||
.GLB __tx_thread_interrupt_control
|
||||
__tx_thread_interrupt_control:
|
||||
;
|
||||
; /* Pickup current interrupt lockout posture. */
|
||||
;
|
||||
|
||||
MVFC PSW, R2 ; Save PSW to R2
|
||||
MOV.L R2, R3 ; Make a copy of PSW in r3
|
||||
|
||||
;
|
||||
; /* Apply the new interrupt posture. */
|
||||
;
|
||||
|
||||
BTST #16, R1 ; test I bit of PSW of "new posture"
|
||||
BMNE #16, R2 ; conditionally set I bit of intermediate posture
|
||||
|
||||
MVTC R2, PSW ; save intermediate posture to PSW
|
||||
|
||||
MOV.L R3,R1 ; Get original SR
|
||||
RTS ; Return to caller
|
||||
;}
|
||||
.END
|
||||
|
||||
@@ -0,0 +1,180 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
.GLB __tx_thread_execute_ptr
|
||||
.GLB __tx_thread_current_ptr
|
||||
.GLB __tx_timer_time_slice
|
||||
;
|
||||
.SECTION P,CODE
|
||||
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule RX/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function waits for a thread control block pointer to appear in */
|
||||
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
;/* in the variable, the corresponding thread is resumed. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* _tx_thread_system_return Return to system from thread */
|
||||
;/* _tx_thread_context_restore Restore thread's context */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_schedule(VOID)
|
||||
;{
|
||||
.GLB __tx_thread_schedule
|
||||
__tx_thread_schedule:
|
||||
;
|
||||
; /* Enable interrupts. */
|
||||
;
|
||||
SETPSW I
|
||||
;
|
||||
; /* Wait for a thread to execute. */
|
||||
; do
|
||||
; {
|
||||
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
|
||||
__tx_thread_schedule_loop:
|
||||
MOV.L [R1],R2 ; Pickup next thread to execute
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
|
||||
;
|
||||
; }
|
||||
; while(_tx_thread_execute_ptr == TX_NULL);
|
||||
;
|
||||
; /* Yes! We have a thread to execute. Lockout interrupts and
|
||||
; transfer control to it. */
|
||||
;
|
||||
CLRPSW I ; disable interrupts
|
||||
;
|
||||
; /* Setup the current thread pointer. */
|
||||
; _tx_thread_current_ptr = _tx_thread_execute_ptr;
|
||||
;
|
||||
MOV.L #__tx_thread_current_ptr, R3
|
||||
MOV.L R2,[R3] ; Setup current thread pointer
|
||||
;
|
||||
; /* Increment the run count for this thread. */
|
||||
; _tx_thread_current_ptr -> tx_thread_run_count++;
|
||||
;
|
||||
MOV.L 4[R2],R3 ; Pickup run count
|
||||
ADD #1,R3 ; Increment run counter
|
||||
MOV.L R3,4[R2] ; Store it back in control block
|
||||
;
|
||||
; /* Setup time-slice, if present. */
|
||||
; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
|
||||
;
|
||||
MOV.L 24[R2],R3 ; Pickup thread time-slice
|
||||
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
|
||||
MOV.L R3, [R4] ; Setup time-slice
|
||||
;
|
||||
; /* Switch to the thread's stack. */
|
||||
; SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
|
||||
SETPSW U ; user stack mode
|
||||
MOV.L 8[R2],R0 ; Pickup stack pointer
|
||||
;
|
||||
; /* Determine if an interrupt frame or a synchronous task suspension frame
|
||||
; is present. */
|
||||
;
|
||||
POP R1 ; Pickup stack type
|
||||
CMP #1, R1 ; Is it an interrupt stack?
|
||||
BNE __tx_thread_synch_return ; No, a synchronous return frame is present.
|
||||
|
||||
POPM R1-R3 ; Restore accumulators.
|
||||
MVTACLO R3, A0
|
||||
MVTACHI R2, A0
|
||||
MVTACGU R1, A0
|
||||
POPM R1-R3
|
||||
MVTACLO R3, A1
|
||||
MVTACHI R2, A1
|
||||
MVTACGU R1, A1
|
||||
|
||||
POPM R6-R13 ; Recover interrupt stack frame
|
||||
POPC FPSW
|
||||
POPM R14-R15
|
||||
POPM R3-R5
|
||||
POPM R1-R2
|
||||
RTE ; return to point of interrupt, this restores PC and PSW
|
||||
|
||||
__tx_thread_synch_return:
|
||||
POPC PSW
|
||||
POPM R6-R13 ; Recover solicited stack frame
|
||||
RTS
|
||||
;
|
||||
;}
|
||||
|
||||
|
||||
.GLB __tx_thread_context_save
|
||||
.GLB __tx_thread_context_restore
|
||||
|
||||
; Software triggered interrupt used to perform context switches.
|
||||
; The priority of this interrupt is set to the lowest priority within
|
||||
; tx_initialize_low_level() and triggered by ThreadX when calling
|
||||
; _tx_thread_system_return().
|
||||
.RVECTOR 27, _tx_software_interrupt_entry
|
||||
.GLB _tx_software_interrupt_entry
|
||||
_tx_software_interrupt_entry:
|
||||
|
||||
PUSHM R1-R2
|
||||
|
||||
BSR __tx_thread_context_save
|
||||
|
||||
BRA __tx_thread_context_restore
|
||||
|
||||
.END
|
||||
@@ -0,0 +1,155 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_stack_build RX/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function builds a stack frame on the supplied thread's stack. */
|
||||
;/* The stack frame results in a fake interrupt return to the supplied */
|
||||
;/* function pointer. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* thread_ptr Pointer to thread control blk */
|
||||
;/* function_ptr Pointer to return function */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_thread_create Create thread service */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
|
||||
;{
|
||||
.GLB __tx_thread_stack_build
|
||||
__tx_thread_stack_build:
|
||||
;
|
||||
;
|
||||
; /* Build an interrupt frame. The form of the fake interrupt stack
|
||||
; on the Renesas RX should look like the following after it is built:
|
||||
;
|
||||
; Stack Top: 1 Interrupt stack frame type
|
||||
; ACC0
|
||||
; ACC1
|
||||
; R6
|
||||
; R7
|
||||
; R8
|
||||
; R9
|
||||
; R10
|
||||
; R11
|
||||
; R12
|
||||
; R13
|
||||
; FPSW
|
||||
; R14
|
||||
; R15
|
||||
; R3
|
||||
; R4
|
||||
; R5
|
||||
; R1
|
||||
; R2
|
||||
; PC
|
||||
; PSW
|
||||
|
||||
;
|
||||
; Stack Bottom: (higher memory address) */
|
||||
;
|
||||
MOV.L 16[R1],R3 ; Pickup end of stack area
|
||||
BCLR #0, R3 ; mask for 4-byte alignment
|
||||
BCLR #1, R3
|
||||
;
|
||||
; /* Build the stack frame. */
|
||||
;
|
||||
MOV.L #30000h, R4
|
||||
MOV.L R4, [-R3] ; initial PSW (SVC mode, U flag set)
|
||||
MOV.L R2, [-R3] ; initial PC
|
||||
MOV.L #0, R4
|
||||
MOV.L R4,[-R3] ; initial R2 ...
|
||||
MOV.L R4,[-R3] ; initial R1 ...
|
||||
MOV.L R4,[-R3] ; initial R5 ...
|
||||
MOV.L R4,[-R3] ; initial R4 ...
|
||||
MOV.L R4,[-R3] ; initial R3 ...
|
||||
MOV.L R4,[-R3] ; initial R15 ...
|
||||
MOV.L R4,[-R3] ; initial R14 ...
|
||||
MVFC FPSW, r4
|
||||
MOV.L R4, [-R3] ; initial FPSW
|
||||
MOV.L #0, R4
|
||||
MOV.L R4,[-R3] ; initial R13 ...
|
||||
MOV.L R4,[-R3] ; initial R12 ...
|
||||
MOV.L R4,[-R3] ; initial R11 ...
|
||||
MOV.L R4,[-R3] ; initial R10 ...
|
||||
MOV.L R4,[-R3] ; initial R9 ...
|
||||
MOV.L R4,[-R3] ; initial R8 ...
|
||||
MOV.L R4,[-R3] ; initial R7 ...
|
||||
MOV.L R4,[-R3] ; initial R6 ...
|
||||
|
||||
MOV.L R4,[-R3] ; Accumulator 1
|
||||
MOV.L R4,[-R3]
|
||||
MOV.L R4,[-R3]
|
||||
|
||||
MOV.L R4,[-R3] ; Accumulator 0
|
||||
MOV.L R4,[-R3]
|
||||
MOV.L R4,[-R3]
|
||||
|
||||
MOV.L #1, R4
|
||||
MOV.L R4,[-R3] ; indicate interrupt stack frame
|
||||
; /* Setup stack pointer. */
|
||||
; thread_ptr -> tx_thread_stack_ptr = R1;
|
||||
MOV.L R3, 8[R1]
|
||||
; store initial SP in thread control block
|
||||
RTS
|
||||
|
||||
;}
|
||||
.END
|
||||
|
||||
@@ -0,0 +1,127 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
.GLB __tx_thread_current_ptr
|
||||
.GLB __tx_timer_time_slice
|
||||
.GLB __tx_thread_schedule
|
||||
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_system_return RX/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is target processor specific. It is used to transfer */
|
||||
;/* control from a thread back to the system. Only a minimal context */
|
||||
;/* is saved since the compiler assumes temp registers are going to get */
|
||||
;/* slicked by a function call anyway. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule Thread scheduling loop */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ThreadX components */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_system_return(VOID)
|
||||
;{
|
||||
.GLB __tx_thread_system_return
|
||||
__tx_thread_system_return:
|
||||
;
|
||||
; /* Save call save registers on the stack. */
|
||||
;
|
||||
PUSHM R6-R13
|
||||
PUSHC PSW
|
||||
MOV.L #0, R1
|
||||
PUSH.L R1 ; solicited stack frame
|
||||
;
|
||||
; /* Lockout interrupts. */
|
||||
;
|
||||
CLRPSW I ; Lockout interrupts
|
||||
;
|
||||
; /* Save current stack in current Thread controle block. */
|
||||
; _tx_thread_current_ptr -> tx_thread_stack_ptr = SP;
|
||||
MOV.L #__tx_thread_current_ptr, R2
|
||||
MOV.L [R2], R3
|
||||
MOV.L R0, 8[R3]
|
||||
|
||||
MOV.L #__tx_timer_time_slice, R4
|
||||
MOV.L [R4], R5
|
||||
|
||||
; /* Determine if the time-slice is active. */
|
||||
; if (_tx_timer_time_slice)
|
||||
; {
|
||||
;
|
||||
CMP #0,R5 ; Is a time-slice present?
|
||||
BEQ __tx_thread_dont_save_ts ; No, don't save the time-slice
|
||||
;
|
||||
; /* Save time-slice for the thread and clear the current time-slice. */
|
||||
; _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice;
|
||||
MOV.L R5,24[R3]
|
||||
; _tx_timer_time_slice = 0;
|
||||
;
|
||||
MOV.L R1, [R4] ; Disable the time-slice
|
||||
;
|
||||
; }
|
||||
__tx_thread_dont_save_ts:
|
||||
;
|
||||
; /* Clear the current thread pointer. */
|
||||
; _tx_thread_current_ptr = TX_NULL;
|
||||
;
|
||||
MOV.L R1, [R2]
|
||||
BRA __tx_thread_schedule
|
||||
;}
|
||||
.END
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,168 @@
|
||||
Microsoft's Azure RTOS ThreadX for Renesas RXv2
|
||||
|
||||
Using the GNU Tools
|
||||
|
||||
|
||||
1. Building the ThreadX run-time Library
|
||||
|
||||
Please see the Samples repository on GitHub for the Azure RTOS demonstrations
|
||||
for the RXv2.
|
||||
|
||||
|
||||
2. Demonstration System
|
||||
|
||||
|
||||
Please see the Samples repository on GitHub for the Azure RTOS demonstrations
|
||||
for the RXv2.
|
||||
|
||||
|
||||
3. System Initialization
|
||||
|
||||
The system entry point using the GNU tools is at the label _PowerON_Reset.
|
||||
|
||||
The vector area is setup in the file tx_initialize_low_level.S. This file is also
|
||||
responsible for setting up various system data structures, interrupt vectors, and
|
||||
the periodic timer interrupt. This file is also an ideal place to add additional hardware
|
||||
initialization code.
|
||||
|
||||
The ThreadX demonstration for the RXv2 utilizes CMT0 as a periodic timer interrupt
|
||||
source. The CMT0 interrupt is typically setup for 10ms periodic interrupts and the
|
||||
interrupt priority level is set to level 7. You may change any of the timer
|
||||
parameters as needed. Increasing the timer interrupt frequency increases the overhead
|
||||
of the timer handling code on the system.
|
||||
|
||||
In addition, _tx_initialize_low_level determines the first available address for use
|
||||
by the application, which is supplied as the sole input parameter to your application
|
||||
definition function, tx_application_define. The first available memory is determined
|
||||
by the location of the '_end' label the is defined in the linker script.
|
||||
'_end' should reference the first memory AFTER all other RAM
|
||||
sections in your linker control file.
|
||||
|
||||
|
||||
4. Context Switch, Register Usage and Stack Frames
|
||||
|
||||
The RXv2 port for ThreadX uses the first software interrupt, SWINT, i.e., interrupt #17,
|
||||
to perform context switch. This ISR is thus reserved when using ThreadX and the SWINT
|
||||
should not be manipulated in any way by the application. The port will setup the
|
||||
interrupt within _tx_initialize_low_level and the compiler will automatically install
|
||||
the necessary interrupt vector. As such no additional initialization is necessary by the
|
||||
application.
|
||||
|
||||
The following defines the saved context stack frame used by the ThreadX port. The
|
||||
state of the CPU registers at the time of a context switch is saved on the running
|
||||
thread's stack The top of the suspended thread's stack is pointed to by
|
||||
tx_thread_stack_ptr in the associated thread control block TX_THREAD.
|
||||
|
||||
Offset Interrupted Stack Frame
|
||||
|
||||
0x00 1
|
||||
0x04 ACC0
|
||||
0x08 ACC1
|
||||
0x0C R6
|
||||
0x10 R7
|
||||
0x14 R8
|
||||
0x18 R9
|
||||
0x1C R10
|
||||
0x20 R11
|
||||
0x24 R12
|
||||
0x28 R13
|
||||
0x2C FPSW
|
||||
0x30 R14
|
||||
0x34 R15
|
||||
0x38 R3
|
||||
0x3C R4
|
||||
0x40 R5
|
||||
0x44 R1
|
||||
0x48 R2
|
||||
0x4C PC - return address
|
||||
0x50 PSW
|
||||
|
||||
Note: By default GNURX does not save the state of the accumulator registers ACC0 and ACC1
|
||||
when entering an ISR. This means that if the ISR uses any of the DSP instructions the
|
||||
content of those registers could be corrupted. Saving and restoring of the acummulators
|
||||
can be enabled by adding the -msave-acc-in-interrupts command line option.
|
||||
|
||||
|
||||
5. Improving Performance
|
||||
|
||||
The distribution version of ThreadX is built without any compiler optimizations. This
|
||||
makes it easy to debug because you can trace or set breakpoints inside of ThreadX itself.
|
||||
Of course, this costs some performance. To make ThreadX run faster, you can change the
|
||||
ThreadX Library project to disable debug information and enable the desired optimizations.
|
||||
|
||||
In addition, you can eliminate the ThreadX basic API error checking by compiling your
|
||||
application code with the symbol TX_DISABLE_ERROR_CHECKING defined before tx_api.h
|
||||
is included.
|
||||
|
||||
|
||||
6. Timer Processing
|
||||
|
||||
Timer processign is performed by calling __tx_timer_interrupt(). This should usually be done
|
||||
from within the callback of a periodic timer with a period of 100Hz. In the sample projects
|
||||
a Renesas Fit CMT periodic timer module (rx_cmt) is used as the timer source.
|
||||
|
||||
|
||||
7. Interrupt Handling
|
||||
|
||||
Interrupt handling is unaffected by the ThreadX port as such user interrupts can be
|
||||
written according to the toolchain's documentation. It is recommended not to use interrupt
|
||||
priority 15 as this is the priority of the context switch interrupt. However using interrupt
|
||||
priority 15 won't cause any negative side effectd but doing so may may slightly reduce
|
||||
performance. Please refer to the toolchain documentation for additional details on how to
|
||||
define interupt service routines.
|
||||
|
||||
|
||||
8. Execution Profiling
|
||||
|
||||
The RX port adds support for the Execution Profiling Kit (EPK). The EPK consists
|
||||
of the files tx_execution_profile.c and tx_execution_profile.h. See the documentation
|
||||
of the EPK for generic usage details.
|
||||
|
||||
To add the EPK to your RXv2 release make the following modifications:
|
||||
|
||||
* Enable the following define for both the Threadx library and the application
|
||||
TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
* in tx_port.h, change around line 183
|
||||
change #define TX_THREAD_EXTENSION_3
|
||||
into #include "tx_execution_profile.h"
|
||||
|
||||
* Setup CMT1 as a free running 16 bit timer.
|
||||
|
||||
* In tx_execution_profile.h, change following around line 74:
|
||||
|
||||
#ifdef TX_EXECUTION_64BIT_TIME
|
||||
typedef unsigned long long EXECUTION_TIME;
|
||||
#define TX_THREAD_EXTENSION_3 unsigned long long tx_thread_execution_time_total; \
|
||||
unsigned long long tx_thread_execution_time_last_start;
|
||||
#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFFFFFFFFFFFFFF
|
||||
#else
|
||||
typedef unsigned long EXECUTION_TIME;
|
||||
#define TX_THREAD_EXTENSION_3 unsigned long tx_thread_execution_time_total; \
|
||||
unsigned long tx_thread_execution_time_last_start;
|
||||
#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFF
|
||||
#endif
|
||||
|
||||
/* Define basic constants for the execution profile kit. */
|
||||
|
||||
#define TX_EXECUTION_TIME_SOURCE (EXECUTION_TIME) *((USHORT *) 0x8800A)
|
||||
|
||||
Rebuild the Threadx library and the application.
|
||||
Refer to the EPK documentation how to interpret the results.
|
||||
|
||||
|
||||
9. Revision History
|
||||
|
||||
For generic code revision information, please refer to the readme_threadx_generic.txt
|
||||
file, which is included in your distribution. The following details the revision
|
||||
information associated with this specific port of ThreadX:
|
||||
|
||||
|
||||
12-31-2020 Initial ThreadX release for the RXv2 using GNURX tools, version 6.1.3
|
||||
|
||||
|
||||
Copyright(c) 1996-2020 Microsoft Corporation
|
||||
|
||||
|
||||
https://azure.com/rtos
|
||||
|
||||
@@ -0,0 +1,93 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Initialize */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
|
||||
.text
|
||||
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_initialize_low_level RX/GNURX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for any low-level processor */
|
||||
;/* initialization, including setting up interrupt vectors, setting */
|
||||
;/* up a periodic timer interrupt source, saving the system stack */
|
||||
;/* pointer for use in ISR processing later, and finding the first */
|
||||
;/* available RAM memory address for tx_application_define. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
.global __tx_initialize_low_level
|
||||
__tx_initialize_low_level:
|
||||
|
||||
;
|
||||
; /* Save the first available memory address. */
|
||||
; _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
|
||||
;
|
||||
MOV.L #_end, R1 ; Pickup unused memory address
|
||||
MOV.L #__tx_initialize_unused_memory, R2
|
||||
MOV.L R1,[R2] ; Save first free memory address
|
||||
|
||||
; /* Set priority of SWINT to 1. */
|
||||
MOV.L #0x87303, r1
|
||||
MOV.L #1, r2
|
||||
MOV.B r2, [r1]
|
||||
|
||||
; /* Enable SWINT. */
|
||||
MOV.L #0x87203,r1
|
||||
MOV.B [r1], r2
|
||||
OR #(1 << 3), r2
|
||||
MOV.B r2, [r1]
|
||||
|
||||
RTS
|
||||
|
||||
|
||||
.end
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,171 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
.global __tx_thread_system_state
|
||||
.global __tx_thread_current_ptr
|
||||
.global __tx_thread_system_stack_ptr
|
||||
|
||||
.text
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_context_save RX/GNURX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function saves the context of an executing thread in the */
|
||||
;/* beginning of interrupt processing. The function also ensures that */
|
||||
;/* the system stack is used upon return to the calling ISR. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ISRs */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_context_save(VOID)
|
||||
;{
|
||||
.global __tx_thread_context_save
|
||||
__tx_thread_context_save:
|
||||
;
|
||||
; /* Upon entry to this routine, it is assumed that interrupts are locked
|
||||
; out and the (interrupt) stack frame looks like the following:
|
||||
;
|
||||
; (lower address) SP -> [return address of this call]
|
||||
; SP+4 -> Saved R1
|
||||
; SP+8 -> Saved R2
|
||||
; SP+12-> Interrupted PC
|
||||
; SP+16-> Interrupted PSW
|
||||
;
|
||||
; /* Check for a nested interrupt condition. */
|
||||
; if (_tx_thread_system_state++)
|
||||
; {
|
||||
;
|
||||
|
||||
MOV.L #__tx_thread_system_state, R1 ; pick up address of system state
|
||||
MOV.L [R1], R2 ; pick up system state
|
||||
CMP #0, R2 ; 0 -> no nesting
|
||||
BEQ __tx_thread_not_nested_save
|
||||
;
|
||||
; /* Nested interrupt condition. */
|
||||
;
|
||||
ADD #1, r2 ; _tx_thread_system_state++
|
||||
MOV.L r2, [r1]
|
||||
|
||||
;
|
||||
; /* Save the rest of the scratch registers on the interrupt stack and return to the
|
||||
; calling ISR. */
|
||||
POP R1 ; recuperate return address from stack
|
||||
PUSHM R3-R5
|
||||
PUSHM R14-R15
|
||||
PUSHC FPSW ; (top) FPSW, R14, R15, R3, R4, R5, R1, R2, PC, PSW (bottom)
|
||||
JMP R1 ; return address was preserved in R1
|
||||
|
||||
;
|
||||
__tx_thread_not_nested_save:
|
||||
; }
|
||||
;
|
||||
; /* Otherwise, not nested, check to see if a thread was running. */
|
||||
; else if (_tx_thread_current_ptr)
|
||||
; {
|
||||
;
|
||||
ADD #1, R2 ; _tx_thread_system_state++
|
||||
MOV.L R2, [R1]
|
||||
|
||||
MOV.L #__tx_thread_current_ptr, R2 ; Pickup current thread pointer
|
||||
MOV.L [R2], R2
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_idle_system_save ; Yes, idle system is running - idle restore
|
||||
;
|
||||
; /* Move stack frame over to the current threads stack. */
|
||||
; /* complete stack frame with registers not saved yet (R3-R5, R14-R15, FPSW) */
|
||||
;
|
||||
MVFC USP, R1 ; pick up user stack pointer
|
||||
MOV.L 16[R0], R2
|
||||
MOV.L R2, [-R1] ; save PSW on thread stack
|
||||
MOV.L 12[R0], R2
|
||||
MOV.L R2, [-R1] ; save PC on thread stack
|
||||
MOV.L 8[R0], R2
|
||||
MOV.L R2, [-R1] ; save R2 on thread stack
|
||||
MOV.L 4[R0], R2
|
||||
MOV.L R2, [-R1] ; save R1 on thread stack
|
||||
MOV.L R5, [-R1] ; save R5 on thread stack
|
||||
MOV.L R4, [-R1] ; save R4 on thread stack
|
||||
MOV.L R3, [-R1] ; save R3 on thread stack
|
||||
MOV.L R15, [-R1] ; save R15 on thread stack
|
||||
MOV.L R14, [-R1] ; save R14 on thread stack
|
||||
MVFC FPSW, R3
|
||||
MOV.L R3, [-R1] ; save FPSW on thread stack
|
||||
|
||||
POP R2 ; pick up return address from interrupt stack
|
||||
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom
|
||||
MVTC R1, USP ; set user/thread stack pointer
|
||||
JMP R2 ; return to ISR
|
||||
|
||||
; }
|
||||
; else
|
||||
; {
|
||||
;
|
||||
__tx_thread_idle_system_save:
|
||||
;
|
||||
; /* Interrupt occurred in the scheduling loop. */
|
||||
;
|
||||
POP R1 ; pick up return address
|
||||
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
|
||||
JMP R1 ; return to caller
|
||||
;
|
||||
; }
|
||||
;}
|
||||
.end
|
||||
|
||||
@@ -0,0 +1,96 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
.text
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_interrupt_control RX/GNURX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for changing the interrupt lockout */
|
||||
;/* posture of the system. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* new_posture New interrupt lockout posture */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* old_posture Old interrupt lockout posture */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* Application Code */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
;{
|
||||
|
||||
.global __tx_thread_interrupt_control
|
||||
__tx_thread_interrupt_control:
|
||||
;
|
||||
; /* Pickup current interrupt lockout posture. */
|
||||
;
|
||||
|
||||
MVFC PSW, R2 ; Save PSW to R2
|
||||
MOV.L R2, R3 ; Make a copy of PSW in r3
|
||||
|
||||
;
|
||||
; /* Apply the new interrupt posture. */
|
||||
;
|
||||
|
||||
BTST #16, R1 ; test I bit of PSW of "new posture"
|
||||
BMNE #16, R2 ; conditionally set I bit of intermediate posture
|
||||
|
||||
MVTC R2, PSW ; save intermediate posture to PSW
|
||||
|
||||
MOV.L R3,R1 ; Get original SR
|
||||
RTS ; Return to caller
|
||||
;}
|
||||
.end
|
||||
|
||||
@@ -0,0 +1,180 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
.global __tx_thread_execute_ptr
|
||||
.global __tx_thread_current_ptr
|
||||
.global __tx_timer_time_slice
|
||||
;
|
||||
.text
|
||||
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule RX/GNURX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function waits for a thread control block pointer to appear in */
|
||||
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
;/* in the variable, the corresponding thread is resumed. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* _tx_thread_system_return Return to system from thread */
|
||||
;/* _tx_thread_context_restore Restore thread's context */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_schedule(VOID)
|
||||
;{
|
||||
.global __tx_thread_schedule
|
||||
__tx_thread_schedule:
|
||||
;
|
||||
; /* Enable interrupts. */
|
||||
;
|
||||
SETPSW I
|
||||
;
|
||||
; /* Wait for a thread to execute. */
|
||||
; do
|
||||
; {
|
||||
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
|
||||
__tx_thread_schedule_loop:
|
||||
MOV.L [R1],R2 ; Pickup next thread to execute
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
|
||||
;
|
||||
; }
|
||||
; while(_tx_thread_execute_ptr == TX_NULL);
|
||||
;
|
||||
; /* Yes! We have a thread to execute. Lockout interrupts and
|
||||
; transfer control to it. */
|
||||
;
|
||||
CLRPSW I ; disable interrupts
|
||||
;
|
||||
; /* Setup the current thread pointer. */
|
||||
; _tx_thread_current_ptr = _tx_thread_execute_ptr;
|
||||
;
|
||||
MOV.L #__tx_thread_current_ptr, R3
|
||||
MOV.L R2,[R3] ; Setup current thread pointer
|
||||
;
|
||||
; /* Increment the run count for this thread. */
|
||||
; _tx_thread_current_ptr -> tx_thread_run_count++;
|
||||
;
|
||||
MOV.L 4[R2],R3 ; Pickup run count
|
||||
ADD #1,R3 ; Increment run counter
|
||||
MOV.L R3,4[R2] ; Store it back in control block
|
||||
;
|
||||
; /* Setup time-slice, if present. */
|
||||
; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
|
||||
;
|
||||
MOV.L 24[R2],R3 ; Pickup thread time-slice
|
||||
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
|
||||
MOV.L R3, [R4] ; Setup time-slice
|
||||
;
|
||||
; /* Switch to the thread's stack. */
|
||||
; SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
|
||||
SETPSW U ; user stack mode
|
||||
MOV.L 8[R2],R0 ; Pickup stack pointer
|
||||
;
|
||||
; /* Determine if an interrupt frame or a synchronous task suspension frame
|
||||
; is present. */
|
||||
;
|
||||
POP R1 ; Pickup stack type
|
||||
CMP #1, R1 ; Is it an interrupt stack?
|
||||
BNE __tx_thread_synch_return ; No, a synchronous return frame is present.
|
||||
|
||||
POPM R1-R3 ; Restore accumulators.
|
||||
MVTACLO R3, A0
|
||||
MVTACHI R2, A0
|
||||
MVTACGU R1, A0
|
||||
POPM R1-R3
|
||||
MVTACLO R3, A1
|
||||
MVTACHI R2, A1
|
||||
MVTACGU R1, A1
|
||||
|
||||
POPM R6-R13 ; Recover interrupt stack frame
|
||||
POPC FPSW
|
||||
POPM R14-R15
|
||||
POPM R3-R5
|
||||
POPM R1-R2
|
||||
RTE ; return to point of interrupt, this restores PC and PSW
|
||||
|
||||
__tx_thread_synch_return:
|
||||
POPC PSW
|
||||
POPM R6-R13 ; Recover solicited stack frame
|
||||
RTS
|
||||
;
|
||||
;}
|
||||
|
||||
|
||||
.global __tx_thread_context_save
|
||||
.global __tx_thread_context_restore
|
||||
|
||||
|
||||
; Software triggered interrupt used to perform context switches.
|
||||
; The priority of this interrupt is set to the lowest priority within
|
||||
; tx_initialize_low_level() and triggered by ThreadX when calling
|
||||
; _tx_thread_system_return().
|
||||
.global $tableentry$27$.rvectors
|
||||
$tableentry$27$.rvectors:
|
||||
|
||||
PUSHM R1-R2
|
||||
|
||||
BSR __tx_thread_context_save
|
||||
|
||||
BRA __tx_thread_context_restore
|
||||
|
||||
.end
|
||||
@@ -0,0 +1,155 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
.text
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_stack_build RX/GNURX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function builds a stack frame on the supplied thread's stack. */
|
||||
;/* The stack frame results in a fake interrupt return to the supplied */
|
||||
;/* function pointer. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* thread_ptr Pointer to thread control blk */
|
||||
;/* function_ptr Pointer to return function */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_thread_create Create thread service */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
|
||||
;{
|
||||
.global __tx_thread_stack_build
|
||||
__tx_thread_stack_build:
|
||||
;
|
||||
;
|
||||
; /* Build an interrupt frame. The form of the fake interrupt stack
|
||||
; on the Renesas RX should look like the following after it is built:
|
||||
;
|
||||
; Stack Top: 1 Interrupt stack frame type
|
||||
; ACC0
|
||||
; ACC1
|
||||
; R6
|
||||
; R7
|
||||
; R8
|
||||
; R9
|
||||
; R10
|
||||
; R11
|
||||
; R12
|
||||
; R13
|
||||
; FPSW
|
||||
; R14
|
||||
; R15
|
||||
; R3
|
||||
; R4
|
||||
; R5
|
||||
; R1
|
||||
; R2
|
||||
; PC
|
||||
; PSW
|
||||
|
||||
;
|
||||
; Stack Bottom: (higher memory address) */
|
||||
;
|
||||
MOV.L 16[R1],R3 ; Pickup end of stack area
|
||||
BCLR #0, R3 ; mask for 4-byte alignment
|
||||
BCLR #1, R3
|
||||
;
|
||||
; /* Build the stack frame. */
|
||||
;
|
||||
MOV.L #30000h, R4
|
||||
MOV.L R4, [-R3] ; initial PSW (SVC mode, U flag set)
|
||||
MOV.L R2, [-R3] ; initial PC
|
||||
MOV.L #0, R4
|
||||
MOV.L R4,[-R3] ; initial R2 ...
|
||||
MOV.L R4,[-R3] ; initial R1 ...
|
||||
MOV.L R4,[-R3] ; initial R5 ...
|
||||
MOV.L R4,[-R3] ; initial R4 ...
|
||||
MOV.L R4,[-R3] ; initial R3 ...
|
||||
MOV.L R4,[-R3] ; initial R15 ...
|
||||
MOV.L R4,[-R3] ; initial R14 ...
|
||||
MVFC FPSW, r4
|
||||
MOV.L R4, [-R3] ; initial FPSW
|
||||
MOV.L #0, R4
|
||||
MOV.L R4,[-R3] ; initial R13 ...
|
||||
MOV.L R4,[-R3] ; initial R12 ...
|
||||
MOV.L R4,[-R3] ; initial R11 ...
|
||||
MOV.L R4,[-R3] ; initial R10 ...
|
||||
MOV.L R4,[-R3] ; initial R9 ...
|
||||
MOV.L R4,[-R3] ; initial R8 ...
|
||||
MOV.L R4,[-R3] ; initial R7 ...
|
||||
MOV.L R4,[-R3] ; initial R6 ...
|
||||
|
||||
MOV.L R4,[-R3] ; Accumulator 1
|
||||
MOV.L R4,[-R3]
|
||||
MOV.L R4,[-R3]
|
||||
|
||||
MOV.L R4,[-R3] ; Accumulator 0
|
||||
MOV.L R4,[-R3]
|
||||
MOV.L R4,[-R3]
|
||||
|
||||
MOV.L #1, R4
|
||||
MOV.L R4,[-R3] ; indicate interrupt stack frame
|
||||
; /* Setup stack pointer. */
|
||||
; thread_ptr -> tx_thread_stack_ptr = R1;
|
||||
MOV.L R3, 8[R1]
|
||||
; store initial SP in thread control block
|
||||
RTS
|
||||
|
||||
;}
|
||||
.end
|
||||
|
||||
@@ -0,0 +1,127 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
.global __tx_thread_current_ptr
|
||||
.global __tx_timer_time_slice
|
||||
.global __tx_thread_schedule
|
||||
|
||||
.text
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_system_return RX/GNURX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is target processor specific. It is used to transfer */
|
||||
;/* control from a thread back to the system. Only a minimal context */
|
||||
;/* is saved since the compiler assumes temp registers are going to get */
|
||||
;/* slicked by a function call anyway. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule Thread scheduling loop */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ThreadX components */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_system_return(VOID)
|
||||
;{
|
||||
.GLB __tx_thread_system_return
|
||||
__tx_thread_system_return:
|
||||
;
|
||||
; /* Save call save registers on the stack. */
|
||||
;
|
||||
PUSHM R6-R13
|
||||
PUSHC PSW
|
||||
MOV.L #0, R1
|
||||
PUSH.L R1 ; solicited stack frame
|
||||
;
|
||||
; /* Lockout interrupts. */
|
||||
;
|
||||
CLRPSW I ; Lockout interrupts
|
||||
;
|
||||
; /* Save current stack in current Thread controle block. */
|
||||
; _tx_thread_current_ptr -> tx_thread_stack_ptr = SP;
|
||||
MOV.L #__tx_thread_current_ptr, R2
|
||||
MOV.L [R2], R3
|
||||
MOV.L R0, 8[R3]
|
||||
|
||||
MOV.L #__tx_timer_time_slice, R4
|
||||
MOV.L [R4], R5
|
||||
|
||||
; /* Determine if the time-slice is active. */
|
||||
; if (_tx_timer_time_slice)
|
||||
; {
|
||||
;
|
||||
CMP #0,R5 ; Is a time-slice present?
|
||||
BEQ __tx_thread_dont_save_ts ; No, don't save the time-slice
|
||||
;
|
||||
; /* Save time-slice for the thread and clear the current time-slice. */
|
||||
; _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice;
|
||||
MOV.L R5,24[R3]
|
||||
; _tx_timer_time_slice = 0;
|
||||
;
|
||||
MOV.L R1, [R4] ; Disable the time-slice
|
||||
;
|
||||
; }
|
||||
__tx_thread_dont_save_ts:
|
||||
;
|
||||
; /* Clear the current thread pointer. */
|
||||
; _tx_thread_current_ptr = TX_NULL;
|
||||
;
|
||||
MOV.L R1, [R2]
|
||||
BRA __tx_thread_schedule
|
||||
;}
|
||||
.end
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,163 @@
|
||||
Microsoft's Azure RTOS ThreadX for Renesas RXv2
|
||||
|
||||
Using the IAR Tools
|
||||
|
||||
|
||||
1. Building the ThreadX run-time Library
|
||||
|
||||
Please see the Samples repository on GitHub for the Azure RTOS demonstrations
|
||||
for the RXv2.
|
||||
|
||||
|
||||
2. Demonstration System
|
||||
|
||||
Please see the Samples repository on GitHub for the Azure RTOS demonstrations
|
||||
for the RXv2.
|
||||
|
||||
|
||||
3. System Initialization
|
||||
|
||||
The system entry point using the IAR tools is at the label __iar_program_start.
|
||||
|
||||
The vector area is setup in the file tx_initialize_low_level.s. This file is also
|
||||
responsible for setting up various system data structures, interrupt vectors, and
|
||||
the periodic timer interrupt. This file is also an ideal place add hardware
|
||||
initialization code.
|
||||
|
||||
The ThreadX demonstration for the RXv2 utilizes CMT0 as a periodic timer interrupt
|
||||
source. The CMT0 interrupt is typically setup for 10ms periodic interrupts and the
|
||||
interrupt priority level is set to level 7. You may change any of the timer
|
||||
parameters as needed.
|
||||
|
||||
In addition, _tx_initialize_low_level determines the first available address for use
|
||||
by the application, which is supplied as the sole input parameter to your application
|
||||
definition function, tx_application_define. The first available memory is determined
|
||||
by the location of the FREEMEM section so it should be placed AFTER all other RAM
|
||||
sections in your linker control file.
|
||||
|
||||
|
||||
4. Context Switch, Register Usage and Stack Frames
|
||||
|
||||
The RXv2 port for ThreadX uses the first software interrupt, SWINT, i.e., interrupt #17,
|
||||
to perform context switch. This ISR is thus reserved when using ThreadX and the SWINT
|
||||
should not be manipulated in any way by the application. The port will setup the
|
||||
interrupt within _tx_initialize_low_level and the compiler will automatically install
|
||||
the necessary interrupt vector. As such no additional initialization is necessary by the
|
||||
application.
|
||||
|
||||
The following defines the saved context stack frame used by the ThreadX port. The
|
||||
state of the CPU registers at the time of a context switch is saved on the running
|
||||
thread's stack The top of the suspended thread's stack is pointed to by
|
||||
tx_thread_stack_ptr in the associated thread control block TX_THREAD.
|
||||
|
||||
Offset Interrupted Stack Frame
|
||||
|
||||
0x00 1
|
||||
0x04 ACC0
|
||||
0x08 ACC1
|
||||
0x0C R6
|
||||
0x10 R7
|
||||
0x14 R8
|
||||
0x18 R9
|
||||
0x1C R10
|
||||
0x20 R11
|
||||
0x24 R12
|
||||
0x28 R13
|
||||
0x2C FPSW
|
||||
0x30 R14
|
||||
0x34 R15
|
||||
0x38 R3
|
||||
0x3C R4
|
||||
0x40 R5
|
||||
0x44 R1
|
||||
0x48 R2
|
||||
0x4C PC - return address
|
||||
0x50 PSW
|
||||
|
||||
Note: By default IAR does not save the state of the accumulator registers ACC0 and ACC1
|
||||
when entering an ISR. This means that if the ISR uses any of the DSP instructions the
|
||||
content of those registers could be corrupted. Saving and restoring of the acummulators
|
||||
can be enabled by adding the --save_acc command line option.
|
||||
|
||||
|
||||
5. Improving Performance
|
||||
|
||||
The distribution version of ThreadX is built without any compiler optimizations. This
|
||||
makes it easy to debug because you can trace or set breakpoints inside of ThreadX itself.
|
||||
Of course, this costs some performance. To make ThreadX run faster, you can change the
|
||||
ThreadX Library project to disable debug information and enable the desired optimizations.
|
||||
|
||||
In addition, you can eliminate the ThreadX basic API error checking by compiling your
|
||||
application code with the symbol TX_DISABLE_ERROR_CHECKING defined before tx_api.h
|
||||
is included.
|
||||
|
||||
|
||||
6. Timer Processing
|
||||
|
||||
Timer processign is performed by calling __tx_timer_interrupt(). This should usually be done
|
||||
from within the callback of a periodic timer with a period of 100Hz. In the sample projects
|
||||
a Renesas Fit CMT periodic timer module (rx_cmt) is used as the timer source.
|
||||
|
||||
|
||||
7. Interrupt Handling
|
||||
|
||||
Interrupt handling is unaffected by the ThreadX port as such user interrupts can be
|
||||
written according to the toolchain's documentation. It is recommended not to use interrupt
|
||||
priority 15 as this is the priority of the context switch interrupt. However using interrupt
|
||||
priority 15 won't cause any negative side effectd but doing so may may slightly reduce
|
||||
performance. Please refer to the toolchain documentation for additional details on how to
|
||||
define interupt service routines.
|
||||
|
||||
|
||||
8. Execution Profiling
|
||||
|
||||
The RX port adds support for the Execution Profiling Kit (EPK). The EPK consists
|
||||
of the files tx_execution_profile.c and tx_execution_profile.h. See the documentation
|
||||
of the EPK for generic usage details.
|
||||
|
||||
To add the EPK to your RXv2 release make the following modifications:
|
||||
|
||||
* Enable the following define for both the Threadx library and the application
|
||||
TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
* in tx_port.h, change around line 183
|
||||
change #define TX_THREAD_EXTENSION_3
|
||||
into #include "tx_execution_profile.h"
|
||||
|
||||
* Setup CMT1 as a free running 16 bit timer.
|
||||
|
||||
* In tx_execution_profile.h, change following around line 74:
|
||||
|
||||
#ifdef TX_EXECUTION_64BIT_TIME
|
||||
typedef unsigned long long EXECUTION_TIME;
|
||||
#define TX_THREAD_EXTENSION_3 unsigned long long tx_thread_execution_time_total; \
|
||||
unsigned long long tx_thread_execution_time_last_start;
|
||||
#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFFFFFFFFFFFFFF
|
||||
#else
|
||||
typedef unsigned long EXECUTION_TIME;
|
||||
#define TX_THREAD_EXTENSION_3 unsigned long tx_thread_execution_time_total; \
|
||||
unsigned long tx_thread_execution_time_last_start;
|
||||
#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFF
|
||||
#endif
|
||||
|
||||
/* Define basic constants for the execution profile kit. */
|
||||
|
||||
#define TX_EXECUTION_TIME_SOURCE (EXECUTION_TIME) *((USHORT *) 0x8800A)
|
||||
|
||||
Rebuild the Threadx library and the application.
|
||||
Refer to the EPK documentation how to interpret the results.
|
||||
|
||||
|
||||
9. Revision History
|
||||
|
||||
For generic code revision information, please refer to the readme_threadx_generic.txt
|
||||
file, which is included in your distribution. The following details the revision
|
||||
information associated with this specific port of ThreadX:
|
||||
|
||||
12-31-2020 Initial ThreadX release for the RXv2using IAR tools, version 6.1.3
|
||||
|
||||
|
||||
Copyright(c) 1996-2020 Microsoft Corporation
|
||||
|
||||
|
||||
https://azure.com/rtos
|
||||
@@ -0,0 +1,99 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Initialize */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
|
||||
extern __tx_initialize_unused_memory
|
||||
|
||||
section .text:CODE:ROOT
|
||||
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_initialize_low_level RX/IAR */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for any low-level processor */
|
||||
;/* initialization, including setting up interrupt vectors, setting */
|
||||
;/* up a periodic timer interrupt source, saving the system stack */
|
||||
;/* pointer for use in ISR processing later, and finding the first */
|
||||
;/* available RAM memory address for tx_application_define. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
public __tx_initialize_low_level
|
||||
|
||||
__tx_initialize_low_level:
|
||||
|
||||
; /* Save the first available memory address. */
|
||||
; _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
|
||||
;
|
||||
MOV.L #__tx_free_memory_start, R1 ; Pickup unused memory address
|
||||
MOV.L #__tx_initialize_unused_memory,R2
|
||||
MOV.L R1,[R2] ; Save first free memory address
|
||||
|
||||
; /* Set priority of SWINT to 1. */
|
||||
MOV.L #0x87303, r1
|
||||
MOV.L #1, r2
|
||||
MOV.B r2, [r1]
|
||||
|
||||
; /* Enable SWINT. */
|
||||
MOV.L #0x87203, r1
|
||||
MOV.B [r1], r2
|
||||
OR #(1 << 3), r2
|
||||
MOV.B r2, [r1]
|
||||
|
||||
RTS
|
||||
|
||||
section FREEMEM:DATA
|
||||
public __tx_free_memory_start
|
||||
__tx_free_memory_start
|
||||
DS32 4
|
||||
|
||||
END
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,170 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
extern __tx_thread_system_state
|
||||
extern __tx_thread_current_ptr
|
||||
|
||||
section .text:CODE:ROOT
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_context_save RX/IAR */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function saves the context of an executing thread in the */
|
||||
;/* beginning of interrupt processing. The function also ensures that */
|
||||
;/* the system stack is used upon return to the calling ISR. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ISRs */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_context_save(VOID)
|
||||
;{
|
||||
public __tx_thread_context_save
|
||||
|
||||
__tx_thread_context_save:
|
||||
;
|
||||
; /* Upon entry to this routine, it is assumed that interrupts are locked
|
||||
; out and the (interrupt) stack frame looks like the following:
|
||||
;
|
||||
; (lower address) SP -> [return address of this call]
|
||||
; SP+4 -> Saved R1
|
||||
; SP+8 -> Saved R2
|
||||
; SP+12-> Interrupted PC
|
||||
; SP+16-> Interrupted PSW
|
||||
;
|
||||
; /* Check for a nested interrupt condition. */
|
||||
; if (_tx_thread_system_state++)
|
||||
; {
|
||||
;
|
||||
|
||||
MOV.L #__tx_thread_system_state, R1 ; pick up address of system state
|
||||
MOV.L [R1], R2 ; pick up system state
|
||||
CMP #0, R2 ; 0 -> no nesting
|
||||
BEQ __tx_thread_not_nested_save
|
||||
;
|
||||
; /* Nested interrupt condition. */
|
||||
;
|
||||
ADD #1, r2 ; _tx_thread_system_state++
|
||||
MOV.L r2, [r1]
|
||||
|
||||
;
|
||||
; /* Save the rest of the scratch registers on the interrupt stack and return to the
|
||||
; calling ISR. */
|
||||
POP R1 ; recuperate return address from stack
|
||||
PUSHM R3-R5
|
||||
PUSHM R14-R15
|
||||
PUSHC FPSW ; (top) FPSW, R14, R15, R3, R4, R5, R1, R2, PC, PSW (bottom)
|
||||
JMP R1 ; return address was preserved in R1
|
||||
|
||||
;
|
||||
__tx_thread_not_nested_save:
|
||||
; }
|
||||
;
|
||||
; /* Otherwise, not nested, check to see if a thread was running. */
|
||||
; else if (_tx_thread_current_ptr)
|
||||
; {
|
||||
;
|
||||
ADD #1, R2 ; _tx_thread_system_state++
|
||||
MOV.L R2, [R1]
|
||||
|
||||
MOV.L #__tx_thread_current_ptr, R2 ; Pickup current thread pointer
|
||||
MOV.L [R2], R2
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_idle_system_save ; Yes, idle system is running - idle restore
|
||||
;
|
||||
; /* Move stack frame over to the current threads stack. */
|
||||
; /* complete stack frame with registers not saved yet (R3-R5, R14-R15, FPSW) */
|
||||
;
|
||||
MVFC USP, R1 ; pick up user stack pointer
|
||||
MOV.L 16[R0], R2
|
||||
MOV.L R2, [-R1] ; save PSW on thread stack
|
||||
MOV.L 12[R0], R2
|
||||
MOV.L R2, [-R1] ; save PC on thread stack
|
||||
MOV.L 8[R0], R2
|
||||
MOV.L R2, [-R1] ; save R2 on thread stack
|
||||
MOV.L 4[R0], R2
|
||||
MOV.L R2, [-R1] ; save R1 on thread stack
|
||||
MOV.L R5, [-R1] ; save R5 on thread stack
|
||||
MOV.L R4, [-R1] ; save R4 on thread stack
|
||||
MOV.L R3, [-R1] ; save R3 on thread stack
|
||||
MOV.L R15, [-R1] ; save R15 on thread stack
|
||||
MOV.L R14, [-R1] ; save R14 on thread stack
|
||||
MVFC FPSW, R3
|
||||
MOV.L R3, [-R1] ; save FPSW on thread stack
|
||||
|
||||
POP R2 ; pick up return address from interrupt stack
|
||||
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom
|
||||
MVTC R1, USP ; set user/thread stack pointer
|
||||
JMP R2 ; return to ISR
|
||||
|
||||
; }
|
||||
; else
|
||||
; {
|
||||
;
|
||||
__tx_thread_idle_system_save:
|
||||
;
|
||||
; /* Interrupt occurred in the scheduling loop. */
|
||||
;
|
||||
POP R1 ; pick up return address
|
||||
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
|
||||
JMP R1 ; return to caller
|
||||
;
|
||||
; }
|
||||
;}
|
||||
END
|
||||
@@ -0,0 +1,93 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
section .text:CODE:ROOT
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_interrupt_control RX/IAR */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for changing the interrupt lockout */
|
||||
;/* posture of the system. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* new_posture New interrupt lockout posture */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* old_posture Old interrupt lockout posture */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* Application Code */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
;{
|
||||
public __tx_thread_interrupt_control
|
||||
__tx_thread_interrupt_control:
|
||||
;
|
||||
; /* Pickup current interrupt lockout posture. */
|
||||
;
|
||||
|
||||
MVFC PSW, R2 ; Save PSW to R2
|
||||
MOV.L R2, R3 ; Make a copy of PSW in r3
|
||||
|
||||
;
|
||||
; /* Apply the new interrupt posture. */
|
||||
;
|
||||
|
||||
BTST #16, R1 ; test I bit of PSW of "new posture"
|
||||
BMNE #16, R2 ; conditionally set I bit of intermediate posture
|
||||
|
||||
MVTC R2, PSW ; save intermediate posture to PSW
|
||||
|
||||
MOV.L R3,R1 ; Get original SR
|
||||
RTS ; Return to caller
|
||||
;}
|
||||
END
|
||||
@@ -0,0 +1,179 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
extern __tx_thread_execute_ptr
|
||||
extern __tx_thread_current_ptr
|
||||
extern __tx_timer_time_slice
|
||||
|
||||
section .text:CODE:ROOT
|
||||
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule RX/IAR */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function waits for a thread control block pointer to appear in */
|
||||
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
;/* in the variable, the corresponding thread is resumed. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* _tx_thread_system_return Return to system from thread */
|
||||
;/* _tx_thread_context_restore Restore thread's context */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_schedule(VOID)
|
||||
;{
|
||||
public __tx_thread_schedule
|
||||
|
||||
__tx_thread_schedule:
|
||||
;
|
||||
; /* Enable interrupts. */
|
||||
;
|
||||
SETPSW I
|
||||
;
|
||||
; /* Wait for a thread to execute. */
|
||||
; do
|
||||
; {
|
||||
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
|
||||
__tx_thread_schedule_loop:
|
||||
MOV.L [R1],R2 ; Pickup next thread to execute
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
|
||||
;
|
||||
; }
|
||||
; while(_tx_thread_execute_ptr == TX_NULL);
|
||||
;
|
||||
; /* Yes! We have a thread to execute. Lockout interrupts and
|
||||
; transfer control to it. */
|
||||
;
|
||||
CLRPSW I ; disable interrupts
|
||||
;
|
||||
; /* Setup the current thread pointer. */
|
||||
; _tx_thread_current_ptr = _tx_thread_execute_ptr;
|
||||
;
|
||||
MOV.L #__tx_thread_current_ptr, R3
|
||||
MOV.L R2,[R3] ; Setup current thread pointer
|
||||
;
|
||||
; /* Increment the run count for this thread. */
|
||||
; _tx_thread_current_ptr -> tx_thread_run_count++;
|
||||
;
|
||||
MOV.L 4[R2],R3 ; Pickup run count
|
||||
ADD #1,R3 ; Increment run counter
|
||||
MOV.L R3,4[R2] ; Store it back in control block
|
||||
;
|
||||
; /* Setup time-slice, if present. */
|
||||
; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
|
||||
;
|
||||
MOV.L 24[R2],R3 ; Pickup thread time-slice
|
||||
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
|
||||
MOV.L R3, [R4] ; Setup time-slice
|
||||
;
|
||||
; /* Switch to the thread's stack. */
|
||||
; SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
|
||||
SETPSW U ; user stack mode
|
||||
MOV.L 8[R2],R0 ; Pickup stack pointer
|
||||
;
|
||||
; /* Determine if an interrupt frame or a synchronous task suspension frame
|
||||
; is present. */
|
||||
;
|
||||
POP R1 ; Pickup stack type
|
||||
CMP #1, R1 ; Is it an interrupt stack?
|
||||
BNE __tx_thread_synch_return ; No, a synchronous return frame is present.
|
||||
|
||||
POPM R1-R3 ; Restore accumulators.
|
||||
MVTACLO R3, A0
|
||||
MVTACHI R2, A0
|
||||
MVTACGU R1, A0
|
||||
POPM R1-R3
|
||||
MVTACLO R3, A1
|
||||
MVTACHI R2, A1
|
||||
MVTACGU R1, A1
|
||||
|
||||
POPM R6-R13 ; Recover interrupt stack frame
|
||||
POPC FPSW
|
||||
POPM R14-R15
|
||||
POPM R3-R5
|
||||
POPM R1-R2
|
||||
RTE ; return to point of interrupt, this restores PC and PSW
|
||||
|
||||
__tx_thread_synch_return:
|
||||
POPC PSW
|
||||
POPM R6-R13 ; Recover solicited stack frame
|
||||
RTS
|
||||
;
|
||||
;}
|
||||
|
||||
extern __tx_thread_context_save
|
||||
extern __tx_thread_context_restore
|
||||
|
||||
; Software triggered interrupt used to perform context switches.
|
||||
; The priority of this interrupt is set to the lowest priority within
|
||||
; tx_initialize_low_level() and triggered by ThreadX when calling
|
||||
; _tx_thread_system_return().
|
||||
public ___interrupt_27
|
||||
___interrupt_27:
|
||||
|
||||
PUSHM R1-R2
|
||||
|
||||
BSR __tx_thread_context_save
|
||||
|
||||
BRA __tx_thread_context_restore
|
||||
|
||||
END
|
||||
@@ -0,0 +1,147 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
|
||||
section .text:CODE:ROOT
|
||||
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_stack_build RX/IAR */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function builds a stack frame on the supplied thread's stack. */
|
||||
;/* The stack frame results in a fake interrupt return to the supplied */
|
||||
;/* function pointer. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* thread_ptr Pointer to thread control blk */
|
||||
;/* function_ptr Pointer to return function */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_thread_create Create thread service */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
|
||||
public __tx_thread_stack_build
|
||||
|
||||
__tx_thread_stack_build:
|
||||
;
|
||||
;
|
||||
; /* Build an interrupt frame. The form of the fake interrupt stack
|
||||
; on the Renesas RX should look like the following after it is built:
|
||||
;
|
||||
; Stack Top: 1 Interrupt stack frame type
|
||||
; ACC0
|
||||
; ACC1
|
||||
; R6
|
||||
; R7
|
||||
; R8
|
||||
; R9
|
||||
; R10
|
||||
; R11
|
||||
; R12
|
||||
; R13
|
||||
; FPSW
|
||||
; R14
|
||||
; R15
|
||||
; R3
|
||||
; R4
|
||||
; R5
|
||||
; R1
|
||||
; R2
|
||||
; PC
|
||||
; PSW
|
||||
|
||||
;
|
||||
; Stack Bottom: (higher memory address) */
|
||||
;
|
||||
MOV.L 16[R1],R3 ; Pickup end of stack area
|
||||
BCLR #0, R3 ; mask for 4-byte alignment
|
||||
BCLR #1, R3
|
||||
;
|
||||
; /* Build the stack frame. */
|
||||
;
|
||||
MOV.L #30000h, R4
|
||||
MOV.L R4, [-R3] ; initial PSW (SVC mode, U flag set)
|
||||
MOV.L R2, [-R3] ; initial PC
|
||||
MOV.L #0, R4
|
||||
MOV.L R4,[-R3] ; initial R2 ...
|
||||
MOV.L R4,[-R3] ; initial R1 ...
|
||||
MOV.L R4,[-R3] ; initial R5 ...
|
||||
MOV.L R4,[-R3] ; initial R4 ...
|
||||
MOV.L R4,[-R3] ; initial R3 ...
|
||||
MOV.L R4,[-R3] ; initial R15 ...
|
||||
MOV.L R4,[-R3] ; initial R14 ...
|
||||
MVFC FPSW, r4
|
||||
MOV.L R4, [-R3] ; initial FPSW
|
||||
MOV.L #0, R4
|
||||
MOV.L R4,[-R3] ; initial R13 ...
|
||||
MOV.L R4,[-R3] ; initial R12 ...
|
||||
MOV.L R4,[-R3] ; initial R11 ...
|
||||
MOV.L R4,[-R3] ; initial R10 ...
|
||||
MOV.L R4,[-R3] ; initial R9 ...
|
||||
MOV.L R4,[-R3] ; initial R8 ...
|
||||
MOV.L R4,[-R3] ; initial R7 ...
|
||||
MOV.L R4,[-R3] ; initial R6 ...
|
||||
|
||||
MOV.L R4,[-R3] ; Accumulator 1
|
||||
MOV.L R4,[-R3]
|
||||
MOV.L R4,[-R3]
|
||||
|
||||
MOV.L R4,[-R3] ; Accumulator 0
|
||||
MOV.L R4,[-R3]
|
||||
MOV.L R4,[-R3]
|
||||
|
||||
MOV.L #1, R4
|
||||
MOV.L R4,[-R3] ; indicate interrupt stack frame
|
||||
; /* Setup stack pointer. */
|
||||
; thread_ptr -> tx_thread_stack_ptr = R1;
|
||||
MOV.L R3, 8[R1]
|
||||
; store initial SP in thread control block
|
||||
RTS
|
||||
|
||||
;}
|
||||
|
||||
END
|
||||
@@ -0,0 +1,74 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
|
||||
section .text:CODE:ROOT
|
||||
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_system_return RX/IAR */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is target processor specific. It is used to transfer */
|
||||
;/* control from a thread back to the system. Only a minimal context */
|
||||
;/* is saved since the compiler assumes temp registers are going to get */
|
||||
;/* slicked by a function call anyway. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule Thread scheduling loop */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ThreadX components */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
|
||||
public __tx_thread_system_return
|
||||
|
||||
__tx_thread_system_return:
|
||||
|
||||
BRA __tx_thread_system_return
|
||||
|
||||
RTS
|
||||
|
||||
END
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,36 @@
|
||||
|
||||
target_sources(${PROJECT_NAME}
|
||||
PRIVATE
|
||||
# {{BEGIN_TARGET_SOURCES}}
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_clib_lock.c
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.c
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.c
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/tx_xtensa_stack_error_handler.c
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_context.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_coproc_handler.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_init.c
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_intr_asm.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_intr.c
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_intr_wrapper.c
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_overlay_os_hook.c
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_vectors.S
|
||||
${CMAKE_CURRENT_LIST_DIR}/src/xtensa_vectors_xea3.S
|
||||
|
||||
# {{END_TARGET_SOURCES}}
|
||||
)
|
||||
|
||||
target_include_directories(${PROJECT_NAME}
|
||||
PUBLIC
|
||||
${CMAKE_CURRENT_LIST_DIR}/inc
|
||||
)
|
||||
|
||||
set_source_files_properties(${CMAKE_CURRENT_LIST_DIR}/src/xtensa_vectors_xea3.S
|
||||
TARGET_DIRECTORY ${PROJECT_NAME}
|
||||
PROPERTIES COMPILE_OPTIONS "-mtext-section-literals")
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,67 @@
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file contains macro constants for ThreadX API structures */
|
||||
/* and enums that need to be used in assembly coded port sources. */
|
||||
/* Most of these constants are derived from definitions in tx_api.h. */
|
||||
/* Only the constants that are needed are included here to reduce */
|
||||
/* the maintenance required when the structures or enums change. */
|
||||
/* Structure offsets depend on the compiler, so are tools-specific, */
|
||||
/* which usually means port-specific since a compiler's struct */
|
||||
/* packing rules depend on properties of the target architecture. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
#ifndef TX_API_ASM_H
|
||||
#define TX_API_ASM_H
|
||||
|
||||
#include "tx_port.h"
|
||||
|
||||
/* API input parameters and general constants. */
|
||||
|
||||
#define TX_TRUE 1
|
||||
#define TX_FALSE 0
|
||||
#define TX_NULL 0
|
||||
|
||||
/* ThreadX thread control block structure. */
|
||||
// typedef struct TX_THREAD_STRUCT
|
||||
// {
|
||||
|
||||
#define tx_thread_run_count 0x04
|
||||
#define tx_thread_stack_ptr 0x08
|
||||
#define tx_thread_stack_end 0x10
|
||||
#define tx_thread_time_slice 0x18
|
||||
#define tx_thread_new_time_slice 0x1C
|
||||
#define tx_thread_solicited 0x28
|
||||
|
||||
#ifdef TX_THREAD_SAFE_CLIB
|
||||
#define tx_real_thread_entry 0x2C
|
||||
#define tx_thread_clib_ptr 0x30
|
||||
#define tx_thread_cp_state 0x34
|
||||
#else
|
||||
#define tx_thread_cp_state 0x2C
|
||||
#endif
|
||||
|
||||
// }
|
||||
|
||||
#endif /* TX_API_ASM_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,125 @@
|
||||
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* Xtensa-specific API for RTOS ports. */
|
||||
/**************************************************************************/
|
||||
|
||||
#ifndef XTENSA_API_H
|
||||
#define XTENSA_API_H
|
||||
|
||||
#include <xtensa/hal.h>
|
||||
|
||||
#include "xtensa_context.h"
|
||||
|
||||
|
||||
/* Typedef for C-callable interrupt handler function */
|
||||
typedef void (*xt_handler)(void *);
|
||||
|
||||
/* Typedef for C-callable exception handler function */
|
||||
typedef void (*xt_exc_handler)(XtExcFrame *);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to set a handler for the specified exception.
|
||||
|
||||
n - Exception number (type)
|
||||
f - Handler function address, NULL to uninstall handler.
|
||||
|
||||
The handler will be passed a pointer to the exception frame, which is created
|
||||
on the stack of the thread that caused the exception.
|
||||
|
||||
If the handler returns, the thread context will be restored and the faulting
|
||||
instruction will be retried. Any values in the exception frame that are
|
||||
modified by the handler will be restored as part of the context. For details
|
||||
of the exception frame structure see xtensa_context.h.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern xt_exc_handler xt_set_exception_handler(uint32_t n, xt_exc_handler f);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to set a handler for the specified interrupt.
|
||||
|
||||
n - Interrupt number.
|
||||
f - Handler function address, NULL to uninstall handler.
|
||||
arg - Argument to be passed to handler.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern xt_handler xt_set_interrupt_handler(uint32_t n, xt_handler f, void * arg);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to enable the specified interrupt.
|
||||
|
||||
intnum - Interrupt number to be enabled.
|
||||
|
||||
Returns: Nothing.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern void xt_interrupt_enable(uint32_t intnum);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to disable the specified interrupt.
|
||||
|
||||
intnum - Interrupt number to be disabled.
|
||||
|
||||
Returns: Nothing.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern void xt_interrupt_disable(uint32_t intnum);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to trigger the specified (s/w) interrupt.
|
||||
|
||||
intnum - Interrupt number to be triggered.
|
||||
|
||||
Returns: Nothing.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern void xt_interrupt_trigger(uint32_t intnum);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to clear the specified (s/w or edge-triggered)
|
||||
interrupt.
|
||||
|
||||
intnum - Interrupt number to be cleared.
|
||||
|
||||
Returns: Nothing.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern void xt_interrupt_clear(uint32_t intnum);
|
||||
|
||||
|
||||
#endif /* XTENSA_API_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,157 @@
|
||||
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
XTENSA INFORMATION FOR RTOS TICK TIMER AND CLOCK FREQUENCY
|
||||
|
||||
This header contains timer related definitions and macros for use by
|
||||
Xtensa RTOS source files. It includes and uses the Xtensa hardware
|
||||
abstraction layer (HAL) to deal with config specifics.
|
||||
|
||||
If the RTOS has no timer interrupt, then there is no tick timer and the
|
||||
clock frequency is irrelevant, so all of these macros are left undefined
|
||||
and the Xtensa core configuration need not have a timer.
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef XTENSA_TIMER_H
|
||||
#define XTENSA_TIMER_H
|
||||
|
||||
#include "xtensa_rtos.h" /* in case this wasn't included directly */
|
||||
|
||||
#ifdef XT_RTOS_TIMER_INT /* skip all this stuff if no timer int */
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#include <xtensa/coreasm.h>
|
||||
#else
|
||||
#include <xtensa/tie/xt_timer.h>
|
||||
#endif
|
||||
|
||||
#include <xtensa/corebits.h>
|
||||
#include <xtensa/config/system.h>
|
||||
|
||||
|
||||
#if XCHAL_HAVE_XEA3
|
||||
|
||||
/*
|
||||
If the user has not specified a timer by defining XT_TIMER_INDEX, then
|
||||
select timer 0.
|
||||
*/
|
||||
#ifndef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 0
|
||||
#endif
|
||||
|
||||
#else /* XEA2 */
|
||||
|
||||
/*
|
||||
Select timer to use for periodic tick, and determine its interrupt number
|
||||
and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
|
||||
in which case its validity is checked (it must exist in this core and must
|
||||
not be on a high priority interrupt - an error will be reported in invalid).
|
||||
Otherwise select the first low or medium priority interrupt timer available.
|
||||
*/
|
||||
#ifndef XT_TIMER_INDEX
|
||||
#if XCHAL_TIMER3_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
|
||||
#if XCHAL_INT_LEVEL(XCHAL_TIMER3_INTERRUPT) <= XCHAL_EXCM_LEVEL
|
||||
#undef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 3
|
||||
#endif
|
||||
#endif
|
||||
#if XCHAL_TIMER2_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
|
||||
#if XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL
|
||||
#undef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 2
|
||||
#endif
|
||||
#endif
|
||||
#if XCHAL_TIMER1_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
|
||||
#if XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL
|
||||
#undef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 1
|
||||
#endif
|
||||
#endif
|
||||
#if XCHAL_TIMER0_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
|
||||
#if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL
|
||||
#undef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 0
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* XCHAL_HAVE_XEA3 */
|
||||
|
||||
#ifndef XT_TIMER_INDEX
|
||||
#error "There is no suitable timer in this Xtensa configuration."
|
||||
#endif
|
||||
|
||||
#define XT_CCOMPARE (CCOMPARE + XT_TIMER_INDEX)
|
||||
#define XT_TIMER_INTNUM XCHAL_TIMER_INTERRUPT(XT_TIMER_INDEX)
|
||||
#define XT_TIMER_INTPRI XCHAL_INT_LEVEL(XT_TIMER_INTNUM)
|
||||
|
||||
#if XCHAL_HAVE_XEA2
|
||||
#define XT_TIMER_INTEN (1 << XT_TIMER_INTNUM)
|
||||
#endif
|
||||
|
||||
#if XT_TIMER_INDEX == 0
|
||||
#define XT_WSR_CCOMPARE XT_WSR_CCOMPARE0
|
||||
#elif XT_TIMER_INDEX == 1
|
||||
#define XT_WSR_CCOMPARE XT_WSR_CCOMPARE1
|
||||
#elif XT_TIMER_INDEX == 2
|
||||
#define XT_WSR_CCOMPARE XT_WSR_CCOMPARE2
|
||||
#endif
|
||||
|
||||
#if XT_TIMER_INTNUM == XTHAL_TIMER_UNCONFIGURED
|
||||
#error "The timer selected by XT_TIMER_INDEX does not exist in this core."
|
||||
#elif !XCHAL_HAVE_XEA3 && (XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL)
|
||||
#error "The timer interrupt cannot be high priority (use medium or low)."
|
||||
#endif
|
||||
|
||||
/*
|
||||
Default number of timer ticks per second. This can be redefined as required
|
||||
either by editing here or by overriding from the command line during build.
|
||||
*/
|
||||
#ifndef XT_TICK_PER_SEC
|
||||
#define XT_TICK_PER_SEC 100
|
||||
#endif
|
||||
|
||||
/*
|
||||
Set processor clock frequency and determine clock divisor for timer tick.
|
||||
If using a supported board via the board-independent API defined in xtbsp.h,
|
||||
this may be left undefined but XT_BOARD must be defined. The frequency and
|
||||
tick divisor will be computed during run-time initialization.
|
||||
*/
|
||||
#ifndef XT_BOARD
|
||||
#ifndef XT_CLOCK_FREQ
|
||||
#define XT_CLOCK_FREQ 1000000
|
||||
#endif
|
||||
#define XT_TICK_DIVISOR (XT_CLOCK_FREQ / XT_TICK_PER_SEC)
|
||||
#else
|
||||
#ifndef __ASSEMBLER__
|
||||
extern uint32_t xt_tick_divisor;
|
||||
extern void xt_tick_divisor_init(void);
|
||||
#endif
|
||||
#define XT_TICK_DIVISOR xt_tick_divisor
|
||||
#endif /* XT_BOARD */
|
||||
|
||||
#endif /* XT_RTOS_TIMER_INT */
|
||||
#endif /* XTENSA_TIMER_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,187 @@
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "tx_port.h"
|
||||
#include "xtensa_api.h"
|
||||
|
||||
#if XCHAL_HAVE_ISL || XCHAL_HAVE_KSL || XCHAL_HAVE_PSL
|
||||
#include <xtensa/tie/xt_exception_dispatch.h>
|
||||
#endif
|
||||
|
||||
|
||||
#if XCHAL_HAVE_XEA3
|
||||
int32_t xt_sw_intnum = -1;
|
||||
int32_t xt_timer_intnum = -1;
|
||||
#endif
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is responsible for any low-level processor */
|
||||
/* initialization, including setting up interrupt vectors, setting */
|
||||
/* up a periodic timer interrupt source, saving the system stack */
|
||||
/* pointer for use in ISR processing later, and finding the first */
|
||||
/* available RAM memory address for tx_application_define. */
|
||||
/* It also sets the default heap region for the optional C library. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _tx_initialize_low_level(VOID)
|
||||
{
|
||||
extern char _xt_interrupt_stack_top;
|
||||
extern void _tx_timer_interrupt(void *);
|
||||
extern void * _tx_thread_system_stack_ptr;
|
||||
extern void * _tx_initialize_unused_memory;
|
||||
extern char _end;
|
||||
|
||||
#ifdef TX_THREAD_SAFE_CLIB
|
||||
extern char __stack;
|
||||
extern void _tx_clib_init(void);
|
||||
#endif
|
||||
|
||||
#if XCHAL_CP_NUM > 0
|
||||
extern void _xt_coproc_init(void);
|
||||
extern void _xt_coproc_exc(XtExcFrame * fp);
|
||||
#endif
|
||||
|
||||
#ifdef TX_ENABLE_STACK_CHECKING
|
||||
extern VOID _tx_xtensa_stack_error_handler(TX_THREAD * thread);
|
||||
#endif
|
||||
|
||||
#if XCHAL_HAVE_XEA3
|
||||
extern void xt_sched_handler(void * arg);
|
||||
int32_t i;
|
||||
#endif
|
||||
|
||||
TX_INTERRUPT_SAVE_AREA
|
||||
|
||||
/* Disable interrupts - don't want any that interact with ThreadX yet. */
|
||||
TX_DISABLE
|
||||
|
||||
/*
|
||||
Disable stack limit checking if present. Whatever was set up earlier
|
||||
is not going to work for us.
|
||||
*/
|
||||
#if XCHAL_HAVE_KSL
|
||||
XT_WSR_KSL(0);
|
||||
#endif
|
||||
#if XCHAL_HAVE_ISL
|
||||
XT_WSR_ISL(0);
|
||||
#endif
|
||||
|
||||
/* Save the system stack pointer. */
|
||||
_tx_thread_system_stack_ptr = &(_xt_interrupt_stack_top);
|
||||
|
||||
/* Save the first available memory address. */
|
||||
_tx_initialize_unused_memory = (void *)(((UINT)&_end + 15) & ~0xF);
|
||||
|
||||
#ifdef TX_THREAD_SAFE_CLIB
|
||||
/*
|
||||
Pre-allocate default memory region for the C library heap.
|
||||
Bisect the region from first available memory to end of system memory,
|
||||
align to 16 byte boundary, and allocate the heap in the upper half.
|
||||
*/
|
||||
_tx_clib_heap_end = &(__stack);
|
||||
_tx_clib_heap_start =
|
||||
(void *)(((UINT)_tx_initialize_unused_memory/2 + (UINT)_tx_clib_heap_end/2) & ~0xF);
|
||||
#endif
|
||||
|
||||
#if XCHAL_CP_NUM > 0
|
||||
/*
|
||||
Initialize co-processor management for threads. Leave CPENABLE alone.
|
||||
This is called from a normal Xtensa single-threaded run-time environment
|
||||
before multi-threading has commenced. All co-processors are enabled.
|
||||
It is important NOT to clear CPENABLE yet because tx_application_define()
|
||||
is user code which might use a co-processor. The co-processor exception
|
||||
handler does not expect to be called outside a thread.
|
||||
*/
|
||||
_xt_coproc_init();
|
||||
|
||||
#if XCHAL_HAVE_XEA3
|
||||
/* Install the coprocessor exception handler. */
|
||||
xt_set_exception_handler(EXCCAUSE_CP_DISABLED, _xt_coproc_exc);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if XCHAL_HAVE_XEA3
|
||||
/* Select a software interrupt to use for scheduling. */
|
||||
for (i = 0; i < XCHAL_NUM_INTERRUPTS; i++) {
|
||||
if ((Xthal_inttype[i] == XTHAL_INTTYPE_SOFTWARE) && (Xthal_intlevel[i] == 1)) {
|
||||
xt_sw_intnum = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (xt_sw_intnum == -1) {
|
||||
__asm__ volatile ("break 1, 1");
|
||||
}
|
||||
|
||||
/* Set the interrupt handler and enable the interrupt. */
|
||||
xt_set_interrupt_handler(xt_sw_intnum, xt_sched_handler, 0);
|
||||
xt_interrupt_enable(xt_sw_intnum);
|
||||
#endif
|
||||
|
||||
#ifndef TX_NO_TIMER
|
||||
|
||||
/* Compute tick divisor if clock freq is not compile-time constant. */
|
||||
#ifndef XT_CLOCK_FREQ
|
||||
_xt_tick_divisor_init();
|
||||
#endif
|
||||
|
||||
/* Set up the periodic tick timer (assume enough time to complete init). */
|
||||
#ifdef XT_CLOCK_FREQ
|
||||
XT_WSR_CCOMPARE(XT_RSR_CCOUNT() + XT_TICK_DIVISOR);
|
||||
#else
|
||||
XT_WSR_CCOMPARE(XT_RSR_CCOUNT() + _xt_tick_divisor);
|
||||
#endif
|
||||
|
||||
#if XCHAL_HAVE_XEA3
|
||||
xt_timer_intnum = XT_TIMER_INTNUM;
|
||||
xt_set_interrupt_handler(xt_timer_intnum, _tx_timer_interrupt, 0);
|
||||
#endif
|
||||
|
||||
/* Enable the timer interrupt at the device level. */
|
||||
xt_interrupt_enable(XT_TIMER_INTNUM);
|
||||
|
||||
#endif /* TX_NO_TIMER */
|
||||
|
||||
/* Initialize C library thread safety support. */
|
||||
#ifdef TX_THREAD_SAFE_CLIB
|
||||
_tx_clib_init();
|
||||
#endif
|
||||
|
||||
/* Install stack overflow notification callback. */
|
||||
#ifdef TX_ENABLE_STACK_CHECKING
|
||||
tx_thread_stack_error_notify(_tx_xtensa_stack_error_handler);
|
||||
#endif
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,157 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#include "xtensa_rtos.h"
|
||||
#include "tx_api_asm.h"
|
||||
|
||||
|
||||
#if XCHAL_HAVE_XEA2
|
||||
|
||||
.text
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function saves the context of an executing thread in the */
|
||||
/* beginning of interrupt processing. The function also ensures that */
|
||||
/* the system stack is used upon return to the calling ISR. */
|
||||
/* */
|
||||
/* Interrupts remain disabled and no exceptions are triggered! */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
// VOID _tx_thread_context_save(VOID)
|
||||
// {
|
||||
.globl _tx_thread_context_save
|
||||
.type _tx_thread_context_save,@function
|
||||
.align 4
|
||||
_tx_thread_context_save:
|
||||
|
||||
/*
|
||||
Please note: Control flow might seem strange. This is because it has been
|
||||
optimized to avoid taken branches in the longest normal path (the critical
|
||||
one for worst-case latency), presumed to be a non-nested interrupt and
|
||||
non-idle) and to hide pipeline interlock cycles where possible.
|
||||
*/
|
||||
|
||||
/*
|
||||
Save a couple of scratch regs to work with that are preserved over the
|
||||
call to _xt_context_save. The latter assumes the interruptee's values
|
||||
of these are already saved and these regs contain different data to be
|
||||
preserved, so doesn't save them in the stack frame, and thereby requires
|
||||
that its caller have already saved them in the interrupt stack frame.
|
||||
We end up with a12 = return address, a13 and a0 are scratch.
|
||||
*/
|
||||
s32i a12, sp, XT_STK_A12
|
||||
s32i a13, sp, XT_STK_A13
|
||||
|
||||
/* Check for a nested interrupt condition and increment nesting count. */
|
||||
// if (_tx_thread_system_state++)
|
||||
// {
|
||||
movi a13, _tx_thread_system_state /* a13 = & interrupt nesting count */
|
||||
mov a12, a0 /* a12 = save ret addr (free a0) */
|
||||
l32i a0, a13, 0 /* increment interrupt nesting count */
|
||||
addi a0, a0, 1
|
||||
s32i a0, a13, 0
|
||||
bnei a0, 1, .L_tx_thread_nested_save /* was !=0 before increment? */
|
||||
|
||||
// }
|
||||
|
||||
.Ln_tx_thread_not_nested_save:
|
||||
|
||||
/* Otherwise, not nested, check to see if a thread was running. */
|
||||
// else
|
||||
// {
|
||||
// if (_tx_thread_current_ptr)
|
||||
// {
|
||||
movi a0, _tx_thread_current_ptr
|
||||
l32i a13, a0, 0 /* a13 = current thread ctrl blk */
|
||||
beqz a13, .L_tx_thread_idle_system_save
|
||||
|
||||
/* Save the rest of the interrupted context. */
|
||||
call0 _xt_context_save
|
||||
|
||||
/* Save the current stack pointer in the thread's control block. */
|
||||
// _tx_thread_current_ptr -> tx_thread_stack_ptr = sp;
|
||||
s32i sp, a13, tx_thread_stack_ptr
|
||||
|
||||
// }
|
||||
/* Switch to the system stack and return to ISR. */
|
||||
|
||||
.L_tx_thread_idle_system_save:
|
||||
|
||||
/*
|
||||
If interrupted in the idle state, it's not necessary to save any context.
|
||||
But even in the idle case where we are already on the system stack, it is
|
||||
necessary to reset the (system) stack pointer so a series of consecutive
|
||||
interrupts in the idle state do not keep moving the SP downward.
|
||||
*/
|
||||
|
||||
// sp = _tx_thread_system_stack_ptr;
|
||||
movi a13, _tx_thread_system_stack_ptr
|
||||
mov a0, a12 /* retrieve return address */
|
||||
l32i sp, a13, 0
|
||||
|
||||
ret
|
||||
// }
|
||||
|
||||
.L_tx_thread_nested_save:
|
||||
/* Nested interrupt condition. */
|
||||
/* Save the rest of the interrupted context and return to ISR. */
|
||||
call0 _xt_context_save
|
||||
|
||||
mov a0, a12 /* retrieve return address */
|
||||
ret
|
||||
|
||||
// }
|
||||
|
||||
#endif /* XCHAL_HAVE_XEA2 */
|
||||
|
||||
@@ -0,0 +1,81 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "xtensa_rtos.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is responsible for changing the interrupt lockout */
|
||||
/* posture of the system. */
|
||||
/* NOTE: In earlier versions this was implemented in assembly. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
{
|
||||
#if XCHAL_HAVE_XEA2
|
||||
UINT ret = XT_RSIL(15);
|
||||
|
||||
XT_WSR_PS((ret & ~0xF) | (new_posture & 0xF));
|
||||
XT_RSYNC();
|
||||
return ret & 0xF;
|
||||
#else
|
||||
UINT ret = xthal_disable_interrupts();
|
||||
|
||||
xthal_restore_interrupts(new_posture);
|
||||
return ret;
|
||||
#endif
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,158 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
#include "xtensa_rtos.h"
|
||||
#include "tx_api_asm.h"
|
||||
|
||||
.text
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function builds a stack frame on the supplied thread's stack. */
|
||||
/* The stack frame looks like an interrupt frame or a solicited frame */
|
||||
/* depending on the exception architecture of the target hardware. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
// VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
|
||||
// {
|
||||
.globl _tx_thread_stack_build
|
||||
.type _tx_thread_stack_build,@function
|
||||
.align 4
|
||||
_tx_thread_stack_build:
|
||||
|
||||
ENTRY0
|
||||
|
||||
/* Get logical base of stack area (top). */
|
||||
l32i a5, a2, tx_thread_stack_end /* get top-1 of stack area */
|
||||
addi a5, a5, 1 /* undo the -1 */
|
||||
srli a5, a5, 4 /* force 16-byte alignment */
|
||||
slli a5, a5, 4 /* a5 = post-dispatch SP (frame top) */
|
||||
|
||||
/* Allocate space for the frame (frame size is already 16-byte aligned). */
|
||||
addi a4, a5, -XT_STK_FRMSZ /* a4 = pre-dispatch SP (frame base) */
|
||||
|
||||
/* Set the thread's SP. */
|
||||
s32i a4, a2, tx_thread_stack_ptr
|
||||
|
||||
#if !XCHAL_HAVE_XEA2
|
||||
addi a4, a4, XT_STK_XTRA_SZ /* a4 = base of exception frame */
|
||||
#endif
|
||||
|
||||
/* Clear the entire frame. (XEA3: only exception frame) */
|
||||
movi a6, 0 /* a6 = 0 */
|
||||
mov a7, a4 /* a7 = ptr to current word */
|
||||
1: s32i a6, a7, 0 /* clear current word */
|
||||
addi a7, a7, 4 /* point to next word */
|
||||
bltu a7, a5, 1b /* repeat until frame top */
|
||||
|
||||
#if XCHAL_HAVE_XEA2
|
||||
s32i a5, a4, XT_STK_A1 /* save post-dispatch SP in frame */
|
||||
#endif
|
||||
|
||||
/* Indicate a solicited or interrupted stack frame. */
|
||||
#if XCHAL_HAVE_XEA2
|
||||
movi a7, 0 /* interrupted */
|
||||
#else
|
||||
movi a7, 0 /* solicited */
|
||||
#endif
|
||||
s32i a7, a2, tx_thread_solicited
|
||||
|
||||
/*
|
||||
Terminate GDB backtrace in this thread at the "return function" by ensuring
|
||||
it's A0 == 0. Since frame was cleared, don't need to do this explicitly.
|
||||
s32i a6, a4, XT_STK_A0
|
||||
*/
|
||||
|
||||
/* Set the return address to the return function. */
|
||||
/* Start thread via user exception exit dispatcher (could use any). */
|
||||
#if XCHAL_HAVE_XEA2
|
||||
movi a5, _xt_user_exit
|
||||
s32i a5, a4, XT_STK_EXIT
|
||||
#else
|
||||
movi a5, 0
|
||||
s32i a5, a4, XT_STK_ATOMCTL
|
||||
#endif
|
||||
|
||||
s32i a3, a4, XT_STK_PC
|
||||
|
||||
/*
|
||||
Set thread's initial PS for C code, all int levels enabled.
|
||||
XEA2: Since we dispatch via level 1 (_xt_user_exit), must set PS.EXCM,
|
||||
which will be cleared by 'rfe' after the dispatcher, to prevent
|
||||
interrupts happening when PS is restored during the exit dispatcher.
|
||||
XEA3: nothing special, other than setting the thread stack type.
|
||||
*/
|
||||
#if XCHAL_HAVE_XEA2
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
movi a6, PS_UM | PS_EXCM
|
||||
#else
|
||||
movi a6, PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1) /* pretend 'call4' */
|
||||
#endif
|
||||
#else
|
||||
movi a6, PS_STACK_FIRSTKER
|
||||
#endif
|
||||
s32i a6, a4, XT_STK_PS
|
||||
|
||||
#if XCHAL_HAVE_XEA2
|
||||
#ifdef XT_USE_SWPRI
|
||||
/* Set the initial virtual priority mask value to all 1's */
|
||||
movi a3, -1
|
||||
s32i a3, a4, XT_STK_VPRI
|
||||
#endif
|
||||
#endif
|
||||
|
||||
RET0
|
||||
|
||||
// }
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,123 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Support for Xtensa applications */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
#include "tx_user.h"
|
||||
|
||||
#ifdef TX_ENABLE_STACK_CHECKING
|
||||
|
||||
/* Include necessary system files. */
|
||||
|
||||
#include "tx_api.h"
|
||||
|
||||
#include "xtensa_rtos.h"
|
||||
#ifdef XT_BOARD
|
||||
#include <xtensa/xtbsp.h>
|
||||
#endif
|
||||
#ifdef XT_SIMULATOR
|
||||
#include <xtensa/simcall.h>
|
||||
#endif
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <unistd.h>
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* Callback to notify of a stack overflow when registered with */
|
||||
/* tx_stack_error_notify and stack checking is enabled (ThreadX */
|
||||
/* is compiled with TX_ENABLE_STACK_CHECKING defined). */
|
||||
/* */
|
||||
/* The handler notifies the user in any/all of the following ways: */
|
||||
/* - A message via the simulator (extremely reliable, simulator only). */
|
||||
/* - A message on the board's display (emulation board only). */
|
||||
/* - A message to stdout (uses low-level write to avoid printf which */
|
||||
/* is large and would trash state the user might want to examine). */
|
||||
/* The most reliable methods are done first. Several might work. */
|
||||
/* */
|
||||
/* After notifying the user as best it can, the handler stops the */
|
||||
/* application in the most reliable of the following ways: */
|
||||
/* - Passes control to the debugger (if attached). */
|
||||
/* - Terminates the simulation (simulator only). */
|
||||
/* - Panics. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
VOID _tx_xtensa_stack_error_handler(TX_THREAD * thread)
|
||||
{
|
||||
#ifdef XT_SIMULATOR
|
||||
register int32_t sc __asm__ ("a2") = SYS_log_msg;
|
||||
register char * msg __asm__ ("a3")
|
||||
= "**** Stack overflow in thread 0x%08x.\n";
|
||||
register TX_THREAD * thd __asm__ ("a4") = thread;
|
||||
__asm__ volatile ("simcall" :: "a" (sc), "a" (msg), "a" (thd) );
|
||||
#endif
|
||||
|
||||
#ifdef XT_BOARD
|
||||
xtbsp_display_string("StkOflow");
|
||||
#endif
|
||||
|
||||
write(1, "**** Stack overflow in thread \"", 31);
|
||||
write(1, thread->tx_thread_name, strlen(thread->tx_thread_name));
|
||||
write(1, "\"\n", 2);
|
||||
|
||||
#ifdef XT_SIMULATOR
|
||||
sc = SYS_gdb_abort;
|
||||
__asm__ volatile ("simcall"); /* control to debugger or exit */
|
||||
#else
|
||||
__asm__ volatile ("break 1, 15"); /* control to debugger or panic */
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* TX_ENABLE_STACK_CHECKING */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,67 @@
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* Xtensa initialization routines. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
#ifdef XT_BOARD
|
||||
#include <xtensa/xtbsp.h>
|
||||
#endif
|
||||
|
||||
#include "xtensa_rtos.h"
|
||||
|
||||
|
||||
#ifdef XT_RTOS_TIMER_INT
|
||||
#ifndef XT_CLOCK_FREQ
|
||||
|
||||
uint32_t _xt_tick_divisor = 0; /* cached number of cycles per tick */
|
||||
|
||||
/*
|
||||
Compute and initialize at run-time the tick divisor (the number of
|
||||
processor clock cycles in an RTOS tick, used to set the tick timer).
|
||||
Called when the processor clock frequency is not known at compile-time.
|
||||
*/
|
||||
void _xt_tick_divisor_init(void)
|
||||
{
|
||||
#ifdef XT_BOARD
|
||||
_xt_tick_divisor = xtbsp_clock_freq_hz() / XT_TICK_PER_SEC;
|
||||
#else
|
||||
#error "No way to obtain processor clock frequency"
|
||||
#endif /* XT_BOARD */
|
||||
}
|
||||
|
||||
#endif /* XT_CLOCK_FREQ */
|
||||
#endif /* XT_RTOS_TIMER_INT */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,156 @@
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* Xtensa interrupt handling data and assembly routines. */
|
||||
/* Also see xtensa_intr.c. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
#include <xtensa/hal.h>
|
||||
#include <xtensa/config/core.h>
|
||||
|
||||
#include "tx_port.h"
|
||||
#include "xtensa_context.h"
|
||||
|
||||
#if XCHAL_HAVE_INTERRUPTS
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
INTENABLE virtualization information.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#if XCHAL_HAVE_XEA2
|
||||
|
||||
.data
|
||||
.global _xt_intdata
|
||||
.align 8
|
||||
_xt_intdata:
|
||||
.global _xt_intenable
|
||||
.type _xt_intenable,@object
|
||||
.size _xt_intenable,4
|
||||
.global _xt_vpri_mask
|
||||
.type _xt_vpri_mask,@object
|
||||
.size _xt_vpri_mask,4
|
||||
|
||||
_xt_intenable: .word 0 /* Virtual INTENABLE */
|
||||
_xt_vpri_mask: .word 0xFFFFFFFF /* Virtual priority mask */
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
System interrupt stack.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#if (XCHAL_HAVE_XEA2 || XCHAL_HAVE_ISB)
|
||||
.data
|
||||
#else
|
||||
.section .intr.top, "aw"
|
||||
#endif
|
||||
|
||||
.global _xt_interrupt_stack
|
||||
.global _xt_interrupt_stack_top
|
||||
.align 16
|
||||
|
||||
_xt_interrupt_stack:
|
||||
.space TX_SYSTEM_STACK_SIZE
|
||||
_xt_interrupt_stack_top:
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Table of C-callable interrupt handlers for each interrupt. For XEA2 configs,
|
||||
not all slots can be filled, because interrupts at level > EXCM_LEVEL will
|
||||
not be dispatched to a C handler by default.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#if (XCHAL_HAVE_XEA2 || XCHAL_HAVE_ISB)
|
||||
.data
|
||||
#else
|
||||
.section .intr.data, "aw"
|
||||
#endif
|
||||
|
||||
.global _xt_interrupt_table
|
||||
.align 16
|
||||
|
||||
_xt_interrupt_table:
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
If using the interrupt wrapper, make the first entry in the interrupt table
|
||||
point to the wrapper (XEA3) or leave it empty (XEA2).
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
#if XCHAL_HAVE_XEA3
|
||||
.word xt_interrupt_wrapper
|
||||
.word 0
|
||||
#elif XT_USE_INT_WRAPPER
|
||||
.word 0
|
||||
.word 0
|
||||
#endif
|
||||
|
||||
.set i, 0
|
||||
.rept XCHAL_NUM_INTERRUPTS
|
||||
.word xt_unhandled_interrupt /* handler address */
|
||||
.word i /* handler arg (default: intnum) */
|
||||
.set i, i+1
|
||||
.endr
|
||||
|
||||
#endif /* XCHAL_HAVE_INTERRUPTS */
|
||||
|
||||
|
||||
#if XCHAL_HAVE_EXCEPTIONS
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Table of C-callable exception handlers for each exception. Note that not all
|
||||
slots will be active, because some exceptions (e.g. coprocessor exceptions)
|
||||
are always handled by the OS and cannot be hooked by user handlers.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
.data
|
||||
.global _xt_exception_table
|
||||
.align 4
|
||||
|
||||
_xt_exception_table:
|
||||
.rept XCHAL_EXCCAUSE_NUM
|
||||
.word xt_unhandled_exception /* handler address */
|
||||
.endr
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,125 @@
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* Xtensa-specific interrupt handler wrapper. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
#include <xtensa/config/core.h>
|
||||
#include <xtensa/core-macros.h>
|
||||
|
||||
#include "xtensa_rtos.h"
|
||||
#include "xtensa_api.h"
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "tx_thread.h"
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
#include "tx_execution_profile.h"
|
||||
#endif
|
||||
|
||||
|
||||
#if (XCHAL_HAVE_XEA3 && XCHAL_HAVE_INTERRUPTS)
|
||||
|
||||
/* Table of interrupt hooks. Used for testing ONLY. */
|
||||
#ifdef XT_INTEXC_HOOKS
|
||||
volatile XT_INTEXC_HOOK _xt_intexc_hooks[XT_INTEXC_HOOK_NUM];
|
||||
#endif
|
||||
|
||||
|
||||
/* Handler table is in xtensa_intr_asm.S */
|
||||
|
||||
typedef struct xt_handler_table_entry {
|
||||
void * handler;
|
||||
void * arg;
|
||||
} xt_handler_table_entry;
|
||||
|
||||
extern xt_handler_table_entry _xt_interrupt_table[XCHAL_NUM_INTERRUPTS + 1];
|
||||
extern int32_t xt_sw_intnum;
|
||||
|
||||
static int32_t xt_wflag;
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* Wrapper for interrupt handlers. Argument is (intnum << 2). */
|
||||
/* Execution comes here from the dispatch code if the wrapper is */
|
||||
/* enabled. */
|
||||
/**************************************************************************/
|
||||
void
|
||||
xt_interrupt_wrapper(void * arg)
|
||||
{
|
||||
uint32_t intnum = (uint32_t)(arg) >> 2;
|
||||
xt_handler_table_entry * entry;
|
||||
xt_handler handler;
|
||||
|
||||
/* Increment interrupt nest counter. */
|
||||
_tx_thread_system_state++;
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
/* Call the ISR enter function to indicate an ISR is executing. */
|
||||
_tx_execution_isr_enter();
|
||||
#endif
|
||||
|
||||
/* Load handler address and argument from table. Note that the
|
||||
first entry in the table points to this wrapper, so we have
|
||||
to skip ahead one.
|
||||
*/
|
||||
entry = _xt_interrupt_table + intnum + 1;
|
||||
handler = (xt_handler) entry->handler;
|
||||
|
||||
(*handler)(entry->arg);
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
/* Call the ISR exit function to indicate an ISR is complete. */
|
||||
_tx_execution_isr_exit();
|
||||
#endif
|
||||
|
||||
/* If a context switch is pending, trigger the SW interrupt
|
||||
to process the switch. Set an internal flag so we don't
|
||||
trigger the sw interrupt again when handling it.
|
||||
*/
|
||||
if (xt_wflag != 0) {
|
||||
xt_wflag = 0;
|
||||
}
|
||||
else if (_tx_thread_current_ptr != _tx_thread_execute_ptr) {
|
||||
xt_wflag = 1;
|
||||
xt_interrupt_trigger(xt_sw_intnum);
|
||||
}
|
||||
|
||||
/* Decrement interrupt nest counter. */
|
||||
_tx_thread_system_state--;
|
||||
}
|
||||
|
||||
#endif /* XCHAL_HAVE_XEA3 && XCHAL_HAVE_INTERRUPTS */
|
||||
|
||||
@@ -0,0 +1,109 @@
|
||||
/**************************************************************************/
|
||||
/* Copyright (c) Cadence Design Systems, Inc. */
|
||||
/* */
|
||||
/* Permission is hereby granted, free of charge, to any person obtaining */
|
||||
/* a copy of this software and associated documentation files (the */
|
||||
/* "Software"), to deal in the Software without restriction, including */
|
||||
/* without limitation the rights to use, copy, modify, merge, publish, */
|
||||
/* distribute, sublicense, and/or sell copies of the Software, and to */
|
||||
/* permit persons to whom the Software is furnished to do so, subject to */
|
||||
/* the following conditions: */
|
||||
/* */
|
||||
/* The above copyright notice and this permission notice shall be */
|
||||
/* included in all copies or substantial portions of the Software. */
|
||||
/* */
|
||||
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
|
||||
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
|
||||
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
|
||||
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
|
||||
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
|
||||
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
|
||||
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* Xtensa overlay manager OS hooks for ThreadX. XEA2 only. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
#ifdef XT_USE_OVLY
|
||||
|
||||
#include <xtensa/overlay.h>
|
||||
#include "tx_api.h"
|
||||
|
||||
|
||||
/* Required to work around a bug in the overlay header. */
|
||||
#ifdef XT_DISABLE_OVERLAYS
|
||||
#undef xt_overlay_fatal_error
|
||||
#define xt_overlay_fatal_error(id)
|
||||
#endif
|
||||
|
||||
|
||||
/* Mutex object that controls access to the overlay. Currently only one
|
||||
* overlay region is supported so one mutex suffices.
|
||||
*/
|
||||
static TX_MUTEX xt_overlay_mutex;
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* This function should be overridden to provide OS specific init such */
|
||||
/* as the creation of a mutex lock that can be used for overlay locking. */
|
||||
/* Typically this mutex would be set up with priority inheritance. See */
|
||||
/* overlay manager documentation for more details. */
|
||||
/**************************************************************************/
|
||||
void
|
||||
xt_overlay_init_os(void)
|
||||
{
|
||||
/* Create the mutex for overlay access. Priority inheritance is
|
||||
* required.
|
||||
*/
|
||||
UINT status =
|
||||
tx_mutex_create (&xt_overlay_mutex, "xt_overlay_lock", TX_INHERIT);
|
||||
|
||||
if (status != TX_SUCCESS) {
|
||||
xt_overlay_fatal_error (-1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* This function locks access to shared overlay resources, typically */
|
||||
/* by acquiring a mutex. */
|
||||
/**************************************************************************/
|
||||
void
|
||||
xt_overlay_lock(void)
|
||||
{
|
||||
UINT status = tx_mutex_get (&xt_overlay_mutex, TX_WAIT_FOREVER);
|
||||
|
||||
if (status != TX_SUCCESS) {
|
||||
xt_overlay_fatal_error (-1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* This function releases access to shared overlay resources, typically */
|
||||
/* by unlocking a mutex. */
|
||||
/**************************************************************************/
|
||||
void
|
||||
xt_overlay_unlock(void)
|
||||
{
|
||||
UINT status = tx_mutex_put (&xt_overlay_mutex);
|
||||
|
||||
if (status != TX_SUCCESS) {
|
||||
xt_overlay_fatal_error (-1);
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* XT_USE_OVLY */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,5 +1,7 @@
|
||||
del tx.a
|
||||
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork tx_initialize_low_level.S
|
||||
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/tx_thread_stack_build.S
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/tx_thread_schedule.S
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/tx_thread_system_return.S
|
||||
@@ -9,6 +11,16 @@ armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/s
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/tx_timer_interrupt.S
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/tx_thread_interrupt_disable.S
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/tx_thread_interrupt_restore.S
|
||||
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_alignment_adjust.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_external_memory_enable.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_handler.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_mm_register_setup.c
|
||||
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/txm_module_manager_thread_stack_build.S
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/txm_module_manager_user_mode_entry.S
|
||||
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_allocate.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_cleanup.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_create.c
|
||||
@@ -133,6 +145,7 @@ armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../..
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_buffer_full_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_event_filter.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_event_unfilter.c
|
||||
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_allocate.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_delete.c
|
||||
@@ -193,6 +206,8 @@ armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../..
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_deactivate.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_info_get.c
|
||||
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_absolute_load.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_application_request.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_callback_request.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_event_flags_notify_trampoline.c
|
||||
@@ -219,17 +234,10 @@ armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_timer_notify_trampoline.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_unload.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_util.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_alignment_adjust.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_external_memory_enable.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_handler.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7.fp.dp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_mm_register_setup.c
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/txm_module_manager_thread_stack_build.S
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork ../module_manager/src/txm_module_manager_user_mode_entry.S
|
||||
|
||||
armar --create tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o tx_initialize_low_level.o tx_thread_interrupt_disable.o tx_thread_interrupt_restore.o tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o tx_byte_pool_initialize.o tx_byte_pool_performance_info_get.o tx_byte_pool_performance_system_info_get.o tx_byte_pool_prioritize.o tx_byte_pool_search.o tx_byte_release.o tx_event_flags_cleanup.o tx_event_flags_create.o tx_event_flags_delete.o tx_event_flags_get.o tx_event_flags_info_get.o tx_event_flags_initialize.o tx_event_flags_performance_info_get.o
|
||||
armar -r tx.a tx_event_flags_performance_system_info_get.o tx_event_flags_set.o tx_event_flags_set_notify.o tx_initialize_high_level.o tx_initialize_kernel_enter.o tx_initialize_kernel_setup.o tx_mutex_cleanup.o tx_mutex_create.o tx_mutex_delete.o tx_mutex_get.o tx_mutex_info_get.o tx_mutex_initialize.o tx_mutex_performance_info_get.o tx_mutex_performance_system_info_get.o tx_mutex_prioritize.o tx_mutex_priority_change.o tx_mutex_put.o tx_queue_cleanup.o tx_queue_create.o tx_queue_delete.o tx_queue_flush.o tx_queue_front_send.o tx_queue_info_get.o tx_queue_initialize.o tx_queue_performance_info_get.o tx_queue_performance_system_info_get.o tx_queue_prioritize.o tx_queue_receive.o tx_queue_send.o tx_queue_send_notify.o tx_semaphore_ceiling_put.o tx_semaphore_cleanup.o tx_semaphore_create.o tx_semaphore_delete.o tx_semaphore_get.o tx_semaphore_info_get.o tx_semaphore_initialize.o tx_semaphore_performance_info_get.o tx_semaphore_performance_system_info_get.o tx_semaphore_prioritize.o tx_semaphore_put.o
|
||||
armar -r tx.a tx_semaphore_put_notify.o tx_thread_create.o tx_thread_delete.o tx_thread_entry_exit_notify.o tx_thread_identify.o tx_thread_info_get.o tx_thread_initialize.o tx_thread_performance_info_get.o tx_thread_performance_system_info_get.o tx_thread_preemption_change.o tx_thread_priority_change.o tx_thread_relinquish.o tx_thread_reset.o tx_thread_resume.o tx_thread_shell_entry.o tx_thread_sleep.o tx_thread_stack_analyze.o tx_thread_stack_error_handler.o tx_thread_stack_error_notify.o tx_thread_suspend.o tx_thread_system_preempt_check.o tx_thread_system_resume.o tx_thread_system_suspend.o tx_thread_terminate.o tx_thread_time_slice.o tx_thread_time_slice_change.o tx_thread_timeout.o tx_thread_wait_abort.o tx_time_get.o tx_time_set.o tx_timer_activate.o tx_timer_change.o tx_timer_create.o tx_timer_deactivate.o tx_timer_delete.o tx_timer_expiration_process.o tx_timer_info_get.o tx_timer_initialize.o tx_timer_performance_info_get.o tx_timer_performance_system_info_get.o tx_timer_system_activate.o
|
||||
armar -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o txe_event_flags_set_notify.o txe_mutex_create.o txe_mutex_delete.o txe_mutex_get.o txe_mutex_info_get.o txe_mutex_prioritize.o txe_mutex_put.o txe_queue_create.o txe_queue_delete.o txe_queue_flush.o txe_queue_front_send.o txe_queue_info_get.o
|
||||
armar -r tx.a txe_queue_prioritize.o txe_queue_receive.o txe_queue_send.o txe_queue_send_notify.o txe_semaphore_ceiling_put.o txe_semaphore_create.o txe_semaphore_delete.o txe_semaphore_get.o txe_semaphore_info_get.o txe_semaphore_prioritize.o txe_semaphore_put.o txe_semaphore_put_notify.o txe_thread_create.o txe_thread_delete.o txe_thread_entry_exit_notify.o txe_thread_info_get.o txe_thread_preemption_change.o txe_thread_priority_change.o txe_thread_relinquish.o txe_thread_reset.o txe_thread_resume.o txe_thread_suspend.o txe_thread_terminate.o txe_thread_time_slice_change.o txe_thread_wait_abort.o txe_timer_activate.o txe_timer_change.o txe_timer_create.o txe_timer_deactivate.o txe_timer_delete.o txe_timer_info_get.o txm_module_manager_alignment_adjust.o txm_module_manager_application_request.o txm_module_manager_callback_request.o txm_module_manager_event_flags_notify_trampoline.o txm_module_manager_external_memory_enable.o txm_module_manager_file_load.o txm_module_manager_in_place_load.o
|
||||
armar -r tx.a txm_module_manager_initialize.o txm_module_manager_kernel_dispatch.o txm_module_manager_maximum_module_priority_set.o txm_module_manager_memory_fault_handler.o txm_module_manager_memory_fault_notify.o txm_module_manager_memory_load.o txm_module_manager_object_pointer_get.o txm_module_manager_object_pool_create.o txm_module_manager_queue_notify_trampoline.o txm_module_manager_semaphore_notify_trampoline.o txm_module_manager_mm_register_setup.o txm_module_manager_start.o txm_module_manager_stop.o txm_module_manager_thread_create.o txm_module_manager_thread_notify_trampoline.o txm_module_manager_thread_reset.o txm_module_manager_timer_notify_trampoline.o txm_module_manager_unload.o txm_module_manager_thread_stack_build.o txm_module_manager_internal_load.o txm_module_manager_object_allocate.o txm_module_manager_object_deallocate.o txm_module_manager_object_pointer_get_extended.o txm_module_manager_properties_get.o txm_module_manager_util.o txm_module_manager_user_mode_entry.o
|
||||
armar -r tx.a txm_module_manager_initialize.o txm_module_manager_kernel_dispatch.o txm_module_manager_maximum_module_priority_set.o txm_module_manager_memory_fault_handler.o txm_module_manager_memory_fault_notify.o txm_module_manager_memory_load.o txm_module_manager_object_pointer_get.o txm_module_manager_object_pool_create.o txm_module_manager_queue_notify_trampoline.o txm_module_manager_semaphore_notify_trampoline.o txm_module_manager_mm_register_setup.o txm_module_manager_start.o txm_module_manager_stop.o txm_module_manager_thread_create.o txm_module_manager_thread_notify_trampoline.o txm_module_manager_thread_reset.o txm_module_manager_timer_notify_trampoline.o txm_module_manager_unload.o txm_module_manager_thread_stack_build.o txm_module_manager_internal_load.o txm_module_manager_object_allocate.o txm_module_manager_object_deallocate.o txm_module_manager_object_pointer_get_extended.o txm_module_manager_properties_get.o txm_module_manager_util.o txm_module_manager_user_mode_entry.o txm_module_manager_absolute_load.o
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
armasm -g --cpu=cortex-m7.fp.dp --apcs=/interwork tx_initialize_low_level.S
|
||||
armasm -g --cpreproc --cpu=cortex-m7.fp.dp --apcs=/interwork tx_initialize_low_level.S
|
||||
armcc -c -g --cpu=cortex-m7.fp.dp -O2 -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx.c
|
||||
armlink -d -o sample_threadx.axf --elf --map --ro-base=0x00000000 --rw-base=0x20000000 --first __tx_vectors --datacompressor=off --inline --info=inline --callgraph --list sample_threadx.map tx_initialize_low_level.o sample_threadx.o tx.a
|
||||
|
||||
|
||||
@@ -55,8 +55,6 @@
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.compiler.v6.base.option.incpath.1498096289" name="Include path (-I)" superClass="com.arm.tool.c.compiler.v6.base.option.incpath" useByScannerDiscovery="false" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_port}""/>
|
||||
@@ -89,11 +87,7 @@
|
||||
|
||||
<option id="com.arm.tool.assembler.v6.base.options.debug.level.429021326" name="Debug Level" superClass="com.arm.tool.assembler.v6.base.options.debug.level" useByScannerDiscovery="false" value="com.arm.tool.assembler.v6.base.options.debug.level.std" valueType="enumerated"/>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.assembler.v6.base.option.incpath.2094427773" name="Include path (-I)" superClass="com.arm.tool.assembler.v6.base.option.incpath" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx}""/>
|
||||
|
||||
</option>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.assembler.v6.base.option.incpath.2094427773" name="Include path (-I)" superClass="com.arm.tool.assembler.v6.base.option.incpath" valueType="includePath"/>
|
||||
|
||||
<inputType id="com.arm.tool.assembler.v6.base.input.1024953339" superClass="com.arm.tool.assembler.v6.base.input"/>
|
||||
|
||||
@@ -133,23 +127,7 @@
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings">
|
||||
|
||||
<externalSettings containerId="tx;" factoryId="org.eclipse.cdt.core.cfg.export.settings.sipplier">
|
||||
|
||||
<externalSetting>
|
||||
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/tx"/>
|
||||
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/tx/Debug"/>
|
||||
|
||||
<entry flags="RESOLVED" kind="libraryFile" name="tx" srcPrefixMapping="" srcRootPath=""/>
|
||||
|
||||
</externalSetting>
|
||||
|
||||
</externalSettings>
|
||||
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
|
||||
</cconfiguration>
|
||||
|
||||
|
||||
@@ -3,7 +3,6 @@
|
||||
<name>sample_threadx</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
<project>tx</project>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
|
||||
@@ -57,10 +57,6 @@
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.compiler.v6.base.option.incpath.1498096289" name="Include path (-I)" superClass="com.arm.tool.c.compiler.v6.base.option.incpath" useByScannerDiscovery="false" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/txm}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic_modules}""/>
|
||||
@@ -115,13 +111,7 @@
|
||||
|
||||
<option id="com.arm.tool.assembler.v6.base.useMicroLib.555616131" name="Use microlib (-D__MICROLIB)" superClass="com.arm.tool.assembler.v6.base.useMicroLib" useByScannerDiscovery="false" value="false" valueType="boolean"/>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.assembler.v6.base.option.incpath.1292905054" name="Include path (-I)" superClass="com.arm.tool.assembler.v6.base.option.incpath" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/txm}""/>
|
||||
|
||||
</option>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.assembler.v6.base.option.incpath.1292905054" name="Include path (-I)" superClass="com.arm.tool.assembler.v6.base.option.incpath" valueType="includePath"/>
|
||||
|
||||
<inputType id="com.arm.tool.assembler.v6.base.input.1024953339" superClass="com.arm.tool.assembler.v6.base.input"/>
|
||||
|
||||
@@ -185,29 +175,7 @@
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings">
|
||||
|
||||
<externalSettings containerId="txm;" factoryId="org.eclipse.cdt.core.cfg.export.settings.sipplier">
|
||||
|
||||
<externalSetting>
|
||||
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/tx"/>
|
||||
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/txm"/>
|
||||
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/tx/Debug"/>
|
||||
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/txm/Debug"/>
|
||||
|
||||
<entry flags="RESOLVED" kind="libraryFile" name="tx" srcPrefixMapping="" srcRootPath=""/>
|
||||
|
||||
<entry flags="RESOLVED" kind="libraryFile" name="txm" srcPrefixMapping="" srcRootPath=""/>
|
||||
|
||||
</externalSetting>
|
||||
|
||||
</externalSettings>
|
||||
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
|
||||
</cconfiguration>
|
||||
|
||||
|
||||
@@ -3,7 +3,6 @@
|
||||
<name>sample_threadx_module</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
<project>txm</project>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
|
||||
@@ -55,8 +55,6 @@
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.compiler.v6.base.option.incpath.1498096289" name="Include path (-I)" superClass="com.arm.tool.c.compiler.v6.base.option.incpath" useByScannerDiscovery="false" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic_modules}""/>
|
||||
@@ -91,11 +89,7 @@
|
||||
|
||||
<option id="com.arm.tool.assembler.v6.base.options.debug.level.429021326" name="Debug Level" superClass="com.arm.tool.assembler.v6.base.options.debug.level" useByScannerDiscovery="false" value="com.arm.tool.assembler.v6.base.options.debug.level.std" valueType="enumerated"/>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.assembler.v6.base.option.incpath.1361570371" name="Include path (-I)" superClass="com.arm.tool.assembler.v6.base.option.incpath" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx}""/>
|
||||
|
||||
</option>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.assembler.v6.base.option.incpath.1361570371" name="Include path (-I)" superClass="com.arm.tool.assembler.v6.base.option.incpath" valueType="includePath"/>
|
||||
|
||||
<inputType id="com.arm.tool.assembler.v6.base.input.1024953339" superClass="com.arm.tool.assembler.v6.base.input"/>
|
||||
|
||||
@@ -135,25 +129,7 @@
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings">
|
||||
|
||||
<externalSettings containerId="sample_threadx_module;" factoryId="org.eclipse.cdt.core.cfg.export.settings.sipplier"/>
|
||||
|
||||
<externalSettings containerId="tx;" factoryId="org.eclipse.cdt.core.cfg.export.settings.sipplier">
|
||||
|
||||
<externalSetting>
|
||||
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/tx"/>
|
||||
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/tx/Debug"/>
|
||||
|
||||
<entry flags="RESOLVED" kind="libraryFile" name="tx" srcPrefixMapping="" srcRootPath=""/>
|
||||
|
||||
</externalSetting>
|
||||
|
||||
</externalSettings>
|
||||
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
|
||||
</cconfiguration>
|
||||
|
||||
|
||||
@@ -3,8 +3,6 @@
|
||||
<name>sample_threadx_module_manager</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
<project>sample_threadx_module</project>
|
||||
<project>tx</project>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
|
||||
-3
@@ -1,3 +0,0 @@
|
||||
wait
|
||||
load ..\sample_threadx_module\Debug\sample_threadx_module.axf
|
||||
wait
|
||||
+55
-43
File diff suppressed because one or more lines are too long
-3
@@ -1,3 +0,0 @@
|
||||
wait
|
||||
add-symbol-file ..\sample_threadx_module\Debug\sample_threadx_module.axf
|
||||
wait
|
||||
@@ -1,5 +1,7 @@
|
||||
del tx.a
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb tx_initialize_low_level.S
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ..\module_manager\src\tx_thread_stack_build.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ..\module_manager\src\tx_thread_schedule.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ..\module_manager\src\tx_thread_system_return.S
|
||||
@@ -9,6 +11,12 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ..\module_manager\src\tx_timer_interrupt.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ..\module_manager\src\txm_module_manager_thread_stack_build.S
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_alignment_adjust.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_external_memory_enable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_memory_fault_handler.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_mm_register_setup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_memory_fault_notify.c
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_cleanup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_create.c
|
||||
@@ -194,19 +202,16 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_timer_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_timer_info_get.c
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_alignment_adjust.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_absolute_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_application_request.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_callback_request.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_event_flags_notify_trampoline.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_external_memory_enable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_file_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_in_place_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_internal_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_kernel_dispatch.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_maximum_module_priority_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_memory_fault_handler.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_memory_fault_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_memory_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_deallocate.c
|
||||
@@ -216,7 +221,6 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_properties_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_queue_notify_trampoline.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_semaphore_notify_trampoline.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_mm_register_setup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_start.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_stop.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_thread_create.c
|
||||
@@ -252,6 +256,7 @@ arm-none-eabi-ar -r tx.a tx_timer_info_get.o tx_timer_initialize.o tx_timer_perf
|
||||
arm-none-eabi-ar -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o
|
||||
arm-none-eabi-ar -r tx.a tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o
|
||||
arm-none-eabi-ar -r tx.a tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o
|
||||
|
||||
arm-none-eabi-ar -r tx.a txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o
|
||||
arm-none-eabi-ar -r tx.a txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o
|
||||
arm-none-eabi-ar -r tx.a txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o
|
||||
@@ -265,16 +270,11 @@ arm-none-eabi-ar -r tx.a txe_thread_wait_abort.o txe_timer_activate.o txe_timer_
|
||||
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_alignment_adjust.o txm_module_manager_application_request.o txm_module_manager_callback_request.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_event_flags_notify_trampoline.o txm_module_manager_external_memory_enable.o txm_module_manager_file_load.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_in_place_load.o txm_module_manager_initialize.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_absolute_load.o txm_module_manager_in_place_load.o txm_module_manager_initialize.o txm_module_manager_internal_load.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_kernel_dispatch.o txm_module_manager_maximum_module_priority_set.o txm_module_manager_memory_fault_handler.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_memory_fault_notify.o txm_module_manager_memory_load.o txm_module_manager_object_pointer_get.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_pool_create.o txm_module_manager_queue_notify_trampoline.o txm_module_manager_semaphore_notify_trampoline.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_mm_register_setup.o txm_module_manager_start.o txm_module_manager_stop.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_thread_create.o txm_module_manager_thread_notify_trampoline.o txm_module_manager_thread_reset.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_timer_notify_trampoline.o txm_module_manager_unload.o txm_module_manager_thread_stack_build.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_internal_load.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_allocate.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_deallocate.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_pointer_get_extended.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_properties_get.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_util.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_allocate.o txm_module_manager_object_deallocate.o txm_module_manager_object_pointer_get_extended.o txm_module_manager_properties_get.o txm_module_manager_util.o
|
||||
@@ -1,5 +1,7 @@
|
||||
del txm.a
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\module_lib\src\txm_module_thread_shell_entry.c
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_delete.c
|
||||
@@ -29,7 +31,6 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_deallocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_pointer_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\module_lib\src\txm_module_thread_shell_entry.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_thread_system_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_delete.c
|
||||
@@ -98,21 +99,6 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_exit_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_user_event_insert.c
|
||||
|
||||
arm-none-eabi-ar -r txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_block_pool_prioritize.o txm_block_release.o
|
||||
arm-none-eabi-ar -r txm.a txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_byte_pool_prioritize.o txm_byte_release.o
|
||||
arm-none-eabi-ar -r txm.a txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_event_flags_set.o txm_event_flags_set_notify.o
|
||||
arm-none-eabi-ar -r txm.a txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o
|
||||
arm-none-eabi-ar -r txm.a txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o
|
||||
arm-none-eabi-ar -r txm.a txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o
|
||||
arm-none-eabi-ar -r txm.a txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o
|
||||
arm-none-eabi-ar -r txm.a txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o
|
||||
arm-none-eabi-ar -r txm.a txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o
|
||||
arm-none-eabi-ar -r txm.a txm_time_get.o txm_time_set.o
|
||||
arm-none-eabi-ar -r txm.a txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o
|
||||
arm-none-eabi-ar -r txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o txm_block_pool_prioritize.o txm_block_release.o txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o txm_byte_pool_prioritize.o txm_byte_release.o txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o txm_event_flags_set.o txm_event_flags_set_notify.o txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o txm_time_get.o txm_time_set.o
|
||||
arm-none-eabi-ar -r txm.a txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o
|
||||
arm-none-eabi-ar -r txm.a txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module_manager.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb tx_simulator_startup.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb cortexm_crt0.S
|
||||
arm-none-eabi-ld -A cortex-m7 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm_crt0.o sample_threadx_module_manager.o tx.a libc.a -o sample_threadx_module_manager.axf -M > sample_threadx_module_manager.map
|
||||
arm-none-eabi-gcc -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -nostartfiles -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm_crt0.o sample_threadx_module_manager.o tx.a -o sample_threadx_module_manager.axf -Wl,-Map=sample_threadx_module_manager.map
|
||||
|
||||
@@ -0,0 +1,4 @@
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I..\inc -I..\..\..\..\common\inc sample_threadx.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb tx_simulator_startup.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb cortexm_crt0.S
|
||||
arm-none-eabi-gcc -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -nostartfiles -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm_crt0.o sample_threadx.o tx.a -lc -o sample_threadx.axf -Wl,-Map=sample_threadx.map
|
||||
@@ -66,7 +66,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>OGLastSavedByProductVersion</name>
|
||||
<state>8.50.4.26131</state>
|
||||
<state>8.50.9.33458</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GeneralEnableMisra</name>
|
||||
@@ -481,7 +481,7 @@
|
||||
<name>AARM</name>
|
||||
<archiveVersion>2</archiveVersion>
|
||||
<data>
|
||||
<version>10</version>
|
||||
<version>11</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
@@ -637,6 +637,10 @@
|
||||
<name>AsmNoLiteralPool</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>PreInclude</name>
|
||||
<state></state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
@@ -1050,7 +1054,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>IarchiveOutput</name>
|
||||
<state></state>
|
||||
<state>C:\Users\andrejm\work\git\AzureRTOS\threadx\ports_module\cortex-m7\iar\example_build\Debug\Exe\tx.a</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
@@ -1541,7 +1545,7 @@
|
||||
<name>AARM</name>
|
||||
<archiveVersion>2</archiveVersion>
|
||||
<data>
|
||||
<version>10</version>
|
||||
<version>11</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>0</debug>
|
||||
<option>
|
||||
@@ -1697,6 +1701,10 @@
|
||||
<name>AsmNoLiteralPool</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>PreInclude</name>
|
||||
<state></state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
@@ -2766,6 +2774,9 @@
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\common\src\txe_timer_info_get.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\common_modules\module_manager\src\txm_module_manager_absolute_load.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\module_manager\src\txm_module_manager_alignment_adjust.c</name>
|
||||
</file>
|
||||
|
||||
@@ -0,0 +1,174 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
|
||||
<cconfiguration id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048">
|
||||
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048" moduleId="org.eclipse.cdt.core.settings" name="Debug">
|
||||
|
||||
<externalSettings/>
|
||||
|
||||
<extensions>
|
||||
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
|
||||
<extension id="com.arm.eclipse.builder.armcc.error" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
|
||||
</extensions>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
|
||||
<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048" name="Debug" parent="com.arm.eclipse.build.config.v6.exe.debug.base">
|
||||
|
||||
<folderInfo id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048." name="/" resourcePath="">
|
||||
|
||||
<toolChain id="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6.1388095870" name="Arm Compiler 6" superClass="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6">
|
||||
|
||||
<option id="com.arm.toolchain.v6.base.options.target.cpu_fpu.689426261" superClass="com.arm.toolchain.v6.base.options.target.cpu_fpu" useByScannerDiscovery="false" value="Cortex-A35.AArch64.ARMv8.Neon.Crypto" valueType="string"/>
|
||||
|
||||
<option id="com.arm.toolchain.v6.base.options.debug.level.1729514272" name="Debug Level" superClass="com.arm.toolchain.v6.base.options.debug.level" useByScannerDiscovery="false" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/>
|
||||
|
||||
<targetPlatform id="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6.1388095870.857809581" name=""/>
|
||||
|
||||
<builder autoBuildTarget="all" buildPath="${workspace_loc:/sample_threadx}/Debug" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="com.arm.toolchain.v6.builder.1944684744" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="8" superClass="com.arm.toolchain.v6.builder"/>
|
||||
|
||||
<tool id="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6.259341383" name="Arm C Compiler 6" superClass="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6">
|
||||
|
||||
<option id="com.arm.tool.c.compiler.v6.base.option.cpu.96377009" name="CPU (-mcpu)" superClass="com.arm.tool.c.compiler.v6.base.option.cpu" useByScannerDiscovery="true" value="cortex-a35" valueType="string"/>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.compiler.v6.base.option.defmac.1975445896" name="Define macro (-D)" superClass="com.arm.tool.c.compiler.v6.base.option.defmac" useByScannerDiscovery="false" valueType="definedSymbols">
|
||||
|
||||
<listOptionValue builtIn="false" value="STANDALONE"/>
|
||||
|
||||
</option>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.compiler.v6.base.option.incpath.1271571516" name="Include path (-I)" superClass="com.arm.tool.c.compiler.v6.base.option.incpath" useByScannerDiscovery="false" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_port}""/>
|
||||
|
||||
</option>
|
||||
|
||||
<option id="com.arm.tool.c.compiler.v6.base.options.debug.level.1548640167" name="Debug Level" superClass="com.arm.tool.c.compiler.v6.base.options.debug.level" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/>
|
||||
|
||||
<inputType id="com.arm.tool.c.compiler.v6.base.input.815952161" superClass="com.arm.tool.c.compiler.v6.base.input"/>
|
||||
|
||||
</tool>
|
||||
|
||||
<tool id="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6.1091536604" name="Arm C++ Compiler 6" superClass="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6">
|
||||
|
||||
<option id="com.arm.tool.c.compiler.v6.base.options.debug.level.1962633763" name="Debug Level" superClass="com.arm.tool.c.compiler.v6.base.options.debug.level" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/>
|
||||
|
||||
</tool>
|
||||
|
||||
<tool id="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6.1147447905" name="Arm Assembler 6" superClass="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6">
|
||||
|
||||
<option id="com.arm.tool.assembler.v6.base.option.cpu.269795998" name="CPU (-mcpu)" superClass="com.arm.tool.assembler.v6.base.option.cpu" useByScannerDiscovery="false" value="cortex-a35" valueType="string"/>
|
||||
|
||||
<option id="com.arm.tool.assembler.v6.base.options.debug.level.1521551718" name="Debug Level" superClass="com.arm.tool.assembler.v6.base.options.debug.level" useByScannerDiscovery="false" value="com.arm.tool.assembler.v6.base.options.debug.level.std" valueType="enumerated"/>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.assembler.v6.base.option.defmac.281085002" name="Define macro (-D)" superClass="com.arm.tool.assembler.v6.base.option.defmac" useByScannerDiscovery="false" valueType="definedSymbols"/>
|
||||
|
||||
<inputType id="com.arm.tool.assembler.v6.base.input.1000911913" superClass="com.arm.tool.assembler.v6.base.input"/>
|
||||
|
||||
</tool>
|
||||
|
||||
<tool id="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6.1807144931" name="Arm Linker 6" superClass="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6">
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.entry.249327747" name="Image entry point (--entry)" superClass="com.arm.tool.c.linker.option.entry" useByScannerDiscovery="false" value="start64" valueType="string"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.scatter.1246240408" name="Scatter file (--scatter)" superClass="com.arm.tool.c.linker.option.scatter" useByScannerDiscovery="false" value="..\sample_threadx.scat" valueType="string"/>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.linker.libs.2105481551" name="User library files" superClass="com.arm.tool.c.linker.libs" useByScannerDiscovery="false" valueType="libs">
|
||||
|
||||
<listOptionValue builtIn="false" value="..\..\tx\Debug\tx.a"/>
|
||||
|
||||
</option>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.imagemap.359605740" name="Generate image map (--map)" superClass="com.arm.tool.c.linker.option.imagemap" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.verbose.509554865" name="Verbose output (--verbose)" superClass="com.arm.tool.c.linker.option.verbose" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.totals.428431324" name="List total code and data sizes of output image (--info=totals)" superClass="com.arm.tool.c.linker.option.totals" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.redirectoutput.259431691" name="Redirect diagnostics output to file (--list)" superClass="com.arm.tool.c.linker.option.redirectoutput" useByScannerDiscovery="false" value="sample_threadx.map" valueType="string"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.elim.532237314" name="List unused sections that are eliminated (--info=unused)" superClass="com.arm.tool.c.linker.option.elim" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.compress.1449950796" name="Print RW compression information (--info=compression)" superClass="com.arm.tool.c.linker.option.compress" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.stack.1835435506" name="List stack usage of global symbols (--info=stack)" superClass="com.arm.tool.c.linker.option.stack" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.inlineinfo.1898593362" name="List functions inlined by linker (--info=inline)" superClass="com.arm.tool.c.linker.option.inlineinfo" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.callgraph.1505673040" name="Generate call graph (--callgraph)" superClass="com.arm.tool.c.linker.option.callgraph" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
|
||||
<option id="com.arm.tool.c.linker.option.graphfile.1311318964" name="Callgraph file (--callgraph_file)" superClass="com.arm.tool.c.linker.option.graphfile" useByScannerDiscovery="false" value="callgraph" valueType="string"/>
|
||||
|
||||
</tool>
|
||||
|
||||
<tool id="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6.1243987688" name="Arm Librarian 6" superClass="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6"/>
|
||||
|
||||
</toolChain>
|
||||
|
||||
</folderInfo>
|
||||
|
||||
<sourceEntries>
|
||||
|
||||
<entry excluding="startup_el3.S|startup_el2.S|startup_el1.S|startup_old.S" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||
|
||||
</sourceEntries>
|
||||
|
||||
</configuration>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
|
||||
</cconfiguration>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
|
||||
<project id="sample_threadx.com.arm.eclipse.build.project.v6.exe.1027551600" name="Executable"/>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
|
||||
<configuration configurationName="Debug">
|
||||
|
||||
<resource resourceType="PROJECT" workspacePath="/sample_threadx"/>
|
||||
|
||||
</configuration>
|
||||
|
||||
<configuration configurationName="Release">
|
||||
|
||||
<resource resourceType="PROJECT" workspacePath="/sample_threadx"/>
|
||||
|
||||
</configuration>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
|
||||
<storageModule moduleId="com.arm.projectSettings" version="6.0.0"/>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
|
||||
</cproject>
|
||||
@@ -0,0 +1,26 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>sample_threadx</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
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Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user