Commit Graph
69 Commits
Author SHA1 Message Date
shuta.lst 7bf83088b8 Support XuanTie E906 CPU
- Place the E906 implementation in the ports/risc-v32/gnu directory;
 - Remove code unrelated to the xuantie_smartl_fpga demo;
2026-02-25 11:23:09 +08:00
Akif Ejaz 1d796d5fde Add RISC-V32 arch. port layer
This update adapts the ThreadX low-level kernel routines
for RV32, including:
  - startup and initialization logic
  - context save/restore implementations
  - interrupt control and scheduler entry
  - thread stack build and system return paths
  - timer interrupt handling
  - made it complient as per new risc-v64/gnu
      & threadx style
  - added reademe for risc-v32/gnu port

These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
2026-02-25 09:06:02 +08:00
shuta.lst ede5aa2867 Support XuanTie E906 CPU.
- add ThreadX porting codes for XuanTie E906.
 - add example for XuanTie E906 running on QEMU smartl.
2026-02-12 23:13:31 +08:00
Frédéric Desbiens 579246b4a2 Merge pull request #494 from spir6s/master
Added missing ULONG64 definition for RX ports needed by USBX and NetX Duo
2026-02-05 09:52:58 -05:00
Frédéric Desbiens 0b0f1d0911 Merge pull request #496 from akifejaz/rv64-gnu-port
Improved RV64/GNU port robustness, portability, and CSR handling
2026-02-05 09:50:08 -05:00
Akif Ejaz 21256bed51 Cleanup the macros in tx_port.h & comments in inc/*.S
- removed the trailing whitespaces

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
2026-02-05 16:16:59 +05:00
Akif Ejaz 99ed67df5a few cleanups
Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
2026-01-26 16:08:51 +05:00
Akif Ejaz 6c25effb40 improve port robustness, portability, and CSR handling
- removed tx_port.h dependency from .S files
- replaced tx_timer_interrupt.c with tx_timer_interrupt.S
-  made some cleanups, formatting to better readability
- removed macros (LOAD/STORE/REGBYTES)
  changed register nomenclature to use RISC-V ABI
  names (ra, sp, t0, etc.)
- added readme_threadx.txt

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
2026-01-26 15:48:46 +05:00
Sebastian Paarz b443c0fe2d Added missing ULONG64 definition for RX ports 2026-01-09 13:51:35 +01:00
Frédéric Desbiens ca7589ce4a Merge pull request #463 from ericminnerath/fix-iar-include
Fix IAR include typo.
2025-09-21 16:50:09 -04:00
ericminnerath 67e415648e initial commit 2025-08-27 17:15:42 -05:00
Huan Nguyen 20958ddcf9 Document GNU library compile flags for Linux and SMP Linux 2025-04-14 13:04:15 -06:00
Frédéric Desbiens 376e26be29 Updated ports version to v6.4.2. 2025-02-24 13:31:48 -05:00
Frédéric Desbiens e657568041 Merge pull request #416 from Jer6y/master
riscv : add riscv qemu virt support and fix fs bit error in mstatus
2025-02-13 09:58:54 -05:00
Sebastian Paarz bb4540f65a Added missing CMakeLists.txt for Renesas RX ports 2024-11-28 10:02:47 +01:00
Jer6y d24da0e2ea riscv : add riscv qemu virt support and fix fs bit error in mstatus 2024-10-25 20:03:11 +08:00
RavuriN db5e0de743 Updated Microsoft Asure RTOS to Eclipse ThreadX RTOS 2024-03-24 18:43:44 +00:00
TiejunZhou 27f0ce9ca2 Update version number to 6.4.1 2024-02-27 06:00:58 +00:00
bo chen 039a346397 Update the copyright for all assembly files. 2024-02-23 09:39:05 +08:00
Bo Chen (from Dev Box) 3e1da1f0b0 Update version id string. 2024-01-30 08:39:18 +08:00
Bo Chen (from Dev Box) 8276bcf711 Update copyright. 2024-01-29 13:51:15 +08:00
Xiuwen Cai 39f3c86c61 Add error handling in lock initialization in the Xtensa port (#340)
* Add error handling in lock initialization.

* Update release data and version.
2023-12-28 13:17:58 +08:00
TiejunZhou d9ffb0f97d Update release date and version (#338)
* Update version number in API header

* Update release date and version
2023-12-28 10:51:29 +08:00
Yajun Xia e73843f6d4 Added thumb mode support for threadX GNU ports on armv7a platforms. (#333)
* Added thumb mode support for threadX GNU ports on armv7a platforms.

https://msazure.visualstudio.com/One/_workitems/edit/26105175/

* move the swi interrupt to tx_initialize_low_level.S.

* update the test log.
2023-12-28 09:37:39 +08:00
TiejunZhou 13b700fd3e Update release version to 6.3.0 and date to 10-31-2023 (#308) 2023-10-23 15:31:03 +08:00
Yajun Xia bc4bd804d5 Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A5 GNU port (#306)
https://msazure.visualstudio.com/One/_workitems/edit/25153813/
2023-09-26 09:51:47 +08:00
Yajun Xia d43cba10b2 Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A9 GNU port. (#303)
https://msazure.visualstudio.com/One/_workitems/edit/25153785/
2023-09-18 16:36:36 +08:00
Yajun Xia a0a0ef9385 Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A8 GNU port. (#302)
https://msazure.visualstudio.com/One/_workitems/edit/25139203/
2023-09-18 10:32:07 +08:00
Yajun Xia 6aeefea8e6 Fixed the issue of the data/bss section cannot be read from ARM FVP d… (#301)
* Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A7 GNU port.

https://msazure.visualstudio.com/One/_workitems/edit/24597276/

* remove untracked files.
2023-09-15 10:46:20 +08:00
TiejunZhou 08380caa77 Unify ThreadX and SMP for ARMv8-A. (#275)
* Unify ThreadX and SMP for ARMv8-A.

* Fix path in pipeline to check ports arch.

* Add ignore folders for ARM DS

* Generate ThreadX and SMP ports for ARMv8-A.

* Ignore untracked files for ports_arch check.

* Use arch instead of CPU to simplify the project management.
2023-06-21 18:23:36 +08:00
Yanwu Cai 1b2995cea8 Fix compile warnings in Linux port. (#276) 2023-06-19 17:45:16 +08:00
TiejunZhou 71cc95eaed Include tx_user.h in cortex_m33/55/85 IAR port (#267) 2023-05-24 13:31:02 +08:00
TiejunZhou e2a8334f96 Include tx_user.h in cortex_m3/4/7 IAR and AC5 port (#255)
* Include tx_user.h in ARMv7-M IAR port

* Include tx_user.h in ARMv7-M AC5 port

* Include tx_user.h in cortex_m3/4/7 IAR and AC5 port
2023-04-24 09:33:00 +08:00
TiejunZhou 672c5e953e Release ARMv7-A architecture ports and add tx_user.h to GNU port assembly files (#250)
* Release ARMv7-A architecture ports

* Add tx_user.h to GNU port assembly files

* Update GitHub action to perform check for Cortex-A ports
2023-04-19 17:56:09 +08:00
Tiejun Zhou ac3b6b326c Update on 31 Mar 2023. Expand to see details.
af5702cbf Include tx_user.h only when TX_INCLUDE_USER_DEFINE_FILE is defined for assembly files
2023-03-31 07:34:47 +00:00
Tiejun Zhou 2aa19f3de0 Release 6.2.1 on 08 Mar 2023. Expand to see details.
cee19603d Include tx_user.h conditionally.
e40e08007 Update owners
d69641273 Update release date and version
394aee52f Add tx_user.h to GNU port assembly files
5cca2ddd0 RISC-V 64 bit port for Microchip
e0f2c373c Link Winmm.lib that required by the high-resolution timer.
6af472a68 Update Win32 port with high resolution timer.
aea7b556a Add DMB ISH barrier inst in ARMv8-A SMP scheduler
19091a262 Add .section .preamble to m3 m4 m7 module ports
ced60e1b7 Add missing parenthesis in ports assembly file
309dc77ca Modules Cortex-A7 IAR new port
c752a4063 Modules Cortex-A7 GNU new port
dc224b90f Fix race condition in tx_thread_wait_abort and update regression test
6e261f5b7 create threadx cmsis-pack
2023-03-08 08:26:22 +00:00
Scott Larson 37f6d0b39c Update on 18 Jan 2023. Expand to see details.
9c3acb6ce armv8-m compile time FPU fix
37daa35e7 added tx_trace.h include to module stop.c
39824289f Remove internal deprecated files.
fe2f80f43 Add a notice for not released file.
7fdd3782a Upgrade to the latest Container Images.
2023-01-18 08:39:40 +00:00
Scott Larson 4e62226eea Update on 16 Dec 2022. Expand to see details.
b5d5df511 #include tx_user.h in assembly files for cortex-m ports
33e04e3d5 initial port of MIPS SMP for GHS and GNU
2eda2c17d capitalize extensions for M23 asm files
21c354ccb Fix armv7-m MPU settings for corner case, unify txm_module_port.h files
4a1ff93f9 remove uneeded include for ac6
c823e91ff update riscv iar example for latest iar tools
5559d185d check module stack for overlap (not kernel stack)
efa9ce7b7 apply patch from mobileye to fix time slice processing
75fdcb722 Updated copy_armv7_cm.yml
de04b9904 initialize unused MPU settings so that aliasing will work
79b317b60 add config directory to IAR RISC-V port in order to use simulator
2022-12-16 08:16:32 +00:00
Scott Larson b42c5acd8b update IAR RISC-V example 2022-11-17 10:33:54 -08:00
Scott Larson ee892502ec add 'config' directory to risc-v iar to support simulator 2022-11-02 08:32:02 -07:00
Tiejun Zhou 3e8e85cdc1 Release 6.2.0 2022-10-26 23:41:13 +00:00
Yuxin Zhou 8c3c08f108 Release 6.1.12 2022-07-26 02:04:40 +00:00
Scott Larson 54cda6ee9e Add Cortex M55 and M85 to ports 2022-07-07 11:42:14 -07:00
Tiejun Zhou 408f9fa1b7 Import RX port update for 6.1.11 release. 2022-04-26 14:19:28 +08:00
Yuxin Zhou cef9cb22a5 Release 6.1.11 2022-04-20 05:07:02 +00:00
Yuxin Zhou fd403521e9 Add rxv1, v2, v3 port: removed system state macro, added missing interrupt control defines, and added missing thread preemption logic. 2022-02-01 23:21:49 -08:00
Yuxin Zhou f7f0957188 Release 6.1.10 2022-01-29 00:24:03 +00:00
Tiejun Zhou b216ceb25e Removed unused code. 2021-10-17 10:00:34 +08:00
Yuxin Zhou 1af8404c54 Release 6.1.9 2021-10-14 00:51:26 +00:00
Tiejun Zhou 06064828ef Add RXv1 port. 2021-09-24 10:52:11 +08:00