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update IAR RISC-V example

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This commit is contained in:
Scott Larson
2022-11-17 10:33:54 -08:00
parent 35a301ad3b
commit b42c5acd8b
3 changed files with 717 additions and 285 deletions
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ports/risc-v32/iar/example_build/sample_threadx.ewp
+358 -142
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ports/risc-v32/iar/example_build/sample_threadx.icf
+1 -1
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@@ -33,7 +33,7 @@ else
}
define block RW_DATA with static base GPREL { rw data };
keep { symbol __iar_cstart_init_gp }; // defined in cstartup.s
keep symbol __iar_cstart_init_gp; // defined in cstartup.s
"CSTARTUP32" : place at start of ROM_region32 { ro section .cstartup };
ports/risc-v32/iar/example_build/tx.ewp
+358 -142
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