* Add LX8 support for > 32 interrupts
Also fix inconsistent SWPRI define in interrupt handler
* ThreadX: Fix context switch logic
- Disable interrupts prior to allocating a large exception frame;
only reenable them after deallocating the extra memory.
- Any user tasks with stacks based on TX_MINIMUM_STACK do not
have sufficient space for both a context switch frame and an ISR
frame; ill-timed interrupts were causing stack overruns.
* ThreadX: Interrupt fixes for TX_ENABLE_EXECUTION_CHANGE_NOTIFY
- Must reload register trashed by notify hook function call
- Must ensure PS.WOE is set before using call8
- Remove unused XT_USE_INT_WRAPPER define and associated changes,
which had a bug in XEA2 usage
- Fix another case where enabling the thread notify hooks for
call0 ABI corrupted a register
* ThreadX: Support for __DYNAMIC_REENT__
- ThreadX change to handle dynamic reent for both newlib and xclib
- Adapt ThreadX xclib interface code to handle dynamic reent pointers
* ThreadX: Xtensa execution profiling support
- Update upstream execution profiling for Xtensa port
* ThreadX: Update xtensa port readme
* ThreadX: Add Xtensa example to EPK
- tx_execution_profile.h now defines an Xtensa example
in addition to the existing Cortex example
* ThreadX: Add xtensa.cmake
* ThreadX: Update XSHAL_CLIB ifdefs in __getreent()
- Prevent a fall-through with no return value when neither
xclib nor newlib are used.
* Fixed MPIE being cleared leading to have interrupts being disable when returning from machine mode
* Removed wrong register operand and replaced by immediate value
* Fixed race condition and message loss in Cortex-M GNU, AC6, and IAR ports (#516)
- Added compiler memory barriers to BASEPRI management functions in tx_port.h.
- Added architectural barriers (DSB/ISB) to scheduler return paths in tx_port.h and tx_thread_system_return.S to prevent fall-through before context switch.
- These changes address spurious thread resumption and lost messages, especially when TX_NOT_INTERRUPTABLE is enabled.
- These changes ensure that pending interrupts (specifically PendSV) are recognised before subsequent instructions are executed, following Kairalite's feedback and ARM architectural guidelines.
Assisted-by: Gemini (Gemini 2.0 Flash)
-----
* Added a comment in common/tx_queue_cleanup to document why the NI path omits revalidation guards
- In `TX_NOT_INTERRUPTABLE` mode, the caller keeps interrupts disabled across the entire cleanup call, so the race window that makes the guards necessary in the interruptable path cannot occur. Add a comment explaining this, and noting that all paths that resume a suspended thread clear tx_thread_suspend_cleanup before calling
_tx_thread_system_ni_resume, making double-cleanup impossible.
This prevents future false-positive suggestions (e.g. from AI tools) to add redundant checks to the NI path.
Relates to: eclipse-threadx/threadx#516
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
This update adapts the ThreadX low-level kernel routines
for RV32, including:
- startup and initialization logic
- context save/restore implementations
- interrupt control and scheduler entry
- thread stack build and system return paths
- timer interrupt handling
- made it complient as per new risc-v64/gnu
& threadx style
- added reademe for risc-v32/gnu port
These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.
Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
This update adapts the ThreadX low-level kernel routines
for RV32, including:
- startup and initialization logic
- context save/restore implementations
- interrupt control and scheduler entry
- thread stack build and system return paths
- timer interrupt handling
- made it complient as per new risc-v64/gnu
& threadx style
- added reademe for risc-v32/gnu port
These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.
Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
Ian Thompson
Akif Ejaz
Christos Papadopoulos
Francisco Manuel Merino Torres
Frédéric Desbiens
Jonathan Blanchard
shuta.lst