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Fixed MPIE being cleared leading to have interrupts being disable after an mret instruction (#522)

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* Fixed MPIE being cleared leading to have interrupts being disable when returning from machine mode

* Removed wrong register operand and replaced by immediate value
This commit is contained in:
Christos Papadopoulos
2026-05-13 09:00:54 -04:00
committed by GitHub
parent 42adda4457
commit 0dd6d28afb
1 changed files with 10 additions and 17 deletions
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ports/risc-v64/gnu/src/tx_thread_context_restore.S
+10 -17
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@@ -175,18 +175,10 @@ _tx_thread_context_restore:
Set MPIE and restore MPP to Machine, preserve other fields. */
csrr t1, mstatus
li t2, 0x1880 // Set MPP(0x1800) | MPIE(0x80)
/* Clear MPP/MPIE/MIE bits in t1 then set desired values. */
li t2, 0x1888 // MPP(0x1800) | MPIE(0x80) | MIE(0x08)
li t3, 0x1800 // Set MPP to Machine mode (bits 12:11)
/* Construct new mstatus in t1: clear mask bits, set MPP/MPIE and optionally FP bit,
preserve everything except the bits we will modify. */
li t4, ~0x1888 // Clear mask for MPP/MPIE/MIE
and t1, t1, t4
or t1, t1, t3
or t1, t1, t2 // MPP and MPIE are now set. All other bits are preserved
andi t1, t1, ~0x8 // Clear MIE, Hardware will restore it from MPIE
#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
li t0, 0x2000 // Set FS bits (bits 14:13 to 01) for FP state
@@ -352,14 +344,15 @@ _tx_thread_no_preempt_restore:
ld t0, 30*8(sp) // Recover mepc
csrw mepc, t0 // Setup mepc
/* Compose mstatus via read/modify/write to avoid clobbering unrelated bits. */
/* Compose mstatus via read/modify/write to avoid clobbering unrelated bits.
Set MPIE and restore MPP to Machine, preserve other fields. */
csrr t1, mstatus
li t2, 0x1888 // MPP(0x1800) | MPIE(0x80) | MIE(0x08)
li t3, 0x1800 // Set MPP to Machine mode
li t4, ~0x1888 // Clear mask for MPP/MPIE/MIE
and t1, t1, t4
or t1, t1, t3
li t2, 0x1880 // Set MPP(0x1800) | MPIE(0x80)
or t1, t1, t2 // MPP and MPIE are now set. All other bits are preserved
andi t1, t1, ~0x8 // Clear MIE, Hardware will restore it from MPIE
#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
li t0, 0x2000 // Set FS bits for FP state