Merge pull request #500 from goodnorning/feature/support_xuantie_e906

Added support for the XuanTie E906 CPU.
2026-10-06 06:59:08 +08:00 · 2026-03-04 08:34:59 +01:00
parent 0c92f48d50 7bf83088b8
commit b3e8a9aa20
70 changed files with 24644 additions and 0 deletions
@@ -0,0 +1,77 @@
+cmake_minimum_required(VERSION 3.15 FATAL_ERROR)
+
+project(demo_threadx
+    LANGUAGES C ASM
+)
+
+set(SRCS
+    ${CMAKE_CURRENT_LIST_DIR}/demo_threadx.c
+    ${CMAKE_CURRENT_LIST_DIR}/pre_main.c
+    ${CMAKE_CURRENT_LIST_DIR}/boards/board_riscv_dummy/src/uart/board_uart.c
+    ${CMAKE_CURRENT_LIST_DIR}/boards/board_riscv_dummy/src/board_init.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/csi/csi2/src/csi_misc.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/libc_threadx/mini_printf.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/libc_threadx/newlib_stub.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/arch/e906fdp/startup.S
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/arch/e906fdp/vectors.S
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/arch/e906fdp/system.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/arch/e906fdp/trap_c.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/drivers/dw_uart_ll.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/drivers/uart.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/devices.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/feature.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/irq_port.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/irq.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/pre_main.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/sys_clk.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/target_get.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/tick.c
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/src/sys/weak.c
+)
+
+include_directories(
+    ${CMAKE_CURRENT_LIST_DIR}/../../../../../common/inc
+    ${CMAKE_CURRENT_LIST_DIR}/../../inc
+    ${CMAKE_CURRENT_LIST_DIR}
+    ${CMAKE_CURRENT_LIST_DIR}/boards/board_riscv_dummy/include
+    ${CMAKE_CURRENT_LIST_DIR}/components/csi/csi2/include
+    ${CMAKE_CURRENT_LIST_DIR}/components/libc_threadx/include
+    ${CMAKE_CURRENT_LIST_DIR}/components/libc_threadx/compilers/gcc
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/include
+    ${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/include/asm
+)
+
+add_compile_options(
+    -Os -g -Wno-main
+    -Wpointer-arith -Wno-undef -ffunction-sections -fdata-sections -fno-inline-functions -fno-builtin -fno-strict-aliasing
+    -DCONFIG_SUPPORT_TSPEND=1
+    -DCONFIG_ARCH_MAINSTACK=4096
+    -DCONFIG_ARCH_INTERRUPTSTACK=4096
+    -DCONFIG_SUPPORT_IRQ_NESTED=1
+    -DCONFIG_INTC_CLIC=1
+    -DCONFIG_INTC_CLINT=1
+    -DCONFIG_XIP=1
+    -DCONFIG_LIBC_MINI_PRINTF_SUPPORT=1
+    -DCONFIG_SYSTICK_HZ=100
+    -DCONFIG_BOARD_SMARTL_EVB=1
+    -DCONFIG_CPU_XUANTIE_E906FDP=1
+    -DCONFIG_KERNEL_THREADX=1
+    -DTX_INCLUDE_USER_DEFINE_FILE
+)
+
+add_link_options(
+    -nostartfiles -Wl,--gc-sections
+    -T${CMAKE_CURRENT_LIST_DIR}/components/chip_riscv_dummy/gcc_flash_smartl.ld
+    -Wl,-zmax-page-size=1024
+    -Wl,-Map=${PROJECT_NAME}.map
+)
+
+link_directories(${CMAKE_CURRENT_LIST_DIR}/../../../../../build)
+add_executable(${PROJECT_NAME} ${SRCS})
+set_target_properties(${PROJECT_NAME} PROPERTIES OUTPUT_NAME "${PROJECT_NAME}.elf")
+target_link_libraries(${PROJECT_NAME} PRIVATE threadx)
+
+add_custom_command(TARGET ${PROJECT_NAME} POST_BUILD
+    COMMAND ${OBJDUMP} -d $<TARGET_FILE:${PROJECT_NAME}> > ${PROJECT_NAME}.asm
+    COMMENT "Generating ASM disassembly files"
+)
@@ -0,0 +1,26 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CSI_CONFIG_H__
+#define __CSI_CONFIG_H__
+
+
+
+
+
+#endif /* __CSI_CONFIG_H__ */
@@ -0,0 +1,83 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <board.h>
+
+void board_init(void)
+{
+    /* some board preconfig */
+    // board_xxx();
+
+#if defined(BOARD_GPIO_PIN_NUM) && BOARD_GPIO_PIN_NUM > 0
+    board_gpio_pin_init();
+#endif
+
+#if defined(BOARD_UART_NUM) && BOARD_UART_NUM > 0
+#if !defined(RT_DEBUG_INIT) || !RT_DEBUG_INIT
+    board_uart_init();
+#endif
+#endif
+
+#if defined(BOARD_PWM_NUM) && BOARD_PWM_NUM > 0
+    board_pwm_init();
+#endif
+
+#if defined(BOARD_ADC_NUM) && BOARD_ADC_NUM > 0
+    board_adc_init();
+#endif
+
+#if defined(BOARD_BUTTON_NUM) && BOARD_BUTTON_NUM > 0
+    board_button_init();
+#endif
+
+#if defined(BOARD_LED_NUM) && BOARD_LED_NUM > 0
+    board_led_init();
+#endif
+
+#if defined(BOARD_WIFI_SUPPORT) && BOARD_WIFI_SUPPORT > 0
+    board_wifi_init();
+#endif
+
+#if defined(BOARD_BT_SUPPORT) && BOARD_BT_SUPPORT > 0
+    board_bt_init();
+#endif
+
+#if defined(BOARD_AUDIO_SUPPORT) && BOARD_AUDIO_SUPPORT > 0
+    board_audio_init();
+#endif
+}
+
+#ifdef CONFIG_KERNEL_THREADX
+#include <tx_api.h>
+
+extern unsigned long g_heap_start;
+extern unsigned long g_heap_end;
+
+TX_BYTE_POOL tx_byte_pool_0;
+UCHAR *tx_memory_area;
+
+void tx_mem_pool_init(void)
+{
+    ULONG pool_size = g_heap_end - g_heap_start;
+    tx_memory_area = (UCHAR *)g_heap_start;
+
+    tx_byte_pool_create(&tx_byte_pool_0, "byte pool sys 0", tx_memory_area, pool_size);
+}
+#endif
@@ -0,0 +1,45 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <board.h>
+#if CONFIG_DEVICES_RVM_HAL
+#include <devices/devicelist.h>
+#else
+#include <drv/uart.h>
+#endif
+
+#if CONFIG_DEVICES_RVM_HAL
+void board_uart_init(void)
+{
+    rvm_uart_drv_register(0);
+}
+#else
+__attribute__((weak)) csi_uart_t g_console_handle;
+
+void board_uart_init(void)
+{
+    /* init the console */
+    csi_uart_init(&g_console_handle, CONSOLE_UART_IDX);
+
+    /* config the UART */
+    csi_uart_baud(&g_console_handle, CONFIG_CLI_USART_BAUD);
+    csi_uart_format(&g_console_handle, UART_DATA_BITS_8, UART_PARITY_NONE, UART_STOP_BITS_1);
+}
+#endif
@@ -0,0 +1,7 @@
+#!/bin/bash
+
+pushd ../../../../../
+rm -rf build
+cmake -Bbuild -GNinja -DCMAKE_TOOLCHAIN_FILE=ports/risc-v32/gnu/example_build/xuantie_smartl_fpga/xuantie_e906_gnu.cmake .
+cmake --build ./build/
+popd
@@ -0,0 +1,7 @@
+#!/bin/bash
+
+bash build_libthreadx.sh
+
+rm -rf build
+cmake -Bbuild -GNinja -DCMAKE_TOOLCHAIN_FILE=xuantie_e906_gnu.cmake .
+cmake --build ./build/
@@ -0,0 +1,177 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     gcc_csky.ld
+ * @brief    csky linker file
+ * @version  V1.0
+ * @date     02. June 2017
+ ******************************************************************************/
+MEMORY
+{
+    ISRAM : ORIGIN = 0x00000000 , LENGTH = 0x30000   /* ISRAM 192KB*/
+    DSRAM : ORIGIN = 0x20000000 , LENGTH = 0xC0000   /* DSRAM 768KB*/
+    SRAM :  ORIGIN = 0x60000000 , LENGTH = 0x20000   /* SRAM 128KB, no cacheable*/
+}
+
+__min_heap_size = 0x200;
+PROVIDE (__ram_end  = 0x200C0000);
+PROVIDE (__heap_end = __ram_end);
+
+REGION_ALIAS("REGION_TEXT",    ISRAM);
+REGION_ALIAS("REGION_RODATA",  ISRAM);
+REGION_ALIAS("REGION_DATA",    DSRAM);
+REGION_ALIAS("REGION_BSS",     DSRAM);
+
+ENTRY(Reset_Handler)
+SECTIONS
+{
+ .text : {
+  . = ALIGN(0x4) ;
+  __stext = . ;
+  KEEP(*startup.o(*.text))
+  KEEP(*startup.o(*.vectors))
+  KEEP(*vectors.o(*.text))
+  KEEP(*whetstone.o(*.text))
+  KEEP(*startup.S.obj(*.text))  
+  KEEP(*startup.S.obj(*.vectors))
+  KEEP(*vectors.S.obj(*.text))
+  KEEP(*whetstone.c.obj(*.text))
+  KEEP(*(.text.entry))
+  *(.text*)
+  *(.gnu.warning)
+  *(.stub)
+  *(.gnu.linkonce.t*)
+  *(.glue_7t)
+  *(.glue_7)
+  *(.jcr)
+  KEEP (*(.init))
+  KEEP (*(.fini))
+  . = ALIGN (0x4) ;
+  PROVIDE(__ctbp = .);
+  *(.call_table_data)
+  *(.call_table_text)
+  . = ALIGN(0x10) ;
+  __etext = . ;
+ } > REGION_TEXT
+ .eh_frame_hdr : {
+  *(.eh_frame_hdr)
+ } > REGION_TEXT
+ .eh_frame : ONLY_IF_RO {
+  KEEP (*(.eh_frame))
+ } > REGION_TEXT
+ .rodata : {
+  . = ALIGN(0x4) ;
+  __srodata = .;
+  *(.rdata)
+  *(.rdata*)
+  *(.rdata1)
+  *(.rdata.*)
+  *(.rodata*)
+  *(.srodata*)
+  . = ALIGN(0x4) ;
+  __init_array_start = .;
+  __ctors_start__ = .;
+  KEEP (*(SORT(.init_array.*)))
+  KEEP (*(.init_array))
+  __init_array_end = .;
+  __ctors_end__ = .;
+
+  __fini_array_start = .;
+  __dtors_start__ = .;
+  KEEP (*(SORT(.fini_array.*)))
+  KEEP (*(.fini_array))
+  __fini_array_end = .;
+  __dtors_end__ = .;
+  . = ALIGN(0x4) ;
+
+  __ctor_start__ = .;
+  KEEP (*(SORT(.ctors.*)))
+  KEEP (*(.ctors))
+  __ctor_end__ = .;
+  KEEP (*(SORT(.dtors.*)))
+  KEEP (*(.dtors))
+  __dtor_end__ = .;
+  . = ALIGN(0x4) ;
+  __erodata = .;
+  __rodata_end__ = .;
+ } > REGION_RODATA
+ .data : {
+  . = ALIGN(0x4) ;
+  __sdata = . ;
+  __data_start__ = . ;
+  data_start = . ;
+  *(.got.plt)
+  *(.got)
+  *(.gnu.linkonce.r*)
+  *(.data*)
+  *(.gnu.linkonce.d*)
+  *(.gcc_except_table*)
+  __start_init_call = .;
+  *(.initcall.init)
+  __stop_init_call = .;
+  __start_cmd = .;
+  *(.bootloaddata.cmd)
+  . = ALIGN(0x4) ;
+  __stop_cmd = .;
+  __global_pointer$ = .;
+  *(.sdata)
+  *(.sdata.*)
+  *(.sdata2.*)
+  *(.gnu.linkonce.s.*)
+  *(__libc_atexit)
+  *(__libc_subinit)
+  *(__libc_subfreeres)
+  *(.note.ABI-tag)
+  . = ALIGN(0x4) ;
+  __edata = .;
+  __data_end__ = .;
+ } > REGION_DATA AT > REGION_RODATA
+ ._ram_code : {
+  . = ALIGN(0x4) ;
+  __ram_code_start__ = .;
+  *(.ram.code*)
+  . = ALIGN(0x4) ;
+  __ram_code_end__ = .;
+ } > REGION_DATA AT > REGION_RODATA
+ .bss : ALIGN(0x20) {
+  __sbss = . ;
+  __bss_start__ = . ;
+  KEEP(*linpack.o(*.bss*))
+  *(.dynsbss)
+  *(.sbss)
+  *(.sbss.*)
+  *(.scommon)
+  *(.dynbss)
+  *(.bss*)
+  *(COMMON)
+  . = ALIGN(0x4) ;
+  __ebss = . ;
+  __bss_end__ = .;
+  __end = . ;
+  end = . ;
+ } > REGION_BSS AT > REGION_BSS
+ ._user_heap (NOLOAD): {
+  . = ALIGN(0x4) ;
+  *(.stack*)
+  . = ALIGN(0x4) ;
+  __heap_start = .;
+  . += __min_heap_size;
+  . = ALIGN(0x4) ;
+ } > REGION_BSS AT > REGION_BSS
+}
@@ -0,0 +1,191 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*
+ * attention: don't modify this file as a suggest
+ * you should copy from chip_riscv_dummy/include/asm/riscv_csr.h and keep it newer
+ * please contact xuantie-rtos os team if have question 
+ */
+
+#ifndef __RISCV_CSR_H__
+#define __RISCV_CSR_H__
+
+#if __riscv_xlen == 64
+	#define store_x       sd
+	#define load_x        ld
+	#define portWORD_SIZE 8
+#elif __riscv_xlen == 32
+	#define store_x       sw
+	#define load_x        lw
+	#define portWORD_SIZE 4
+#else
+	#error Assembler did not define __riscv_xlen
+#endif
+
+#if __riscv_flen == 64
+	#define fstore_x      fsd
+	#define fload_x       fld
+	#define portFPU_REG_SIZE 8
+#elif __riscv_flen == 32
+	#define fstore_x      fsw
+	#define fload_x       flw
+	#define portFPU_REG_SIZE 4
+#endif
+
+#if CONFIG_RISCV_SMODE
+#define MODE_PREFIX(suffix) s##suffix
+#else
+#define MODE_PREFIX(suffix) m##suffix
+#endif
+
+/* Status register flags */
+#define SR_SIE      0x00000002UL        /*  Supervisor Interrupt Enable */
+#define SR_MIE      0x00000008UL        /*  Machine Interrupt Enable */
+#define SR_SPIE     0x00000020UL        /*  Previous Supervisor IE */
+#define SR_MPIE     0x00000080UL        /*  Previous Machine IE */
+#define SR_SPP_U    0x00000000UL        /*  Previously User mode */
+#define SR_SPP_S    0x00000100UL        /*  Previously Supervisor mode */
+#define SR_MPP_U    0x00000000UL        /*  Previously User mode */
+#define SR_MPP_S    0x00000800UL        /*  Previously Supervisor mode */
+#define SR_MPP_M    0x00001800UL        /*  Previously Machine mode */
+#define SR_SUM      0x00040000UL        /*  Supervisor User Memory Access */
+
+#define SR_FS           0x00006000UL    /*  Floating-point Status */
+#define SR_FS_OFF       0x00000000UL
+#define SR_FS_INITIAL   0x00002000UL
+#define SR_FS_CLEAN     0x00004000UL
+#define SR_FS_DIRTY     0x00006000UL
+
+#if CONFIG_CPU_XUANTIE_C906 || CONFIG_CPU_XUANTIE_C906FD || CONFIG_CPU_XUANTIE_C906FDV \
+	|| CONFIG_CPU_XUANTIE_R920 \
+	|| CONFIG_CPU_XUANTIE_C920
+#define SR_VS          0x01800000
+#define SR_VS_OFF      0x00000000
+#define SR_VS_INITIAL  0x00800000
+#define SR_VS_CLEAN    0x01000000
+#define SR_VS_DIRTY    0x01800000
+#else
+#define SR_VS          0x00000600
+#define SR_VS_OFF      0x00000000
+#define SR_VS_INITIAL  0x00000200
+#define SR_VS_CLEAN    0x00000400
+#define SR_VS_DIRTY    0x00000600
+#endif
+
+#if __riscv_matrix || __riscv_xtheadmatrix
+#define SR_MS          0x06000000
+#define SR_MS_OFF      0x00000000
+#define SR_MS_INITIAL  0x02000000
+#define SR_MS_CLEAN    0x04000000
+#define SR_MS_DIRTY    0x06000000
+#endif
+
+/* Interrupt-enable Registers */
+#define IE_MTIE         0x00000080UL
+#define IE_MEIE         0x00000800UL
+
+/*  ===== Trap/Exception Causes ===== */
+#define CAUSE_MISALIGNED_FETCH          0x0
+#define CAUSE_FETCH_ACCESS              0x1
+#define CAUSE_ILLEGAL_INSTRUCTION       0x2
+#define CAUSE_BREAKPOINT                0x3
+#define CAUSE_MISALIGNED_LOAD           0x4
+#define CAUSE_LOAD_ACCESS               0x5
+#define CAUSE_MISALIGNED_STORE          0x6
+#define CAUSE_STORE_ACCESS              0x7
+#define CAUSE_USER_ECALL                0x8
+#define CAUSE_SUPERVISOR_ECALL          0x9
+#define CAUSE_VIRTUAL_SUPERVISOR_ECALL  0xa
+#define CAUSE_MACHINE_ECALL             0xb
+#define CAUSE_FETCH_PAGE_FAULT          0xc
+#define CAUSE_LOAD_PAGE_FAULT           0xd
+#define CAUSE_STORE_PAGE_FAULT          0xf
+
+#define PRV_U                           0
+#define PRV_S                           1
+#define PRV_M                           3
+
+
+#define MSTATUS_SIE                     0x00000002
+#define MSTATUS_MIE                     0x00000008
+#define MSTATUS_SPIE_SHIFT              5
+#define MSTATUS_SPIE                    (1 << MSTATUS_SPIE_SHIFT)
+#define MSTATUS_UBE                     0x00000040
+#define MSTATUS_MPIE                    0x00000080
+#define MSTATUS_SPP_SHIFT               8
+#define MSTATUS_SPP                     (1 << MSTATUS_SPP_SHIFT)
+#define MSTATUS_MPP_SHIFT               11
+#define MSTATUS_MPP                     (3 << MSTATUS_MPP_SHIFT)
+
+#if CONFIG_CPU_XUANTIE_C906 || CONFIG_CPU_XUANTIE_C906FD || CONFIG_CPU_XUANTIE_C906FDV \
+	|| CONFIG_CPU_XUANTIE_R910 || CONFIG_CPU_XUANTIE_R920 \
+	|| CONFIG_CPU_XUANTIE_C910 || CONFIG_CPU_XUANTIE_C920
+#define MSTATUS_VS_SHIFT                23
+#else
+#define MSTATUS_VS_SHIFT                9
+#endif
+#define MSTATUS_FS_SHIFT                13
+#define MSTATUS_MS_SHIFT                25
+
+#define INSERT_FIELD(val, which, fieldval)	(((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
+
+#if CONFIG_CPU_XUANTIE_C906 || CONFIG_CPU_XUANTIE_C906FD || CONFIG_CPU_XUANTIE_C906FDV \
+	|| CONFIG_CPU_XUANTIE_C908 || CONFIG_CPU_XUANTIE_C908V || CONFIG_CPU_XUANTIE_C908I \
+	|| CONFIG_CPU_XUANTIE_C908_V2 || CONFIG_CPU_XUANTIE_C908V_V2 || CONFIG_CPU_XUANTIE_C908I_V2 \
+	|| CONFIG_CPU_XUANTIE_C908_CP_V2 || CONFIG_CPU_XUANTIE_C908V_CP_V2 || CONFIG_CPU_XUANTIE_C908I_CP_V2 \
+	|| CONFIG_CPU_XUANTIE_C908_CP_XT_V2 || CONFIG_CPU_XUANTIE_C908V_CP_XT_V2 || CONFIG_CPU_XUANTIE_C908I_CP_XT_V2 \
+	|| CONFIG_CPU_XUANTIE_C908VK_CP_V2 || CONFIG_CPU_XUANTIE_C908VK_CP_XT_V2 \
+	|| CONFIG_CPU_XUANTIE_R910 || CONFIG_CPU_XUANTIE_R920 \
+	|| CONFIG_CPU_XUANTIE_C910 || CONFIG_CPU_XUANTIE_C920 \
+	|| CONFIG_CPU_XUANTIE_XT_C930_CP || CONFIG_CPU_XUANTIE_XT_C930V_CP
+#define ATTR_SO                 (1ull << 4)
+#define ATTR_CA                 (1ull << 3)
+#define ATTR_BU                 (1ull << 2)
+#define ATTR_SH                 (1ull << 1)
+#define ATTR_SE                 (1ull << 0)
+
+#define UPPER_ATTRS_SHIFT       (59)
+#define UPPER_ATTRS(x)          (((x) & 0x1f) << UPPER_ATTRS_SHIFT)
+#else
+#if __riscv_xlen == 32
+#define PTE_PBMT_SHIFT          (30)
+#else
+#define PTE_PBMT_SHIFT          (61)
+#endif /* end __riscv_xlen */
+#define SVPBMT_PMA              ((unsigned long)0x0 << PTE_PBMT_SHIFT)
+#define SVPBMT_NC               ((unsigned long)0x1 << PTE_PBMT_SHIFT)
+#define SVPBMT_IO               ((unsigned long)0x2 << PTE_PBMT_SHIFT)
+#define SVPBMT_MASK             ((unsigned long)0x3 << PTE_PBMT_SHIFT)
+
+#endif
+
+#define DIRTY_FLAG              (1 << 6)
+#define ACCESS_FLAG             (1 << 5)
+#define GLOBAL_FLAG             (1 << 4)
+#define AP_UNPRIV               (1 << 3)
+#define AP_X                    (1 << 2)
+#define AP_W                    (1 << 1)
+#define AP_R                    (1 << 0)
+
+#define LOWER_ATTRS_SHIFT               1
+#define LOWER_ATTRS(x)                  (((x) & 0x1ff) << LOWER_ATTRS_SHIFT)
+
+
+
+#endif /* __RISCV_CSR_H__ */
+
@@ -0,0 +1,104 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     drv/dev_tag.h
+ * @brief    Header File for DEV TAG Driver
+ * @version  V1.0
+ * @date     31. March 2020
+ * @model    common
+ ******************************************************************************/
+
+#ifndef _DRV_DEV_TAG_H_
+#define _DRV_DEV_TAG_H_
+
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <stdbool.h>
+#include <drv/list.h>
+#include <csi_config.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    DEV_BLANK_TAG = 0U,
+    DEV_DW_UART_TAG,
+    DEV_DW_AHB_DMA_TAG,
+    DEV_DW_AXI_DMA_TAG,
+    DEV_DW_GPIO_TAG,
+    DEV_DW_IIC_TAG,
+    DEV_DW_QSPI_TAG,
+    DEV_DW_SDMMC_TAG,
+    DEV_DW_SDHCI_TAG,
+    DEV_DW_SPI_TAG,
+    DEV_DW_TIMER_TAG,
+    DEV_DW_WDT_TAG,
+    DEV_WJ_ADC_TAG,
+    DEV_WJ_AES_TAG,
+    DEV_WJ_CODEC_TAG,
+    DEV_WJ_CRC_TAG,
+    DEV_WJ_DMA_TAG,
+    DEV_WJ_EFLASH_TAG,
+    DEV_WJ_EFUSE_TAG,
+    DEV_WJ_ETB_TAG,
+    DEV_WJ_FFT_TAG,
+    DEV_WJ_I2S_TAG,
+    DEV_WJ_MBOX_TAG,
+    DEV_WJ_PADREG_TAG,
+    DEV_WJ_PDM_TAG,
+    DEV_WJ_PINMUX_TAG,
+    DEV_WJ_PMU_TAG,
+    DEV_WJ_PWM_TAG,
+    DEV_WJ_RNG_TAG,
+    DEV_WJ_ROM_TAG,
+    DEV_WJ_RSA_TAG,
+    DEV_WJ_RTC_TAG,
+    DEV_WJ_SASC_TAG,
+    DEV_WJ_SHA_TAG,
+    DEV_WJ_SPDIF_TAG,
+    DEV_WJ_SPIDF_TAG,
+    DEV_WJ_TDM_TAG,
+    DEV_WJ_TIPC_TAG,
+    DEV_WJ_USB_TAG,
+    DEV_WJ_USI_TAG,
+    DEV_WJ_VAD_TAG,
+    DEV_CD_QSPI_TAG,
+    DEV_DCD_ISO7816_TAG,
+    DEV_OSR_RNG_TAG,
+    DEV_QX_RTC_TAG,
+    DEV_RCHBAND_CODEC_TAG,
+    DEV_CMSDK_UART_TAG,
+    DEV_RAMBUS_150B_PKA_TAG,
+    DEV_RAMBUS_150B_TRNG_TAG,
+    DEV_RAMBUS_120SI_TAG,
+    DEV_RAMBUS_120SII_TAG,
+    DEV_RAMBUS_120SIII_TAG,
+    DEV_WJ_AVFS_TAG,
+    DEV_WJ_BMU_TAG,
+    DEV_XT_IOPMP_TAG,
+} csi_dev_tag_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRV_TAG_H_ */
+
@@ -0,0 +1,167 @@
+/*
+ *	Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ */
+
+/*******************************************************
+ * @file 	dw_timer_ll.h
+ * @brief	header file for timer ll driver
+ * @version V1.0
+ * @date	9. April 2020
+ * ******************************************************/
+
+#ifndef _DW_TIMER_LL_H_
+#define _DW_TIMER_LL_H_
+
+#include <stdio.h>
+#include <soc.h>
+#include <csi_core.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*! Timer1 Control Reg, 	offset: 0x08 */
+#define DW_TIMER_CTL_ENABLE_SEL_Pos                                    (0U)
+#define DW_TIMER_CTL_ENABLE_SEL_Msk                                    (0x1U << DW_TIMER_CTL_ENABLE_SEL_Pos)
+#define DW_TIMER_CTL_ENABLE_SEL_EN                                     DW_TIMER_CTL_ENABLE_SEL_Msk
+
+#define DW_TIMER_CTL_MODE_SEL_Pos                                      (1U)
+#define DW_TIMER_CTL_MODE_SEL_Msk                                      (0x1U << DW_TIMER_CTL_MODE_SEL_Pos)
+#define DW_TIMER_CTL_MODE_SEL_EN                                       DW_TIMER_CTL_MODE_SEL_Msk
+
+#define DW_TIMER_CTL_INT_MASK_Pos                                      (2U)
+#define DW_TIMER_CTL_INT_MASK_Msk                                      (0x1U << DW_TIMER_CTL_INT_MASK_Pos)
+#define DW_TIMER_CTL_INT_MAKS_EN                                       DW_TIMER_CTL_INT_MASK_Msk
+
+#define DW_TIMER_CTL_HARD_TRIG_Pos                                     (4U)
+#define DW_TIMER_CTL_HARD_TRIG_Msk                                     (0x1U << DW_TIMER_CTL_HARD_TRIG_Pos)
+#define DW_TIMER_CTL_HARD_TRIG_EN                                      DW_TIMER_CTL_HARD_TRIG_Msk
+
+/*! Timer EOI,            offset: 0x0c */
+#define DW_TIMER_EOI_REG_Pos                                           (0U)
+#define DW_TIMER_EOI_REG_Msk                                           (0x1U << DW_TIMER_EOI_REG_Pos)
+#define DW_TIMER_EOI_REG_EN                                            DW_TIMER_EOI_REG_Msk
+
+/*! Timer Int Status,     offset: 0x10 */
+#define DW_TIMER_INT_STATUS_Pos                                        (0U)
+#define DW_TIMER_INT_STATUS_Msk                                        (0x1U << DW_TIMER_INT_STATUS_Pos)
+#define DW_TIMER_INT_STATUS_EN                                         DW_TIMER_INT_STATUS_Msk
+
+/*! Timers Int Status,    offset: 0xa0 */
+#define DW_TIMERS_INT_STATUS_Pos                                       (0U)
+#define DW_TIMERS_INT_STATUS_Msk                                       (0x2U << DW_TIMERS_INT_STATUS_Pos)
+#define DW_TIMERS_INT_STATUS_EN                                        DW_TIMERS_INT_STATUS_Msk
+
+/*! Timers EOI,           offset: 0xa4 */
+#define DW_TIMERS_EOI_REG_Pos                                          (0U)
+#define DW_TIMERS_EOI_REG_Msk                                          (0x2U << DW_TIMERS_EOI_REG_Pos)
+#define DW_TIMERS_EOI_REG_EN                                           DW_TIMERS_EOI_REG_Msk
+
+/*! Timers Raw Int Status,offset: 0xa8 */
+#define DW_TIMERS_RAW_INT_STA_Pos                                      (0U)
+#define DW_TIMERS_RAW_INT_STA_Msk                                      (0x2U << DW_TIMERS_RAW_INT_STA_Pos)
+#define DW_TIMERS_RAW_INT_STA_EN                                       DW_TIMERS_RAW_INT_STA_Msk
+
+typedef struct {
+    __IOM uint32_t TLC;                                                /* Offset: 0x000 (R/W) TimerLoadCount */
+    __IM  uint32_t TCV;                                                /* Offset: 0x004 (R/ ) TimerCurrentValue */
+    __IOM uint32_t TCR;                                                /* Offset: 0x008 (R/W) TimerControlReg */
+    __IM  uint32_t TEOI;                                               /* Offset: 0x00c (R/ ) TimerEOI */
+    __IM  uint32_t TIS;                                                /* Offset: 0x010 (R/ ) TimerIntStatus */
+} dw_timer_regs_t;
+
+typedef struct {
+    dw_timer_regs_t timer[8];
+    __IM  uint32_t TSIS;                                               /* Offset: 0x0a0 (R/ ) TimersIntStatus */
+    __IM  uint32_t TSEOI;                                              /* Offset: 0x0a4 (R/ ) TimersEOI */
+    __IM  uint32_t TSRIS;                                              /* Offset: 0x0a8 (R/ ) TimersRawIntStatus */
+} dw_timer_general_regs_t;
+
+static inline uint32_t dw_timer_read_load(dw_timer_regs_t *timer_base)
+{
+    return (timer_base->TLC);
+}
+static inline void dw_timer_write_load(dw_timer_regs_t *timer_base, uint32_t value)
+{
+    timer_base->TLC = value;
+}
+static inline uint32_t dw_timer_get_current(dw_timer_regs_t *timer_base)
+{
+    return (timer_base->TCV);
+}
+static inline void dw_timer_set_enable(dw_timer_regs_t *timer_base)
+{
+    timer_base->TCR |= (DW_TIMER_CTL_ENABLE_SEL_EN);
+}
+static inline void dw_timer_set_disable(dw_timer_regs_t *timer_base)
+{
+    timer_base->TCR &= ~(DW_TIMER_CTL_ENABLE_SEL_EN);
+}
+static inline uint32_t dw_timer_get_enable(dw_timer_regs_t *timer_base)
+{
+    return (((timer_base->TCR) & DW_TIMER_CTL_ENABLE_SEL_EN) ? (uint32_t)1 : (uint32_t)0);
+}
+static inline void dw_timer_set_mode_free(dw_timer_regs_t *timer_base)
+{
+    timer_base->TCR &= ~(DW_TIMER_CTL_MODE_SEL_EN);
+}
+static inline void dw_timer_set_mode_load(dw_timer_regs_t *timer_base)
+{
+    timer_base->TCR |= (DW_TIMER_CTL_MODE_SEL_EN);
+}
+static inline uint32_t dw_timer_get_model(dw_timer_regs_t *timer_base)
+{
+    return (((timer_base->TCR) & DW_TIMER_CTL_MODE_SEL_EN) ? (uint32_t)1 : (uint32_t)0);
+}
+static inline void dw_timer_set_mask(dw_timer_regs_t *timer_base)
+{
+    timer_base->TCR |= (DW_TIMER_CTL_INT_MAKS_EN);
+}
+static inline void dw_timer_set_unmask(dw_timer_regs_t *timer_base)
+{
+    timer_base->TCR &= ~(DW_TIMER_CTL_INT_MAKS_EN);
+}
+static inline uint32_t dw_timer_get_mask(dw_timer_regs_t *timer_base)
+{
+    return (((timer_base->TCR) & DW_TIMER_CTL_INT_MAKS_EN) ? (uint32_t)1 : (uint32_t)0);
+}
+static inline void dw_timer_set_hardtrigger_en(dw_timer_regs_t *timer_base)
+{
+    timer_base->TCR |= (DW_TIMER_CTL_HARD_TRIG_EN);
+}
+static inline void dw_timer_set_hardtrigger_dis(dw_timer_regs_t *timer_base)
+{
+    timer_base->TCR &= ~(DW_TIMER_CTL_HARD_TRIG_EN);
+}
+static inline uint32_t dw_timer_get_hardtrigger(dw_timer_regs_t *timer_base)
+{
+    return (((timer_base->TCR) & DW_TIMER_CTL_HARD_TRIG_EN) ? (uint32_t)1 : (uint32_t)0);
+}
+static inline uint32_t dw_timer_clear_irq(dw_timer_regs_t *timer_base)
+{
+    return (((timer_base->TEOI) & DW_TIMER_EOI_REG_EN) ? (uint32_t)1 : (uint32_t)0);
+}
+static inline uint32_t dw_timer_get_int_status(dw_timer_regs_t *timer_base)
+{
+    return (((timer_base->TIS) & DW_TIMER_INT_STATUS_EN) ? (uint32_t)1 : (uint32_t)0);
+}
+static inline uint32_t dw_timer_general_active_after_mask(dw_timer_general_regs_t *timer_base)
+{
+    return ((timer_base->TSIS) & DW_TIMERS_INT_STATUS_EN);
+}
+static inline uint32_t dw_timer_general_clear_irq(dw_timer_general_regs_t *timer_base)
+{
+    return ((timer_base->TSEOI) & DW_TIMERS_EOI_REG_EN);
+}
+static inline uint32_t dw_timer_general_active_prior_mask(dw_timer_general_regs_t *timer_base)
+{
+    return ((timer_base->TSRIS) & DW_TIMERS_RAW_INT_STA_EN);
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DW_TIMER_LL_H_ */
@@ -0,0 +1,117 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     sys_clk.h
+ * @brief    header file for setting system frequency.
+ * @version  V1.0
+ * @date     9. April 2020
+ ******************************************************************************/
+#ifndef _SYS_CLK_H_
+#define _SYS_CLK_H_
+
+#include <stdint.h>
+#include <soc.h>
+#include <drv/clk.h>
+#include <drv/porting.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define PMU_REG_BASE            (wj_pmu_reg_t *)WJ_PMU_BASE
+
+typedef enum {
+    IHS_CLK       = 0U,        /* internal high speed clock */
+    EHS_CLK,                   /* external high speed clock */
+    ILS_CLK,                   /* internal low  speed clock */
+    ELS_CLK,                   /* external low  speed clock */
+    PLL_CLK                    /* PLL clock */
+} clk_src_t;
+
+typedef enum {
+    CPU_24MHZ     = 24000000U
+} sys_freq_t;
+
+
+/* pllclkout : ( pllclkin / 2)*( FN + Frac/4096 ) */
+typedef struct {
+
+    uint32_t pll_is_used;          /* pll is used */
+
+    uint32_t pll_source;           /* select pll input source clock */
+
+    uint32_t pll_src_clk_divider;  /* ratio between pll_srcclk clock and pll_clkin clock */
+
+    uint32_t fn;                   /* integer value of frequency division */
+
+    uint32_t frac;                 /* decimal value of frequency division */
+
+} pll_config_t;
+
+
+typedef struct {
+    uint32_t system_clk;            /* system clock */
+
+    pll_config_t pll_config;        /* pll config struct */
+
+    uint32_t sys_clk_source;        /* select sysclk source clock */
+
+    uint32_t rtc_clk_source;        /* select rtcclk source clock */
+
+    uint32_t mclk_divider;          /* ratio between fs_mclk clock and mclk clock */
+
+    uint32_t apb0_clk_divider;      /* ratio between mclk clock and apb0 clock */
+
+    uint32_t apb1_clk_divider;      /* ratio between mclk clock and apb1 clock */
+
+} system_clk_config_t;
+
+typedef enum {
+    CLK_DIV1 = 0U,
+} apb_div_t;
+
+typedef enum {
+    PLL_FN_18 = 0U,
+} pll_fn_t;
+
+typedef enum {
+    UART0_CLK,
+} clk_module_t;
+
+
+/**
+  \brief       Set the system clock according to the parameter
+  \param[in]   config    system clock config.
+  \return      error code
+*/
+csi_error_t soc_sysclk_config(system_clk_config_t *config);
+
+/**
+  \brief       Set iic reset
+  \param[in]   idx    iic idx.
+  \return      Null
+*/
+void soc_reset_iic(uint32_t idx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SYS_CLK_H_ */
+
@@ -0,0 +1,119 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <csi_config.h>
+#include <soc.h>
+#include <csi_core.h>
+#include <drv/irq.h>
+#include <drv/dma.h>
+#include <drv/tick.h>
+#include "riscv_csr.h"
+
+#if (defined(CONFIG_KERNEL_RHINO) || defined(CONFIG_KERNEL_FREERTOS) || defined(CONFIG_KERNEL_RTTHREAD)) && defined(CONFIG_KERNEL_NONE)
+#error "Please check the current system is baremetal or not!!!"
+#endif
+
+extern void section_data_copy(void);
+extern void section_ram_code_copy(void);
+extern void section_bss_clear(void);
+
+static void cache_init(void)
+{
+    csi_dcache_enable();
+    csi_icache_enable();
+}
+
+static void section_init(void)
+{
+#if CONFIG_XIP
+    section_data_copy();
+    section_ram_code_copy();
+    csi_dcache_clean();
+    csi_icache_invalid();
+#endif
+    section_bss_clear();
+}
+
+static void clic_init(void)
+{
+    int i;
+
+    /* get interrupt level from info */
+    CLIC->CLICCFG = (((CLIC->CLICINFO & CLIC_INFO_CLICINTCTLBITS_Msk) >> CLIC_INFO_CLICINTCTLBITS_Pos) << CLIC_CLICCFG_NLBIT_Pos);
+
+    for (i = 0; i < 64; i++) {
+        CLIC->CLICINT[i].IP = 0;
+#if !CONFIG_SUPPORT_NON_VECTOR_IRQ
+        CLIC->CLICINT[i].ATTR = 1; /* use vector interrupt */
+#else
+        CLIC->CLICINT[i].ATTR = 0; /* use non-vector interrupt */
+#endif
+        csi_vic_set_prio(i, 3);
+    }
+    /* tspend use vector&positive interrupt */
+    CLIC->CLICINT[Machine_Software_IRQn].ATTR = 0x3;
+    csi_vic_set_prio(Machine_Software_IRQn, 1);
+    csi_irq_enable(Machine_Software_IRQn);
+}
+
+static void interrupt_init(void)
+{
+    clic_init();
+#ifdef CONFIG_KERNEL_NONE
+    __enable_excp_irq();
+#endif
+}
+
+/**
+  * @brief  initialize the system
+  *         Initialize the psr and vbr.
+  * @param  None
+  * @return None
+  */
+void SystemInit(void)
+{
+    extern int cpu_features_init(void);
+    cpu_features_init();
+
+    /* enable theadisaee & MM */
+    uint32_t status = __get_MXSTATUS();
+    status |= (1 << 22 | 1 << 15);
+    __set_MXSTATUS(status);
+
+#if __riscv_flen
+    /* enable float ISA */
+    status = __get_MSTATUS();
+    status |= (1 << MSTATUS_FS_SHIFT);
+    __set_MSTATUS(status);
+#endif
+     /* enable mexstatus SPUSHEN and disable SPSWAPEN */
+#if CONFIG_CPU_XUANTIE_E906 || CONFIG_CPU_XUANTIE_E906F || CONFIG_CPU_XUANTIE_E906FD || CONFIG_CPU_XUANTIE_E906P || CONFIG_CPU_XUANTIE_E906FP || CONFIG_CPU_XUANTIE_E906FDP \
+    || CONFIG_CPU_XUANTIE_E907 || CONFIG_CPU_XUANTIE_E907F || CONFIG_CPU_XUANTIE_E907FD || CONFIG_CPU_XUANTIE_E907P || CONFIG_CPU_XUANTIE_E907FP || CONFIG_CPU_XUANTIE_E907FDP
+    status = __get_MEXSTATUS();
+    status |= (0x1 << 16);
+    status &= ~(0x2 << 16);
+    __set_MEXSTATUS(status);
+#endif
+
+    cache_init();
+    section_init();
+    interrupt_init();
+    soc_set_sys_freq(20000000);
+    csi_tick_init();
+}
+
@@ -0,0 +1,64 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <csi_core.h>
+#if defined(AOS_COMP_DEBUG) && (AOS_COMP_DEBUG > 0)
+#include <debug/dbg.h>
+#else
+#define printk printf
+#endif
+
+void (*trap_c_callback)(void);
+
+void trap_c(uintptr_t *regs)
+{
+    int i;
+    unsigned long vec = 0;
+
+    vec = __get_MCAUSE();
+
+    printk("CPU Exception(mcause);: NO.0x%lx", vec);
+    printk("\n");
+
+    for (i = 0; i < 31; i++) {
+        printk("x%d: %p\t", i + 1, (void *)regs[i]);
+
+        if ((i % 4) == 3) {
+            printk("\n");
+        }
+    }
+
+    printk("\n");
+    printk("mepc   : %p\n", (void *)regs[31]);
+    printk("mstatus: %p\n", (void *)regs[32]);
+
+    if (trap_c_callback) {
+        trap_c_callback();
+    }
+
+    while (1);
+}
+
+__attribute__((weak)) void exceptionHandler(void *context)
+{
+    trap_c((uintptr_t *)context);
+}
+
@@ -0,0 +1,164 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     dw_uart_ll.c
+ * @brief    dw uart ll driver
+ * @version  V1.0
+ * @date     18. December 2024
+ ******************************************************************************/
+#include <dw_uart_ll.h>
+
+int32_t dw_uart_wait_idle(dw_uart_regs_t *uart_base)
+{
+    uint32_t timecount = 0U;
+    int32_t ret = 0;
+
+    while ((uart_base->USR & DW_UART_USR_BUSY_SET) && (timecount < UART_BUSY_TIMEOUT)) {
+        timecount++;
+    }
+
+    if (timecount >= UART_BUSY_TIMEOUT) {
+        ret = -1;
+    }
+
+    return ret;
+}
+
+int32_t  dw_uart_wait_timeout(dw_uart_regs_t *uart_base)
+{
+    uint32_t timecount = 0U;
+    int32_t ret = 0;
+
+    while ((uart_base->LSR & 0x81U) || (uart_base->USR & 0x1U)) {
+        uart_base->LSR;
+        uart_base->RBR;
+        timecount++;
+
+        if (timecount >= UART_BUSY_TIMEOUT) {
+            ret = -1;
+            break;
+        }
+    }
+
+    if (ret == 0) {
+        ret = dw_uart_wait_idle(uart_base);
+    }
+
+    return ret;
+}
+
+int32_t dw_uart_config_baudrate(dw_uart_regs_t *uart_base, uint32_t baud, uint32_t uart_freq)
+{
+    uint32_t divisor;
+    int32_t ret = 0;
+    ret = dw_uart_wait_timeout(uart_base);
+
+    if (ret == 0) {
+        if ((uart_freq / 16) % baud >= (baud / 2))
+            divisor = (uart_freq / 16) / baud + 1;
+        else
+            divisor = (uart_freq / 16) / baud;
+
+        uart_base->LCR |= DW_UART_LCR_DLAB_EN;
+
+        /* DLL and DLH is lower 8-bits and higher 8-bits of divisor.*/
+        uart_base->DLH = (divisor >> 8U) & 0xFFU;
+        uart_base->DLL = divisor & 0xFFU;
+        /*
+         * The DLAB must be cleared after the baudrate is setted
+         * to access other registers.
+         */
+        uart_base->LCR &= (~DW_UART_LCR_DLAB_EN);
+    }
+
+    return ret;
+}
+
+int32_t  dw_uart_config_stop_bits(dw_uart_regs_t *uart_base, uint32_t stop_bits)
+{
+    int32_t ret;
+    ret = dw_uart_wait_timeout(uart_base);
+
+    if (ret == 0) {
+
+        //when data length is 5 bits, use dw_uart_config_stop_bits_2 will be 1.5 stop bits
+        if (stop_bits == 1U) {
+            dw_uart_config_stop_bits_1(uart_base);
+        } else if (stop_bits == 2U) {
+            dw_uart_config_stop_bits_2(uart_base);
+        }
+    }
+
+    //FIXME: no console output sometimes
+    mdelay(1);
+
+    return ret;
+}
+
+int32_t dw_uart_config_parity_none(dw_uart_regs_t *uart_base)
+{
+    int32_t ret;
+    ret = dw_uart_wait_timeout(uart_base);
+
+    if (ret == 0) {
+        uart_base->LCR &= (~DW_UART_LCR_PEN_EN);
+    }
+
+    return ret;
+}
+
+int32_t dw_uart_config_parity_odd(dw_uart_regs_t *uart_base)
+{
+    int32_t ret;
+
+    ret = dw_uart_wait_timeout(uart_base);
+
+    if (ret == 0) {
+        uart_base->LCR |= DW_UART_LCR_PEN_EN;
+        uart_base->LCR &= ~(DW_UART_LCR_EPS_EN);
+    }
+
+    return ret;
+}
+
+int32_t dw_uart_config_parity_even(dw_uart_regs_t *uart_base)
+{
+    int32_t ret;
+
+    ret = dw_uart_wait_timeout(uart_base);
+
+    if (ret == 0) {
+        uart_base->LCR |= DW_UART_LCR_PEN_EN;
+        uart_base->LCR |= DW_UART_LCR_EPS_EN;
+    }
+
+    return ret;
+}
+
+int32_t dw_uart_config_data_bits(dw_uart_regs_t *uart_base, uint32_t data_bits)
+{
+    int32_t ret;
+
+    ret = dw_uart_wait_timeout(uart_base);
+
+    uart_base->LCR &= 0xFCU;
+    uart_base->LCR |= (data_bits - 5U);
+
+    return ret;
+}
@@ -0,0 +1,87 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdio.h>
+#include <csi_config.h>
+#include <soc.h>
+#include <drv/uart.h>
+#include <drv/timer.h>
+#include <drv/dma.h>
+// #include <drv/iic.h>
+// #include <drv/rtc.h>
+// #include <drv/spi.h>
+// #include <drv/adc.h>
+#include <drv/gpio.h>
+#include <drv/irq.h>
+#include <drv/pin.h>
+
+const csi_perip_info_t g_soc_info[] = {
+    {DW_UART0_BASE,            DW_UART0_IRQn,            0,    DEV_DW_UART_TAG},
+    {DW_TIMER0_BASE,           TIM0_IRQn,                0,    DEV_DW_TIMER_TAG},
+    {DW_TIMER1_BASE,           TIM1_IRQn,                1,    DEV_DW_TIMER_TAG},
+    {DW_TIMER2_BASE,           TIM2_IRQn,                2,    DEV_DW_TIMER_TAG},
+    {DW_TIMER3_BASE,           TIM3_IRQn,                3,    DEV_DW_TIMER_TAG},
+#if CONFIG_SUPPORT_NMI_DEMO
+    {DW_TIMER4_BASE,           FAKE_IRQ_TIMER4,          4,    DEV_DW_TIMER_TAG},
+#endif
+#if defined(DW_DMA0_BASE)
+    {DW_DMA0_BASE,             DW_DMA0_IRQn,             0,    DEV_DW_AHB_DMA_TAG},
+    {DW_DMA0_BASE,             DW_DMA0_IRQn,             0,    DEV_DW_AXI_DMA_TAG},
+#endif
+#if defined(XT_IOPMP0_BASE)
+    {XT_IOPMP0_BASE,           IOPMP0_IRQn,              0,    DEV_XT_IOPMP_TAG},
+#endif
+    {0, 0, 0, 0}
+};
+
+const csi_dma_ch_info_t g_dma_chnum[] = {
+    {0, 8},
+    {DEV_IDX_INVALID, 0},
+};
+
+const uint16_t uart_tx_hs_num[1] = {};
+const uint16_t uart_rx_hs_num[1] = {};
+
+const csi_dma_ch_desc_t uart0_dma_ch_list[] = {
+    {0xff, 0xff}
+};
+
+const csi_dma_ch_spt_list_t dma_spt_list[] = {
+    {0xFFFFU,         0xFFU,         NULL},
+};
+
+const csi_pinmap_t gpio_pinmap[] = {
+    {0xFFFFFFFFU,   0xFFU, 0xFFU,       0xFFFFFFFFU   },
+};
+
+const csi_pinmap_t uart_pinmap[] = {
+    {0xFFFFFFFFU, 0xFFU, 0xFFU,      0xFFFFFFFFU  },
+};
+
+const csi_clkmap_t clk_map[] = {
+    {0xFFFFFFFFU, 0xFFFFU,          0xFFU}
+};
+
+const csi_dma_handshake_ctrl_t xs0_dma0_handshake_ctrl_list[] = {
+     {DEV_IDX_INVALID,    DEV_BLANK_TAG, 0xFFU, 0xFFU},
+};
+
+const csi_dma_handshake_list_t  g_handshake_list[] = {
+     {0, xs0_dma0_handshake_ctrl_list},
+     {DEV_IDX_INVALID, NULL},
+};
@@ -0,0 +1,147 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <csi_config.h>
+#include <stdbool.h>
+#include <csi_core.h>
+#include <soc.h>
+
+void soc_irq_enable(uint32_t irq_num)
+{
+    csi_vic_enable_irq((int32_t)irq_num);
+}
+
+void soc_irq_disable(uint32_t irq_num)
+{
+    csi_vic_disable_irq((int32_t)irq_num);
+}
+
+bool soc_irq_is_enabled(uint32_t irq_num)
+{
+    bool ret;
+
+    if (csi_vic_get_enabled_irq((int32_t)irq_num)) {
+        ret = true;
+    } else {
+        ret = false;
+    }
+
+    return ret;
+}
+
+void soc_irq_priority(uint32_t irq_num, uint32_t priority)
+{
+    csi_vic_set_prio((int32_t)irq_num, priority);
+}
+
+/**
+ * @brief get irq vector num
+ * @return irq no
+ */
+uint32_t soc_irq_get_irq_num(void)
+{
+    int hartid = csi_get_cpu_id();
+#if CONFIG_INTC_CLIC
+    (void) hartid;
+#if CONFIG_RISCV_SMODE
+    return (__get_SCAUSE() & 0x3FFU);
+#else
+    return (__get_MCAUSE() & 0x3FFU);
+#endif /* CONFIG_RISCV_SMODE */
+#endif /* CONFIG_INTC_CLIC */
+
+#if CONFIG_INTC_PLIC || CONFIG_INTC_CLIC_PLIC
+    uint32_t num;
+#if CONFIG_RISCV_SMODE
+    uint32_t irqn = __get_SCAUSE() & 0x3FFU;
+#else
+    uint32_t irqn = __get_MCAUSE() & 0x3FFU;
+#endif /* CONFIG_RISCV_SMODE */
+    if (irqn == Machine_External_IRQn || irqn == Supervisor_External_IRQn) {
+#if CONFIG_RISCV_SMODE
+        num = PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_SCLAIM, hartid);
+#else
+        num = PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_MCLAIM, hartid);
+#endif
+#if CONFIG_INTC_CLIC_PLIC
+        num += PLIC_IRQ_OFFSET;
+#endif
+    } else {
+        num = irqn;
+    }
+    return num;
+#endif /* CONFIG_INTC_PLIC || CONFIG_INTC_CLIC_PLIC */
+
+#if CONFIG_INTC_APLIC || CONFIG_INTC_CLIC_APLIC
+    uint32_t num;
+#if CONFIG_RISCV_SMODE
+    uint32_t irqn = __get_SCAUSE() & 0x3FFU;
+#else
+    uint32_t irqn = __get_MCAUSE() & 0x3FFU;
+#endif  /* CONFIG_RISCV_SMODE */
+    if (irqn == Machine_External_IRQn || irqn == Supervisor_External_IRQn) {
+        num = csi_aplic_read_claimi(APLIC_BASE, hartid);
+#if CONFIG_INTC_CLIC_APLIC
+        num += APLIC_IRQ_OFFSET;
+#endif
+    } else {
+        num = irqn;
+    }
+    return num;
+#endif /* CONFIG_INTC_APLIC || CONFIG_INTC_CLIC_APLIC */
+
+#if CONFIG_INTC_IMSIC_APLIC
+    return g_handing_msi_num[hartid];
+#endif
+}
+
+void soc_irq_end(uint32_t irq_num)
+{
+#if CONFIG_INTC_CLIC
+    // DO NOTHING
+#endif /* CONFIG_INTC_CLIC */
+
+    /**
+     * If aplic works in msi-mode
+     * and the current interrupt is level-triggered
+     * need retrigger
+     */
+#if CONFIG_INTC_IMSIC_APLIC
+    extern csi_dev_t *g_cpu_irq_table[CONFIG_NR_CPUS][CONFIG_IRQ_NUM];
+    csi_aplic_retrigger_level_irq(APLIC_BASE, g_cpu_irq_table[csi_get_cpu_id()][irq_num]->irq_num);
+#endif
+
+
+#if CONFIG_INTC_PLIC || CONFIG_INTC_CLIC_PLIC
+#if CONFIG_INTC_CLIC_PLIC
+    if (irq_num <= PLIC_IRQ_OFFSET) {
+        return;
+    }
+    irq_num -= PLIC_IRQ_OFFSET;
+#endif /* CONFIG_INTC_CLIC_PLIC */
+#if CONFIG_RISCV_SMODE
+    PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_SCLAIM, csi_get_cpu_id()) = irq_num;
+#else
+    PLIC_Hn_MSCLAIM_VAL(&PLIC->PLIC_H0_MCLAIM, csi_get_cpu_id()) = irq_num;
+#endif
+#endif /* CONFIG_INTC_PLIC || CONFIG_INTC_CLIC_PLIC */
+
+#if CONFIG_INTC_APLIC || CONFIG_INTC_CLIC_APLIC
+    // DO NOTHING
+#endif /* CONFIG_INTC_APLIC || CONFIG_INTC_CLIC_APLIC */
+}
@@ -0,0 +1,103 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     pre_main.c
+ * @brief    source file for the pre_main
+ * @version  V1.0
+ * @date     04. April 2024
+ ******************************************************************************/
+
+#include <csi_config.h>
+#include <soc.h>
+#include <board.h>
+
+extern unsigned long __heap_start;
+extern unsigned long __heap_end;
+unsigned long g_heap_start = (unsigned long)&__heap_start;
+unsigned long g_heap_end = (unsigned long)&__heap_end;
+
+extern int main(void);
+/*
+ *  The ranges of copy from/to are specified by following symbols
+ *    __erodata: LMA of start of the section to copy from. Usually end of rodata
+ *    __data_start__: VMA of start of the section to copy to
+ *    __data_end__: VMA of end of the section to copy to
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+void section_data_copy(void)
+{
+    extern unsigned long __erodata;
+    extern unsigned long __data_start__;
+    extern unsigned long __data_end__;
+
+    if (((unsigned long)&__erodata != (unsigned long)&__data_start__)) {
+        unsigned long src_addr = (unsigned long)&__erodata;
+        memcpy((void *)(&__data_start__), \
+               (void *)src_addr, \
+               (unsigned long)(&__data_end__) - (unsigned long)(&__data_start__));
+    }
+}
+
+void section_ram_code_copy(void)
+{
+    extern unsigned long __erodata;
+    extern unsigned long __data_start__;
+    extern unsigned long __data_end__;
+    extern unsigned long __ram_code_start__;
+    extern unsigned long __ram_code_end__;
+
+    if (((unsigned long)&__erodata != (unsigned long)&__data_start__)) {
+        unsigned long src_addr = (unsigned long)&__erodata;
+        src_addr += (unsigned long)(&__data_end__) - (unsigned long)(&__data_start__);
+        memcpy((void *)(&__ram_code_start__), \
+               (void *)src_addr, \
+               (unsigned long)(&__ram_code_end__) - (unsigned long)(&__ram_code_start__));
+    }
+}
+
+/*
+ *  The BSS section is specified by following symbols
+ *    __bss_start__: start of the BSS section.
+ *    __bss_end__: end of the BSS section.
+ *
+ *  Both addresses must be aligned to 4 bytes boundary.
+ */
+void section_bss_clear(void)
+{
+    extern unsigned long __bss_start__;
+    extern unsigned long __bss_end__;
+
+    memset((void *)(&__bss_start__), \
+           0, \
+           (unsigned long)(&__bss_end__) - (unsigned long)(&__bss_start__));
+
+}
+
+__attribute__((weak)) void pre_main(void)
+{
+#if (!defined(CONFIG_KERNEL_RHINO)) && (!defined(CONFIG_NUTTXMM_NONE)) \
+    && (!defined(CONFIG_KERNEL_FREERTOS)) && (!defined(CONFIG_KERNEL_RTTHREAD)) \
+    && (!defined(CONFIG_KERNEL_THREADX))
+    extern void mm_heap_initialize(void);
+    mm_heap_initialize();
+#endif
+
+    main();
+}
@@ -0,0 +1,100 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdint.h>
+#include <soc.h>
+#include <sys_clk.h>
+// #include <drv/io.h>
+
+uint32_t g_system_clock = IHS_VALUE;
+
+#if CONFIG_BOARD_XIAOHUI_EVB
+uint32_t soc_get_cpu_freq(uint32_t idx)
+{
+#ifndef CONFIG_CPU_FREQ_HZ
+    return 50*1000000;
+#else
+    return CONFIG_CPU_FREQ_HZ;
+#endif
+}
+
+uint32_t soc_get_coretim_freq(void)
+{
+    return 25*1000000;
+}
+
+uint32_t soc_get_uart_freq(uint32_t idx)
+{
+    return 36*1000000;
+}
+
+uint32_t soc_get_timer_freq(uint32_t idx)
+{
+    return 25*1000000;
+}
+
+#else
+uint32_t soc_get_cpu_freq(uint32_t idx)
+{
+    return g_system_clock;
+}
+
+uint32_t soc_get_cur_cpu_freq(void)
+{
+    return g_system_clock;
+}
+
+uint32_t soc_get_coretim_freq(void)
+{
+    return g_system_clock;
+}
+
+uint32_t soc_get_uart_freq(uint32_t idx)
+{
+    return g_system_clock;
+}
+
+csi_error_t soc_sysclk_config(system_clk_config_t *config)
+{
+    return CSI_OK;
+}
+
+void soc_reset_uart(uint32_t idx)
+{
+}
+
+uint32_t soc_get_timer_freq(uint32_t idx)
+{
+    return g_system_clock;
+}
+#endif
+
+void soc_clk_enable(int32_t module)
+{
+}
+
+void soc_clk_disable(int32_t module)
+{
+}
+
+void soc_set_sys_freq(uint32_t val)
+{
+    g_system_clock = val;
+}
+
+
@@ -0,0 +1,58 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     weak.c
+ * @brief    source file for the weak
+ * @version  V1.0
+ * @date     04. April 2024
+ ******************************************************************************/
+
+#include <csi_config.h>
+#include <soc.h>
+#include <csi_core.h>
+
+__WEAK void soc_dcache_clean_invalid_range(unsigned long addr, uint32_t size)
+{
+    csi_dcache_clean_invalid_range((unsigned long *)addr, size);
+}
+
+__WEAK void soc_dcache_clean_invalid_all(void)
+{
+    csi_dcache_clean_invalid();
+}
+
+__WEAK void soc_dcache_invalid_range(unsigned long addr, uint32_t size)
+{
+    csi_dcache_invalid_range((unsigned long *)addr, size);
+}
+
+__WEAK void soc_dcache_clean(void)
+{
+    csi_dcache_clean();
+}
+
+__WEAK void soc_icache_invalid(void)
+{
+    csi_icache_invalid();
+}
+
+__WEAK unsigned long soc_dma_address_remap(unsigned long addr)
+{
+    return addr;
+}
@@ -0,0 +1 @@
+Just include csi_core.h!
@@ -0,0 +1,126 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CSI_RV_COMMON_H__
+#define __CSI_RV_COMMON_H__
+
+#include <stdlib.h>
+#include <stdint.h>
+
+#ifndef __ASM
+#define __ASM                   __asm     /*!< asm keyword for GNU Compiler */
+#endif
+
+#ifndef __INLINE
+#define __INLINE                inline    /*!< inline keyword for GNU Compiler */
+#endif
+
+#ifndef __ALWAYS_STATIC_INLINE
+#define __ALWAYS_STATIC_INLINE  __attribute__((always_inline)) static inline
+#endif
+
+#ifndef __STATIC_INLINE
+#define __STATIC_INLINE         static inline
+#endif
+
+#ifndef __NO_RETURN
+#define __NO_RETURN             __attribute__((__noreturn__))
+#endif
+
+#ifndef __USED
+#define __USED                  __attribute__((used))
+#endif
+
+#ifndef __WEAK
+#define __WEAK                  __attribute__((weak))
+#endif
+
+#ifndef __PACKED
+#define __PACKED                __attribute__((packed, aligned(1)))
+#endif
+
+#ifndef __PACKED_STRUCT
+#define __PACKED_STRUCT         struct __attribute__((packed, aligned(1)))
+#endif
+
+#ifndef __PACKED_UNION
+#define __PACKED_UNION          union __attribute__((packed, aligned(1)))
+#endif
+
+#ifdef __ASSEMBLY__
+#define __ASM_STR(x)    x
+#else
+#define __ASM_STR(x)    #x
+#endif
+
+#ifndef __ASSEMBLY__
+#define rv_csr_read(csr)                                   \
+    ({                                                  \
+        register unsigned long __v;                     \
+        __asm__ __volatile__("csrr %0, " __ASM_STR(csr) \
+                             : "=r"(__v)                \
+                             :                          \
+                             : "memory");               \
+        __v;                                            \
+    })
+
+#define rv_csr_write(csr, val)                                \
+    ({                                                     \
+        unsigned long __v = (unsigned long)(val);          \
+        __asm__ __volatile__("csrw " __ASM_STR(csr) ", %0" \
+                             :                             \
+                             : "rK"(__v)                   \
+                             : "memory");                  \
+    })
+
+#define rv_csr_read_set(csr, val)                                  \
+    ({                                                          \
+        unsigned long __v = (unsigned long)(val);               \
+        __asm__ __volatile__("csrrs %0, " __ASM_STR(csr) ", %1" \
+                             : "=r"(__v) : "rK"(__v)            \
+                             : "memory");                       \
+        __v;                                                    \
+    })
+
+#define rv_csr_set(csr, val)                                  \
+    ({                                                     \
+        unsigned long __v = (unsigned long)(val);          \
+        __asm__ __volatile__("csrs " __ASM_STR(csr) ", %0" \
+                             : : "rK"(__v)                 \
+                             : "memory");                  \
+    })
+
+#define rv_csr_read_clear(csr, val)                                \
+    ({                                                          \
+        unsigned long __v = (unsigned long)(val);               \
+        __asm__ __volatile__("csrrc %0, " __ASM_STR(csr) ", %1" \
+                             : "=r"(__v) : "rK"(__v)            \
+                             : "memory");                       \
+        __v;                                                    \
+    })
+
+#define rv_csr_clear(csr, val)                                \
+    ({                                                     \
+        unsigned long __v = (unsigned long)(val);          \
+        __asm__ __volatile__("csrc " __ASM_STR(csr) ", %0" \
+                             : : "rK"(__v)                 \
+                             : "memory");                  \
+    })
+#endif
+
+#endif /* __CSI_RV_COMMON_H__ */
@@ -0,0 +1,50 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     drv/clk.h
+ * @brief    Header File for CLK Driver.
+ * @version  V1.0
+ * @date     18. Mar 2020
+ ******************************************************************************/
+
+#ifndef _DRV_CLK_H_
+#define _DRV_CLK_H_
+
+#include <stdint.h>
+#include <drv/common.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    uint32_t module;
+    uint16_t dev_tag;
+    uint8_t  idx;
+} csi_clkmap_t;
+
+void csi_clk_enable(csi_dev_t *dev);
+void csi_clk_disable(csi_dev_t *dev);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRV_CLK_H_ */
+
@@ -0,0 +1,154 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     drv/common.h
+ * @brief    Header File for Common Driver
+ * @version  V1.0
+ * @date     31. March 2020
+ * @model    common
+ ******************************************************************************/
+
+#ifndef _DRV_COMMON_H_
+#define _DRV_COMMON_H_
+
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <stdbool.h>
+#include <drv/list.h>
+#include <drv/dev_tag.h>
+#include <csi_config.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_DEBUG_MODE
+#define CSI_ASSERT(expr)                            \
+        do {                                        \
+            if ((long)expr == (long)NULL) {   \
+                printf("PROGRAM ASSERT\n");         \
+                while(1);                           \
+            }                                       \
+        } while(0);
+#else
+#define CSI_ASSERT(expr)        ((void)0U)
+#endif
+
+#ifndef CONFIG_PARAM_NOT_CHECK
+#define CSI_PARAM_CHK(para, err)                        \
+    do                                                  \
+    {                                                   \
+        if ((unsigned long)para == (unsigned long)NULL) \
+        {                                               \
+            return (err);                               \
+        }                                               \
+    } while (0)
+
+#define CSI_PARAM_CHK_NORETVAL(para)                    \
+    do                                                  \
+    {                                                   \
+        if ((unsigned long)para == (unsigned long)NULL) \
+        {                                               \
+            return;                                     \
+        }                                               \
+    } while (0)
+#else
+#define CSI_PARAM_CHK(para, err)
+#define CSI_PARAM_CHK_NORETVAL(para)
+#endif
+
+typedef enum {
+    CSI_OK          =  0,
+    CSI_ERROR       = -1,
+    CSI_BUSY        = -2,
+    CSI_TIMEOUT     = -3,
+    CSI_UNSUPPORTED = -4
+} csi_error_t;
+
+typedef struct {
+   uint8_t    readable;
+   uint8_t    writeable;
+   uint8_t    error;
+} csi_state_t;
+
+typedef struct csi_dev csi_dev_t;
+
+#ifdef CONFIG_PM
+typedef enum {
+    PM_DEV_SUSPEND,
+    PM_DEV_RESUME,
+} csi_pm_dev_action_t;
+
+typedef enum {
+    PM_MODE_RUN                  = 0,   ///< Running mode
+    PM_MODE_SLEEP_1,                    ///< Sleep LV1 mode
+    PM_MODE_SLEEP_2,                    ///< Sleep LV2 mode
+    PM_MODE_DEEP_SLEEP_1,               ///< Deep sleep LV1 mode
+    PM_MODE_DEEP_SLEEP_2,               ///< Deep sleep LV2 mode
+} csi_pm_mode_t;
+
+typedef struct {
+    slist_t     next;
+    csi_error_t (*pm_action)(csi_dev_t *dev, csi_pm_dev_action_t action);
+    uint32_t    *reten_mem;
+    uint32_t    size;
+} csi_pm_dev_t;
+#include <drv/pm.h>
+#endif
+
+struct csi_dev {
+    unsigned long reg_base;
+    uint16_t      irq_num;
+    uint16_t      idx;
+    uint16_t      dev_tag;
+    void          (*irq_handler)(void *);
+    void          (*irq_handler2)(uint32_t irqn, void *arg);
+    void          *arg;
+#ifdef CONFIG_PM
+    csi_pm_dev_t  pm_dev;
+#endif
+};
+
+#define DEV_IDX_INVALID             0xFFFFU
+#define HANDLE_REG_BASE(handle)     (handle->dev.reg_base)
+#define HANDLE_IRQ_NUM(handle)      (handle->dev.irq_num)
+#define HANDLE_DEV_IDX(handle)      (handle->dev.idx)
+#define HANDLE_IRQ_HANDLER(handle)  (handle->dev.irq_handler)
+
+typedef struct {
+    unsigned long    reg_base;
+    uint16_t         irq_num;
+    uint16_t         idx;
+    uint16_t         dev_tag;
+} csi_perip_info_t;
+
+csi_error_t target_get(csi_dev_tag_t dev_tag, uint32_t idx, csi_dev_t *dev);
+csi_error_t target_get_optimal_dma_channel(void *dma_list, uint32_t ctrl_num, csi_dev_t *parent_dev, void *ch_info);
+csi_error_t target_get_check_dma_access(uint32_t ctrl_idx, void *srcaddr, void *dstaddr, void **dma_base_src_addr, void **dma_base_dst_addr);
+csi_error_t target_get_dma_handshake(uint16_t dma_id, uint16_t dev_id, uint16_t dev_tag, uint8_t type, uint16_t *handshake);
+void mdelay(uint32_t ms);
+void udelay(uint32_t us);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRV_COMMON_H_ */
+
@@ -0,0 +1,149 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     drv/irq.h
+ * @brief    header File for IRQ Driver
+ * @version  V1.0
+ * @date     16. Mar 2020
+ * @model    irq
+ ******************************************************************************/
+
+#ifndef _DRV_IRQ_H_
+#define _DRV_IRQ_H_
+
+#include <soc.h>
+#include <csi_core.h>
+#include <stdint.h>
+#include <drv/common.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  \brief       Enable irq.
+  \param[in]   irq_num Number of IRQ.
+  \return      None.
+*/
+__ALWAYS_STATIC_INLINE void csi_irq_enable(uint32_t irq_num)
+{
+    extern void soc_irq_enable(uint32_t irq_num);
+    soc_irq_enable(irq_num);
+}
+
+/**
+  \brief       Disable irq.
+  \param[in]   irq_num Number of IRQ.
+  \return      None.
+*/
+__ALWAYS_STATIC_INLINE void csi_irq_disable(uint32_t irq_num)
+{
+    extern void soc_irq_disable(uint32_t irq_num);
+    soc_irq_disable(irq_num);
+}
+
+/**
+  \brief       Attach irq handler.
+  \param[in]   irq_num     Number of IRQ.
+  \param[in]   irq_handler IRQ Handler.
+  \param[in]   dev         The dev to operate
+  \return      None.
+*/
+void csi_irq_attach(uint32_t irq_num, void *irq_handler, csi_dev_t *dev);
+
+/**
+  \brief       Attach irq handler2 for compatible.
+  \param[in]   irq_num      Number of IRQ.
+  \param[in]   irq_handler2 IRQ Handler.
+  \param[in]   dev          The dev to operate
+  \param[in]   arg          user data of irq_handler2 
+  \return      None.
+*/
+void csi_irq_attach2(uint32_t irq_num, void *irq_handler2, csi_dev_t *dev, void *arg);
+
+/**
+  \brief       detach irq handler.
+  \param[in]   irq_num Number of IRQ.
+  \param[in]   irq_handler IRQ Handler.
+  \return      None.
+*/
+void csi_irq_detach(uint32_t irq_num);
+
+/**
+  \brief       Set irq priority
+  \param[in]   irq_num Number of IRQ.
+  \param[in]   priority IRQ Priority.
+  \return      None.
+*/
+__ALWAYS_STATIC_INLINE void csi_irq_priority(uint32_t irq_num, uint32_t priority)
+{
+    extern void soc_irq_priority(uint32_t irq_num, uint32_t priority);
+    soc_irq_priority(irq_num, priority);
+}
+
+/**
+  \brief       Gets whether the interrupt is enabled
+  \param[in]   irq_num Number of IRQ.
+  \return      true or false.
+*/
+static inline bool csi_irq_is_enabled(uint32_t irq_num)
+{
+    extern bool soc_irq_is_enabled(uint32_t irq_num);
+    return soc_irq_is_enabled(irq_num);
+}
+
+/**
+  \brief       Enable the interrupt wakeup attribution
+  \param[in]   irq_num Number of IRQ.
+  \return      None.
+*/
+__ALWAYS_STATIC_INLINE void csi_irq_enable_wakeup(uint32_t irq_num)
+{
+    extern void soc_irq_enable_wakeup(uint32_t irq_num);
+    soc_irq_enable_wakeup(irq_num);
+}
+
+/**
+  \brief       Disable the interrupt wakeup attribution
+  \param[in]   irq_num Number of IRQ.
+  \return      None.
+*/
+__ALWAYS_STATIC_INLINE void csi_irq_disable_wakeup(uint32_t irq_num)
+{
+    extern void soc_irq_disable_wakeup(uint32_t irq_num);
+    soc_irq_disable_wakeup(irq_num);
+}
+
+/**
+  \brief       Gets whether in irq context
+  \return      true or false.
+*/
+bool csi_irq_context(void);
+
+/**
+  \brief       Dispatching irq handlers
+  \return      None.
+*/
+void do_irq(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRV_IRQ_H_ */
@@ -0,0 +1,198 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     soc.h
+ * @brief    For pin
+ * @version  V1.0
+ * @date     11. Mar 2020
+ ******************************************************************************/
+
+#ifndef _DRV_PIN_H_
+#define _DRV_PIN_H_
+
+#include <soc.h>
+#include <csi_core.h>
+#include <drv/common.h>
+#include <drv/gpio.h>
+
+typedef csi_gpio_mode_t csi_pin_mode_t;
+
+typedef enum {
+    PIN_SPEED_LV0 = 0U,
+    PIN_SPEED_LV1,
+    PIN_SPEED_LV2,
+    PIN_SPEED_LV3
+} csi_pin_speed_t;
+
+typedef enum {
+    PIN_DRIVE_LV0 = 0U,
+    PIN_DRIVE_LV1,
+    PIN_DRIVE_LV2,
+    PIN_DRIVE_LV3
+} csi_pin_drive_t;
+
+typedef enum{
+    PIN_UART_TX = 0U,
+    PIN_UART_RX,
+    PIN_UART_CTS,
+    PIN_UART_RTS
+}csi_pin_uart_t;
+
+typedef enum{
+    PIN_IIC_SCL = 0U,
+    PIN_IIC_SDA
+}csi_pin_iic_t;
+
+typedef enum{
+    PIN_SPI_MISO = 0U,
+    PIN_SPI_MOSI,
+    PIN_SPI_SCK,
+    PIN_SPI_CS
+}csi_pin_spi_t;
+
+typedef enum{
+    PIN_I2S_MCLK = 0U,
+    PIN_I2S_SCLK,
+    PIN_I2S_WSCLK,
+    PIN_I2S_SDA,
+    PIN_I2S_SDI,
+    PIN_I2S_SDO
+}csi_pin_i2s_t;
+ 
+typedef struct {
+    pin_name_t  pin_name;
+    uint8_t     idx;        ///< ctrl idx.    e.g: ADC0 channel 1, idx = 0, channel = 1
+    uint8_t     channel;    ///< channel idx. e.g: same as the previous line
+    pin_func_t  pin_func;
+} csi_pinmap_t;
+
+extern uint32_t target_pin_to_devidx(pin_name_t pin_name, const csi_pinmap_t *pinmap);
+extern uint32_t target_pin_to_channel(pin_name_t pin_name,const csi_pinmap_t *pinmap);
+extern pin_name_t target_gpio_to_pin(uint8_t gpio_idx, uint8_t channel,const csi_pinmap_t *pinmap);
+
+/**
+  \brief       Set pin mux function
+  \param[in]   pin_name    Pin name, defined in soc.h
+  \param[in]   pin_func    Pin function, defined in soc.h
+  \return      \ref  csi_error_t
+*/
+csi_error_t csi_pin_set_mux(pin_name_t pin_name, pin_func_t pin_func);
+
+/**
+  \brief       Get pin function
+  \param[in]   pin_name    Pin name, defined in soc.h
+  \return      pin function
+*/
+pin_func_t csi_pin_get_mux(pin_name_t pin_name);
+
+/**
+  \brief       Set pin mode
+  \param[in]   pin_name    Pin name, defined in soc.h
+  \param[in]   mode        Push/pull mode
+  \return      \ref  csi_error_t
+*/
+csi_error_t csi_pin_mode(pin_name_t pin_name, csi_pin_mode_t mode);
+
+/**
+  \brief       Set pin speed
+  \param[in]   pin_name    Pin name, defined in soc.h
+  \param[in]   speed       Io speed
+  \return      \ref  csi_error_t
+*/
+csi_error_t csi_pin_speed(pin_name_t pin_name, csi_pin_speed_t speed);
+
+/**
+  \brief       Set pin drive
+  \param[in]   pin_name    Pin name, defined in soc.h
+  \param[in]   drive       Io drive
+  \return      \ref  csi_error_t
+*/
+csi_error_t csi_pin_drive(pin_name_t pin_name, csi_pin_drive_t drive);
+
+/**
+  \brief       Get ctrl idx by pin
+  \param[in]   pin_name    Pin name, defined in soc.h
+  \return      idx
+*/
+__ALWAYS_STATIC_INLINE uint32_t csi_pin_get_gpio_devidx(pin_name_t pin_name)
+{
+    extern const csi_pinmap_t gpio_pinmap[];
+    return target_pin_to_devidx(pin_name, gpio_pinmap);
+}
+
+__ALWAYS_STATIC_INLINE uint32_t csi_pin_get_uart_devidx(pin_name_t pin_name)
+{
+    extern const csi_pinmap_t uart_pinmap[];
+    return target_pin_to_devidx(pin_name, uart_pinmap);
+}
+
+__ALWAYS_STATIC_INLINE uint32_t csi_pin_get_iic_devidx(pin_name_t pin_name)
+{
+    extern const csi_pinmap_t iic_pinmap[];
+    return target_pin_to_devidx(pin_name, iic_pinmap);
+}
+
+__ALWAYS_STATIC_INLINE uint32_t csi_pin_get_spi_devidx(pin_name_t pin_name)
+{
+    extern const csi_pinmap_t spi_pinmap[];
+    return target_pin_to_devidx(pin_name, spi_pinmap);
+}
+
+__ALWAYS_STATIC_INLINE uint32_t csi_pin_get_i2s_devidx(pin_name_t pin_name)
+{
+    extern  const csi_pinmap_t i2s_pinmap[];
+    return target_pin_to_devidx(pin_name, i2s_pinmap);
+}
+
+/**
+  \brief       Get channel by pin
+  \param[in]   pin_name    Pin name, defined in soc.h
+  \return      channel
+*/
+__ALWAYS_STATIC_INLINE uint32_t csi_pin_get_adc_channel(pin_name_t pin_name)
+{
+    extern const csi_pinmap_t adc_pinmap[];
+    return target_pin_to_channel(pin_name, adc_pinmap);
+}
+
+__ALWAYS_STATIC_INLINE uint32_t csi_pin_get_pwm_channel(pin_name_t pin_name)
+{
+    extern const csi_pinmap_t pwm_pinmap[];
+    return target_pin_to_channel(pin_name, pwm_pinmap);
+}
+
+__ALWAYS_STATIC_INLINE uint32_t csi_pin_get_gpio_channel(pin_name_t pin_name)
+{
+    extern const csi_pinmap_t gpio_pinmap[];
+    return target_pin_to_channel(pin_name, gpio_pinmap);
+}
+
+/**
+  \brief       Get pin name by gpio ctrl idx and channel
+  \param[in]   gpio_idx    Idx, defined in soc.h
+  \param[in]   channel     Channel, defined in soc.h
+  \return      pin name
+*/
+__ALWAYS_STATIC_INLINE pin_name_t csi_pin_get_pinname_by_gpio(uint8_t gpio_idx, uint8_t channel)
+{
+    extern const csi_pinmap_t gpio_pinmap[];
+    return target_gpio_to_pin(gpio_idx,channel,gpio_pinmap);
+}
+
+#endif /* _DRV_PIN_H_ */
@@ -0,0 +1,184 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     drv/porting.h
+ * @brief    Header File for SOC Porting
+ * @version  V1.0
+ * @date     8. Apr 2020
+ * @model    porting
+ ******************************************************************************/
+
+#ifndef _DRV_PORTING_H_
+#define _DRV_PORTING_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <drv/common.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BOOTREASON_WDT      = 0,    // System WDT reset
+    BOOTREASON_SOFT     = 1,    // soft reset
+    BOOTREASON_POWER    = 2,    // chip power on reset
+    BOOTREASON_OTHER    = 0xFF
+} boot_reason_t;
+
+/*
+  \brief       Soc get boot reason
+  \return      boot reason, \ref boot_reason_t
+*/
+boot_reason_t soc_get_boot_reason(void);
+
+/**
+  \brief       Soc get device frequence.
+  \param[in]   idx      Device index
+  \return      frequence
+*/
+uint32_t soc_get_apb_freq(uint32_t idx);
+uint32_t soc_get_ahb_freq(uint32_t idx);
+uint32_t soc_get_cpu_freq(uint32_t idx);
+
+uint32_t soc_get_uart_freq(uint32_t idx);
+uint32_t soc_get_spi_freq(uint32_t idx);
+uint32_t soc_get_iic_freq(uint32_t idx);
+uint32_t soc_get_i2s_freq(uint32_t idx);
+uint32_t soc_get_pwm_freq(uint32_t idx);
+uint32_t soc_get_adc_freq(uint32_t idx);
+uint32_t soc_get_qspi_freq(uint32_t idx);
+uint32_t soc_get_usi_freq(uint32_t idx);
+uint32_t soc_get_timer_freq(uint32_t idx);
+uint32_t soc_get_rtc_freq(uint32_t idx);
+uint32_t soc_get_wdt_freq(uint32_t idx);
+uint32_t soc_get_sdio_freq(uint32_t idx);
+uint32_t soc_get_emmc_freq(uint32_t idx);
+uint32_t soc_get_usb_freq(uint32_t idx);
+uint32_t soc_get_ref_clk_freq(uint32_t idx);
+uint32_t soc_get_coretim_freq(void);
+uint32_t soc_get_cur_cpu_freq(void);
+uint32_t soc_get_sys_freq(void);
+
+/**
+  \brief       Soc get device frequence.
+  \param[in]   freq     CPU frequence
+  \return      none
+*/
+void soc_set_sys_freq(uint32_t freq);
+
+/*
+  \brief       Soc init clock unit
+  \return      none
+*/
+void soc_clk_init(void);
+
+/*
+  \brief       Soc enable device clock
+  \param[in]   module   Clock module, defined in sys_clk.h, \ref clk_module_t
+  \return      none
+*/
+void soc_clk_enable(int32_t module);
+
+/*
+  \brief       Soc disable device clock
+  \param[in]   module   Clock module, defined in sys_clk.h, \ref clk_module_t
+  \return      none
+*/
+void soc_clk_disable(int32_t module);
+
+/*
+  \brief       Get CPU ID
+  \return      CPU ID, the val is 0, 1, 2...
+*/
+uint32_t soc_get_cpu_id(void);
+
+/**
+  \brief       SOC Dcache clean & invalid by range.
+  \return      None
+*/
+void soc_dcache_clean_invalid_range(unsigned long addr, uint32_t size);
+
+/**
+  \brief       SOC Dcache clean & invalid all.
+  \return      None
+*/
+void soc_dcache_clean_invalid_all(void);
+
+/**
+  \brief       SOC Dcache invalid by range.
+  \return      None
+*/
+void soc_dcache_invalid_range(unsigned long addr, uint32_t size);
+
+/**
+  \brief       SOC Dcache invalid all.
+  \return      None
+*/
+void soc_dcache_invalid(void);
+
+/**
+  \brief       SOC Dcache clean all.
+  \return      None
+*/
+void soc_dcache_clean(void);
+
+
+/**
+  \brief       SOC Dcache clean by range.
+  \return      None
+*/
+void soc_dcache_clean_range(unsigned long addr, uint32_t size);
+
+/**
+  \brief       SOC Icache invalid all.
+  \return      None
+*/
+void soc_icache_invalid(void);
+
+/**
+  \brief       SOC dma address remap.
+  \return      Remaped address
+*/
+extern unsigned long soc_dma_address_remap(unsigned long addr);
+
+
+#ifdef CONFIG_PM
+/**
+  \brief       SoC enter low-power mode, each chip's implementation is different
+               called by csi_pm_enter_sleep
+  \param[in]   mode        low-power mode
+  \return      Error code
+*/
+csi_error_t soc_pm_enter_sleep(csi_pm_mode_t mode);
+
+/**
+  \brief       SoC the wakeup source.
+  \param[in]   wakeup_num  Wakeup source num
+  \param[in]   enable      Flag control the wakeup source is enable or not
+  \return      Error code
+*/
+csi_error_t soc_pm_config_wakeup_source(uint32_t wakeup_num, bool enable);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRV_PORTING_H_ */
@@ -0,0 +1,92 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     tick.h
+ * @brief    Header File for TICK Driver
+ * @version  V1.0
+ * @date     28. Sep 2020
+ ******************************************************************************/
+
+#ifndef _DRV_TICK_H_
+#define _DRV_TICK_H_
+
+#include <stdint.h>
+#include <stdint.h>
+#include <drv/common.h>
+
+#ifndef CONFIG_SYSTICK_HZ
+#define CONFIG_SYSTICK_HZ  100U
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  \brief       Initializes the resources needed for the TICK interface
+  \return      error code \ref csi_error_t
+*/
+csi_error_t csi_tick_init(void);
+
+/**
+  \brief       De-initialize TICK Interface
+*/
+void csi_tick_uninit(void);
+
+/**
+  \brief       Get the sys-tick, one tick == (1000 / CONFIG_SYSTICK_HZ) ms
+  \return      the sys-tick
+*/
+uint32_t csi_tick_get(void);
+
+/**
+  \brief       Get the time which start from csi_tick_init
+  \return      The time which start from csi_tick_init (ms)
+*/
+uint32_t csi_tick_get_ms(void);
+
+/**
+  \brief       Get the time which start from csi_tick_init
+  \return      The time which start from csi_tick_init (us)
+*/
+uint64_t csi_tick_get_us(void);
+
+/**
+  \brief       Get the calendar time in microseconds
+  \return      The absolute timestamp in microseconds since Unix epoch (1970-01-01 00:00:00 UTC)
+*/
+uint64_t csi_get_calendar_us(void);
+
+/**
+  \brief       Set the calendar time in microseconds
+  \param[in]   timestamp  The absolute timestamp in microseconds since Unix epoch (1970-01-01 00:00:00 UTC)
+  \return      None
+*/
+void csi_set_calendar_us(uint64_t timestamp);
+
+/**
+  \brief       Increase the sys-tick
+*/
+void csi_tick_increase(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*_DRV_TICK_H_*/
@@ -0,0 +1,132 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file       drv/timer.h
+ * @brief      Header File for TIMER Driver
+ * @version    V1.0
+ * @date       9. Oct 2020
+ * @model      timer
+ ******************************************************************************/
+
+#ifndef _DRV_TIMER_H_
+#define _DRV_TIMER_H_
+
+#include <drv/common.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct csi_timer csi_timer_t;
+
+struct csi_timer {
+    csi_dev_t        dev;
+    void (*callback)(csi_timer_t *timer, void *arg);
+    void            *arg;
+    void            *priv;
+};
+
+/**
+  \brief       Initialize TIMER interface. initializes the resources needed for the TIMER interface
+  \param[in]   timer    Handle to operate
+  \param[in]   idx      TIMER index
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_timer_init(csi_timer_t *timer, uint32_t idx);
+
+/**
+  \brief       De-initialize TIMER interface. stops operation and releases the software resources used by the interface
+  \param[in]   timer    Handle to operate
+  \return      None
+*/
+void csi_timer_uninit(csi_timer_t *timer);
+
+/**
+  \brief       Start TIMER
+  \param[in]   timer         Handle to operate
+  \param[in]   timeout_us    The timeout for TIMER
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_timer_start(csi_timer_t *timer, uint32_t timeout_us);
+
+/**
+  \brief       Stop TIMER
+  \param[in]   timer    Handle to operate
+  \return      None
+*/
+void csi_timer_stop(csi_timer_t *timer);
+
+/**
+  \brief       Get TIMER remaining value
+  \param[in]   timer    Handle to operate
+  \return      remaining value
+*/
+uint32_t csi_timer_get_remaining_value(csi_timer_t *timer);
+
+/**
+  \brief       Get TIMER load value
+  \param[in]   timer    Handle to operate
+  \return      Load value
+*/
+uint32_t csi_timer_get_load_value(csi_timer_t *timer);
+
+/**
+  \brief       Check TIMER is running
+  \param[in]   timer    Handle to operate
+  \return
+               true  - TIMER is running
+               false - TIMER is stopped
+*/
+bool csi_timer_is_running(csi_timer_t *timer);
+
+/**
+  \brief       Attach the callback handler to TIMER
+  \param[in]   timer       Operate handle
+  \param[in]   callback    Callback function
+  \param[in]   arg         Callback's param
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_timer_attach_callback(csi_timer_t *timer, void *callback, void *arg);
+
+/**
+  \brief       Detach the callback handler
+  \param[in]   timer    Operate handle
+  \return      None
+*/
+void csi_timer_detach_callback(csi_timer_t *timer);
+
+/**
+  \brief       Enable TIMER power manage
+  \param[in]   timer    Handle to operate
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_timer_enable_pm(csi_timer_t *timer);
+
+/**
+  \brief       Disable TIMER power manage
+  \param[in]   timer    Handle to operate
+  \return      None
+*/
+void csi_timer_disable_pm(csi_timer_t *timer);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRV_TIMER_H_ */
@@ -0,0 +1,121 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+ 
+/******************************************************************************
+ * @file     syslog.h
+ * @brief    Defines syslog APIs and usage
+ * @version  V1.1
+ * @date     14. February 2019
+ * @usage    Add 3 lines codes below at head of source code file
+ *           // 0: Err; 1: Err&Warn; 2: Err&Warn&Info; 3: Err&Warn&Info&Debug
+ *           #define LOG_LEVEL 3
+ *           #include <syslog.h>
+ ******************************************************************************/
+#include <stdio.h>
+
+#ifndef _SYSLOG_H_
+#define _SYSLOG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef LOG_LEVEL
+#if (LOG_LEVEL >= 3) && \
+    (defined CONFIG_SYSLOG_LEVEL_DEBUG)
+#define LOG_ENABLE_D
+#endif
+
+#if (LOG_LEVEL >= 2) && \
+    (defined CONFIG_SYSLOG_LEVEL_DEBUG || \
+     defined CONFIG_SYSLOG_LEVEL_INFO)
+#define LOG_ENABLE_I
+#endif
+
+#if (LOG_LEVEL >= 1) && \
+    (defined CONFIG_SYSLOG_LEVEL_DEBUG || \
+     defined CONFIG_SYSLOG_LEVEL_INFO  || \
+     defined CONFIG_SYSLOG_LEVEL_WARN)
+#define LOG_ENABLE_W
+#endif
+
+#if (LOG_LEVEL >= 0) && \
+    (defined CONFIG_SYSLOG_LEVEL_DEBUG || \
+     defined CONFIG_SYSLOG_LEVEL_INFO  || \
+     defined CONFIG_SYSLOG_LEVEL_WARN  || \
+     defined CONFIG_SYSLOG_LEVEL_ERROR)
+#define LOG_ENABLE_E
+#endif
+#endif  /* #ifdef LOG_LEVEL */
+
+/* [LogLevel:FileName:Function:Line] */
+extern const char *PFORMAT_D;
+extern const char *PFORMAT_I;
+extern const char *PFORMAT_W;
+extern const char *PFORMAT_E;
+
+#define LOG_E_BASE_ARGS __FUNCTION__, __LINE__
+#define LOG_W_BASE_ARGS __FUNCTION__, __LINE__
+#define LOG_I_BASE_ARGS __FUNCTION__, __LINE__
+#define LOG_D_BASE_ARGS __FUNCTION__, __LINE__
+
+/* Log in freely format without prefix */
+#define LOG_F(fmt, args...) printf(fmt,##args)
+
+/* Log debug */
+#ifdef LOG_ENABLE_D
+#define LOG_D(fmt, args...) \
+    do {printf(PFORMAT_D,LOG_D_BASE_ARGS); printf(fmt,##args);} while(0)
+#else
+#define LOG_D(fmt, args...)
+#endif
+
+/* Log information */
+#ifdef LOG_ENABLE_I
+#define LOG_I(fmt, args...) \
+    do {printf(PFORMAT_I ,LOG_I_BASE_ARGS); printf(fmt,##args);} while(0)
+#else
+#define LOG_I(fmt, args...)
+#endif
+
+/* Log warning */
+#ifdef LOG_ENABLE_W
+#define LOG_W(fmt, args...) \
+    do {printf(PFORMAT_W,LOG_W_BASE_ARGS); printf(fmt,##args);} while(0)
+#else
+#define LOG_W(fmt, args...)
+#endif
+
+/* Log error */
+#ifdef LOG_ENABLE_E
+#define LOG_E(fmt, args...) \
+    do {printf(PFORMAT_E,LOG_E_BASE_ARGS); printf(fmt,##args);} while(0)
+#else
+#define LOG_E(fmt, args...)
+#endif
+
+#define ENTER()         LOG_D("Enter\n")
+#define EXIT_VOID()     do { LOG_D("Exit\n"); return;} while(0)
+#define EXIT_INT(val)   do { LOG_D("Exit, return val=%d\n", (int)val); return val;} while(0)
+#define EXIT_PTR(ptr)   do { LOG_D("Exit, return ptr=%p\n", (void*)ptr); return ptr;} while(0)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SYSLOG_H_ */
@@ -0,0 +1,25 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+/* used by csi_mmu_set_mode(If there are multiple mmu modes) */
+int g_mmu_mode = 0;
@@ -0,0 +1,46 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __INCLUDE_SYS_IOCTL_H
+#define __INCLUDE_SYS_IOCTL_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+int ioctl(int fd, int req, ...);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_SYS_IOCTL_H */
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __INCLUDE_TIME_H
+#define __INCLUDE_TIME_H
+
+/********************************************************************************
+ * Included Files
+ ********************************************************************************/
+#include <stdbool.h>
+#include <sys/types.h>
+#include <sys/timespec.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+/********************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************/
+
+/* Clock tick of the system (frequency Hz).
+ *
+ * NOTE: This symbolic name CLK_TCK has been removed from the standard.  It is
+ * replaced with CLOCKS_PER_SEC.  Both are defined here.
+ *
+ * The default value is 100Hz
+ */
+# define CLK_TCK           (1000000)
+# define CLOCKS_PER_SEC    (1000000)
+
+#define NSEC_PER_SEC        1000000000
+#define USEC_PER_SEC        1000000
+#define NSEC_PER_USEC       1000
+#define USEC_PER_MSEC       1000
+#define MSEC_PER_SEC        1000
+#define NSEC_PER_MSEC       1000000
+#define TICK2MSEC(tick)     ((tick)* (1000 / CLOCKS_PER_SEC))
+
+extern long timezone;
+
+/* CLOCK_REALTIME refers to the standard time source.  For most
+ * implementations, the standard time source is the system timer interrupt.
+ * However, if the platform supports an RTC, then the standard time source
+ * will be the RTC for the clock_gettime() and clock_settime() interfaces
+ * (the system timer is still the time source for all of the interfaces).
+ *
+ * CLOCK_REALTIME represents the machine's best-guess as to the current
+ * wall-clock, time-of-day time. This means that CLOCK_REALTIME can jump
+ * forward and backward as the system time-of-day clock is changed.
+ */
+
+#define CLOCK_REALTIME     0
+
+/* Clock that cannot be set and represents monotonic time since some
+ * unspecified starting point. It is not affected by changes in the
+ * system time-of-day clock.
+ */
+#define CLOCK_MONOTONIC  1
+
+/* This is a flag that may be passed to the timer_settime() function */
+
+#define TIMER_ABSTIME      1
+
+/* Local time is the same as gmtime in this implementation */
+// #  define localtime(c)       gmtime(c)
+// #  define localtime_r(c,r)   gmtime_r(c,r)
+
+/********************************************************************************
+ * Public Types
+ ********************************************************************************/
+/* Scalar types */
+
+// #ifndef _TIME_T_DECLARED
+// #define _TIME_T_DECLARED
+// typedef int32_t  time_t;         /* Holds time in seconds */
+// #endif
+
+
+// #ifndef _CLOCK_T_DECLARED
+// #define _CLOCK_T_DECLARED
+// typedef uint32_t        clock_t;
+// #endif
+
+/* struct tm is the standard representation for "broken out" time.
+ *
+ * REVISIT: This structure could be packed better using uint8_t's and
+ * uint16_t's.  The standard definition does, however, call out type int for
+ * all of the members.  NOTE: Any changes to this structure must be also be
+ * reflected in struct rtc_time defined in include/nuttx/timers/rtc.h; these
+ * two structures must be cast compatible.
+ */
+
+struct tm
+{
+  int tm_sec;     /* Seconds (0-61, allows for leap seconds) */
+  int tm_min;     /* Minutes (0-59) */
+  int tm_hour;    /* Hours (0-23) */
+  int tm_mday;    /* Day of the month (1-31) */
+  int tm_mon;     /* Month (0-11) */
+  int tm_year;    /* Years since 1900 */
+  int tm_wday;    /* Day of the week (0-6) */
+  int tm_yday;    /* Day of the year (0-365) */
+  int tm_isdst;   /* Non-0 if daylight savings time is in effect */
+};
+
+/* forward reference (defined in signal.h) */
+
+struct sigevent;
+
+/********************************************************************************
+ * Public Data
+ ********************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/********************************************************************************
+ * Public Function Prototypes
+ ********************************************************************************/
+int clock_settime(clockid_t clockid, const struct timespec *tp);
+int clock_gettime(clockid_t clockid, struct timespec *tp);
+
+time_t mktime(struct tm *tp);
+struct tm *gmtime(const time_t *timep);
+struct tm *gmtime_r(const time_t *timep, struct tm *result);
+struct tm *localtime (const time_t *timep);
+struct tm *localtime_r(const time_t *timep, struct tm *result);
+
+size_t strftime(  char *s, size_t max,   const char *format,
+                  const struct tm *tm);
+
+char *ctime(  const time_t *timep);
+
+time_t time(  time_t *timep);
+
+clock_t clock(void);
+
+double difftime(time_t tim1, time_t tim2);
+char *asctime(const struct tm *tim_p);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif  /* __INCLUDE_TIME_H */
@@ -0,0 +1,193 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/******************************************************************************
+ * @file     errno.h
+ * @brief    header file for error num
+ * @version  V1.0
+ * @date     02. June 2017
+ ******************************************************************************/
+#ifndef __ERRNO_H__
+#define __ERRNO_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/****************************************************************************
+ * Error Number Definitions
+ ****************************************************************************/
+#define EPERM            1  /* Operation not permitted */
+#define ENOENT           2  /* No such file or directory */
+#define ESRCH            3  /* No such process */
+#define EINTR            4  /* Interrupted system call */
+#define EIO              5  /* I/O error */
+#define ENXIO            6  /* No such device or address */
+#define E2BIG            7  /* Argument list too long */
+#define ENOEXEC          8  /* Exec format error */
+#define EBADF            9  /* Bad file number */
+#define ECHILD          10  /* No child processes */
+#define EAGAIN          11  /* Try again */
+#define ENOMEM          12  /* Out of memory */
+#define EACCES          13  /* Permission denied */
+#define EFAULT          14  /* Bad address */
+#define ENOTBLK         15  /* Block device required */
+#define EBUSY           16  /* Device or resource busy */
+#define EEXIST          17  /* File exists */
+#define EXDEV           18  /* Cross-device link */
+#define ENODEV          19  /* No such device */
+#define ENOTDIR         20  /* Not a directory */
+#define EISDIR          21  /* Is a directory */
+#define EINVAL          22  /* Invalid argument */
+#define ENFILE          23  /* File table overflow */
+#define EMFILE          24  /* Too many open files */
+#define ENOTTY          25  /* Not a typewriter */
+#define ETXTBSY         26  /* Text file busy */
+#define EFBIG           27  /* File too large */
+#define ENOSPC          28  /* No space left on device */
+#define ESPIPE          29  /* Illegal seek */
+#define EROFS           30  /* Read-only file system */
+#define EMLINK          31  /* Too many links */
+#define EPIPE           32  /* Broken pipe */
+#define EDOM            33  /* Math argument out of domain of func */
+#define ERANGE          34  /* Math result not representable */
+#define EDEADLK         35  /* Resource deadlock would occur */
+#define ENAMETOOLONG    36  /* File name too long */
+#define ENOLCK          37  /* No record locks available */
+
+/*
+ * This error code is special: arch syscall entry code will return
+ * -ENOSYS if users try to call a syscall that doesn't exist.  To keep
+ * failures of syscalls that really do exist distinguishable from
+ * failures due to attempts to use a nonexistent syscall, syscall
+ * implementations should refrain from returning -ENOSYS.
+ */
+#define ENOSYS          38  /* Invalid system call number */
+
+#define ENOTEMPTY       39  /* Directory not empty */
+#define ELOOP           40  /* Too many symbolic links encountered */
+#define EWOULDBLOCK     EAGAIN  /* Operation would block */
+#define ENOMSG          42  /* No message of desired type */
+#define EIDRM           43  /* Identifier removed */
+#define ECHRNG          44  /* Channel number out of range */
+#define EL2NSYNC        45  /* Level 2 not synchronized */
+#define EL3HLT          46  /* Level 3 halted */
+#define EL3RST          47  /* Level 3 reset */
+#define ELNRNG          48  /* Link number out of range */
+#define EUNATCH         49  /* Protocol driver not attached */
+#define ENOCSI          50  /* No CSI structure available */
+#define EL2HLT          51  /* Level 2 halted */
+#define EBADE           52  /* Invalid exchange */
+#define EBADR           53  /* Invalid request descriptor */
+#define EXFULL          54  /* Exchange full */
+#define ENOANO          55  /* No anode */
+#define EBADRQC         56  /* Invalid request code */
+#define EBADSLT         57  /* Invalid slot */
+
+#define EDEADLOCK       EDEADLK
+
+#define EBFONT          59  /* Bad font file format */
+#define ENOSTR          60  /* Device not a stream */
+#define ENODATA         61  /* No data available */
+#define ETIME           62  /* Timer expired */
+#define ENOSR           63  /* Out of streams resources */
+#define ENONET          64  /* Machine is not on the network */
+#define ENOPKG          65  /* Package not installed */
+#define EREMOTE         66  /* Object is remote */
+#define ENOLINK         67  /* Link has been severed */
+#define EADV            68  /* Advertise error */
+#define ESRMNT          69  /* Srmount error */
+#define ECOMM           70  /* Communication error on send */
+#define EPROTO          71  /* Protocol error */
+#define EMULTIHOP       72  /* Multihop attempted */
+#define EDOTDOT         73  /* RFS specific error */
+#define EBADMSG         74  /* Not a data message */
+#define EOVERFLOW       75  /* Value too large for defined data type */
+#define ENOTUNIQ        76  /* Name not unique on network */
+#define EBADFD          77  /* File descriptor in bad state */
+#define EREMCHG         78  /* Remote address changed */
+#define ELIBACC         79  /* Can not access a needed shared library */
+#define ELIBBAD         80  /* Accessing a corrupted shared library */
+#define ELIBSCN         81  /* .lib section in a.out corrupted */
+#define ELIBMAX         82  /* Attempting to link in too many shared libraries */
+#define ELIBEXEC        83  /* Cannot exec a shared library directly */
+#define EILSEQ          84  /* Illegal byte sequence */
+#define ERESTART        85  /* Interrupted system call should be restarted */
+#define ESTRPIPE        86  /* Streams pipe error */
+#define EUSERS          87  /* Too many users */
+#define ENOTSOCK        88  /* Socket operation on non-socket */
+#define EDESTADDRREQ    89  /* Destination address required */
+#define EMSGSIZE        90  /* Message too long */
+#define EPROTOTYPE      91  /* Protocol wrong type for socket */
+#define ENOPROTOOPT     92  /* Protocol not available */
+#define EPROTONOSUPPORT 93  /* Protocol not supported */
+#define ESOCKTNOSUPPORT 94  /* Socket type not supported */
+#define EOPNOTSUPP      95  /* Operation not supported on transport endpoint */
+#define EPFNOSUPPORT    96  /* Protocol family not supported */
+#define EAFNOSUPPORT    97  /* Address family not supported by protocol */
+#define EADDRINUSE      98  /* Address already in use */
+#define EADDRNOTAVAIL   99  /* Cannot assign requested address */
+#define ENETDOWN        100 /* Network is down */
+#define ENETUNREACH     101 /* Network is unreachable */
+#define ENETRESET       102 /* Network dropped connection because of reset */
+#define ECONNABORTED    103 /* Software caused connection abort */
+#define ECONNRESET      104 /* Connection reset by peer */
+#define ENOBUFS         105 /* No buffer space available */
+#define EISCONN         106 /* Transport endpoint is already connected */
+#define ENOTCONN        107 /* Transport endpoint is not connected */
+#define ESHUTDOWN       108 /* Cannot send after transport endpoint shutdown */
+#define ETOOMANYREFS    109 /* Too many references: cannot splice */
+#define ETIMEDOUT       110 /* Connection timed out */
+#define ECONNREFUSED    111 /* Connection refused */
+#define EHOSTDOWN       112 /* Host is down */
+#define EHOSTUNREACH    113 /* No route to host */
+#define EALREADY        114 /* Operation already in progress */
+#define EINPROGRESS     115 /* Operation now in progress */
+#define ESTALE          116 /* Stale file handle */
+#define EUCLEAN         117 /* Structure needs cleaning */
+#define ENOTNAM         118 /* Not a XENIX named type file */
+#define ENAVAIL         119 /* No XENIX semaphores available */
+#define EISNAM          120 /* Is a named type file */
+#define EREMOTEIO       121 /* Remote I/O error */
+#define EDQUOT          122 /* Quota exceeded */
+
+#define ENOMEDIUM       123 /* No medium found */
+#define EMEDIUMTYPE     124 /* Wrong medium type */
+#define ECANCELED       125 /* Operation Canceled */
+#define ENOKEY          126 /* Required key not available */
+#define EKEYEXPIRED     127 /* Key has expired */
+#define EKEYREVOKED     128 /* Key has been revoked */
+#define EKEYREJECTED    129 /* Key was rejected by service */
+
+/* for robust mutexes */
+#define EOWNERDEAD      130 /* Owner died */
+#define ENOTRECOVERABLE 131 /* State not recoverable */
+
+#define ERFKILL         132 /* Operation not possible due to RF-kill */
+
+#define EHWPOISON       133 /* Memory page has hardware error */
+
+#define ENOTSUP         134  /* Not supported */
+
+extern int errno;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ERRNO_H__ */
@@ -0,0 +1,57 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _PRIV_INTTYPES_H_
+#define _PRIV_INTTYPES_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include_next <inttypes.h>
+
+#undef PRId32
+#undef PRIi32
+#undef PRIo32
+#undef PRIu32
+#undef PRIx32
+#undef PRIX32
+
+#undef SCNd32
+#undef SCNi32
+#undef SCNo32
+#undef SCNu32
+#undef SCNx32
+
+#define PRId32		__STRINGIFY(d)
+#define PRIi32		__STRINGIFY(i)
+#define PRIo32		__STRINGIFY(o)
+#define PRIu32		__STRINGIFY(u)
+#define PRIx32		__STRINGIFY(x)
+#define PRIX32		__STRINGIFY(X)
+
+#define SCNd32		__STRINGIFY(d)
+#define SCNi32		__STRINGIFY(i)
+#define SCNo32		__STRINGIFY(o)
+#define SCNu32		__STRINGIFY(u)
+#define SCNx32		__STRINGIFY(x)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,85 @@
+/*
+ * minilibc stdio
+ *
+ * Copyright (C): 2012 Hangzhou C-SKY Microsystem Co.,LTD.
+ * Author: Junshan Hu (junshan_hu@c-sky.com)
+ * Contrbutior: Chunqiang Li
+ * Date: 2012-5-4
+ */
+
+#ifndef _MINILIBC_STDIO_H_
+#define _MINILIBC_STDIO_H_
+
+#include <stdarg.h>
+
+#define BUFSIZE 2048
+
+struct __stdio_file {
+	int fd;
+	int flags;
+	unsigned int bs;	/* read: bytes in buffer */
+	unsigned int bm;	/* position in buffer */
+//	unsigned int buflen;	/* length of buf */
+//	char *buf;
+	struct __stdio_file *next;	/* for fflush */
+	unsigned char ungetbuf;
+	char ungotten;
+	unsigned int lock;
+};
+
+#define ERRORINDICATOR 1
+#define EOFINDICATOR 2
+#define BUFINPUT 4
+#define BUFLINEWISE 8
+#define NOBUF 16
+#define STATICBUF 32
+#define FDPIPE 64
+#define CANREAD 128
+#define CANWRITE 256
+
+#include <stdio.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void (*fmt_out_fn)(char * strbuf, int len);
+typedef int (*fmt_in_fn)(void);
+extern fmt_out_fn g_current_outputs;
+extern fmt_in_fn g_current_inputs;
+#define print_current_out_set(fn) do{g_current_outputs = fn;}while(0)
+#define print_current_in_set(fn) do{g_current_inputs = fn;}while(0)
+static inline int is_normal_outputs(void)
+{
+	if(g_current_inputs) 
+		return 0;
+	return 1;
+}
+
+/* ..scanf */
+struct arg_scanf {
+	void *data;
+	int (*getch)(void*);
+	int (*putch)(int,void*);
+};
+
+int __v_scanf(struct arg_scanf* fn, const char *format, va_list arg_ptr);
+
+struct arg_printf {
+	void *data;
+	int (*put)(void*,size_t,void*);
+};
+
+int yoc__v_printf(struct arg_printf* fn, const char *format, va_list arg_ptr);
+int __isinf(double d);
+int __isnan(double d);
+int __dtostr(double d,char *buf,unsigned int maxlen,unsigned int prec,unsigned int prec2);
+int __lltostr(char *s, int size, unsigned long long i, int base, char UpCase);
+int __ltostr(char *s, unsigned int size, unsigned long i, unsigned int base, int UpCase);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*  _MINILIBC_STDIO_H_ */
@@ -0,0 +1,45 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _PRIV_STDINT_H_
+#define _PRIV_STDINT_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if __STDC_HOSTED__
+/* For newlib and minilibc utint32_t are not same */
+#undef _UINT32_T_DECLARED
+#define _UINT32_T_DECLARED
+typedef unsigned int uint32_t;
+
+#undef _INT32_T_DECLARED
+#define _INT32_T_DECLARED
+typedef signed int int32_t;
+
+#endif /* __STDC_HOSTED__ */
+
+#define IN_ADDR_T_DEFINED
+
+#include_next <sys/_stdint.h>
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,34 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __SYS_RANDOM__
+#define __SYS_RANDOM__
+
+#include <sys/types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ssize_t getrandom(void *buf, size_t buflen, unsigned int flags);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif //__SYS_RANDOM__
@@ -0,0 +1,52 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __SYS_SELECT_H
+#define __SYS_SELECT_H
+
+#include <sys/_timeval.h>
+
+#ifndef FD_SETSIZE
+#define FD_SETSIZE 1024
+#endif
+
+typedef unsigned long fd_mask;
+typedef struct {
+    unsigned long fds_bits[FD_SETSIZE / 8 / sizeof(long)];
+} fd_set;
+
+#define FD_ZERO(s)     memset((void*)(s), 0, sizeof(*(s)))
+#define FD_SET(d, s)   ((s)->fds_bits[(d) / (8 * sizeof(long))] |= (1UL << ((d) % (8 * sizeof(long)))))
+#define FD_CLR(d, s)   ((s)->fds_bits[(d) / (8 * sizeof(long))] &= ~(1UL << ((d) % (8 * sizeof(long)))))
+#define FD_ISSET(d, s) (!!((s)->fds_bits[(d) / (8 * sizeof(long))] & (1UL << ((d) % (8 * sizeof(long))))))
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *errorfds,
+                         struct timeval *timeout);
+
+extern int select2(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset,
+            struct timeval *timeout, void *semaphore);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SYS_SELECT_H*/
@@ -0,0 +1,134 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __INCLUDE_SYS_TIME_H
+#define __INCLUDE_SYS_TIME_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <time.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef _TIME_T_DECLARED
+#define _TIME_T_DECLARED
+typedef int32_t  time_t;
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Type Definitions
+ ****************************************************************************/
+#ifndef _TIMEVAL_DEFINED
+#define _TIMEVAL_DEFINED
+/* struct timeval represents time as seconds plus microseconds */
+
+struct timeval
+{
+  time_t tv_sec;         /* Seconds */
+  long tv_usec;          /* Microseconds */
+};
+#endif
+
+/* The use of the struct timezone  is obsolete; the tz argument should
+ * normally be specified as NULL (and is ignored in any event).
+ */
+
+struct timezone
+{
+  int tz_minuteswest;     /* Minutes west of Greenwich */
+  int tz_dsttime;         /* Type of DST correction */
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: gettimeofday
+ *
+ * Description:
+ *   Get the current time
+ *
+ *   Conforming to SVr4, 4.3BSD. POSIX.1-2001 describes gettimeofday().
+ *   POSIX.1-2008 marks gettimeofday() as obsolete, recommending the use of
+ *   clock_gettime(2) instead.
+ *
+ *   NuttX implements gettimeofday() as a thin layer around clock_gettime();
+ *
+ * Input Parameters:
+ *   tv - The location to return the current time
+ *   tz - Ignored
+ *
+ * Returned value:
+ *   Zero (OK) on success;  -1 is returned on failure with the errno variable
+ *   set appropriately.
+ *
+ ****************************************************************************/
+
+int gettimeofday(  struct timeval *tv,   struct timezone *tz);
+
+/****************************************************************************
+ * Name: settimeofday
+ *
+ * Description:
+ *   Set the current time
+ *
+ *   Conforming to SVr4, 4.3BSD. POSIX.1-2001 describes gettimeofday() but
+ *   not settimeofday().
+ *
+ *   NuttX implements settimeofday() as a thin layer around clock_settime();
+ *
+ * Input Parameters:
+ *   tv - The net to time to be set
+ *   tz - Ignored
+ *
+ * Returned value:
+ *   Zero (OK) on success;  -1 is returned on failure with the errno variable
+ *   set appropriately.
+ *
+ ****************************************************************************/
+
+int settimeofday(  const struct timeval *tv,   const struct timezone *tz);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_SYS_TIME_H */
@@ -0,0 +1 @@
+target remote localhost:1234
@@ -0,0 +1,27 @@
+ /*
+ * Copyright (C) 2017-2024 Alibaba Group Holding Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <board.h>
+
+extern int main();
+
+void pre_main(void)
+{
+    board_init();
+    main();
+}
@@ -0,0 +1,15 @@
+# Name of the target
+set(CMAKE_SYSTEM_NAME Generic)
+set(CMAKE_SYSTEM_PROCESSOR xuantie_e906)
+
+set(THREADX_ARCH "xuantie_e906")
+set(THREADX_TOOLCHAIN "gnu")
+set(ARCH_FLAGS "-g -mcpu=e906fd -mcmodel=medlow")
+set(CFLAGS "${ARCH_FLAGS}")
+set(ASFLAGS "${ARCH_FLAGS}")
+set(LDFLAGS "${ARCH_FLAGS}")
+
+set(TX_USER_FILE ${CMAKE_CURRENT_LIST_DIR}/tx_user.h)
+set(THREADX_CUSTOM_PORT ${CMAKE_CURRENT_LIST_DIR}/../../)
+
+include(${CMAKE_CURRENT_LIST_DIR}/../../../../../cmake/riscv64-unknown-elf.cmake)