Prep for 0.4.10 release

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2016 42af7a65-404d-4744-a932-0658087f49c3

ChangeLog

@@ -599,4 +599,245 @@
 	* Integrated the new font support with a font test in examples/nx
 	* Add documentation for NX graphics subsystem
 
-0.4.1 2008-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
+0.4.1 2009-02-06 Gregory Nutt <spudmonkey@racsa.co.cr>
+	* Added board support fot the ZiLog eZ80Acclaim! ez80f910200zco Development Kit.
+	* Fixed several compilation errors in fixed precision math library when built
+	  against toolchains that do not support 64-bit type 'long long'.
+	* Fix errors in some function prototypes in dirent.h
+	* Add eZ80F91 EMAC driver
+	* Fix recvfrom() compilation error -- only noted under ZDS
+	* Updated all ARM Make.def files to work with gcc 2.4.2 (However, there are
+	  still some build issues associated with that toolchain in use of arm-elf-objcopy
+	  -- see the TODO.txt list for details)
+	* Fix problems with Z16F and eZ80 compilation introduced with recent changes.
+
+0.4.2 2009-02-28 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* M16C: Add support for the Renesas M16C MCU and the SKP16C26 StarterKit. However, 
+	  the target cannot be built because the GNU m16c-elf-ld link fails with 
+	  the following message:
+
+	    m32c-elf-ld: BFD (GNU Binutils) 2.19 assertion fail /home/Owner/projects/nuttx/buildroot/toolchain_build_m32c/binutils-2.19/bfd/elf32-m32c.c:482
+
+	  Where the reference line is:
+
+	    /* If the symbol is out of range for a 16-bit address,
+	       we must have allocated a plt entry.  */
+	     BFD_ASSERT (*plt_offset != (bfd_vma) -1);
+
+	  No workaround is known at this time.  This is a show stopper for M16C.
+
+	* eZ80Acclaim!: Fix interrupt vectors positioning; they were being positioned
+	  wrong by 64 bytes (Kevin Franzen).
+	* eZ80Acclaim!: Corrected some stack handling errors during interrupt handling
+	   context save and restore (Kevin Franzen).
+	* eZ80Acclaim!: Corrected vector intialization logic (Kevin Franzen).
+	* eZ80Acclaim!: Corrected overflow problem in the calculation of UART baud rate
+	    divisor, the system timer divisor, and the EMAC poll timer.
+	* eZ80Acclaim!: Fixed GPIO pin configuration get serial output
+	* eZ80Acclaim!: Correct stack overflow in ostest example configuration
+	* eZ80Acclaim!: Fixed restoration of interrupts state on interrupt level context swith.
+
+0.4.3 2009-03-04 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* z8Encore! and eZ80Acclaim!: Fixed the serial driver initialization sequence
+	* eZ80Acclaim!: Fixed error in vector table:  Missing space set aside for the
+	  "unused" vectors.  As a result, all vectors above timer4 were skewed.
+	* eZ80Acclaim!: Fixed logic error in UART interrupt handler.
+	* Many fixes in FAT file system and in NSH for correct compilation with ZDS-II
+	* eZ80Acclaim!: Added and verified a NuttShell (NSH) configuration.
+	* eZ80Acclaim!: Correct endian-ness; defconfig files said BIG endian.
+	* Restructured parts of the uIP port for correct compilation with ZDS-II
+	* eZ80Acclaim!: Complete basic integration of the eZ80F91 EMAC driver.  The
+	  driver is basically functional and should mature prior to the 0.4.3 release.
+	* Implemented priority inheritance logic for POSIX semaphores.  Because the pthread
+	  mutexes are built on semaphores, they will have this property as well.
+
+0.4.4 2009-03-29 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* examples/nsh:  A debug option was left on that can (and does) cause
+	  infinite loops and stack overflows.
+	* net/uip: Correct calculation of checksum on ICMP ping response.
+	* examples/dchpd: Added a tiny DHCP server example
+	* net/uip: Correct UDP bind behavior.  It should select a valid port number
+	  if it receives a port number of zero.
+	* netutils/dhcpd:  Corrrect for ZDS compiler.  Fix issue with re-use of a
+	  port number. Fixed a number of broadcast-related problems.
+	* eZ80Acclaim!: Add a tiny webserver configuration
+	* eZ80Acclaim!: Fixed an important bug in the EMAC Tx timeout logic. It was
+	  always timing out when the load was heavy and worse, for some reason,
+	  resetting the Tx function caused unexpected registers to be reset in
+	  the Rcv function was well.
+	* Z80: Patch incorported: "[2696648] Z80: interrupt flag stored in parity bit"
+	  (submitted by JPelletier).  The is the same fix that was needed for the
+	  eZ80 and fixed in 0.4.2.
+	* netutils: Added logic to support a simple wget() function
+	* examples/wget: Added a test for wget() (untested -- see NOTE)
+	* lib/strncasecmp: Fix cut'n'paste error in function name.
+	* NSH: Added wget command (untested -- see NOTE).
+	* examples/sendmail: A simple sendmail example (untested -- see NOTE)
+
+	NOTE: Features related to wget and sendmail are not tested on the target platform
+	in this release and, hence, most likely have problems.  I don't have the correct network
+	network setup to perform that testing now (I'm in a hotel).
+
+0.4.5 2009-04-19 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Add an enumeration argument to the SPI chip select and status methods so
+	  that the interface can handle more than one device.
+	* eZ80Acclaim!: Add a generic SPI driver for all eZ80 boards.
+	* Add a setmode() method to the SPI interface to handle parts with differing
+	  mode requirements.
+	* include/nuttx/i2c.h: Defined a standard I2C interface
+	* eZ80Acclaim!: Add an I2C driver.
+	* eZ8Encore!: Add an I2C driver.
+	* Add support for the Freescale i.MX1/L architecture and a configuration for
+	  the Freescale MX1ADS development board.
+	* examples/helloxx: Added a simple C++ hello world example
+	* include/css: Added std header files
+	* libxx: New C++-only directory provides support for minimal C++ applications
+
+0.4.6 2009-05-19 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Change SPI interface so that is can accomodate interfaces where the
+	  number of bits per word is greater an 8 (such as with many 9-bit display
+	  interfaces). -- this might have broken a few things which will need to
+	  be retested!
+	* arch/arm/src/imx: Added i.MX SPI driver
+	* SPI: Add a method to set the number of bits per word.  Also add an
+	  alternative interface for so that (eventually) I can phase the sndblock
+	  and recvblock methods and replace them with a single exchange method
+	* Build:  objcopy fails with toolchains that use newer GCC and binutils.  The
+	  following arguments need to be included in the objcopy command line "-R .note
+	  -R .note.gnu.build-id -R .comment"  This has bin fixed in arch/arm/src/Makefile,
+	  but other architectures may have the same problem.  Thanks to Dave Marples
+	  for verifying this.
+	* configs/eagle100/ostest: Added support for the MicroMint Eagle100 board. 
+	  This board has a Luminary LM3S6918 Cortex-M3. Added a configuration to build
+	  examples/ostest.
+	* arch/arm/src/lpc214x: Add configuration option to enable fast GPIO (vs.
+	  legacy, "slow" GPIO) for LPC214x.
+	* arch/arm: Restructured the arch/arm directory structure to better suppor ARM
+	  and Cortex-M3.
+	* sched/: pthread_create() must return a (non-negated) errno value on failure.
+	* configs/eagle100/nsh: Add a NuttShell (NSH) configuration for the Eagle-100
+
+0.4.7 2009-05-29 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* arch/arm/src/lm3s: Added an Ethernet driver for the LM3S6918
+	* configs/eagle100/nettest: Added an examples/nettest configuration for the
+	  Micromint Eagle100 board.
+	* Documentation/NuttxPortingGuide.html: Added a section on NuttX device drivers.
+	* configs/eagle100/httpd: Added an examples/uip configuration for the
+	  Micromint Eagle100 board.
+	* arch/arm/src/lm3s: Added an SSI driver for the LM3S6918
+	* examples/nsh: Added MMC/SD support for the LM3S6918
+	* arch/arm/src/lm3s: Fix logic for setting and clearing output GPIOs (critical
+	  fix!).
+	* drivers/mmcsd: Found numerous errors in current MMC/SD SPI driver.  Bad frequency
+	  calculation based on CSD settings, inappropriate timeouts, odd code that looks like
+	  a bad search and replace.  Also needs support for SDHC ver 2.x.  New MMC/SD is
+	  largely redesigned and probably non-functional in the first check-in.
+	* drivers/mmcsd: Changes verified on 4Gb Kingston microSHDC card and on a 2Gb
+	  SanDisk microSDC card on the Eagle100 platform.
+	* fs/fat: With the 4Gb card, the first tests of FAT32 were (finally) performed.
+	  Found and corrected a problem that prevented use of FAT32: It was not updating
+	  the sector cache before checking the FAT32 FSINFO sector.
+	* configs/eagle100/*/Make.defs:  Added configuration options that should make
+	  it possible to build NuttX for the Eagle100 using CodeSourcery 2009q1 toolchain
+	  and the devkitARM GNU toolchain.
+	* configs/mcu123-lpc214x/src: Corrected some logic in the LPC2148 SPI receive block
+	  logic.  Re-verified SDC ver1.x support with 1Gb Toshiba SDC, 1Gb PNY SDC, and
+	  4Gb Kingston SDHC.  There are CMD0 issues with the 2Gb SanDisk SDC on this board.
+	* fs/fs_mount.c: Corrected error handling that could cause a deadlock on certain
+	  mount() failures.
+
+0.4.8 2009-06-13 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* lib/lib_*stream.c: Extend internal stream logic to support incoming streams.
+	* arch/arm/src/str71x: Serial output is now correct and timer interrupts are
+	  working.  The test at configs/olimex-strp711/ostest passes.  This means that
+	  the basic STR-P711 port is complete.
+	* configs/olimex-strp711/nsh:  Add and verifed a NuttShell (NSH) configuration
+	  for the STR-P711.
+	* arch/arm/str71x/str71x_serial.c:  The STR711 interrupt driven serial driver
+	  finally works after some extradinary measures to handle missed interrupts.
+	  NSH is fully functional on the Olimex STR-P711 board.
+	* example/nsh: Moved architecture specific files from NSH directory to board-
+	  specific directories.
+	* config/olimex-strp711/src/up_nsh.c:  Add an NSH board specific directory for
+	  for the Olimex STR7P11 board.
+	* Fixed build of LM3X6918 using the CodeSourcery Windows native toolchain.  There
+	  were lots of issues with Cygwin paths and Cygwin symbolic links.  These changes
+	  may work with the devarmKIT as well, but that remains untested.
+	* The NXP LPC2148 and STR711 targets can now also be built using the CodeSourcery
+	  or devkitARM Windows native toolchains.
+
+0.4.9 2009-06-26 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Add strtoll() and strtoull(); Add macros for atol() and atoll().
+	* dup() and dup2() will now clone socket descriptors
+	* All socket descriptors ar now cloned when when a new task is started
+	  via task_create().
+	* Add configuration options to suppress or eliminate cloning of file
+	  and/or socket descriptors when a new task is started by task_create():
+	  CONFIG_FDCLONE_DISABLE, CONFIG_FDCLONE_STDIO, CONFIG_SDCLONE_DISABLE.
+	* Use of C++ reserved word 'private' in C header files causes problems
+	  for C++ that include them.
+	* Added 'binfmt' support to allow execution of programs in a file system,
+	  binding to NuttX symbols. A custom format call NXFLAT is used; this
+	  derives from http://xflat.sourceforge.net.  At present is supports on
+	  XIP execution from ROMFS file systems.  Initial check-in is untested
+	  and probably breaks many builds.
+	* examples/lib: Added qsort()
+	* examples/nxflat: Added support for symbol tables
+	* Correct logic that creates compiler include paths.  On Cygwin, the
+	  include paths for Cygwin-based GCC were being converted to windows
+	  native paths.  That causes many problems -- breaking dependencies
+	  for one.
+	* Fixed an important bug in ROMFS.  The initial XIP offset was set
+	  incorrectly so if sector zero was read first, there was a bad read.
+	  I don't know how it worked before.
+	* arch/arm/src/common/up_use_stack.c.  Fixed a fatal stack setup error.
+	  This file has been around for a long time, but I don't think it has
+	  every been used before (i.e., prior to the NXFLAT logic)
+
+0.4.10 2009-08-08 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* lib/: Added some basic regex-subset, pattern matching functions
+	* lib/: Greatly simplified mktime() and gmtime_r().  The Gregorian and
+	  Julian time calculations were interesting, but not necessary in the
+	  typical embeddd system.
+	* sched/: Added gettimeofday().  This implementation is simply a thin
+	  wrapper around clock_gettimer().
+	* lib/: Add gmtime(), localtime(), and strftime()
+	* binfmt/: Add exec().  This is just a wrapper that executes both
+	  load_ and exec_module() in a more familiar manner.  It is not consistent
+	  with more standard exec() functions, however, because (1) it returns
+	  and (2) it requires symbol table arguments.
+	* lib/: Add fileno()
+	* examples/ostest: Several of the tests used a big, hard-coded stack size
+	  when creating test threads (16Kb stacksize).  The stack size should
+	  be controlled by the .config file or the OSTest won't work on platforms
+	  with memory constraints.
+	* netutils/thttpd: An initial port of Jeff Poskanzer's THTTPD HTTP server.
+	  See http://acme.com/software/thttpd/.
+	* examples/thttpd: A basic test program for THTTPD
+	* configs/eagle100/thttpd: A build configuration for THTTPD on the Micromint
+	  Eagle-100 LMS6918 (Cortex-M3) board.
+	* configs/ntosd-dm320/thttpd: A build configuration for THTTPD on the Neuros
+	  DM320 platform.
+	* lib/: Added strstr() and strpbrk().
+	* net/recvfrom.c and net/accept(): Sockets now support some non-blocking
+	  operations, specifically for (1) TCP/IP read operations when read-ahead
+	  buffering is enabled, and (2) TCP/IP accept() operations when TCP/IP
+	  connection backlog is enabled.
+	* fs/fs_fcntl.c and net/net_vfcntl.c: Minimal support provided for fcntl().
+	  It can, at least, be used to mark sockets as blocking or non-blocking.
+	* net/net_close.c: Fix bug in close().  If reference count not set to zero
+	  then uip_tcpfree() will assert when DEBUG is enabled.
+	* net/accept.c: Fix bug in accept().  The logic expected parts of the
+	  return address structure to be initialized or it would return an error.
+
+0.4.11 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
+

Documentation/NXGraphicsSubsystem.html

@@ -342,7 +342,7 @@
 </p>
 <p>
   However, the same end result can be obtained by using the
-  <a href="nxrequestbkgd"><code>nx_requestbkgd()</code></a> API.
+  <a href="#nxrequestbkgd"><code>nx_requestbkgd()</code></a> API.
   It still may be possible to reduce the footprint in this usage case by developing
   and even thinner NXNULL front-end.
   That is a possible future development.
@@ -1652,7 +1652,7 @@ int nx_bitmap(NXWINDOW hwnd, FAR const struct nxgl_rect_s *dest,
       or <a href="#nxrequestbkgd"><code>nx_requestbkgd()</code></a> that specifies the
       window that will receive the bitmap image.
     <dt><code>dest</code>
-    <dd> Describes the rectangular on the display that will receive the the bit map.
+    <dd> Describes the rectangular on the display that will receive the bit map.
     <dt><code>src</code>
     <dd>The start of the source image.  This is an array source images of size
       <code>CONFIG_NX_NPLANES</code> (probably 1).

Documentation/NuttShell.html

@@ -8,7 +8,7 @@
   <tr align="center" bgcolor="#e4e4e4">
     <td>
       <h1><big><font color="#3c34ec"><i>NuttShell (NSH)</i></font></big></h1>
-      <p>Last Updated: November 15, 2008</p>
+      <p>Last Updated: June 08, 2009</p>
     </td>
   </tr>
 </table>
@@ -275,7 +275,13 @@
 <tr>
   <td><br></td>
   <td>
-    <a href="#cmdxd">2.33 Hexadecimal Dump (xd)</a>
+    <a href="#cmdwget">2.33 Get File Via HTTP (wget)</a>
+  </td>
+</tr>
+<tr>
+  <td><br></td>
+  <td>
+    <a href="#cmdxd">2.34 Hexadecimal Dump (xd)</a>
   </td>
 </tr>
 <tr>
@@ -1342,7 +1348,7 @@ mount -t &lt;fstype&gt; &lt;block-device&gt; <code>&lt;dir-path&gt;</code>
   </li>
 </ol>
 <p>
-  After the the volume has been mounted in the NuttX
+  After the volume has been mounted in the NuttX
   <a href="NuttxUserGuide.html#FileSystemOverview"><i>pseudo</i> filesystem</a>,
   it may be access in the same way as other objects in thefile system.
 </p>
@@ -1673,7 +1679,34 @@ usleep &lt;usec&gt;
 <table width ="100%">
   <tr bgcolor="#e4e4e4">
   <td>
-    <a name="cmdxd"><h2>2.33 Hexadecimal dump (xd)</h2></a>
+    <a name="cmdwget">2.33 Get File Via HTTP (wget)</a>
+  </td>
+  </tr>
+</table>
+
+<a <p><b>Command Syntax:</b></p>
+<ul><pre>
+wget [-o &lt;local-path&gt;] &lt;url&gt;
+</pre></ul>
+<p>
+  <b>Synopsis</b>.
+  Use HTTP to copy the file at <code>&lt;url&gt;</code> to the current directory.
+</p>
+<p><b>Options:</b></p>
+<ul><table>
+  <tr>
+    <td><b><code>-o &lt;local-path&gt;</code></b></td>
+    <td>
+      The file will be saved relative to the current working directory
+      and with the same name as on the HTTP server unless <code>&lt;local-path&gt;</code> is provided.
+    </td>
+  </tr>
+</table></ul>
+
+<table width ="100%">
+  <tr bgcolor="#e4e4e4">
+  <td>
+    <a name="cmdxd"><h2>2.34 Hexadecimal dump (xd)</h2></a>
   </td>
   </tr>
 </table>
@@ -1909,6 +1942,12 @@ nsh>
     <td>!<code>CONFIG_DISABLE_SIGNALS</code></td>
     <td><code>CONFIG_EXAMPLES_NSH_DISABLE_USLEEP</code></td>
   </tr>
+  <tr>
+    <td><b><code>wget</code></b></td>
+    <td><code>CONFIG_NET</code> &amp;&amp; <code>CONFIG_NET_TCP</code> &amp;&amp;
+        <code>CONFIG_NFILE_DESCRIPTORS</code> &gt; 0</td>
+    <td><code>CONFIG_EXAMPLES_NSH_DISABLE_WGET</code></td>
+  </tr>
   <tr>
     <td><b><code>xd</code></b></td>
     <td><br></td>
@@ -2037,6 +2076,15 @@ nsh>
       access NSH.
     </td>
   </tr>
+  <tr>
+    <td valign="top"><b><code>CONFIG_EXAMPLES_NSH_ARCHINIT</code></b></td>
+    <td>
+      Set <code>CONFIG_EXAMPLES_NSH_ARCHINIT</code> if your board provides architecture
+      specific initialization  via the board-specific function <code>nsh_archinitialize()</code>.
+      This function will be called early in NSH initialization to allow board logic to
+      do such things as configure MMC/SD slots.
+    </td>
+  </tr>
 </table></center>
 
 <p>
@@ -2060,7 +2108,7 @@ nsh>
   <tr>
     <td valign="top"><b><code>CONFIG_EXAMPLES_NSH_DHCPC</code></b></td>
     <td>
-      Obtain the the IP address via DHCP.
+      Obtain the IP address via DHCP.
     </td>
   </tr>
   <tr>
@@ -2255,6 +2303,7 @@ nsh>
   <li><a href="#cmdunmount"><code>umount</code></a></li>
   <li><a href="#cmdunset"><code>unset</code></a></li>
   <li><a href="#cmdusleep"><code>usleep</code></a></li>
+  <li><a href="#cmdwget"><code>wget</code></a></li>
   <li><a href="#cmdxd"><code>xd</code></a></li>
 </ul></td>
 </tr></table>

Documentation/NuttXBanner.html

@@ -5,37 +5,32 @@
 <body background="backgd.gif">
 <table width="100%">
   <tr>
-  <td width="210" valign="top">
-    <a href="http://sourceforge.net/">
-      <img src="http://sflogo.sourceforge.net/sflogo.php?group_id=235&amp;type=5" width="210" height="62" border="0" alt="SourceForge"/>
-    </a>
-  </td>
   <td>
     <table width="100%">
       <tr>
-        <td bgcolor="#e4e4e4" colspan="2">
-          <big><b><i><font color="#3c34ec">NuttX RTOS</font></i></b></big>
+        <td bgcolor="#e4e4e4">
+          <big><b><i><font color="#3c34ec">NuttX RTOS</font></i></b></big> ...
+          <a href="http://nuttx.sourceforge.net" target="_top">Home</a> ...
+          <a href="freeports.html">Free Ports</a><br>
+        </td>
+        <td width="100" align="center">
+          <a href="http://sourceforge.net/projects/nuttx" target="_top">
+            <img src="http://sflogo.sourceforge.net/sflogo.php?group_id=189573&type=8" width="80" height="15" border="0" alt="Get NuttX at SourceForge.net. Fast, secure and Free Open Source software downloads" />
+          </a>
         </td>
       </tr>
       <tr>
-        <td valign="top">
-          <a href="http://sourceforge.net/projects/nuttx" target="_top">Project</a><br>
-          <a href="http://nuttx.sourceforge.net" target="_top">Home</a>
-        </td>
-        <td valign="top">
-          <a href="http://tech.groups.yahoo.com/group/nuttx" target="_top">Yahoo! Groups</a><br>
-          <a href="freeports.html">Free Ports</a><br>
+        <td><br></td>
+        <td width="100" align="center">
+          <a href="http://groups.yahoo.com/group/nuttx/join" target="_top">
+            <img src="http://us.i1.yimg.com/us.yimg.com/i/yg/img/i/us/ui/join.gif"
+                style="border: 0px;"
+                alt="Click to join nuttx"/>
+          </a>
         </td>
       </tr>
     </table>
   </td>
-  <td width="100" valign="top">
-    <a href="http://groups.yahoo.com/group/nuttx/join" target="_top">
-      <img src="http://us.i1.yimg.com/us.yimg.com/i/yg/img/i/us/ui/join.gif"
-           style="border: 0px;"
-           alt="Click to join nuttx"/>
-    </a>
-  </td>
   </tr>
 </body>
 </html>

Makefile

@@ -1,7 +1,7 @@
 ############################################################################
 # Makefile
 #
-#   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -44,6 +44,14 @@ DIRLINK		= $(TOPDIR)/tools/link.sh
 DIRUNLINK	= $(TOPDIR)/tools/unlink.sh
 endif
 
+# This is the final executable
+
+ifeq ($(WINTOOL),y)
+  NUTTX		= "${shell cygpath -w $(TOPDIR)/nuttx}"
+else
+  NUTTX		= $(TOPDIR)/nuttx
+endif
+
 # Process architecture and board-specific directories
 
 ARCH_DIR	= arch/$(CONFIG_ARCH)
@@ -62,7 +70,7 @@ ADDON_DIRS	:= $(PCODE_DIR) $(NX_DIR)
 #   from the build if file descriptor support is disabled
 
 NONFSDIRS	= sched lib $(ARCH_SRC) mm examples/$(CONFIG_EXAMPLE) $(ADDON_DIRS)
-FSDIRS		= fs drivers
+FSDIRS		= fs drivers binfmt
 
 ifeq ($(CONFIG_NET),y)
 NONFSDIRS	+= net netutils
@@ -98,10 +106,21 @@ endif
 LINKLIBS	= sched/libsched$(LIBEXT) $(ARCH_SRC)/libarch$(LIBEXT) mm/libmm$(LIBEXT) \
 		  lib/liblib$(LIBEXT) examples/$(CONFIG_EXAMPLE)/lib$(CONFIG_EXAMPLE)$(LIBEXT)
 
-ifeq ($(CONFIG_NET),y)
-LINKLIBS	+= net/libnet$(LIBEXT) netutils/libnetutils$(LIBEXT) 
+# Add libraries for network support.  CXX, CXXFLAGS, and COMPILEXX must
+# be defined in Make.defs for this to work!
+
+ifeq ($(CONFIG_HAVE_CXX),y)
+LINKLIBS	+= libxx/liblibxx$(LIBEXT)
 endif
 
+# Add libraries for network support
+
+ifeq ($(CONFIG_NET),y)
+LINKLIBS	+= net/libnet$(LIBEXT) netutils/libnetutils$(LIBEXT)
+endif
+
+# Add libraries for file system support
+
 ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
 ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
 LINKLIBS	+= fs/libfs$(LIBEXT)
@@ -110,13 +129,17 @@ ifeq ($(CONFIG_NET),y)
 LINKLIBS	+= drivers/libdrivers$(LIBEXT)
 endif
 else
-LINKLIBS	+= fs/libfs$(LIBEXT) drivers/libdrivers$(LIBEXT)
+LINKLIBS	+= fs/libfs$(LIBEXT) drivers/libdrivers$(LIBEXT) binfmt/libbinfmt$(LIBEXT)
 endif
 
+# Add libraries for Pascall P-Code
+
 ifneq ($(PCODE_DIR),)
 LINKLIBS	+= $(PCODE_DIR)/libpcode$(LIBEXT)
 endif
 
+# Add libraries for the NX graphics sub-system
+
 ifneq ($(NX_DIR),)
 LINKLIBS	+= $(NX_DIR)/libnx$(LIBEXT)
 endif
@@ -129,7 +152,7 @@ endif
 BIN		= nuttx$(EXEEXT)
 
 all: $(BIN)
-.PHONY: clean context clean_context distclean
+.PHONY: context clean_context check_context subdir_clean clean subdir_distclean distclean
 
 # Build the mkconfig tool used to create include/nuttx/config.h
 tools/mkconfig:
@@ -188,6 +211,9 @@ sched/libsched$(LIBEXT): context
 lib/liblib$(LIBEXT): context
 	@$(MAKE) -C lib TOPDIR="$(TOPDIR)" liblib$(LIBEXT)
 
+libxx/liblibxx$(LIBEXT): context
+	@$(MAKE) -C libxx TOPDIR="$(TOPDIR)" liblibxx$(LIBEXT)
+
 $(ARCH_SRC)/libarch$(LIBEXT): context
 	@$(MAKE) -C $(ARCH_SRC) TOPDIR="$(TOPDIR)" libarch$(LIBEXT)
 
@@ -206,6 +232,9 @@ fs/libfs$(LIBEXT): context
 drivers/libdrivers$(LIBEXT): context
 	@$(MAKE) -C drivers TOPDIR="$(TOPDIR)" libdrivers$(LIBEXT)
 
+binfmt/libbinfmt$(LIBEXT): context
+	@$(MAKE) -C binfmt TOPDIR="$(TOPDIR)" libbinfmt$(LIBEXT)
+
 pcode/libpcode$(LIBEXT): context
 	@$(MAKE) -C pcode TOPDIR="$(TOPDIR)" libpcode$(LIBEXT)
 
@@ -227,13 +256,13 @@ ifeq ($(CONFIG_RRLOAD_BINARY),y)
 	fi
 endif
 ifeq ($(CONFIG_INTELHEX_BINARY),y)
-	@$(OBJCOPY) -O ihex $(TOPDIR)/$@ $(TOPDIR)/$@.ihx
+	@$(OBJCOPY) $(OBJCOPYARGS) -O ihex $(NUTTX)$(EXEEXT) $(NUTTX)$(EXEEXT).ihx
 endif
 ifeq ($(CONFIG_MOTOROLA_SREC),y)
-	@$(OBJCOPY) -O srec $(TOPDIR)/$@ $(TOPDIR)/$@.srec
+	@$(OBJCOPY) $(OBJCOPYARGS) -O srec $(NUTTX)$(EXEEXT) $(NUTTX)$(EXEEXT).srec
 endif
 ifeq ($(CONFIG_RAW_BINARY),y)
-	@$(OBJCOPY) -O binary $(TOPDIR)/$@ $(TOPDIR)/$@.bin
+	@$(OBJCOPY) $(OBJCOPYARGS) -O binary $(NUTTX)$(EXEEXT) $(NUTTX)$(EXEEXT).bin
 endif
 
 depend:
@@ -251,7 +280,7 @@ subdir_clean:
 	@$(MAKE) -C mm -f Makefile.test TOPDIR="$(TOPDIR)" clean
 
 clean: subdir_clean
-	@rm -f $(BIN) $(BIN).* mm_test *.map *~
+	@rm -f $(BIN) nuttx.* mm_test *.map *~
 
 subdir_distclean:
 	@for dir in $(CLEANDIRS) ; do \

ReleaseNotes

@@ -769,3 +769,192 @@ also numerous extensions to the NuttShell, NuttX APIs, and architecture ports.
 
 This tarball contains a complete CVS snapshot from December 6, 2008.
 
+nuttx-0.4.1
+^^^^^^^^^^^
+
+This is the 33rd release of NuttX.  This is a minor bugfix release.  The primary reason
+for this release is to correct numerous build errors that have accumulated for the ZiLOG
+ZDS-II based targets.  All ZDS-II targets now build correctly (but have not been re-tested).
+In addition to platform-specific build failures,  release also adds the following features
+which were not tested as of the time of the release:
+
+	* Board support fot the ZiLog ez80Acclaim! ez80f910200zco Development Kit
+	* ZiLOG eZ80F91 EMAC driver
+
+These changes were verified only on the NuttX simulation platform. Please report any errors
+to me.
+
+This tarball contains a complete CVS snapshot from Februrary 6, 2009.
+
+nuttx-0.4.2
+^^^^^^^^^^^
+
+This is the 34th release of NuttX.  This release adds no new OS features but does include
+support for two new architectures:
+
+	* ez80Acclaim!  Basic support has been integrated and verified for the ez80f910200zcog-d
+	  board (eZ80F91-based).  That basic support includes timer interrupts and serial
+	  console.  Ongoing work includes an EMAC driver that should be integrated for
+	  the next release nuttx-0.4.2.
+
+	  eZ80Acclaim! support has been in the code base for some time, but has only just
+	  been integrated due to toolchain issues.
+
+	* Renesas M16C/20.  Support for the Renesas SKP16C20 board has been included in
+	  the NuttX source tree.  However, as the eZ80Acclaim!, testing and integration
+	  of that port is stalled due to toolchain issues.
+
+These changes were verified only on the ZiLOG eZ80910200zcog-d board. Please report any errors
+to me.
+
+This tarball contains a complete CVS snapshot from Februrary 28, 2009.
+
+nuttx-0.4.3
+^^^^^^^^^^^
+
+This is the 35th release of NuttX.  This release one important new OS feature and corrects
+and extends the eZ80 port:
+
+	* Priority Inheritance.  The basic NuttX waiting logic was extended to
+	  support priority inheritance. See the NuttX User Manual for further
+	  information: http://www.nuttx.org/NuttxUserGuide.html#priorityinheritance.
+	* ez80Acclaim! Corrected several critical, show-stopping bugs on that
+	  platform including: Errors in the serial driver intrrupts and an error
+	  in the eZ80 table,.
+	* eZ80Acclaim!: Completed integration of the eZ80F91 EMAC driver.
+
+These changes were verified only on the ZiLOG eZ80910200zcog-d board and on Cygwin-based
+simulation platform in various configurations. Please report any errors to me.
+
+This tarball contains a complete CVS snapshot from March 13, 2009.
+
+nuttx-0.4.4
+^^^^^^^^^^^
+
+This is the 36th release of NuttX.  This release focuses on bugfixes and extending
+and verifying certain networking features.
+
+	* Important bugs were fixed in NSH, UDP checksum calculation, UDP bind()
+	  behavior for port==0, the eZ80Acclaim! EMAC driver, Z80 interrupt handling,
+	  and in the C libraries.
+	* Testing was extended to further verify the tiny webserver, DHCPD, wget(),
+	  and sendmail.
+
+See the Changelog for a detailed description of these changes.
+
+These changes were verified only on the ZiLOG eZ80910200zcog-d board using the
+ZDS-II toolchain in Cygwin-based environment. Please report any errors to me.
+
+This tarball contains a complete CVS snapshot from March 29, 2009.
+
+nuttx-0.4.5
+^^^^^^^^^^^
+
+This is the 37th release of NuttX.  This release focuses on a few new features.
+
+	* The basic port for the FreeScale ARM920T i.MX1 processor on the
+	  Freescale MX1ADS board.  Coding is complete for this port, but it is
+	  has not yet fully integrated
+	* Extended I2C and SPI interface definitions
+	* Add basic support for C++ applications.  Very simple C++ applications
+	  can now be built against NuttX without any external libraries.  At
+	  present, only the most primitive C++ programs are supported, but it
+	  is hoped that this support will be extended in future releases.
+
+See the Changelog for a detailed description of these changes.
+
+This tarball contains a complete CVS snapshot from April 19, 2009.
+
+nuttx-0.4.6
+^^^^^^^^^^^
+
+This is the 38th release of NuttX.  The release features support for the Micromint
+Eagle-100 development board.  This board is based around, the Luminary LM3S6918 MCU.
+This is the first ARM Cortex-M3 architecture supported by Nuttx. This initial, basic
+port includes timer and serial console with configurations to execute the NuttX OS
+test and to run the NuttShell (NSH). Work is still underway on this port and current
+plans are to have I2C, SSI, MMC/SD, and and Ethernet driver in the 0.4.7 release.
+
+Additional work was done on the MXADS i.MX1 port, however, that work has been set
+aside until I complete work on the Eagle-100 (I also need to come up with a 3V power
+supply).
+
+Other changes in this release include: Extensions to the SPI interface definition
+in order to handle 9-bit interfaces to displays.  Several bugs were fixed (see the
+ChangeLog for a complete list of changes).
+
+This tarball contains a complete CVS snapshot from May 19, 2009.
+
+nuttx-0.4.7
+^^^^^^^^^^^
+
+This is the 39th release of NuttX.  This release focuses on cleaning up and
+extending the Eagle100/LM3S6918 port released in nuttx-0.4.6 and on improved
+MMC/SD support.  New features include:
+
+  o Improved reliably and additional drivers for the Eagle-100 board (LM3S6918
+    ARM Cortex-M3).  Additional drivers include Ethernet, SSI, and support for
+    the on-board LEDs and microSD cards.
+  o The SPI-based MMC/SD driver was extended to support SDHC Version 2.xx cards.
+
+In addition, this release includes several important bugfixes for the LM3S6918,
+the LPC2148, the SPI-based MMC/SD driver, and to FAT32.  See the ChangeLog for
+details of these bugfixes.
+
+This tarball contains a complete CVS snapshot from May 29, 2009.
+
+nuttx-0.4.8
+^^^^^^^^^^^
+
+This is the 40th release of NuttX.  This release adds:
+
+  o Support for the Olimex STRP711 board.  That board is based on the STMicro
+    STR711 MCU (ARM7TDMI). Integration is complete on the basic port (boot logic,
+    system time, serial console). Two configurations have been verified: (1) The
+    board boots and passes the OS test with console output visible on UART0, and
+    the NuttShell (NSH) is fully functional with interrupt driven serial console. 
+    An SPI driver is available but untested (because the Olimex card slot appears
+    to accept only MMC cards; I have only SD cards).  Additional needed: USB and
+    driver, MMC integration.
+
+  o Support for the CodeSourcery and devkitARM Windows-native GNU toolchains.
+    Makefiles have been modified for the LM3S6918, LPC2148, and STR711 to support
+    these toolchains under Cygwin.
+
+This tarball contains a complete CVS snapshot from June 13, 2009.
+
+nuttx-0.4.9
+^^^^^^^^^^^
+
+This is the 41st release of NuttX.  This release adds:
+
+	* Support for a new binary format call NXFLAT that can be used to 
+	  execute separately linked programs in place in a file system.
+	  See http://www.nuttx.org/NuttXNxFlat.html.
+
+	* Several important bugs were files related to networking and ROMFS
+	  (see the ChangeLog for a complete list).
+
+This tarball contains a complete CVS snapshot from June 26, 2009.
+
+nuttx-0.4.10
+^^^^^^^^^^^
+
+This is the 42nd release of NuttX.  This released focused on the port of Jeff
+Poskanzer's THTTPD HTTP server (see http://acme.com/software/thttpd/.).  As of
+the 0.4.10 release, that port is still not fully complete and functional.
+However, numerous related bug-fixes and functional additions for THTTPD were
+added:
+
+	* Several new standard C-library functions (fileno, strstr, strpbrk, fcntl).
+	* Improved and extended timing APIs (mktime, gmtime, gmtime_r, gettimeofday,
+	  localtime, localtime_r, and strftime)
+	* Networking enhancements: recvfrom and accept now work with non-blocking
+	  sockets.
+	* NXFLAT extensions (exec)
+	* Pattern matching logic.
+	* And miscellaneous bug fixes (see the ChangeLog for details).
+
+This tarball contains a complete CVS snapshot from August 8, 2009.
+
+

TODO

@@ -1,30 +1,33 @@
-NuttX TODO List (Last updated November 20, 2008)
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+NuttX TODO List (Last updated August 8, 2009)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-  (7)  Task/Scheduler (sched/)
-  (1)  Dynamic loader (N/A)
+  (5)  Task/Scheduler (sched/)
   (2)  Memory Managment (mm/)
   (1)  Signals (sched/, arch/)
   (1)  pthreads (sched/)
   (1)  C++ Support
- (12)  Network (net/, netutils/)
+  (5)  Binary loaders (binfmt/)
+ (15)  Network (net/, netutils/)
   (1)  USB (drivers/usbdev)
   (4)  Libraries (lib/)
-  (6)  File system/Generic drivers (fs/, drivers/)
+  (8)  File system/Generic drivers (fs/, drivers/)
   (2)  Graphics subystem (graphics/)
   (1)  Pascal add-on (pcode/)
-  (2)  Documentation (Documentation/)
-  (5)  Build system
-  (2)  NuttShell (NSH) (examples/nsh)
-  (1)  Other Applications & Tests (examples/)
-  (1)  Linux/Cywgin simulation (arch/sim)
-  (2)  ARM (arch/arm/)
+  (1)  Documentation (Documentation/)
+  (6)  Build system / Toolchains
+  (3)  NuttShell (NSH) (examples/nsh)
+  (3)  Other Applications & Tests (examples/)
+  (2)  Linux/Cywgin simulation (arch/sim)
+  (3)  ARM (arch/arm/)
   (1)  ARM/C5471 (arch/arm/src/c5471/)
   (3)  ARM/DM320 (arch/arm/src/dm320/)
-  (6)  ARM/LPC214x (arch/arm/src/lpc214x/)
+  (2)  ARM/i.MX (arch/arm/src/imx/)
+  (8)  ARM/LPC214x (arch/arm/src/lpc214x/)
   (3)  ARM/STR71x (arch/arm/src/str71x/)
+  (3)  ARM/LM3S6918 (arch/arm/src/lm3s/)
   (4)  pjrc-8052 / MCS51 (arch/pjrc-8051/)
-  (1)  SH-1 (arch/sh)
+  (2)  Hitachi/Renesas SH-1 (arch/sh/src/sh1)
+  (4)  Renesas M16C/26 (arch/sh/src/m16c)
   (8)  z80/z8/ez80 (arch/z80/)
   (8)  z16 (arch/z16/)
 
@@ -52,30 +55,11 @@ o Task/Scheduler (sched/)
   Status:      Open
   Priority:    Low
 
-  Description: Implement priority inheritance
-  Status:      Open
-  Priority:    Medium, this is a good feature for realtime systems.
-
   Description: Several APIs do not set errno.  Need to review all APIs.
   Status:      Open
   Priority:    Medium, required for standard compliance (but makes the
                code bigger)
 
-  Description: socket descriptors are not cloned as are file descriptors
-               by task_create().
-  Status:      Open
-  Priority:    Medium-to-High
-
-o Dynamic Loader
-  ^^^^^^^^^^^^^^
-
-  Description: At some point in the future, I intend to port the XFLAT
-               dynamic loader into NuttX (see http://xflat.sourceforge.net/).
-               That would allow NuttX to dynamically load and link
-               external code in a mounted filesystem.
-  Status:      Open
-  Priority:    Low, Nice feature and I might do it someday
-
 o Memory Managment (mm/)
   ^^^^^^^^^^^^^^^^^^^^^^
 
@@ -119,12 +103,46 @@ o C++ Support
                constructor logic will probably have to be performed by
                user logic in user_start().
 
+o Binary loaders (binfmt/)
+  ^^^^^^^^^^^^^^^^^^^^^^^^
+
+  Description: Not all of the NXFLAT test under examples/nxflat are working.
+               Most simply do not compile yet.  tests/mutex runs okay but
+               outputs garbage on completion.
+  Status:      Open
+  Priority:    High
+
+  Description: The ARM up_getpicbase() does not seem to work.  This means
+               the some features like wdog's might not work in NXFLAT modules.
+  Status:      Open
+  Priority:    Medium-High
+
+  Description: At present, all .rodata must be put into RAM.  There is a 
+               tentative design change that might allow .rodata to be placed
+               in FLASH (see Documentation/NuttXNxFlat.html).
+  Status:      Open
+  Priority:    Medium
+
+  Description: If the function pointer to a statically defined function is
+               taken, then GCC generates a relocation that cannot be handled
+               by NXFLAT.  There is a solution described in Documentataion/NuttXNxFlat.html,
+               by that would require a compiler change (which we want to avoid).
+               The simple workaround is to make such functions global in scope.
+  Status:      Open
+  Priority:    Low (probably will not fix)
+
+  Description: In the NXFLAT symbol tables... Using a 32-bit hash value instead
+               of a string to identify a symbol should result in a smaller footprint.
+  Status:      Open
+  Priority:    Low
+
 o Network (net/, netutils/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^
 
-  Description: Several of the netutils/ apps are untested.  These include
-               uIP's netutils/smtp, dhcpd, resolv, webclient.  Only minimal
-               testing of the others has been performed.
+  Description: One critical part of netutils/ apps is untested: The uIP
+               resolver in netutils/resolv.  The webclient code has been
+               tested on host using gethosbyname(), but still depends on the
+               untested resolve logic.
   Status:      Open
   Priority:    Medium, Important but not core NuttX functionality
 
@@ -216,6 +234,18 @@ o Network (net/, netutils/)
   Status:      Open, depends on UDP read-ahead support
   Priority:    Medium
 
+  Description: sockets do not support all modes except for O_NONBLOCK. Sockets
+               support only (1) TCP/IP non-blocking read operations when read-ahead
+	       buffering is enabled, and (2) TCP/IP accept() operations when TCP/IP
+	       connection backlog is enabled.
+  Status:      Open
+  Priority:    Low.
+
+  Description: THTTPD is included in the source tree, but has not yet been fully
+               integrated.
+  Status:      Open
+  Priority:    High
+
 o USB (drivers/usbdev)
   ^^^^^^^^^^^^^^^^^^^^
 
@@ -289,16 +319,22 @@ o File system / Generic drivers (fs/, drivers/)
   Priority:    Low.  I have mixed feelings about if NuttX should pay a
                performance penalty for better data integrity.
 
-  Description: FAT: FAT32 is untested -- because I don't have any large
-               enough devices yet to support a FAT32 FS.
-  Status:      Open
-  Priority:    Medium
-
   Description: The simple SPI based MMCS/SD driver in fs/mmcsd does not
                yet handle multiple block transfers.
   Status:      Open
   Priority:    Medium-Low
 
+  Description: At present, mmap() only works with file descriptors associated
+               with a ROMFS file system.  Generalize this logic so that if
+               mmap is not supported by the file system or block driver, it
+               will allocate memory and copy the file into RAM.  This would
+               need some centralized logic so that the memory region would
+               be shared on later mmap()'s on the same inode.  Reference counting
+               would be required so that the multiply mmap()'ed region persists
+               until the last munmap().
+  Status:      Open
+  Priority:    Low
+
 o Graphics subystem (graphics/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -330,11 +366,8 @@ o Pascal Add-On (pcode/)
 o Documentation (Documentation/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-  Description: Document driver/ logic
-  Status:      Open
-  Priority:    Low
-
-  Description: Document C-library APIs
+  Description: Need to document which APIs can be used in interrupt
+               handlers (like mq_send and sem_post) and which cannot.
   Status:      Open
   Priority:    Low
 
@@ -367,6 +400,12 @@ o Build system
   Status:      Open
   Priority:    Medium-low
 
+  Description: At present, NuttX builds only under Linux or Cygwin.
+               Investigate the possibility of a native Windows build using
+               something like the GNUWin32 tools (coreutils+make+grep+sed+uname).
+  Status:      Open
+  Priority:    Low
+
 o NuttShell (NSH) (examples/nsh)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -377,8 +416,15 @@ o NuttShell (NSH) (examples/nsh)
   Status:      Open
   Priority:    Low
 
-  Description: Here are some commands that would be good to have in NSH:
-               ping
+  Description: The wget command has been incorporated into NSH, however
+               it is still untested as of this writing (only because I
+               have not had the correct network setup for the testing
+               yet).  Since wget depends on the also untest uIP resolv/
+               logic, it is like non-functional.
+  Status:      Open
+  Priority:    Med-High
+
+  Description: Add support to NSH to run NXFLAT programs from a ROMFS file system
   Status:      Open
   Priority:    Low
 
@@ -388,6 +434,19 @@ o Other Applications & Tests (examples/)
   Description: The redirection test (part of examples/pipe) terminates
                incorrectly on the Cywgin-based simulation platform (but works
                fine on the Linux-based simulation platform).
+  Status:      Open
+  Priority:    Low
+
+  Description: examples/wget is untested on the target (it has been tested
+               on the host, but not in the target using the uIP resolv logic).
+  Status:      Open
+  Priority:    Med
+
+  Description: examples/sendmail is untested on the target (it has been tested
+               on the host, but not on the target.
+  Status:      Open
+  Priority:    Med
+
 
 o Linux/Cywgin simulation (arch/sim)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -400,22 +459,37 @@ o Linux/Cywgin simulation (arch/sim)
   Status:      Open
   Priority:    Low (because the simulator is only a test/development platform)
 
+  Description: Simulator does not build correctly on 64-bit machines.  Two
+               issues:
+               1) It saves addresses in 32-bit types and these fail when cast
+                  to pointers on a 64-bit host.
+               2) up_setjmp.S does not build
+  Status:      Open
+  Priority:    Medium and increasing (as 32-bit hosts gradually disappear)
+
 o ARM (arch/arm/)
   ^^^^^^^^^^^^^^^
 
-  Description: ARM interrupt handling performance could be improved in many
-               ways.  One easy way is to use a pointer to the context save
+  Description: ARM interrupt handling performance could be improved in some
+               ways. One easy way is to use a pointer to the context save
                area in current_regs instead of using up_copystate so much.
-               see handling of 'current_regs" in arch/sh/src/common/* for
+               see handling of 'current_regs" in arch/arm/src/cortexm3/* for
                examples of how this might be done.
+                Status:      Open
+  Priority:    Low
+
+  Description: The ARM and Cortex-M3 interrupt handlers restores all regisers
+               upon return. This could be improved as well:  If there is no
+               context switch, then the static registers need not be restored
+               because they will not be modified by the called C code.
+               (see arch/sh/src/sh1/sh1_vector.S for example)
   Status:      Open
   Priority:    Low
 
-  Description: The ARM interrupt handler restores all regisers upon return.
-               This could be improved as well:  If there is not context
-               switch, then the static registers need not be restored
-               because they will not be modified by the called C code.
-               (see arch/sh/src/sh1/sh1_vector.S for example)
+  Description: The Cortex-M3 user context swich logic uses SVCall instructions.
+               This user context switching time could be improved by eliminating
+               the SVCalls and developing assembly language implementations
+               of the context save and restore logic.
   Status:      Open
   Priority:    Low
 
@@ -452,6 +526,19 @@ o ARM/DM320 (arch/arm/src/dm320/)
   Status:      Open
   Priority:    Medium (high if you need to use the framebuffer driver)
 
+o ARM/i.MX (arch/arm/src/imx/)
+  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+  Description: The basic port of the i.MX1 architecuture is underway.  The port
+               is incomplete (as of this writing, is still lacks a timer, interrupt
+               decoding, USB, network) and untested.
+  Status:      Open (and in work)
+  Priority:    Medium (high if you need i.MX1/L support)
+
+  Description: SPI methods are not thread safe.  Needs a semaphore to protect from re-entrancy.
+  Status:      Open
+  Priority:    Medium -- Will be very high if you do SPI access from multiple threads.
+
 o ARM/LPC214x (arch/arm/src/lpc214x/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -478,9 +565,16 @@ o ARM/LPC214x (arch/arm/src/lpc214x/)
   Priority:    High
 
   Description: At present the SPI driver is polled.  Should it be interrupt driven?
+               Look at arch/arm/src/imx/imx_spi.c -- that is a good example of an
+               interrupt driven SPI driver.  Should be very easy to part that architecture
+               to the LPC.
   Status:      Open
   Priority:    Medium
 
+  Description: SPI methods are not thread safe.  Needs a semaphore to protect from re-entrancy.
+  Status:      Open
+  Priority:    Medium -- Will be very high if you do SPI access from multiple threads.
+
   Description: At present the SPI driver is polled -AND- there is a rather large, arbitrary,
                delay in one of the block access routines.  The purpose of the delay is to
                avoid a race conditions.  This begs for a re-design -OR- at a minimum, some
@@ -488,22 +582,49 @@ o ARM/LPC214x (arch/arm/src/lpc214x/)
   Status:      Open
   Priority:    Medium
 
+  Desription:  I am unable to initialize a 2Gb SanDisk microSD card (in adaptor) on the
+               the mcu123 board.  The card fails to accept CMD0.  Doesn't seem like a software
+               issue, but if anyone else sees the problem, I'd like to know.
+  Status:      Open
+  Priority:    Uncertain
+
 o ARM/STR71x (arch/arm/src/str71x/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-  Description: Basic port is complete but untested.  Complete integration
-  Status:      Open
-  Priority:    High
-
-  Description: Add SPI driver and integrate with MMC/SD support.
+  Description: Verify SPI driver and integrate with MMC support. This effort is stalled
+               at the moment because the slot on the Olimex board only accepts MMC card;
+               I have no MMC cards, only SD cards which won't fit into the slot.
   Status:      Open
   Priority:    Medium
 
-  Description: Develop a USB driver and integrate with existing USB serial
-               and storage class drivers.
+  Description: Develop a USB driver and integrate with existing USB serial and storage
+               class drivers.
   Status:      Open
   Priority:    Medium
 
+  Description: SPI methods are not thread safe.  Needs a semaphore to protect from re-entrancy.
+  Status:      Open
+  Priority:    Medium -- Will be very high if you do SPI access from multiple threads.
+
+o ARM/LM3S6918 (arch/arm/src/lm3s/)
+  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+  Description: Still need to implement I2C
+  Status:      Open
+  Priority:    Low
+
+  Description: Should terminate SSI/SPI transfer if an Rx FIFO overrun occurs.
+               Right now, if an Rx FIFO overrun occurs, the SSI driver hangs.
+  Status:      Open
+  Priority:    Medium, If the transfer is properly tuned, then there should not
+               be any Rx FIFO overruns.
+
+  Description: Dependency generation is currently disabled when a Windows native
+               toolchain is used.  I think that the only issue is that all of the
+               Windows dependencies needed to be quoted in the Make.dep files.
+  Status:      Open
+  Priority:    Low -- unless some dependency-related build issues is discovered.
+
 o pjrc-8052 / MCS51 (arch/pjrc-8051/)
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -540,8 +661,8 @@ o pjrc-8052 / MCS51 (arch/pjrc-8051/)
   Priority:    Low -- only because there as so many other issues with 8051
 
 
-o SH-1 (arch/sh)
-  ^^^^^^^^^^^^^^
+o Hitachi/Renesas SH-1 (arch/sh/src/sh1)
+  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
   Description:  There are instabilities that make the SH-1 port un-usable.  The
                 nature of these is not understood; the behavior is that certain SH-1
@@ -563,6 +684,42 @@ o SH-1 (arch/sh)
   Priority:     Low -- because the SH-1, SH7032, is very old and only of historical
                 interest.
 
+  Description:  arch/sh has been restructured to support M16C.  Need to verify that
+                SH-1 still builds.
+  Status:       Open
+  Priority:     Low
+
+  Description:  The M16C target cannot be built.  The GNU m16c-elf-ld link fails with 
+                the following message:
+
+                m32c-elf-ld: BFD (GNU Binutils) 2.19 assertion fail /home/Owner/projects/nuttx/buildroot/toolchain_build_m32c/binutils-2.19/bfd/elf32-m32c.c:482
+
+                Where the reference line is:
+
+                /* If the symbol is out of range for a 16-bit address,
+                   we must have allocated a plt entry.  */
+                BFD_ASSERT (*plt_offset != (bfd_vma) -1);
+
+                No workaround is known at this time.
+  Status:       Open
+  Priority:     High -- this is a show stopper for M16C.
+
+o Renesas M16C/26 (arch/sh/src/m16c)
+  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+  Description: Coding of the initial port is complete, but is untested.
+  Status:      Open
+  Priority:    Low
+
+  Description: Serial drivers were developed for the M16C, however, the SKP16C26
+               StarterKit has no serial connectors.
+  Status:      Open
+  Priority:    Low
+
+  Description: Should implement SPI, I2C, Virual EEPROM, FLASH, RTC drivers
+  Status:      Open
+  Priority:    Medium
+
 o z80/z8/ez80 (arch/z80)
  ^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -631,6 +788,22 @@ o z80/z8/ez80 (arch/z80)
   Status:      Open
   Priority:    High if you happen to be working with XTRS.
 
+  Description: A "generic" SPI and I2C drivers have been coded for the eZ80Acclaim!
+               However, these remains untested since I have no SPI or I2C devices for
+               the board (yet).
+  Status:      Open
+  Priority:    Med
+
+  Description: SPI methods are not thread safe.  Needs a semaphore to protect from re-entrancy.
+  Status:      Open
+  Priority:    Medium -- Will be very high if you do SPI access from multiple threads.
+
+  Description: A "generic" I2C driver has been coded for the eZ8Encore!
+               However, this remains untested since I have no I2C devices for
+               the board (yet).
+  Status:      Open
+  Priority:    Med
+
 o z16 (arch/z16)
 ^^^^^^^^^^^^^^^^
 

arch/arm/include/arch.h

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/include/arch.h
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -48,6 +48,41 @@
  * Definitions
  ****************************************************************************/
 
+/* This identifies the register the is used by the processor as the PIC base
+ * register.  It is usually r9 or r10
+ */
+
+#define PIC_REG         r10
+#define PIC_REG_STRING "r10"
+
+/* Macros to get and set the PIC base register.  picbase is assumed to be
+ * of type (void*) and that it will fit into a uint32.  These must be
+ * inline so that they will be compatible with the ABIs rules for
+ * preserving the PIC register
+ */
+
+#define up_getpicbase(ppicbase) \
+do { \
+  uint32 picbase; \
+  __asm__ \
+  ( \
+    "\tmov %0, " PIC_REG_STRING "\n\t" \
+    : "=r"(picbase) \
+  ); \
+  *ppicbase = (FAR void*)picbase; \
+} while (0)
+
+#define up_setpicbase(picbase) \
+do { \
+  uint32 _picbase = (uint32)picbase; \
+  __asm__ \
+  ( \
+    "\tmov " PIC_REG_STRING ", %0\n\t" \
+    : : "r"(_picbase) : PIC_REG_STRING \
+  ); \
+} while (0)
+
+
 /****************************************************************************
  * Inline functions
  ****************************************************************************/

arch/arm/include/arm/irq.h

@@ -0,0 +1,235 @@
+/****************************************************************************
+ * arch/arm/include/arm/irq.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_ARM_IRQ_H
+#define __ARCH_ARM_INCLUDE_ARM_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/irq.h>
+#include <sys/types.h>
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* IRQ Stack Frame Format:
+ *
+ * Context is always saved/restored in the same way:
+ *
+ *   (1) stmia rx, {r0-r14}
+ *   (2) then the PC and CPSR
+ *
+ * This results in the following set of indices that
+ * can be used to access individual registers in the
+ * xcp.regs array:
+ */
+
+#define REG_R0              (0)
+#define REG_R1              (1)
+#define REG_R2              (2)
+#define REG_R3              (3)
+#define REG_R4              (4)
+#define REG_R5              (5)
+#define REG_R6              (6)
+#define REG_R7              (7)
+#define REG_R8              (8)
+#define REG_R9              (9)
+#define REG_R10             (10)
+#define REG_R11             (11)
+#define REG_R12             (12)
+#define REG_R13             (13)
+#define REG_R14             (14)
+#define REG_R15             (15)
+#define REG_CPSR            (16)
+
+#define XCPTCONTEXT_REGS    (17)
+#define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
+
+#define REG_A1              REG_R0
+#define REG_A2              REG_R1
+#define REG_A3              REG_R2
+#define REG_A4              REG_R3
+#define REG_V1              REG_R4
+#define REG_V2              REG_R5
+#define REG_V3              REG_R6
+#define REG_V4              REG_R7
+#define REG_V5              REG_R8
+#define REG_V6              REG_R9
+#define REG_V7              REG_R10
+#define REG_SB              REG_R9
+#define REG_SL              REG_R10
+#define REG_FP              REG_R11
+#define REG_IP              REG_R12
+#define REG_SP              REG_R13
+#define REG_LR              REG_R14
+#define REG_PC              REG_R15
+
+/* The PIC register is usually R10. It can be R9 is stack checking is enabled
+ * or if the user changes it with -mpic-register on the GCC command line.
+ */
+
+#define REG_PIC             REG_R10
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* This struct defines the way the registers are stored.  We
+ * need to save:
+ *
+ *  1	CPSR
+ *  7	Static registers, v1-v7 (aka r4-r10)
+ *  1	Frame pointer, fp (aka r11)
+ *  1	Stack pointer, sp (aka r13)
+ *  1	Return address, lr (aka r14)
+ * ---
+ * 11	(XCPTCONTEXT_USER_REG)
+ *
+ * On interrupts, we also need to save:
+ *  4	Volatile registers, a1-a4 (aka r0-r3)
+ *  1	Scratch Register, ip (aka r12)
+ *---
+ *  5	(XCPTCONTEXT_IRQ_REGS)
+ *
+ * For a total of 17 (XCPTCONTEXT_REGS)
+ */
+
+#ifndef __ASSEMBLY__
+struct xcptcontext
+{
+  /* The following function pointer is non-zero if there
+   * are pending signals to be processed.
+   */
+
+#ifndef CONFIG_DISABLE_SIGNALS
+  void *sigdeliver; /* Actual type is sig_deliver_t */
+
+  /* These are saved copies of LR and CPSR used during
+   * signal processing.
+   */
+
+  uint32 saved_pc;
+  uint32 saved_cpsr;
+#endif
+
+  /* Register save area */
+
+  uint32 regs[XCPTCONTEXT_REGS];
+};
+#endif
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Save the current interrupt enable state & disable IRQs */
+
+static inline irqstate_t irqsave(void)
+{
+  unsigned int flags;
+  unsigned int temp;
+  __asm__ __volatile__
+    (
+     "\tmrs    %0, cpsr\n"
+     "\torr    %1, %0, #128\n"
+     "\tmsr    cpsr_c, %1"
+     : "=r" (flags), "=r" (temp)
+     :
+     : "memory");
+  return flags;
+}
+
+/* Restore saved IRQ & FIQ state */
+
+static inline void irqrestore(irqstate_t flags)
+{
+  __asm__ __volatile__
+    (
+     "msr    cpsr_c, %0"
+     :
+     : "r" (flags)
+     : "memory");
+}
+
+static inline void system_call(swint_t func, int parm1,
+			       int parm2, int parm3)
+{
+  __asm__ __volatile__
+    (
+     "mov\tr0,%0\n\t"
+     "mov\tr1,%1\n\t"
+     "mov\tr2,%2\n\t"
+     "mov\tr3,%3\n\t"
+     "swi\t0x900001\n\t"
+     :
+     : "r" ((long)(func)),  "r" ((long)(parm1)),
+       "r" ((long)(parm2)), "r" ((long)(parm3))
+     : "r0", "r1", "r2", "r3", "lr");
+}
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_ARM_IRQ_H */
+

arch/arm/include/cortexm3/irq.h

@@ -0,0 +1,296 @@
+/****************************************************************************
+ * arch/arm/include/cortexm3/irq.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_CORTEXM3_IRQ_H
+#define __ARCH_ARM_INCLUDE_CORTEXM3_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/irq.h>
+#include <sys/types.h>
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* IRQ Stack Frame Format: */
+
+/* On entry into an IRQ, the hardware automatically saves the following
+ * registers on the stack in this (address) order:
+ */
+
+#define REG_XPSR            (17) /* xPSR */
+#define REG_R15             (16) /* R15 = PC */
+#define REG_R14             (15) /* R14 = LR */
+#define REG_R12             (14) /* R12 */
+#define REG_R3              (13) /* R3 */
+#define REG_R2              (12) /* R2 */
+#define REG_R1              (11) /* R1 */
+#define REG_R0              (10) /* R0 */
+
+#define HW_XCPT_REGS        (8)
+#define HW_XCPT_SIZE        (4 * HW_XCPT_REGS)
+
+/* The following additional registers are stored by the interrupt handling
+ * logic.
+ */
+
+#define REG_R11             (9) /* R11 */
+#define REG_R10             (8) /* R10 */
+#define REG_R9              (7) /* R9 */
+#define REG_R8              (6) /* R8 */
+#define REG_R7              (5) /* R7 */
+#define REG_R6              (4) /* R6 */
+#define REG_R5              (3) /* R5 */
+#define REG_R4              (2) /* R4 */
+#define REG_PRIMASK         (1) /* PRIMASK */
+#define REG_R13             (0) /* R13 = SP at time of interrupt */
+
+#define SW_XCPT_REGS        (10)
+#define SW_XCPT_SIZE        (4 * SW_XCPT_REGS)
+
+#define XCPTCONTEXT_REGS    (HW_XCPT_REGS + SW_XCPT_REGS)
+#define XCPTCONTEXT_SIZE    (HW_XCPT_SIZE + SW_XCPT_SIZE)
+
+#define REG_A1              REG_R0
+#define REG_A2              REG_R1
+#define REG_A3              REG_R2
+#define REG_A4              REG_R3
+#define REG_V1              REG_R4
+#define REG_V2              REG_R5
+#define REG_V3              REG_R6
+#define REG_V4              REG_R7
+#define REG_V5              REG_R8
+#define REG_V6              REG_R9
+#define REG_V7              REG_R10
+#define REG_SB              REG_R9
+#define REG_SL              REG_R10
+#define REG_FP              REG_R11
+#define REG_IP              REG_R12
+#define REG_SP              REG_R13
+#define REG_LR              REG_R14
+#define REG_PC              REG_R15
+
+/* The PIC register is usually R10. It can be R9 is stack checking is enabled
+ * or if the user changes it with -mpic-register on the GCC command line.
+ */
+
+#define REG_PIC             REG_R10
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* The following structure is included in the TCB and defines the complete
+ * state of the thread.
+ */
+
+#ifndef __ASSEMBLY__
+struct xcptcontext
+{
+  /* The following function pointer is non-zero if there
+   * are pending signals to be processed.
+   */
+
+#ifndef CONFIG_DISABLE_SIGNALS
+  void *sigdeliver; /* Actual type is sig_deliver_t */
+
+  /* These are saved copies of LR, PRIMASK, and xPSR used during
+   * signal processing.
+   */
+
+  uint32 saved_pc;
+  uint32 saved_primask;
+  uint32 saved_xpsr;
+#endif
+
+  /* Register save area */
+
+  uint32 regs[XCPTCONTEXT_REGS];
+};
+#endif
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Save the current primask state & disable IRQs */
+
+static inline irqstate_t irqsave(void)
+{
+  unsigned short primask;
+
+  /* Return the current value of primask register and set
+   * bit 0 of the primask register to disable interrupts
+   */
+
+  __asm__ __volatile__
+    (
+     "\tmrs    %0, primask\n"
+     "\tcpsid  i\n"
+     : "=r" (primask)
+     :
+     : "memory");
+  return primask;
+}
+
+/* Restore saved primask state */
+
+static inline void irqrestore(irqstate_t primask)
+{
+  /* If bit 0 of the primask is 0, then we need to restore
+   * interupts.
+   */
+
+  __asm__ __volatile__
+    (
+      "\ttst    %0, #1\n"
+      "\tbne    1f\n"
+      "\tcpsie  i\n"
+      "1:\n"
+      :
+      : "r" (primask)
+      : "memory");
+}
+
+/* Get/set the primask register */
+
+static inline ubyte getprimask(void)
+{
+  uint32 primask;
+  __asm__ __volatile__
+    (
+     "\tmrs  %0, primask\n"
+     : "=r" (primask)
+     :
+     : "memory");
+  return (ubyte)primask;
+}
+
+static inline void setprimask(uint32 primask)
+{
+  __asm__ __volatile__
+    (
+      "\tmsr primask, %0\n"
+      :
+      : "r" (primask)
+      : "memory");
+}
+
+/* Get/set the basepri register */
+
+static inline ubyte getbasepri(void)
+{
+  uint32 basepri;
+  __asm__ __volatile__
+    (
+     "\tmrs  %0, basepri\n"
+     : "=r" (basepri)
+     :
+     : "memory");
+  return (ubyte)basepri;
+}
+
+static inline void setbasepri(uint32 basepri)
+{
+  __asm__ __volatile__
+    (
+      "\tmsr basepri, %0\n"
+      :
+      : "r" (basepri)
+      : "memory");
+}
+
+/* Get IPSR */
+
+static inline uint32 getipsr(void)
+{
+  uint32 ipsr;
+  __asm__ __volatile__
+    (
+     "\tmrs  %0, ipsr\n"
+     : "=r" (ipsr)
+     :
+     : "memory");
+  return ipsr;
+}
+
+/* SVC system call */
+
+static inline void svcall(uint32 cmd, uint32 arg)
+{
+  __asm__ __volatile__
+    (
+      "\tmov  r0, %0\n"
+      "\tmov  r1, %1\n"
+      "\tsvc  0\n"
+      :
+      : "r" (cmd), "r" (arg)
+      : "memory");
+}
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_CORTEXM3_IRQ_H */
+

arch/arm/include/imx/irq.h

@@ -0,0 +1,164 @@
+/****************************************************************************
+ * arch/arm/include/imx/irq.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_IMX_IRQ_H
+#define __ARCH_ARM_INCLUDE_IMX_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* i.MX1 Interrupts */
+
+#ifndef CONFIG_ARCH_CHIP_IMXL
+#  define IMX_IRQ_UART3PFERR         ( 0)
+#  define IMX_IRQ_UART3RTS           ( 1)
+#  define IMX_IRQ_UART3DTR           ( 2)
+#  define IMX_IRQ_UART3UARTC         ( 3)
+#  define IMX_IRQ_UART3TX            ( 4)
+#  define IMX_IRQ_PENUP              ( 5)
+#endif
+#define IMX_IRQ_CSI                  ( 6)
+#define IMX_IRQ_MMAMAC               ( 7)
+#define IMX_IRQ_MMA                  ( 8)
+#ifndef CONFIG_ARCH_CHIP_IMXL
+#  define IMX_IRQ_COMP               ( 9)
+#endif
+#define IMX_IRQ_MSHCXINT             (10)
+#define IMX_IRQ_GPIOPORTA            (11)
+#define IMX_IRQ_GPIOPORTB            (12)
+#define IMX_IRQ_GPIOPORTC            (13)
+#define IMX_IRQ_LCDC                 (14)
+#ifndef CONFIG_ARCH_CHIP_IMXL
+#  define IMX_IRQ_SIM                (15)
+#  define IMX_IRQ_SIMDATA            (16)
+#endif
+#define IMX_IRQ_RTC                  (17)
+#define IMX_IRQ_RTCSAMINT            (18)
+#define IMX_IRQ_UART2PFERR           (19)
+#define IMX_IRQ_UART2RTS             (20)
+#define IMX_IRQ_UART2DTR             (21)
+#define IMX_IRQ_UART2UARTC           (22)
+#define IMX_IRQ_UART2TX              (23)
+#define IMX_IRQ_UART2RX              (24)
+#define IMX_IRQ_UART1PFERR           (25)
+#define IMX_IRQ_UART1RTS             (26)
+#define IMX_IRQ_UART1DTR             (27)
+#define IMX_IRQ_UART1UARTC           (28)
+#define IMX_IRQ_UART1TX              (29)
+#define IMX_IRQ_UART1RX              (30)
+#ifndef CONFIG_ARCH_CHIP_IMXL
+#  define IMX_IRQ_PENDATA            (33)
+#endif
+#define IMX_IRQ_PWM                  (34)
+#define IMX_IRQ_MMCSD                (35)
+#ifndef CONFIG_ARCH_CHIP_IMXL
+#  define IMX_IRQ_SSI2TX             (36)
+#  define IMX_IRQ_SSI2RX             (37)
+#  define IMX_IRQ_SSI2ERR            (38)
+#endif
+#define IMX_IRQ_I2C                  (39)
+#define IMX_IRQ_CSPI2                (40)
+#define IMX_IRQ_CSPI1                (41)
+#define IMX_IRQ_SSITX                (42)
+#define IMX_IRQ_SSITXERR             (43)
+#define IMX_IRQ_SSIRX                (44)
+#define IMX_IRQ_SSIRXERR             (45)
+#ifndef CONFIG_ARCH_CHIP_IMXL
+#  define IMX_IRQ_TOUCH              (46)
+#endif
+#define IMX_IRQ_USBD0                (47)
+#define IMX_IRQ_USBD1                (48)
+#define IMX_IRQ_USBD2                (49)
+#define IMX_IRQ_USBD3                (50)
+#define IMX_IRQ_USBD4                (51)
+#define IMX_IRQ_USBD5                (52)
+#define IMX_IRQ_USBD6                (53)
+#ifndef CONFIG_ARCH_CHIP_IMXL
+#  define IMX_IRQ_UART3RX            (54)
+#  define IMX_IRQ_BTSYS              (55)
+#  define IMX_IRQ_BTTIM              (56)
+#  define IMX_IRQ_BTWUI              (57)
+#endif
+#define IMX_IRQ_TIMER2               (58)
+#define IMX_IRQ_TIMER1               (59)
+#define IMX_IRQ_DMAERR               (60)
+#define IMX_IRQ_DMA                  (61)
+#define IMX_IRQ_GPIOPORTD            (62)
+#define IMX_IRQ_WDT                  (63)
+
+#define IMX_IRQ_SYSTIMER             IMX_IRQ_TIMER1
+#define NR_IRQS                      (64)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_IMX_IRQ_H */
+

arch/arm/include/irq.h

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/include/irq.h
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-/* This file should never be included directed but, rather,
- * only indirectly through nuttx/irq.h
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
  */
 
 #ifndef __ARCH_ARM_INCLUDE_IRQ_H
@@ -44,165 +44,36 @@
  * Included Files
  ****************************************************************************/
 
+/* Include NuttX-specific IRQ definitions */
+
 #include <nuttx/irq.h>
+
+/* Include chip-specific IRQ definitions (including IRQ numbers) */
+
 #include <arch/chip/irq.h>
 
+/* Include ARM architectgure-specific IRQ definitions (including register
+ * save structure and irqsave()/irqrestore() macros
+ */
+
+#ifdef CONFIG_ARCH_CORTEXM3
+# include <arch/cortexm3/irq.h>
+#else
+# include <arch/arm/irq.h>
+#endif
+
 /****************************************************************************
  * Definitions
  ****************************************************************************/
 
-/* IRQ Stack Frame Format:
- *
- * Context is always saved/restored in the same way:
- *
- *   (1) stmia rx, {r0-r14}
- *   (2) then the PC and CPSR
- *
- * This results in the following set of indices that
- * can be used to access individual registers in the
- * xcp.regs array:
- */
-
-#define REG_R0              (0)
-#define REG_R1              (1)
-#define REG_R2              (2)
-#define REG_R3              (3)
-#define REG_R4              (4)
-#define REG_R5              (5)
-#define REG_R6              (6)
-#define REG_R7              (7)
-#define REG_R8              (8)
-#define REG_R9              (9)
-#define REG_R10             (10)
-#define REG_R11             (11)
-#define REG_R12             (12)
-#define REG_R13             (13)
-#define REG_R14             (14)
-#define REG_R15             (15)
-#define REG_CPSR            (16)
-
-#define XCPTCONTEXT_REGS    (17)
-#define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
-
-#define REG_A1              REG_R0
-#define REG_A2              REG_R1
-#define REG_A3              REG_R2
-#define REG_A4              REG_R3
-#define REG_V1              REG_R4
-#define REG_V2              REG_R5
-#define REG_V3              REG_R6
-#define REG_V4              REG_R7
-#define REG_V5              REG_R8
-#define REG_V6              REG_R9
-#define REG_V7              REG_R10
-#define REG_SB              REG_R9
-#define REG_SL              REG_R10
-#define REG_FP              REG_R11
-#define REG_IP              REG_R12
-#define REG_SP              REG_R13
-#define REG_LR              REG_R14
-#define REG_PC              REG_R15
-
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
-/* This struct defines the way the registers are stored.  We
- * need to save:
- *
- *  1	CPSR
- *  7	Static registers, v1-v7 (aka r4-r10)
- *  1	Frame pointer, fp (aka r11)
- *  1	Stack pointer, sp (aka r13)
- *  1	Return address, lr (aka r14)
- * ---
- * 11	(XCPTCONTEXT_USER_REG)
- *
- * On interrupts, we also need to save:
- *  4	Volatile registers, a1-a4 (aka r0-r3)
- *  1	Scratch Register, ip (aka r12)
- *---
- *  5	(XCPTCONTEXT_IRQ_REGS)
- *
- * For a total of 17 (XCPTCONTEXT_REGS)
- */
-
-#ifndef __ASSEMBLY__
-struct xcptcontext
-{
-  /* The following function pointer is non-zero if there
-   * are pending signals to be processed.
-   */
-
-#ifndef CONFIG_DISABLE_SIGNALS
-  void *sigdeliver; /* Actual type is sig_deliver_t */
-
-  /* These are saved copies of LR and CPSR used during
-   * signal processing.
-   */
-
-  uint32 saved_pc;
-  uint32 saved_cpsr;
-#endif
-
-  /* Register save area */
-
-  uint32 regs[XCPTCONTEXT_REGS];
-};
-#endif
-
 /****************************************************************************
  * Inline functions
  ****************************************************************************/
 
-#ifndef __ASSEMBLY__
-
-/* Save the current interrupt enable state & disable IRQs */
-
-static inline irqstate_t irqsave(void)
-{
-  unsigned int flags;
-  unsigned int temp;
-  __asm__ __volatile__
-    (
-     "\tmrs    %0, cpsr\n"
-     "\torr    %1, %0, #128\n"
-     "\tmsr    cpsr_c, %1"
-     : "=r" (flags), "=r" (temp)
-     :
-     : "memory");
-  return flags;
-}
-
-/* Restore saved IRQ & FIQ state */
-
-static inline void irqrestore(irqstate_t flags)
-{
-  __asm__ __volatile__
-    (
-     "msr    cpsr_c, %0"
-     :
-     : "r" (flags)
-     : "memory");
-}
-
-static inline void system_call(swint_t func, int parm1,
-			       int parm2, int parm3)
-{
-  __asm__ __volatile__
-    (
-     "mov\tr0,%0\n\t"
-     "mov\tr1,%1\n\t"
-     "mov\tr2,%2\n\t"
-     "mov\tr3,%3\n\t"
-     "swi\t0x900001\n\t"
-     :
-     : "r" ((long)(func)),  "r" ((long)(parm1)),
-       "r" ((long)(parm2)), "r" ((long)(parm3))
-     : "r0", "r1", "r2", "r3", "lr");
-}
-#endif
-
 /****************************************************************************
  * Public Variables
  ****************************************************************************/

arch/arm/include/lm3s/irq.h

@@ -0,0 +1,301 @@
+/************************************************************************************
+ * arch/arm/include/lm3s/irq.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/irq.h
+ */
+
+#ifndef __ARCH_ARM_INCLUDE_LM3S_IRQ_H
+#define __ARCH_ARM_INCLUDE_LM3S_IRQ_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <nuttx/irq.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* IRQ numbers.  The IRQ number corresponds vector number and hence map directly to
+ * bits in the NVIC.  This does, however, waste several words of memory in the IRQ
+ * to handle mapping tables.
+ */
+
+/* Processor Exceptions (vectors 0-15) */
+
+#define LM3S_IRQ_RESERVED     (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+                                  /* Vector  0: Reset stack pointer value */
+                                  /* Vector  1: Reset (not handler as an IRQ) */
+#define LM3S_IRQ_NMI          (2) /* Vector  2: Non-Maskable Interrupt (NMI) */
+#define LM3S_IRQ_HARDFAULT    (3) /* Vector  3: Hard fault */
+#define LM3S_IRQ_MPU          (4) /* Vector  4: Memory management (MPU) */
+#define LM3S_IRQ_BUSFAULT     (5) /* Vector  5: Bus fault */
+#define LM3S_IRQ_USAGEFAULT   (6) /* Vector  6: Usage fault */
+#define LM3S_IRQ_SVCALL      (11) /* Vector 11: SVC call */
+#define LM3S_IRQ_DBGMONITOR  (12) /* Vector 12: Debug Monitor */
+                                  /* Vector 13: Reserved */
+#define LM3S_IRQ_PENDSV      (14) /* Vector 14: Pendable system service request */
+#define LM3S_IRQ_SYSTICK     (15) /* Vector 15: System tick */
+
+/* External interrupts (vectors >= 16) */
+
+#define LM3S_IRQ_INTERRUPTS  (16) /* Vector number of the first external interrupt */
+#ifdef CONFIG_ARCH_CHIP_LM3S6918
+
+#  define LM3S_IRQ_GPIOA     (16) /* Vector 16: GPIO Port A */
+#  define LM3S_IRQ_GPIOB     (17) /* Vector 17: GPIO Port B */
+#  define LM3S_IRQ_GPIOC     (18) /* Vector 18: GPIO Port C */
+#  define LM3S_IRQ_GPIOD     (19) /* Vector 19: GPIO Port D */
+#  define LM3S_IRQ_GPIOE     (20) /* Vector 20: GPIO Port E */
+#  define LM3S_IRQ_UART0     (21) /* Vector 21: UART 0 */
+#  define LM3S_IRQ_UART1     (22) /* Vector 22: UART 1 */
+#  define LM3S_IRQ_SSI0      (23) /* Vector 23: SSI 0 */
+#  define LM3S_IRQ_I2C0      (24) /* Vector 24: I2C 0 */
+                                  /* Vector 25-29: Reserved */
+#  define LM3S_IRQ_ADC0      (30) /* Vector 30: ADC Sequence 0 */
+#  define LM3S_IRQ_ADC1      (31) /* Vector 31: ADC Sequence 1 */
+#  define LM3S_IRQ_ADC2      (32) /* Vector 32: ADC Sequence 2 */
+#  define LM3S_IRQ_ADC3      (33) /* Vector 33: ADC Sequence 3 */
+#  define LM3S_IRQ_WDOG      (34) /* Vector 34: Watchdog Timer */
+#  define LM3S_IRQ_TIMER0A   (35) /* Vector 35: Timer 0 A */
+#  define LM3S_IRQ_TIMER0B   (36) /* Vector 36: Timer 0 B */
+#  define LM3S_IRQ_TIMER1A   (37) /* Vector 37: Timer 1 A */
+#  define LM3S_IRQ_TIMER1B   (38) /* Vector 38: Timer 1 B */
+#  define LM3S_IRQ_TIMER2A   (39) /* Vector 39: Timer 2 A */
+#  define LM3S_IRQ_TIMER2B   (40) /* Vector 40: Timer 3 B */
+#  define LM3S_IRQ_COMPARE0  (41) /* Vector 41: Analog Comparator 0 */
+#  define LM3S_IRQ_COMPARE1  (42) /* Vector 42: Analog Comparator 1 */
+                                  /* Vector 43: Reserved */
+#  define LM3S_IRQ_SYSCON    (44) /* Vector 44: System Control */
+#  define LM3S_IRQ_FLASHCON  (45) /* Vector 45: FLASH Control */
+#  define LM3S_IRQ_GPIOF     (46) /* Vector 46: GPIO Port F */
+#  define LM3S_IRQ_GPIOG     (47) /* Vector 47: GPIO Port G */
+#  define LM3S_IRQ_GPIOH     (48) /* Vector 48: GPIO Port H */
+                                  /* Vector 49: Reserved */
+#  define LM3S_IRQ_SSI1      (50) /* Vector 50: SSI 1 */
+#  define LM3S_IRQ_TIMER3A   (51) /* Vector 51: Timer 3 A */
+#  define LM3S_IRQ_TIMER3B   (52) /* Vector 52: Timer 3 B */
+#  define LM3S_IRQ_I2C1      (53) /* Vector 53: I2C 1 */
+                                  /* Vectors 54-57: Reserved */
+#  define LM3S_IRQ_ETHCON    (58) /* Vector 58: Ethernet Controller */
+#  define LM3S_IRQ_HIBERNATE (59) /* Vector 59: Hibernation Module */
+                                  /* Vectors 60-70: Reserved */
+#else
+#  error "IRQ Numbers not specified for this LM3S chip"
+#endif
+
+#define NR_IRQS              (60) /* Really only 43 */
+
+/* GPIO IRQs -- Note that support for individual GPIO ports can
+ * be disabled in order to reduce the size of the implemenation.
+ */
+
+#ifndef CONFIG_LM3S_DISABLE_GPIOA_IRQS
+#  define LM3S_IRQ_GPIOA_0 (NR_IRQS + 0)
+#  define LM3S_IRQ_GPIOA_1 (NR_IRQS + 1)
+#  define LM3S_IRQ_GPIOA_2 (NR_IRQS + 2)
+#  define LM3S_IRQ_GPIOA_3 (NR_IRQS + 3)
+#  define LM3S_IRQ_GPIOA_4 (NR_IRQS + 4)
+#  define LM3S_IRQ_GPIOA_5 (NR_IRQS + 5)
+#  define LM3S_IRQ_GPIOA_6 (NR_IRQS + 6)
+#  define LM3S_IRQ_GPIOA_7 (NR_IRQS + 7)
+#  define _NGPIOAIRQS      (NR_IRQS + 8)
+#else
+#  define _NGPIOAIRQS      NR_IRQS
+#endif
+
+#ifndef CONFIG_LM3S_DISABLE_GPIOB_IRQS
+#  define LM3S_IRQ_GPIOB_0 (_NGPIOAIRQS + 0)
+#  define LM3S_IRQ_GPIOB_1 (_NGPIOAIRQS + 1)
+#  define LM3S_IRQ_GPIOB_2 (_NGPIOAIRQS + 2)
+#  define LM3S_IRQ_GPIOB_3 (_NGPIOAIRQS + 3)
+#  define LM3S_IRQ_GPIOB_4 (_NGPIOAIRQS + 4)
+#  define LM3S_IRQ_GPIOB_5 (_NGPIOAIRQS + 5)
+#  define LM3S_IRQ_GPIOB_6 (_NGPIOAIRQS + 6)
+#  define LM3S_IRQ_GPIOB_7 (_NGPIOAIRQS + 7)
+#  define _NGPIOBIRQS      (_NGPIOAIRQS + 8)
+#else
+#  define _NGPIOBIRQS      _NGPIOAIRQS
+#endif
+
+#ifndef CONFIG_LM3S_DISABLE_GPIOC_IRQS
+#  define LM3S_IRQ_GPIOC_0 (_NGPIOBIRQS + 0)
+#  define LM3S_IRQ_GPIOC_1 (_NGPIOBIRQS + 1)
+#  define LM3S_IRQ_GPIOC_2 (_NGPIOBIRQS + 2)
+#  define LM3S_IRQ_GPIOC_3 (_NGPIOBIRQS + 3)
+#  define LM3S_IRQ_GPIOC_4 (_NGPIOBIRQS + 4)
+#  define LM3S_IRQ_GPIOC_5 (_NGPIOBIRQS + 5)
+#  define LM3S_IRQ_GPIOC_6 (_NGPIOBIRQS + 6)
+#  define LM3S_IRQ_GPIOC_7 (_NGPIOBIRQS + 7)
+#  define _NGPIOCIRQS      (_NGPIOBIRQS + 8)
+#else
+#  define _NGPIOCIRQS      _NGPIOBIRQS
+#endif
+
+#ifndef CONFIG_LM3S_DISABLE_GPIOD_IRQS
+#  define LM3S_IRQ_GPIOD_0 (_NGPIOCIRQS + 0)
+#  define LM3S_IRQ_GPIOD_1 (_NGPIOCIRQS + 1)
+#  define LM3S_IRQ_GPIOD_2 (_NGPIOCIRQS + 2)
+#  define LM3S_IRQ_GPIOD_3 (_NGPIOCIRQS + 3)
+#  define LM3S_IRQ_GPIOD_4 (_NGPIOCIRQS + 4)
+#  define LM3S_IRQ_GPIOD_5 (_NGPIOCIRQS + 5)
+#  define LM3S_IRQ_GPIOD_6 (_NGPIOCIRQS + 6)
+#  define LM3S_IRQ_GPIOD_7 (_NGPIOCIRQS + 7)
+#  define _NGPIODIRQS      (_NGPIOCIRQS + 8)
+#else
+#  define _NGPIODIRQS      _NGPIOCIRQS
+#endif
+
+#ifndef CONFIG_LM3S_DISABLE_GPIOE_IRQS
+#  define LM3S_IRQ_GPIOE_0 (_NGPIODIRQS + 0)
+#  define LM3S_IRQ_GPIOE_1 (_NGPIODIRQS + 1)
+#  define LM3S_IRQ_GPIOE_2 (_NGPIODIRQS + 2)
+#  define LM3S_IRQ_GPIOE_3 (_NGPIODIRQS + 3)
+#  define LM3S_IRQ_GPIOE_4 (_NGPIODIRQS + 4)
+#  define LM3S_IRQ_GPIOE_5 (_NGPIODIRQS + 5)
+#  define LM3S_IRQ_GPIOE_6 (_NGPIODIRQS + 6)
+#  define LM3S_IRQ_GPIOE_7 (_NGPIODIRQS + 7)
+#  define _NGPIOEIRQS      (_NGPIODIRQS + 8)
+#else
+#  define _NGPIOEIRQS      _NGPIODIRQS
+#endif
+
+#ifndef CONFIG_LM3S_DISABLE_GPIOF_IRQS
+#  define LM3S_IRQ_GPIOF_0 (_NGPIOEIRQS + 0)
+#  define LM3S_IRQ_GPIOF_1 (_NGPIOEIRQS + 1)
+#  define LM3S_IRQ_GPIOF_2 (_NGPIOEIRQS + 2)
+#  define LM3S_IRQ_GPIOF_3 (_NGPIOEIRQS + 3)
+#  define LM3S_IRQ_GPIOF_4 (_NGPIOEIRQS + 4)
+#  define LM3S_IRQ_GPIOF_5 (_NGPIOEIRQS + 5)
+#  define LM3S_IRQ_GPIOF_6 (_NGPIOEIRQS + 6)
+#  define LM3S_IRQ_GPIOF_7 (_NGPIOEIRQS + 7)
+#  define _NGPIOFIRQS      (_NGPIOEIRQS + 8)
+#else
+#  define _NGPIOFIRQS      _NGPIOEIRQS
+#endif
+
+#ifndef CONFIG_LM3S_DISABLE_GPIOG_IRQS
+#  define LM3S_IRQ_GPIOG_0 (_NGPIOFIRQS + 0)
+#  define LM3S_IRQ_GPIOG_1 (_NGPIOFIRQS + 1)
+#  define LM3S_IRQ_GPIOG_2 (_NGPIOFIRQS + 2)
+#  define LM3S_IRQ_GPIOG_3 (_NGPIOFIRQS + 3)
+#  define LM3S_IRQ_GPIOG_4 (_NGPIOFIRQS + 4)
+#  define LM3S_IRQ_GPIOG_5 (_NGPIOFIRQS + 5)
+#  define LM3S_IRQ_GPIOG_6 (_NGPIOFIRQS + 6)
+#  define LM3S_IRQ_GPIOG_7 (_NGPIOFIRQS + 7)
+#  define _NGPIOGIRQS      (_NGPIOFIRQS + 8)
+#else
+#  define _NGPIOGIRQS      _NGPIOFIRQS
+#endif
+
+#ifndef CONFIG_LM3S_DISABLE_GPIOH_IRQS
+#  define LM3S_IRQ_GPIOH_0 (_NGPIOGIRQS + 0)
+#  define LM3S_IRQ_GPIOH_1 (_NGPIOGIRQS + 1)
+#  define LM3S_IRQ_GPIOH_2 (_NGPIOGIRQS + 2)
+#  define LM3S_IRQ_GPIOH_3 (_NGPIOGIRQS + 3)
+#  define LM3S_IRQ_GPIOH_4 (_NGPIOGIRQS + 4)
+#  define LM3S_IRQ_GPIOH_5 (_NGPIOGIRQS + 5)
+#  define LM3S_IRQ_GPIOH_6 (_NGPIOGIRQS + 6)
+#  define LM3S_IRQ_GPIOH_7 (_NGPIOGIRQS + 7)
+#  define _NGPIOHIRQS      (_NGPIOGIRQS + 8)
+#else
+#  define _NGPIOHIRQS      _NGPIOGIRQS
+#endif
+
+#define NR_GPIO_IRQS       (_NGPIOHIRQS - NR_IRQS)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: gpio_irqattach
+ *
+ * Description:
+ *   Attach the interrupt handler 'isr' to the GPIO IRQ 'irq'
+ *
+ ****************************************************************************/
+
+EXTERN int gpio_irqattach(int irq, xcpt_t isr);
+#define gpio_irqdetach(isr) gpio_irqattach(isr, NULL)
+
+/****************************************************************************
+ * Name: gpio_irqenable
+ *
+ * Description:
+ *   Enable the GPIO IRQ specified by 'irq'
+ *
+ ****************************************************************************/
+
+EXTERN void gpio_irqenable(int irq);
+
+/****************************************************************************
+ * Name: gpio_irqdisable
+ *
+ * Description:
+ *   Disable the GPIO IRQ specified by 'irq'
+ *
+ ****************************************************************************/
+
+EXTERN void gpio_irqdisable(int irq);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_ARM_INCLUDE_LM3S_IRQ_H */
+

arch/arm/include/str71x/irq.h

@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/include/str71x/irq.h
  *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without

arch/arm/include/types.h

@@ -67,11 +67,16 @@ typedef unsigned int uint32;
 typedef long long sint64;
 typedef unsigned long long uint64;
 
-/* This is the size of the interrupt state save returned by
- * irqsave()
+/* This is the size of the interrupt state save returned by irqsave().  For
+ * ARM, a 32 register value is returned, for the thumb2, Cortex-M3, the 16-bit
+ * primask register value is returned,
  */
 
+#ifdef __thumb2__
+typedef unsigned short irqstate_t;
+#else /* __thumb2__ */
 typedef unsigned int irqstate_t;
+#endif /* __thumb2__ */
 
 #endif /* __ASSEMBLY__ */
 

arch/arm/src/Makefile

@@ -1,7 +1,7 @@
 ############################################################################
 # arch/arm/src/Makefile
 #
-#   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -37,7 +37,23 @@
 -include chip/Make.defs
 
 ARCH_SRCDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src
-CFLAGS		+= -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(TOPDIR)/sched
+ifeq ($(CONFIG_ARCH_CORTEXM3),y)
+ARCH_SUBDIR	= cortexm3
+else
+ARCH_SUBDIR	= arm
+endif
+
+ifeq ($(WINTOOL),y)
+  NUTTX		= "${shell cygpath -w $(TOPDIR)/nuttx}"
+  CFLAGS	+= -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
+  		   -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
+		   -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}" \
+		   -I "${shell cygpath -w $(TOPDIR)/sched}"
+else
+  NUTTX		= $(TOPDIR)/nuttx
+  CFLAGS	+= -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common \
+		   -I$(ARCH_SRCDIR)/$(ARCH_SUBDIR) -I$(TOPDIR)/sched
+endif
 
 HEAD_AOBJ	= $(HEAD_ASRC:.S=$(OBJEXT))
 
@@ -54,14 +70,20 @@ LDFLAGS		= $(ARCHSCRIPT)
 EXTRA_LIBS	=
 
 LINKLIBS	=
-LDPATHES	= $(addprefix -L$(TOPDIR)/,$(dir $(LINKLIBS)))
+ifeq ($(WINTOOL),y)
+  LIBPATHS	= ${shell for path in $(LINKLIBS); do dir=`dirname $(TOPDIR)/$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
+  LIBPATHS	+= -L"${shell cygpath -w $(BOARDDIR)}"
+else
+  LIBPATHS	= $(addprefix -L$(TOPDIR)/,$(dir $(LINKLIBS)))
+  LIBPATHS	+= -L"$(BOARDDIR)"
+endif
 LDLIBS		= $(patsubst lib%,-l%,$(basename $(notdir $(LINKLIBS))))
 
 BOARDDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src/board
 
-LIBGCC		= ${shell $(CC) -print-libgcc-file-name}
+LIBGCC		= "${shell $(CC) -print-libgcc-file-name}"
 
-VPATH		= chip:common
+VPATH		= chip:common:$(ARCH_SUBDIR)
 
 all: $(HEAD_OBJ) libarch$(LIBEXT)
 
@@ -77,31 +99,32 @@ libarch$(LIBEXT): $(OBJS)
 	done ; )
 
 board/libboard$(LIBEXT):
-	$(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT)
+	@$(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT)
 
 nuttx: $(HEAD_AOBJ) board/libboard$(LIBEXT)
 	@echo "LD: nuttx"
-	@$(LD) --entry=__start $(LDFLAGS) $(LDPATHES) -L$(BOARDDIR) -o $(TOPDIR)/$@ $(HEAD_AOBJ) \
+	@$(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_AOBJ) \
 		--start-group $(LDLIBS) -lboard --end-group $(EXTRA_LIBS) $(LIBGCC)
-ifeq ($(CONFIG_BOOT_FROM_FLASH),y)
-	@export flashloc=`$(OBJDUMP) --all-headers $(TOPDIR)/$@ | grep _eronly | cut -d' ' -f1`;  \
-	$(OBJCOPY) --adjust-section-vma=.data=0x$$flashloc $(TOPDIR)/$@ $(TOPDIR)/$@.flashimage
-	@mv $(TOPDIR)/$@.flashimage $(TOPDIR)/$@
+ifeq ($(CONFIG_BOOT_RUNFROMFLASH),y)
+	@export flashloc=`$(OBJDUMP) --all-headers $(NUTTX)$(EXEEXT) | grep _eronly | cut -d' ' -f1`;  \
+	$(OBJCOPY) $(OBJCOPYARGS) --adjust-section-vma=.data=0x$$flashloc $(NUTTX)$(EXEEXT) $(NUTTX).flashimage
+	@mv $(NUTTX).flashimage $(NUTTX)$(EXEEXT)
 endif
-	@$(NM) $(TOPDIR)/$@ | \
+	@$(NM) $(NUTTX)$(EXEEXT) | \
 	grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
 	sort > $(TOPDIR)/System.map
-	@export vflashstart=`$(OBJDUMP) --all-headers $(TOPDIR)/$@ | grep _vflashstart | cut -d' ' -f1`;  \
+	@export vflashstart=`$(OBJDUMP) --all-headers $(NUTTX)$(EXEEXT) | grep _vflashstart | cut -d' ' -f1`;  \
 	if [ ! -z "$$vflashstart" ]; then \
-		$(OBJCOPY) --adjust-section-vma=.vector=0x$$vflashstart $(TOPDIR)/$@ $(TOPDIR)/$@.flashimage; \
-		mv $(TOPDIR)/$@.flashimage $(TOPDIR)/$@; \
+		$(OBJCOPY) $(OBJCOPYARGS) --adjust-section-vma=.vector=0x$$vflashstart $(NUTTX)$(EXEEXT) $(NUTTX).flashimage; \
+		mv $(NUTTX).flashimage $(NUTTX)$(EXEEXT); \
 	fi
 
 .depend: Makefile chip/Make.defs $(SRCS)
 	@if [ -e board/Makefile ]; then \
 		$(MAKE) -C board TOPDIR="$(TOPDIR)" depend ; \
 	fi
-	@$(MKDEP) --dep-path chip --dep-path common $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+	@$(MKDEP) --dep-path chip --dep-path common --dep-path $(ARCH_SUBDIR) \
+	 $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
 	@touch $@
 
 depend: .depend

arch/arm/src/arm/arm.h

@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/common/arm.h
+ * arch/arm/src/arm/arm.h
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -44,9 +44,9 @@
 # include <sys/types.h>
 #endif
 
-/**************************************************************************
- * Conditional Compilation
- **************************************************************************/
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
 
 #undef CONFIG_ALIGNMENT_TRAP
 #undef CONFIG_DCACHE_WRITETHROUGH
@@ -54,10 +54,6 @@
 #undef CONFIG_DCACHE_DISABLE
 #undef CONFIG_ICACHE_DISABLE
 
-/************************************************************************************
- * Definitions
- ************************************************************************************/
-
 /* ARM9EJS **************************************************************************/
 
 /* PSR bits */
@@ -123,12 +119,12 @@
 #define PMD_TYPE_COARSE     0x00000001
 #define PMD_TYPE_SECT       0x00000002
 #define PMD_TYPE_FINE       0x00000003
-                                    /* Bits 3:2:   Depends on descriptor */
+                                        /* Bits 3:2:   Depends on descriptor */
 #define PMD_BIT4            0x00000010  /* Bit  4:     Must be one */
 #define PMD_DOMAIN_MASK     0x000001e0  /* Bits 8:5:   Domain control bits */
 #define PMD_DOMAIN(x)       ((x) << 5)
 #define PMD_PROTECTION      0x00000200  /* Bit 9:      v5 only */
-                                    /* Bits 31:10: Depend on descriptor */
+                                        /* Bits 31:10: Depend on descriptor */
 
 /* Level 1 Section Descriptor.  Section descriptors allow fast, single
  * level mapping between 1Mb address regions.

arch/arm/src/arm/up_assert.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_assert.c
+ * arch/arm/src/arm/up_assert.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -132,6 +132,7 @@ static inline void up_registerdump(void)
                  regs, ptr[0], ptr[1], ptr[2], ptr[3],
                  ptr[4], ptr[5], ptr[6], ptr[7]);
         }
+
       lldbg("CPSR: %08x\n", current_regs[REG_CPSR]);
     }
 }

arch/arm/src/arm/up_cache.S

@@ -1,7 +1,7 @@
-/********************************************************************
- * common/up_cache.S
+/****************************************************************************
+ * arch/arm/src/arm/up_cache.S
  *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
@@ -31,29 +31,29 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************/
+ ****************************************************************************/
 
-/********************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************/
+ ****************************************************************************/
 
 #include <nuttx/config.h>
 #include "up_internal.h"
 #include "up_arch.h"
 
-/********************************************************************
+/****************************************************************************
  * Definitions
- ********************************************************************/
+ ****************************************************************************/
 
 #define CACHE_DLINESIZE    32
 
-/********************************************************************
+/****************************************************************************
  * Assembly Macros
- ********************************************************************/
+ ****************************************************************************/
 
-/**************************************************************************
+/****************************************************************************
  * Name: up_flushicache
- **************************************************************************/
+ ****************************************************************************/
 
 /* Esure coherency between the Icache and the Dcache in the region described 
  * by r0=start and r1=end.

arch/arm/src/arm/up_copystate.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/common/up_copystate.c
+ * arch/arm/src/arm/up_copystate.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -69,6 +69,11 @@
 void up_copystate(uint32 *dest, uint32 *src)
 {
   int i;
+
+  /* In the current ARM model, the state is always copied to and from the
+   * stack and TCB.
+   */
+
   for (i = 0; i < XCPTCONTEXT_REGS; i++)
     {
       *dest++ = *src++;

arch/arm/src/arm/up_dataabort.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/common/up_dataabort.c
+ * arch/arm/src/arm/up_dataabort.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without

arch/arm/src/arm/up_doirq.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/common/up_doirq.c
+ * arch/arm/src/arm/up_doirq.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -66,39 +66,40 @@
  * Public Functions
  ****************************************************************************/
 
-void up_doirq(int irq, uint32* regs)
+void up_doirq(int irq, uint32 *regs)
 {
   up_ledon(LED_INIRQ);
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
   PANIC(OSERR_ERREXCEPTION);
 #else
-  if ((unsigned)irq < NR_IRQS)
-    {
-       /* Current regs non-zero indicates that we are processing
-        * an interrupt; current_regs is also used to manage
-        * interrupt level context switches.
-        */
+  /* Nested interrupts are not supported in this implementation.  If you want
+   * implemented nested interrupts, you would have to (1) change the way that
+   * current regs is handled and (2) the design associated with
+   * CONFIG_ARCH_INTERRUPTSTACK.
+   */
 
-       current_regs = regs;
+  /* Current regs non-zero indicates that we are processing an interrupt;
+   * current_regs is also used to manage interrupt level context switches.
+   */
 
-       /* Mask and acknowledge the interrupt */
+  DEBUGASSERT(current_regs == NULL);
+  current_regs = regs;
 
-       up_maskack_irq(irq);
+  /* Mask and acknowledge the interrupt */
 
-       /* Deliver the IRQ */
+  up_maskack_irq(irq);
 
-       irq_dispatch(irq, regs);
+  /* Deliver the IRQ */
 
-       /* Indicate that we are no long in an interrupt handler */
+  irq_dispatch(irq, regs);
 
-       current_regs = NULL;
+  /* Indicate that we are no long in an interrupt handler */
 
-       /* Unmask the last interrupt (global interrupts are still
-        * disabled.
-        */
+  current_regs = NULL;
 
-       up_enable_irq(irq);
-    }
-  up_ledoff(LED_INIRQ);
+  /* Unmask the last interrupt (global interrupts are still disabled) */
+
+  up_enable_irq(irq);
 #endif
+  up_ledoff(LED_INIRQ);
 }

arch/arm/src/arm/up_fullcontextrestore.S

@@ -1,7 +1,7 @@
 /**************************************************************************
- * common/up_fullcontextrestore.S
+ * arch/arm/src/arm/up_fullcontextrestore.S
  *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *

arch/arm/src/arm/up_head.S

@@ -1,7 +1,7 @@
-/********************************************************************
- * common/up_head.S
+/****************************************************************************
+ * arch/arm/src/arm/up_head.S
  *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
@@ -31,19 +31,21 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************/
+ ****************************************************************************/
 
-/********************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************/
+ ****************************************************************************/
 
 #include <nuttx/config.h>
+
+#include "arm.h"
 #include "up_internal.h"
 #include "up_arch.h"
 
-/**************************************************************************
+/**********************************************************************************
  * Conditional Compilation
- **************************************************************************/
+ **********************************************************************************/
 
 #undef ALIGNMENT_TRAP
 #undef CPU_DCACHE_WRITETHROUGH
@@ -51,9 +53,41 @@
 #undef CPU_DCACHE_DISABLE
 #undef CPU_ICACHE_DISABLE
 
-/********************************************************************
+/* There are three operational memory configurations:
+ *
+ * 1. We execute in place in FLASH (CONFIG_BOOT_RUNFROMFLASH=y).  In this case
+ *    the boot logic must:
+ *
+ *    - Configure SDRAM and, 
+ *    - Initialize the .data section in RAM.
+ */
+
+#ifdef CONFIG_BOOT_RUNFROMFLASH
+#  define CONFIGURE_SDRAM
+
+/* 2. We boot in FLASH but copy ourselves to DRAM from better performance.
+ *    (CONFIG_BOOT_RUNFROMFLASH=n && CONFIG_BOOT_COPYTORAM=y).  In this case
+ *    the boot logic must:
+ *
+ *    - Configure SDRAM and, 
+ *    - Copy ourself to DRAM (after mapping it)
+ */
+
+#elif defined(CONFIG_BOOT_COPYTORAM)
+#  define CONFIG_SDRAM
+
+/* 3. There is bootloader that copies us to DRAM (but probably not to the beginning)
+ *    (CONFIG_BOOT_RUNFROMFLASH=n && CONFIG_BOOT_COPYTORAM=n). In this case the
+ *    boot logic must:
+ *
+ *    - Nothing special.
+ */
+
+#endif
+
+/****************************************************************************
  * Definitions
- ********************************************************************/
+ ****************************************************************************/
 
 /* The physical address of the beginning of SDRAM is provided by
  * CONFIG_DRAM_START.  The size of installed SDRAM is provided by
@@ -63,9 +97,9 @@
 
 #define NSDRAM_SECTIONS (CONFIG_DRAM_SIZE >> 20)
 
-/********************************************************************
+/****************************************************************************
  * Assembly Macros
- ********************************************************************/
+ ****************************************************************************/
 
 /* Since the page table is closely related to the NuttX base
  * address, we can convert the page table base address to the
@@ -88,9 +122,9 @@
 	.endm
 #endif
 
-/********************************************************************
+/****************************************************************************
  * Name: __start
- ********************************************************************/
+ ****************************************************************************/
 
 /* We assume the bootloader has already initialized most of the h/w for
  * us and that only leaves us having to do some os specific things
@@ -105,9 +139,14 @@ __start:
 	mov	r0, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
 	msr	cpsr_c, r0
 
+	/* Initialize DRAM using a macro provided by board-specific logic */
+
+#ifdef CONFIG_SDRAM
+	config_sdram
+#endif
 	/* Clear the 16K level 1 page table */
 
-	ldr	r4, .LCppgtable		/* r4=phys. page table */
+	ldr	r4, .LCppgtable			/* r4=phys. page table */
 	mov	r0, r4
 	mov	r1, #0
 	add	r2, r0, #PGTABLE_SIZE
@@ -126,9 +165,9 @@ __start:
 	 */
 
 	mksection r0, r4			/* r0=phys. base section */
-	ldr	r1, .LCmmuflags		/* FLGS=MMU_MEMFLAGS */
-	add	r3, r1, r0		/* r3=flags + base */
-	str	r3, [r4, r0, lsr #18]	/* identity mapping */
+	ldr	r1, .LCmmuflags			/* FLGS=MMU_MEMFLAGS */
+	add	r3, r1, r0			/* r3=flags + base */
+	str	r3, [r4, r0, lsr #18]		/* identity mapping */
 
 	/* Create a "normal" single section mapping for the first
 	 * MB of memory.  Now, we have the first 1MB mapping to
@@ -137,20 +176,20 @@ __start:
 	 * moved the physical mapping out of the way.
 	 */
 
-	ldr	r2, .LCvpgtable		/* r2=virt. page table */
+	ldr	r2, .LCvpgtable			/* r2=virt. page table */
 	mksection r0, r2			/* r0=virt. base section */
-	str	r3, [r4, r0, lsr #18]	/* identity mapping */
+	str	r3, [r4, r0, lsr #18]		/* identity mapping */
 
-	/* The following logic will set up the ARM926 for normal operation */
+	/* The following logic will set up the ARM920/ARM926 for normal operation */
 
 	mov	r0, #0
 	mcr	p15, 0, r0, c7, c7		/* Invalidate I,D caches */
-	mcr	p15, 0, r0, c7, c10, 4	/* Drain write buffer */
+	mcr	p15, 0, r0, c7, c10, 4		/* Drain write buffer */
 	mcr	p15, 0, r0, c8, c7		/* Invalidate I,D TLBs */
 	mcr	p15, 0, r4, c2, c0		/* Load page table pointer */
 
 #ifdef CPU_DCACHE_WRITETHROUGH
-	mov	r0, #4			/* Disable write-back on caches explicitly */
+	mov	r0, #4				/* Disable write-back on caches explicitly */
 	mcr	p15, 7, r0, c15, c0, 0
 #endif 
 
@@ -164,17 +203,25 @@ __start:
 	mcr	p15, 0, r0, c3, c0		/* Load domain access register */
 	mrc	p15, 0, r0, c1, c0		/* Get control register */
 	
-	/* Clear bits (see start.h) */
+	/* Clear bits (see arm.h) */
 
 	bic	r0, r0, #(CR_R|CR_F|CR_Z)
 	bic	r0, r0, #(CR_A|CR_C|CR_W)
 	bic	r0, r0, #(CR_I)
 
-	/* Set bits (see start.h) */
+	/* Set bits (see arm.h) */
 
 	orr	r0, r0, #(CR_M|CR_P|CR_D)
-	orr	r0, r0, #(CR_S|CR_V)
+	
+	/* In most architectures, vectors are reloated to 0xffff0000.
+	 * -- but not all
+	 */
 
+#ifndef CONFIG_ARCH_LOWVECTORS
+	orr	r0, r0, #(CR_S)
+#else
+	orr	r0, r0, #(CR_S|CR_V)
+#endif
 #ifdef CPU_CACHE_ROUND_ROBIN
 	orr	r0, r0, #(CR_RR)
 #endif
@@ -197,9 +244,9 @@ __start:
 
 	mov	pc, lr
 
-/**************************************************************************
+/**********************************************************************************
  * PC_Relative Data
- **************************************************************************/
+ **********************************************************************************/
 
 	/* These addresses are all virtual address */
 	
@@ -211,15 +258,15 @@ __start:
 	.long	MMU_MEMFLAGS
 	.type	.LCppagetable, %object
 .LCppgtable:
-	.long	CONFIG_DRAM_START  /* Physical start of DRAM */
+	.long	CONFIG_DRAM_START		/* Physical start of DRAM */
 	.type	.LCvpagetable, %object
 .LCvpgtable:
-	.long	CONFIG_DRAM_VSTART /* Virtual start of DRAM */
+	.long	CONFIG_DRAM_VSTART		/* Virtual start of DRAM */
 	.size	_start, .-_start
 
-/**************************************************************************
+/**********************************************************************************
  * Name: .Lvstart
- **************************************************************************/
+ **********************************************************************************/
 
 /* The following is executed after the MMU has been enabled. This uses
  * absolute addresses; this is not position independent.
@@ -231,19 +278,19 @@ __start:
 
 	/* Remove the temporary null mapping */
 
-	ldr	r4, .LCvpgtable		/* r4=virtual page table */
-	ldr	r1, .LCppgtable		/* r1=phys. page table */
+	ldr	r4, .LCvpgtable			/* r4=virtual page table */
+	ldr	r1, .LCppgtable			/* r1=phys. page table */
 	mksection r3, r1			/* r2=phys. base addr */
-	mov	r0, #0			/* flags + base = 0 */
-	str	r0, [r4, r3, lsr #18]	/* Undo identity mapping */
+	mov	r0, #0				/* flags + base = 0 */
+	str	r0, [r4, r3, lsr #18]		/* Undo identity mapping */
 
 	/* Now setup the pagetables for our normal SDRAM mappings
 	 * mapped region.  We round NUTTX_START_VADDR down to the
 	 * nearest megabyte boundary.
 	 */
 
-	ldr	r1, .LCmmuflags		/* FLGS=MMU_MEMFLAGS */
-	add	r3, r3, r1		/* r3=flags + base */
+	ldr	r1, .LCmmuflags			/* FLGS=MMU_MEMFLAGS */
+	add	r3, r3, r1			/* r3=flags + base */
 
 	add	r0, r4, #(NUTTX_START_VADDR & 0xff000000) >> 18
 	bic	r2, r3, #0x00f00000
@@ -269,7 +316,7 @@ __start:
 	mov     fp, #0
 
 .Lbssinit:	
-	cmp     r0, r1		       /* Clear up to _bss_end_ */
+	cmp     r0, r1		       		/* Clear up to _bss_end_ */
 	strcc	fp, [r0],#4
 	bcc	.Lbssinit
 

arch/arm/src/arm/up_initialstate.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- *  arch/arm/src/common/up_initialstate.c
+ *  arch/arm/src/arm/up_initialstate.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -40,7 +40,10 @@
 #include <nuttx/config.h>
 #include <sys/types.h>
 #include <string.h>
+
 #include <nuttx/arch.h>
+
+#include "arm.h"
 #include "up_internal.h"
 #include "up_arch.h"
 
@@ -81,11 +84,36 @@ void up_initial_state(_TCB *tcb)
   /* Initialize the initial exception register context structure */
 
   memset(xcp, 0, sizeof(struct xcptcontext));
-  xcp->regs[REG_SP]   = (uint32)tcb->adj_stack_ptr;
-  xcp->regs[REG_PC]   = (uint32)tcb->start;
-#ifdef CONFIG_SUPPRESS_INTERRUPTS
-  xcp->regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
-#else
-  xcp->regs[REG_CPSR] = SVC_MODE | PSR_F_BIT;
+
+  /* Save the initial stack pointer */
+
+  xcp->regs[REG_SP]      = (uint32)tcb->adj_stack_ptr;
+
+  /* Save the task entry point */
+
+  xcp->regs[REG_PC]      = (uint32)tcb->start;
+
+  /* If this task is running PIC, then set the PIC base register to the
+   * address of the allocated D-Space region.
+   */
+
+#ifdef CONFIG_PIC
+  if (tcb->dspace != NULL)
+    {
+      /* Set the PIC base register (probably R10) to the address of the
+       * alloacated D-Space region.
+       */
+
+      xcp->regs[REG_PIC] = (uint32)tcb->dspace->region;
+    }
 #endif
+
+  /* Enable or disable interrupts, based on user configuration */
+
+# ifdef CONFIG_SUPPRESS_INTERRUPTS
+  xcp->regs[REG_CPSR]    = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
+# else
+  xcp->regs[REG_CPSR]    = SVC_MODE | PSR_F_BIT;
+# endif
 }
+

arch/arm/src/arm/up_nommuhead.S

@@ -1,7 +1,7 @@
-/********************************************************************
- * common/up_nommuhead.S
+/****************************************************************************
+ * arch/arm/src/arm/up_nommuhead.S
  *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
@@ -31,19 +31,21 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************/
+ ****************************************************************************/
 
-/********************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************/
+ ****************************************************************************/
 
 #include <nuttx/config.h>
+
+#include "arm.h"
 #include "up_internal.h"
 #include "up_arch.h"
 
-/********************************************************************
+/****************************************************************************
  * Macros
- ********************************************************************/
+ ****************************************************************************/
 
 	/* This macro will modify r0, r1, r2 and r14 */
 
@@ -57,9 +59,9 @@
 	.endm
 #endif
 
-/********************************************************************
+/****************************************************************************
  * OS Entry Point
- ********************************************************************/
+ ****************************************************************************/
 
 /* We assume the bootloader has already initialized most of the h/w for
  * us and that only leaves us having to do some os specific things
@@ -93,7 +95,7 @@ __start:
 
 	/* Copy system .data sections to new home in RAM. */
 
-#ifdef CONFIG_BOOT_FROM_FLASH
+#ifdef CONFIG_BOOT_RUNFROMFLASH
 
 	adr	r3, LC2
 	ldmia	r3, {r0, r1, r2}
@@ -141,7 +143,7 @@ LC0:	.long	_sbss
 	.long	_ebss
 	.long	_ebss+CONFIG_IDLETHREAD_STACKSIZE-4
 
-#ifdef CONFIG_BOOT_FROM_FLASH
+#ifdef CONFIG_BOOT_RUNFROMFLASH
 LC2:	.long	_eronly	/* Where .data defaults are stored in FLASH */
 	.long	_sdata	/* Where .data needs to reside in SDRAM */
 	.long	_edata

arch/arm/src/arm/up_prefetchabort.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- *  arch/arm/src/common/up_prefetchabort.c
+ *  arch/arm/src/src/up_prefetchabort.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without

arch/arm/src/arm/up_saveusercontext.S

@@ -1,7 +1,7 @@
 /**************************************************************************
- * common/up_saveusercontext.S
+ * arch/arm/src/arm/up_saveusercontext.S
  *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *

arch/arm/src/arm/up_schedulesigaction.c

@@ -0,0 +1,204 @@
+/****************************************************************************
+ * arch/arm/src/arm/up_schedulesigaction.c
+ *
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+
+#include "arm.h"
+#include "os_internal.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_schedule_sigaction
+ *
+ * Description:
+ *   This function is called by the OS when one or more
+ *   signal handling actions have been queued for execution.
+ *   The architecture specific code must configure things so
+ *   that the 'igdeliver' callback is executed on the thread
+ *   specified by 'tcb' as soon as possible.
+ *
+ *   This function may be called from interrupt handling logic.
+ *
+ *   This operation should not cause the task to be unblocked
+ *   nor should it cause any immediate execution of sigdeliver.
+ *   Typically, a few cases need to be considered:
+ *
+ *   (1) This function may be called from an interrupt handler
+ *       During interrupt processing, all xcptcontext structures
+ *       should be valid for all tasks.  That structure should
+ *       be modified to invoke sigdeliver() either on return
+ *       from (this) interrupt or on some subsequent context
+ *       switch to the recipient task.
+ *   (2) If not in an interrupt handler and the tcb is NOT
+ *       the currently executing task, then again just modify
+ *       the saved xcptcontext structure for the recipient
+ *       task so it will invoke sigdeliver when that task is
+ *       later resumed.
+ *   (3) If not in an interrupt handler and the tcb IS the
+ *       currently executing task -- just call the signal
+ *       handler now.
+ *
+ ****************************************************************************/
+
+void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver)
+{
+  /* Refuse to handle nested signal actions */
+
+  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+
+  if (!tcb->xcp.sigdeliver)
+    {
+      irqstate_t flags;
+
+      /* Make sure that interrupts are disabled */
+
+      flags = irqsave();
+
+      /* First, handle some special cases when the signal is
+       * being delivered to the currently executing task.
+       */
+
+      sdbg("rtcb=0x%p current_regs=0x%p\n", g_readytorun.head, current_regs);
+
+      if (tcb == (_TCB*)g_readytorun.head)
+        {
+          /* CASE 1:  We are not in an interrupt handler and
+           * a task is signalling itself for some reason.
+           */
+
+          if (!current_regs)
+            {
+              /* In this case just deliver the signal now. */
+
+              sigdeliver(tcb);
+            }
+
+          /* CASE 2:  We are in an interrupt handler AND the
+           * interrupted task is the same as the one that
+           * must receive the signal, then we will have to modify
+           * the return state as well as the state in the TCB.
+           *
+           * Hmmm... there looks like a latent bug here: The following
+           * logic would fail in the strange case where we are in an
+           * interrupt handler, the thread is signalling itself, but
+           * a context switch to another task has occurred so that
+           * current_regs does not refer to the thread at g_readytorun.head!
+           */
+
+          else
+            {
+              /* Save the return lr and cpsr and one scratch register
+               * These will be restored by the signal trampoline after
+               * the signals have been delivered.
+               */
+
+              tcb->xcp.sigdeliver       = sigdeliver;
+              tcb->xcp.saved_pc         = current_regs[REG_PC];
+              tcb->xcp.saved_cpsr       = current_regs[REG_CPSR];
+
+              /* Then set up to vector to the trampoline with interrupts
+               * disabled
+               */
+
+              current_regs[REG_PC]      = (uint32)up_sigdeliver;
+              current_regs[REG_CPSR]    = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
+
+              /* And make sure that the saved context in the TCB
+               * is the same as the interrupt return context.
+               */
+
+              up_savestate(tcb->xcp.regs);
+            }
+        }
+
+      /* Otherwise, we are (1) signaling a task is not running
+       * from an interrupt handler or (2) we are not in an
+       * interrupt handler and the running task is signalling
+       * some non-running task.
+       */
+
+      else
+        {
+          /* Save the return lr and cpsr and one scratch register
+           * These will be restored by the signal trampoline after
+           * the signals have been delivered.
+           */
+
+          tcb->xcp.sigdeliver       = sigdeliver;
+          tcb->xcp.saved_pc         = tcb->xcp.regs[REG_PC];
+          tcb->xcp.saved_cpsr       = tcb->xcp.regs[REG_CPSR];
+
+          /* Then set up to vector to the trampoline with interrupts
+           * disabled
+           */
+
+          tcb->xcp.regs[REG_PC]      = (uint32)up_sigdeliver;
+          tcb->xcp.regs[REG_CPSR]    = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
+        }
+
+      irqrestore(flags);
+    }
+}
+
+#endif /* !CONFIG_DISABLE_SIGNALS */

arch/arm/src/arm/up_sigdeliver.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_sigdeliver.c
+ * arch/arm/src/arm/up_sigdeliver.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -81,13 +81,12 @@
 
 void up_sigdeliver(void)
 {
-#ifndef CONFIG_DISABLE_SIGNALS
   _TCB  *rtcb = (_TCB*)g_readytorun.head;
   uint32 regs[XCPTCONTEXT_REGS];
   sig_deliver_t sigdeliver;
 
   /* Save the errno.  This must be preserved throughout the
-   * signal handling so that the the user code final gets
+   * signal handling so that the user code final gets
    * the correct errno value (probably EINTR).
    */
 
@@ -102,8 +101,8 @@ void up_sigdeliver(void)
   /* Save the real return state on the stack. */
 
   up_copystate(regs, rtcb->xcp.regs);
-  regs[REG_PC]   = rtcb->xcp.saved_pc;
-  regs[REG_CPSR] = rtcb->xcp.saved_cpsr;
+  regs[REG_PC]         = rtcb->xcp.saved_pc;
+  regs[REG_CPSR]       = rtcb->xcp.saved_cpsr;
 
   /* Get a local copy of the sigdeliver function pointer.
    * we do this so that we can nullify the sigdeliver
@@ -138,7 +137,6 @@ void up_sigdeliver(void)
 
   up_ledoff(LED_SIGNAL);
   up_fullcontextrestore(regs);
-#endif
 }
 
 #endif /* !CONFIG_DISABLE_SIGNALS */

arch/arm/src/arm/up_syscall.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- *  arch/arm/src/common/up_syscall.c
+ *  arch/arm/src/arm/up_syscall.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without

arch/arm/src/arm/up_undefinedinsn.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/common/up_undefinedinsn.c
+ * arch/arm/src/arm/up_undefinedinsn.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without

arch/arm/src/arm/up_vectoraddrexcptn.S

@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/common/up_vectoraddrexceptn.S
+ * arch/arm/src/src/up_vectoraddrexceptn.S
  *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without

arch/arm/src/arm/up_vectors.S

@@ -1,7 +1,7 @@
 /************************************************************************************
- * arch/arm/src/common/up_vectors.S
+ * arch/arm/src/arm/up_vectors.S
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,8 @@
 
 #include <nuttx/config.h>
 #include <nuttx/irq.h>
+
+#include "arm.h"
 #include "up_arch.h"
 
 /************************************************************************************

arch/arm/src/arm/up_vectortab.S

@@ -1,7 +1,7 @@
-/********************************************************************
- * common/up_vectortab.S
+/****************************************************************************
+ * arch/arm/src/arm/up_vectortab.S
  *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
@@ -31,32 +31,32 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ********************************************************************/
+ ****************************************************************************/
 
-/********************************************************************
+/****************************************************************************
  * Included Files
- ********************************************************************/
+ ****************************************************************************/
 
 #include <nuttx/config.h>
 
-/********************************************************************
+/****************************************************************************
  * Definitions
- ********************************************************************/
+ ****************************************************************************/
 
-/********************************************************************
+/****************************************************************************
  * Global Data
- ********************************************************************/
+ ****************************************************************************/
 
-/********************************************************************
+/****************************************************************************
  * Assembly Macros
- ********************************************************************/
+ ****************************************************************************/
 
-/********************************************************************
+/****************************************************************************
  * Name: _vector_start
  *
  * Description:
  *   Vector initialization block
- ********************************************************************/
+ ****************************************************************************/
 
 	.globl	_vector_start
 

arch/arm/src/c5471/c5471_ethernet.c

@@ -415,53 +415,16 @@ static void c5471_macassign(struct c5471_driver_s *c5471);
  ****************************************************************************/
 
 #ifdef CONFIG_C5471_NET_DUMPBUFFER
-static void c5471_dumpbuffer(const char *buffer, ssize_t nbytes)
+static inline void c5471_dumpbuffer(const char *msg, const ubyte *buffer, unsigned int nbytes)
 {
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
-  char line[128];
-  int ch;
-  int i;
-  int j;
-
-  for (i = 0; i < nbytes; i += 16)
-    {
-      sprintf(line, "%04x: ", i);
-      for (j = 0; j < 16; j++)
-        {
-          if (i + j < nbytes)
-            {
-              sprintf(&line[strlen(line)], "%02x", buffer[i+j] );
-            }
-          else
-            {
-              strcpy(&line[strlen(line)], "  ");
-            }
-
-          if (j == 7 || j == 15)
-            {
-              strcpy(&line[strlen(line)], " ");
-           }
-        }
-
-      for ( j = 0; j < 16; j++)
-        {
-          if (i + j < nbytes)
-            {
-              ch = buffer[i+j];
-              sprintf(&line[strlen(line)], "%c", ch >= 0x20 && ch <= 0x7e ? ch : '.');
-            }
-
-          if (j == 7 || j == 15)
-            {
-              strcpy(&line[strlen(line)], " ");
-           }
-        }
-      ndbg("%s\n", line);
-    }
-#endif
+  /* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_NET have to be
+   * defined or the following does nothing.
+   */
+    
+  nvdbgdumpbuffer(msg, buffer, nbytes);
 }
 #else
-# define c5471_dumpbuffer(buffer,nbytes)
+# define c5471_dumpbuffer(msg, buffer,nbytes)
 #endif
 
 /****************************************************************************
@@ -494,7 +457,7 @@ static void c5471_mdtxbit (int bit_state)
 
   putreg32((getreg32(GPIO_CIO) & ~GPIO_CIO_MDIO), GPIO_CIO);
 
-  /* Select the the bit output state */
+  /* Select the bit output state */
 
   if (bit_state)
     {
@@ -907,7 +870,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
   c5471->c_lastdescstart = c5471->c_rxcpudesc;
 
   nvdbg("Packet size: %d RX CPU desc: %08x\n", nbytes, c5471->c_rxcpudesc);
-  c5471_dumpbuffer(dev->d_buf, dev->d_len);
+  c5471_dumpbuffer("Transmit packet", dev->d_buf, dev->d_len);
 
   while (nbytes)
     {
@@ -1276,7 +1239,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
 
       dev->d_len = packetlen;
       nvdbg("Received packet, packetlen: %d type: %02x\n", packetlen, ntohs(BUF->type));
-      c5471_dumpbuffer(dev->d_buf, dev->d_len);
+      c5471_dumpbuffer("Received packet", dev->d_buf, dev->d_len);
 
       /* We only accept IP packets of the configured type and ARP packets */
 
@@ -2006,7 +1969,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
   putreg32(ENET_ADR_BROADCAST|ENET_ADR_PROMISCUOUS, ENET0_ADRMODE_EN);
 #else 
   /* The CPU port is not PROMISCUOUS, it wants a no-promiscuous address
-   * match yet the the SWITCH receives packets from the PROMISCUOUS ENET0
+   * match yet the SWITCH receives packets from the PROMISCUOUS ENET0
    * which routes all packets for filter matching at the CPU port which
    * then allows the s/w to see the new incoming packetes that passed
    * the filter. Here we are setting the main SWITCH closest the ether

arch/arm/src/c5471/c5471_irq.c

@@ -1,7 +1,7 @@
-/************************************************************
- * c5471/c5471_irq.c
+/****************************************************************************
+ * arch/arm/src/c5471/c5471_irq.c
  *
- *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
  *    used to endorse or promote products derived from this software
  *    without specific prior written permission.
  *
@@ -31,35 +31,38 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************/
+ ****************************************************************************/
 
-/************************************************************
+/****************************************************************************
  * Included Files
- ************************************************************/
+ ****************************************************************************/
 
 #include <nuttx/config.h>
 #include <sys/types.h>
+
 #include <nuttx/irq.h>
+
+#include "arm.h"
 #include "up_arch.h"
 #include "os_internal.h"
 #include "up_internal.h"
 
-/************************************************************
+/****************************************************************************
  * Definitions
- ************************************************************/
+ ****************************************************************************/
 
 #define ILR_EDGESENSITIVE 0x00000020
 #define ILR_PRIORITY      0x0000001E
 
-/************************************************************
+/****************************************************************************
  * Public Data
- ************************************************************/
+ ****************************************************************************/
 
 uint32 *current_regs;
 
-/************************************************************
+/****************************************************************************
  * Private Data
- ************************************************************/
+ ****************************************************************************/
 
 /* The value of _vflashstart is defined in ld.script.  It
  * could be hard-coded because we know that correct IRAM
@@ -87,11 +90,11 @@ static up_vector_t g_vectorinittab[] =
 };
 #define NVECTORS ((sizeof(g_vectorinittab)) / sizeof(up_vector_t))
 
-/************************************************************
+/****************************************************************************
  * Private Functions
- ************************************************************/
+ ****************************************************************************/
 
-/************************************************************
+/****************************************************************************
  * Name: up_ackirq
  *
  * Description:
@@ -100,7 +103,7 @@ static up_vector_t g_vectorinittab[] =
  *   output. Clear source IRQ register. Enables a new IRQ
  *   generation. Reset by internal logic.
  *
- ************************************************************/
+ ****************************************************************************/
 
 static inline void up_ackirq(unsigned int irq)
 {
@@ -109,7 +112,7 @@ static inline void up_ackirq(unsigned int irq)
   putreg32(reg | 0x00000001, INT_CTRL_REG); /* write the NEW_IRQ_AGR bit. */
 }
 
-/************************************************************
+/****************************************************************************
  * Name: up_ackfiq
  *
  * Description:
@@ -118,7 +121,7 @@ static inline void up_ackirq(unsigned int irq)
  *   output. Clear source FIQ register. Enables a new FIQ
  *   generation. Reset by internal logic.
  *
- ************************************************************/
+ ****************************************************************************/
 
 static inline void up_ackfiq(unsigned int irq)
 {
@@ -127,9 +130,9 @@ static inline void up_ackfiq(unsigned int irq)
   putreg32(reg | 0x00000002, INT_CTRL_REG); /* write the NEW_FIQ_AGR bit. */
 }
 
-/************************************************************
+/****************************************************************************
  * Name: up_vectorinitialize
- ************************************************************/
+ ****************************************************************************/
 
 static inline void up_vectorinitialize(void)
 {
@@ -143,13 +146,13 @@ static inline void up_vectorinitialize(void)
     }
 }
 
-/************************************************************
- * Public Funtions
- ************************************************************/
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
 
-/************************************************************
+/****************************************************************************
  * Name: up_irqinitialize
- ************************************************************/
+ ****************************************************************************/
 
 void up_irqinitialize(void)
 {
@@ -182,13 +185,13 @@ void up_irqinitialize(void)
 #endif
 }
 
-/************************************************************
+/****************************************************************************
  * Name: up_disable_irq
  *
  * Description:
  *   Disable the IRQ specified by 'irq'
  *
- ************************************************************/
+ ****************************************************************************/
 
 void up_disable_irq(int irq)
 {
@@ -199,13 +202,13 @@ void up_disable_irq(int irq)
     }
 }
 
-/************************************************************
+/****************************************************************************
  * Name: up_enable_irq
  *
  * Description:
  *   Enable the IRQ specified by 'irq'
  *
- ************************************************************/
+ ****************************************************************************/
 
 void up_enable_irq(int irq)
 {
@@ -216,13 +219,13 @@ void up_enable_irq(int irq)
     }
 }
 
-/************************************************************
+/****************************************************************************
  * Name: up_maskack_irq
  *
  * Description:
  *   Mask the IRQ and acknowledge it
  *
- ************************************************************/
+ ****************************************************************************/
 
 void up_maskack_irq(int irq)
 {

arch/arm/src/c5471/c5471_vectors.S

@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/c5471/c5471_vectors.S
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,8 @@
 
 #include <nuttx/config.h>
 #include <nuttx/irq.h>
+
+#include "arm.h"
 #include "up_arch.h"
 
 /************************************************************************************

arch/arm/src/c5471/c5471_watchdog.c

@@ -102,7 +102,7 @@ static int     wdt_ioctl(struct file *filep, int cmd, uint32 arg);
 
 static boolean g_wdtopen;
 
-struct file_operations g_wdtops =
+static const struct file_operations g_wdtops =
 {
   .open  = wdt_open,
   .close = wdt_close,
@@ -287,7 +287,7 @@ static int wdt_ioctl(struct file *filep, int cmd, uint32 arg)
 {
   dbg("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
 
-  /* Process the the IOCTL command (see arch/watchdog.h) */
+  /* Process the IOCTL command (see arch/watchdog.h) */
 
   switch(cmd)
     {

arch/arm/src/common/up_arch.h

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/common/up_arch.h
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,7 +45,6 @@
 # include <sys/types.h>
 #endif
 
-#include "arm.h"
 #include <arch/board/board.h>
 #include "chip.h"
 
@@ -82,11 +81,28 @@ static inline void putreg16(uint16 val, unsigned int addr)
  __asm__ __volatile__("\tstrh %0, [%1]\n\t": : "r"(val), "r"(addr));
 }
 
-/* Most DM320 registers are 16-bits wide */
-
-#define getreg(a)   getreg16(a)
-#define putreg(v,a) putreg16(v,a)
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
 
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
 #endif
 
+/* Atomic modification of registers */
+
+EXTERN void modifyreg8(unsigned int addr, ubyte clearbits, ubyte setbits);
+EXTERN void modifyreg16(unsigned int addr, uint16 clearbits, uint16 setbits);
+EXTERN void modifyreg32(unsigned int addr, uint32 clearbits, uint32 setbits);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
 #endif  /* ___ARCH_ARM_SRC_COMMON_UP_ARCH_H */

arch/arm/src/common/up_blocktask.c

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/common/up_blocktask.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -39,9 +39,12 @@
 
 #include <nuttx/config.h>
 #include <sys/types.h>
+
 #include <sched.h>
 #include <debug.h>
+
 #include <nuttx/arch.h>
+
 #include "os_internal.h"
 #include "up_internal.h"
 
@@ -71,7 +74,7 @@
  *
  * Inputs:
  *   tcb: Refers to a task in the ready-to-run list (normally
- *     the task at the the head of the list).  It most be
+ *     the task at the head of the list).  It most be
  *     stopped, its context saved and moved into one of the
  *     waiting task lists.  It it was the task at the head
  *     of the ready-to-run list, then a context to the new
@@ -129,7 +132,7 @@ void up_block_task(_TCB *tcb, tstate_t task_state)
                * Just copy the current_regs into the OLD rtcb.
                */
 
-               up_copystate(rtcb->xcp.regs, current_regs);
+               up_savestate(rtcb->xcp.regs);
 
               /* Restore the exception context of the rtcb at the (new) head 
                * of the g_readytorun task list.
@@ -139,7 +142,7 @@ void up_block_task(_TCB *tcb, tstate_t task_state)
 
               /* Then switch contexts */
 
-              up_copystate(current_regs, rtcb->xcp.regs);
+              up_restorestate(rtcb->xcp.regs);
             }
 
           /* Copy the user C context into the TCB at the (old) head of the

arch/arm/src/common/up_exit.c

@@ -1,7 +1,7 @@
 /****************************************************************************
  * common/up_exit.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -42,6 +42,7 @@
 #include <sched.h>
 #include <debug.h>
 #include <nuttx/arch.h>
+
 #include "os_internal.h"
 #include "up_internal.h"
 
@@ -78,7 +79,8 @@ static void _up_dumponexit(FAR _TCB *tcb, FAR void *arg)
   int i;
 #endif
 
-  sdbg("  TCB=%p name=%s\n", tcb, tcb->argv[0]);
+  sdbg("  TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+  sdbg("    priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
   if (tcb->filelist)
@@ -134,7 +136,7 @@ static void _up_dumponexit(FAR _TCB *tcb, FAR void *arg)
  *   This function causes the currently executing task to cease
  *   to exist.  This is a special case of task_delete() where the task to
  *   be deleted is the currently executing task.  It is more complex because
- *   a context switch must be perform to the the next ready to run task.
+ *   a context switch must be perform to the next ready to run task.
  *
  ****************************************************************************/
 

arch/arm/src/common/up_initialize.c

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/common/up_initialize.c
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,10 +52,6 @@
  * Definitions
  ****************************************************************************/
 
-/* Define to enable timing loop calibration */
-
-#undef CONFIG_ARM_CALIBRATION
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -74,16 +70,16 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_ARM_CALIBRATION) & defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
 static void up_calibratedelay(void)
 {
   int i;
-  slldbg("Beginning 100s delay\n");
+  lldbg("Beginning 100s delay\n");
   for (i = 0; i < 100; i++)
     {
       up_mdelay(1000);
     }
-  slldbg("End 100s delay\n");
+  lldbg("End 100s delay\n");
 }
 #else
 # define up_calibratedelay()
@@ -120,6 +116,10 @@ void up_initialize(void)
 
   up_calibratedelay();
 
+  /* Add any extra memory fragments to the memory manager */
+
+  up_addregion();
+
   /* Initialize the interrupt subsystem */
 
   up_irqinitialize();

arch/arm/src/common/up_internal.h

@@ -1,7 +1,7 @@
 /****************************************************************************
  * common/up_internal.h
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -71,6 +71,20 @@
 # define CONFIG_ARCH_INTERRUPTSTACK 0
 #endif
 
+/* Macros to handle saving and restore interrupt state.  In the current ARM
+ * model, the state is always copied to and from the stack and TCB.  In the
+ * Cortex-M3 model, the state is copied from the stack to the TCB, but only
+ * a referenced is passed to get the state from the TCB.
+ */
+
+#ifdef CONFIG_ARCH_CORTEXM3
+#  define up_savestate(regs)    up_copystate(regs, current_regs)
+#  define up_restorestate(regs) (current_regs = regs)
+#else
+#  define up_savestate(regs)    up_copystate(regs, current_regs)
+#  define up_restorestate(regs) up_copystate(current_regs, regs)
+#endif
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
@@ -104,6 +118,26 @@ extern uint32 g_heapbase;
 #if CONFIG_ARCH_INTERRUPTSTACK > 3
 extern uint32 g_userstack;
 #endif
+
+/* These 'addresses' of these values are setup by the linker script.  They are
+ * not actual uint32 storage locations! They are only used meaningfully in the
+ * following way:
+ *
+ *  - The linker script defines, for example, the symbol_sdata.
+ *  - The declareion extern uint32 _sdata; makes C happy.  C will believe
+ *    that the value _sdata is the address of a uint32 variable _data (it is
+ *    not!).
+ *  - We can recoved the linker value then by simply taking the address of
+ *    of _data.  like:  uint32 *pdata = &_sdata;
+ */
+
+extern uint32 _stext;           /* Start of .text */
+extern uint32 _etext;           /* End_1 of .text + .rodata */
+extern const uint32 _eronly;    /* End+1 of read only section (.text + .rodata) */
+extern uint32 _sdata;           /* Start of .data */
+extern uint32 _edata;           /* End+1 of .data */
+extern uint32 _sbss;            /* Start of .bss */
+extern uint32 _ebss;            /* End+1 of .bss */
 #endif
 
 /****************************************************************************
@@ -120,21 +154,28 @@ extern uint32 g_userstack;
 
 extern void up_boot(void);
 extern void up_copystate(uint32 *dest, uint32 *src);
-extern void up_dataabort(uint32 *regs);
 extern void up_decodeirq(uint32 *regs);
-extern void up_doirq(int irq, uint32 *regs);
 extern void up_fullcontextrestore(uint32 *regs) __attribute__ ((noreturn));
 extern void up_irqinitialize(void);
-extern void up_prefetchabort(uint32 *regs);
 extern int  up_saveusercontext(uint32 *regs);
 extern void up_sigdeliver(void);
-extern void up_syscall(uint32 *regs);
 extern int  up_timerisr(int irq, uint32 *regs);
-extern void up_undefinedinsn(uint32 *regs);
 extern void up_lowputc(char ch);
 extern void up_puts(const char *str);
 extern void up_lowputs(const char *str);
 
+#ifdef CONFIG_ARCH_CORTEXM3
+extern uint32 *up_doirq(int irq, uint32 *regs);
+extern int  up_svcall(int irq, FAR void *context);
+extern int  up_hardfault(int irq, FAR void *context);
+#else
+extern void up_doirq(int irq, uint32 *regs);
+extern void up_dataabort(uint32 *regs);
+extern void up_prefetchabort(uint32 *regs);
+extern void up_syscall(uint32 *regs);
+extern void up_undefinedinsn(uint32 *regs);
+#endif
+
 /* Defined in up_vectors.S */
 
 extern void up_vectorundefinsn(void);
@@ -145,6 +186,14 @@ extern void up_vectoraddrexcptn(void);
 extern void up_vectorirq(void);
 extern void up_vectorfiq(void);
 
+/* Defined in up_allocateheap.c */
+
+#if CONFIG_MM_REGIONS > 1
+void up_addregion(void);
+#else
+# define up_addregion()
+#endif
+
 /* Defined in up_serial.c */
 
 #if CONFIG_NFILE_DESCRIPTORS > 0

arch/arm/src/common/up_modifyreg16.c

@@ -0,0 +1,85 @@
+/****************************************************************************
+ * arch/arm/src/common/up_modifyreg16.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <debug.h>
+
+#include <arch/irq.h>
+#include <nuttx/arch.h>
+
+#include "up_arch.h"
+
+/****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg16
+ *
+ * Description:
+ *   Atomically modify the specified bits in a memory mapped register
+ *
+ ****************************************************************************/
+
+void modifyreg16(unsigned int addr, uint16 clearbits, uint16 setbits)
+{
+  irqstate_t flags;
+  uint16     regval;
+
+  flags   = irqsave();
+  regval  = getreg16(addr);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg16(regval, addr);
+  irqrestore(flags);
+}

arch/arm/src/common/up_modifyreg32.c

@@ -0,0 +1,85 @@
+/****************************************************************************
+ * arch/arm/src/common/up_modifyreg32.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <debug.h>
+
+#include <arch/irq.h>
+#include <nuttx/arch.h>
+
+#include "up_arch.h"
+
+/****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg32
+ *
+ * Description:
+ *   Atomically modify the specified bits in a memory mapped register
+ *
+ ****************************************************************************/
+
+void modifyreg32(unsigned int addr, uint32 clearbits, uint32 setbits)
+{
+  irqstate_t flags;
+  uint32     regval;
+
+  flags   = irqsave();
+  regval  = getreg32(addr);
+  regval &= ~clearbits;
+  regval |= setbits;
+  putreg32(regval, addr);
+  irqrestore(flags);
+}