Add support for nestable interrupts

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1506 42af7a65-404d-4744-a932-0658087f49c3

arch/sh/src/m16c/m16c_initialstate.c

@@ -40,7 +40,10 @@
 #include <nuttx/config.h>
 #include <sys/types.h>
 #include <string.h>
+
 #include <nuttx/arch.h>
+#include <arch/board/board.h>
+
 #include "up_internal.h"
 #include "up_arch.h"
 
@@ -48,8 +51,6 @@
  * Preprocessor Definitions
  ****************************************************************************/
 
-#define M16C_DEFAULT_IPL   0     /* Default M16C Interrupt priority level */
-
 /****************************************************************************
  * Private Data
  ****************************************************************************/

arch/sh/src/m16c/m16c_timerisr.c

@@ -41,7 +41,9 @@
 #include <sys/types.h>
 #include <time.h>
 #include <debug.h>
+
 #include <nuttx/arch.h>
+#include <arch/board/board.h>
 
 #include "clock_internal.h"
 #include "up_internal.h"

arch/sh/src/m16c/m16c_vectors.S

@@ -346,6 +346,13 @@ _m16c_commonvector:
 	fclr	u				/* Back to interrupt stack */
 	push.w	r0				/* Save user sp on isp */
 
+/* Allow nested interrupts */
+
+#ifdef M16C_INTERRUPT_IPL
+	fset	i				/* Enable interrupts */
+	ldipl	#M16C_INTERRUPT_IPL		/* Set interrupt level */
+#endif
+
 /* Then call _up_doirq with r1=IRQ number, r2=address of context info.  At this
  * point, the interrupt stack holds the address of the last byte of the context
  * info array
@@ -354,6 +361,10 @@ _m16c_commonvector:
  	stc	isp, r2				/* R2 = address of base of context info */
 	jsr.a	_up_doirq
 
+#ifdef M16C_INTERRUPT_IPL
+	fclr	i				/* Disable interrupts */
+#endif
+
 /* Upon return, r0 will hold address of the base of the new context info structure
  * use for return.  Most of the time this will be the same as the address passed to
  * to _up_doirg above, but will differ if a context switch occurs during interrupt

configs/skp16c26/include/board.h

@@ -63,6 +63,7 @@
 #define S3_DDR		pd8_1
 
 /* LEDs */
+
 #define	RED_LED		p8_0
 #define	YLW_LED		p7_4
 #define	GRN_LED		p7_2
@@ -71,6 +72,11 @@
 #define	YLW_DDR 	pd7_4
 #define	GRN_DDR 	pd7_2
 
+/* IPL settings */
+
+#define M16C_DEFAULT_IPL   0     /* Default M16C Interrupt priority level */
+#undef  M16C_INTERRUPT_IPL       /* Default interrupt IPL to enabled nested interrupts */
+
 /* Define any of the following to specify interrupt priorities.  A default
  * value of 5 will be used for any unspecified values
  */

configs/skp16c26/ostest/defconfig

@@ -33,7 +33,8 @@
 #
 ############################################################################
 #
-# architecture selection
+# architecture selection.  NOTE:  There are additional M16C-specific
+# settings that are provided via the arch/board/board.h file.
 #
 # CONFIG_ARCH - identifies the arch subdirectory and, hence, the
 #   processor architecture.