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Add z8 I2C driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1680 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
@@ -688,3 +688,6 @@
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* eZ80Acclaim!: Add a generic SPI driver for all eZ80 boards.
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* Add a setmode() method to the SPI interface to handle parts with differing
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mode requirements.
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* include/nuttx/i2c.h: Defined a standard I2C interface
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* eZ80Acclaim!: Add an I2C driver.
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* eZ8Encore!: Add an I2C driver.
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@@ -8,7 +8,7 @@
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<tr align="center" bgcolor="#e4e4e4">
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<td>
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<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
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<p>Last Updated: March 29, 2009</p>
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<p>Last Updated: April 4, 2009</p>
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</td>
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</tr>
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</table>
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@@ -948,7 +948,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1);
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Integration and testing of NuttX on the ZiLOG ez80f0910200zcog-d is complete.
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The first integrated version was released in NuttX version 0.4.2 (with important early bugfixes
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in 0.4.3 and 0.4.4).
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As of this writing, that port provides basic board support with a serial console and eZ80F91 EMAC driver.
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As of this writing, that port provides basic board support with a serial console, SPI, and eZ80F91 EMAC driver.
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</p>
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</td>
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</tr>
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@@ -1361,11 +1361,16 @@ nuttx-0.4.5 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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* eZ80Acclaim!: Add a generic SPI driver for all eZ80 boards.
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* Add a setmode() method to the SPI interface to handle parts with differing
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mode requirements.
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* include/nuttx/i2c.h: Defined a standard I2C interface
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* eZ80Acclaim!: Add an I2C driver.
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* eZ8Encore!: Add an I2C driver.
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pascal-0.1.3 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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buildroot-0.1.4 2009-xx-xx <spudmonkey@racsa.co.cr>
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* Add support for a blackfin toolchain using GCC 4.2.4 and binutils 2.19
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</pre></ul>
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<table width ="100%">
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@@ -688,8 +688,14 @@ o z80/z8/ez80 (arch/z80)
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Status: Open
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Priority: High if you happen to be working with XTRS.
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Description: A "generic" SPI driver has been coded for the eZ80Acclaim!
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However, this remains untested since I have no SPI devices for
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Description: A "generic" SPI and I2C drivers have been coded for the eZ80Acclaim!
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However, these remains untested since I have no SPI or I2C devices for
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the board (yet).
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Status: Open
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Priority: Med
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Description: A "generic" I2C driver has been coded for the eZ8Encore!
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However, this remains untested since I have no I2C devices for
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the board (yet).
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Status: Open
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Priority: Med
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@@ -1,7 +1,7 @@
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############################################################################
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# arch/z80/src/z8/Make.defs
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#
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# Copyright (C) 2008 Gregory Nutt. All rights reserved.
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# Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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#
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# Redistribution and use in source and binary forms, with or without
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@@ -45,5 +45,5 @@ CMN_CSRCS = up_initialize.c up_allocateheap.c up_createstack.c \
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CHIP_SSRCS = z8_vector.S z8_saveusercontext.S z8_restorecontext.S
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CHIP_CSRCS = z8_initialstate.c z8_irq.c z8_saveirqcontext.c \
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z8_schedulesigaction.c z8_sigdeliver.c z8_timerisr.c \
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z8_lowuart.c z8_serial.c z8_registerdump.c
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z8_lowuart.c z8_serial.c z8_i2c.c z8_registerdump.c
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+25
-17
@@ -2,7 +2,7 @@
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* arch/z80/src/z8/chip.h
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* arch/z80/src/chip/chip.h
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -167,27 +167,35 @@
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/* I2C Status Register Bit Definitions **********************************************/
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#if defined(_Z8FMC16) || defined(_Z8F1680)
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# define I2C_ISTAT_NCKI (1 << 0) /* Bit 0: 1=NAK Interrupt */
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# define I2C_ISTAT_SPRS (1 << 1) /* Bit 1: 1=STOP/RESTART condition Interrupt */
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# define I2C_ISTAT_ARBLST (1 << 2) /* Bit 2: 1=Arbitration lost */
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# define I2C_ISTAT_RD (1 << 3) /* Bit 3: 1=Read */
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# define I2C_ISTAT_GCA (1 << 4) /* Bit 4: 1=General Call Address */
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# define I2C_ISTAT_SAM (1 << 5) /* Bit 5: 1=Slave address match */
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# define I2C_ISTAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */
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# define I2C_ISTAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */
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#else
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# define I2C_STAT_NCKI (1 << 0) /* Bit 0: 1=NACK Interrupt */
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# define I2C_STAT_DSS (1 << 1) /* Bit 1: 1=Data Shift State */
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# define I2C_STAT_TAS (1 << 2) /* Bit 2: 1=Transmit Address State */
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# define I2C_STAT_RD (1 << 3) /* Bit 3: 1=Read */
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# define I2C_STAT_10B (1 << 4) /* Bit 4: 1=10-Bit Address */
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# define I2C_STAT_ACK (1 << 5) /* Bit 5: 1=Acknowledge */
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# define I2C_STAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */
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# define I2C_STAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */
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# define I2C_STAT_NCKI (1 << 0) /* Bit 0: 1=NAK Interrupt */
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# define I2C_STAT_DSS (1 << 1) /* Bit 1: 1=Data Shift State */
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# define I2C_STAT_TAS (1 << 2) /* Bit 2: 1=Transmit Address State */
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# define I2C_STAT_RD (1 << 3) /* Bit 3: 1=Read */
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# define I2C_STAT_10B (1 << 4) /* Bit 4: 1=10-Bit Address */
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# define I2C_STAT_ACK (1 << 5) /* Bit 5: 1=Acknowledge */
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# define I2C_STAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */
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# define I2C_STAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */
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#endif
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/* I2C Control Register Bit Definitions *********************************************/
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#define I2C_CTL_FILTEN (1 << 0) /* Bit 0: 1=I2C Signal Filter Enable */
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#define I2C_CTL_FLUSH (1 << 1) /* Bit 1: 1=Flush Data */
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#define I2C_CTL_NAK (1 << 2) /* Bit 2: 1=Send NAK */
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#define I2C_CTL_TXI (1 << 3) /* Bit 3: 1=Enable TDRE interrupts */
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#define I2C_CTL_BIRQ (1 << 4) /* Bit 4: 1=Baud Rate Generator Interrupt Request */
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#define I2C_CTL_STOP (1 << 5) /* Bit 5: 1=Send Stop Condition */
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#define I2C_CTL_START (1 << 6) /* Bit 6: 1=Send Start Condition */
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#define I2C_CTL_IEN (1 << 7) /* Bit 7: 1=I2C Enable */
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#define I2C_CTL_FILTEN (1 << 0) /* Bit 0: 1=I2C Signal Filter Enable */
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#define I2C_CTL_FLUSH (1 << 1) /* Bit 1: 1=Flush Data */
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#define I2C_CTL_NAK (1 << 2) /* Bit 2: 1=Send NAK */
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#define I2C_CTL_TXI (1 << 3) /* Bit 3: 1=Enable TDRE interrupts */
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#define I2C_CTL_BIRQ (1 << 4) /* Bit 4: 1=Baud Rate Generator Interrupt Request */
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#define I2C_CTL_STOP (1 << 5) /* Bit 5: 1=Send Stop Condition */
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#define I2C_CTL_START (1 << 6) /* Bit 6: 1=Send Start Condition */
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#define I2C_CTL_IEN (1 << 7) /* Bit 7: 1=I2C Enable */
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/* Register access macros ***********************************************************
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*
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Executable
+603
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