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ez80Acclaim fixes from Kevin Franzen
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1500 42af7a65-404d-4744-a932-0658087f49c3
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@@ -614,6 +614,13 @@
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0.4.2 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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* Add support for the Renesas M16C MCU and the SKP16C26 StarterKit.
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* Kevin Franzen has integrated and verified the ez80Acclaim! port and he has
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graciously provided the following critical changes:
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- Fix interrupt vectors positioning; they were being positioned wrong by
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64 bytes.
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- Corrected some stack handling errors during interrupt handling contextg
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save and restore.
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- Corrected vector intialization logic
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@@ -8,7 +8,7 @@
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<tr align="center" bgcolor="#e4e4e4">
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<td>
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<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
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<p>Last Updated: February 13, 2009</p>
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<p>Last Updated: February 14, 2009</p>
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</td>
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</tr>
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</table>
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@@ -898,7 +898,13 @@
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</p>
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<p>
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<b>STATUS:</b>
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This is a work in progress. Verified ez80 support will be announced in a future NuttX release.
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Kevin Franzen has integrated and verified the ez80Acclaim! port and he has
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graciously provided the changes that he made. So I do not have first hand
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experience, but the ez80Acclaim! port should be functional.
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Kevin's changes were released in NuttX version 0.4.2.
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</p>
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<p>
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The EMAC driver has not yet been verified.
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</p>
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</td>
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</tr>
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@@ -1289,6 +1295,13 @@ buildroot-0.1.2 2007-11-06 <spudmonkey@racsa.co.cr>
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nuttx-0.4.2 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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* Add support for the Renesas M16C MCU and the SKP16C26 StarterKit.
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* Kevin Franzen has integrated and verified the ez80Acclaim! port and he has
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graciously provided the following critical changes:
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- Fix interrupt vectors positioning; they were being positioned wrong by
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64 bytes.
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- Corrected some stack handling errors during interrupt handling contextg
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save and restore.
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- Corrected vector intialization logic
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pascal-0.1.3 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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@@ -210,7 +210,7 @@ _ez80_rstcommon:
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push de ; Offset 2: DE
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push bc ; Offset 1: BC
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ld b, a ; Save the reset number in B
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ld c, a ; Save the reset number in C
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ld a, i ; Carry bit holds interrupt state
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push af ; Offset 0: I with interrupt state in carry
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di
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@@ -221,7 +221,6 @@ _ez80_rstcommon:
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add hl, sp ;
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push hl ; Place argument #2 at the top of stack
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push bc ; Argument #1 is the Reset number
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inc sp ; (make byte sized)
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call _up_doirq ; Decode the IRQ
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; On return, HL points to the beginning of the reg structure to restore
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@@ -241,9 +240,7 @@ _ez80_rstcommon:
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pop ix ; Offset 3: IX
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pop iy ; Offset 4: IY
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exx ; Use alternate BC/DE/HL
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ld hl, #-2 ; Offset of SP to account for ret addr on stack
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pop de ; Offset 5: HL' = Stack pointer after return
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add hl, de ; HL = Stack pointer value before return
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pop hl ; Offset 5: HL' = Stack pointer after return
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exx ; Restore original BC/DE/HL
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pop hl ; Offset 6: HL
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pop af ; Offset 7: AF
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@@ -273,21 +270,31 @@ _ez80_initvectors:
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; Initialize the vector table
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ld iy, _ez80_vectable
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ld ix, 4
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ld bc, 4
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ld b, NVECTORS
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ld hl, _ez80_handlers
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ld de, handlersize
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xor a, a ; Clear carry
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ld hl, handlersize
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ld de, _ez80_handlers
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sbc hl, de ; Length of irq handler in hl
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ld d, h
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ld e, l
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ld hl, _ez80_handlers ; Start of handlers in hl
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ld a, 0
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$1:
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ld (iy), hl ; Store IRQ handler
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ld (iy+3), a ; Pad to 4 bytes
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add hl, de ; Point to next handler
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add iy, bc ; Point to next entry in vector table
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djnz $1 ; Loop until all vectors have been written
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ld (iy), hl ; Store IRQ handler
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ld (iy+3), a ; Pad to 4 bytes
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add hl, de ; Point to next handler
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push de
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ld de, 4
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add iy, de ; Point to next entry in vector table
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pop de
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djnz $1 ; Loop until all vectors have been written
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; Select interrupt mode 2
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im 2 ; Interrupt mode 2
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im 2 ; Interrupt mode 2
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; Write the address of the vector table into the interrupt vector base
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@@ -304,5 +311,8 @@ $1:
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define .IVECTS, space = RAM, align = 200h
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segment .IVECTS
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; The first 64 bytes are not used... the vectors actually start at +0x40
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_ez80_vecreserve:
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ds 64
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_ez80_vectable:
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ds NVECTORS * 4
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ds NVECTORS * 4
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