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88 Commits
Author SHA1 Message Date
Frédéric DesbiensandGitHub a0dc185f66 Merge pull request #508 from goodnorning/feature/rv64_rvv_support 
Added rv64 rvv support
 2026-04-14 09:26:33 -04:00
shuta.lst dfafc96149 RISC-V64 qemu_virt example support RVV Extension; 2026-04-07 14:03:24 +08:00
shuta.lst 2f1fc52918 RISC-V64 arch. port support RVV Extension; 2026-04-07 11:41:33 +08:00
Frédéric DesbiensandGitHub c3259a2160 Updated copyright headers and version number constants (#509) 
* Updated version number constants

* Removed revision history from all files

* Added Eclipse ThreadX contributors' copyright header
 2026-03-05 10:46:30 +01:00
Frédéric DesbiensandGitHub 385d39f421 Merge pull request #502 from quintauris-tech/riscv32-clang-port 
Added a RV32 Clang port
 2026-03-04 08:36:53 +01:00
Frédéric DesbiensandGitHub b3e8a9aa20 Merge pull request #500 from goodnorning/feature/support_xuantie_e906 
Added support for the XuanTie E906 CPU.
 2026-03-04 08:34:59 +01:00
Frédéric DesbiensandGitHub 0c92f48d50 Merge pull request #493 from mehmetteren/dev 
Fixed VFP build failure in Cortex-A tx_thread_schedule.S
 2026-03-02 11:41:53 -05:00
Frédéric Desbiens da5093f84b Proposed changes to the original PR 2026-03-02 14:24:07 +01:00
Akif Ejaz cd101d9ab4 update comments 
Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-03-01 15:13:28 +05:00
Akif Ejaz ff287cce97 update qemu examples as per new rv port format 
- removed the REGBYTES, STORE/LOAD macros

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-03-01 14:14:19 +05:00
Francisco Manuel Merino Torres 49439bfa9c Fixes to the RISC-V32 architecture port layer for Clang. 2026-02-26 11:54:26 +01:00
Francisco Manuel Merino Torres 888f7a42b0 Added a RISC-V32 architecture port layer for Clang. 2026-02-26 10:49:23 +01:00
Frédéric DesbiensandGitHub 8f126ee414 Merge pull request #492 from akifejaz/qemu-virt-rv32 
Added a RISC-V32 QEMU-virt example
 2026-02-25 08:24:38 -05:00
Frédéric DesbiensandGitHub 0a0615ada3 Merge pull request #501 from akifejaz/rv64-gnu-port 
Removed dead code from riscv64/gnu port
 2026-02-25 08:23:49 -05:00
shuta.lst 7bf83088b8 Support XuanTie E906 CPU 
- Place the E906 implementation in the ports/risc-v32/gnu directory;
 - Remove code unrelated to the xuantie_smartl_fpga demo;
 2026-02-25 11:23:09 +08:00
Akif Ejazandshuta.lst 1d796d5fde Add RISC-V32 arch. port layer 
This update adapts the ThreadX low-level kernel routines
for RV32, including:
  - startup and initialization logic
  - context save/restore implementations
  - interrupt control and scheduler entry
  - thread stack build and system return paths
  - timer interrupt handling
  - made it complient as per new risc-v64/gnu
      & threadx style
  - added reademe for risc-v32/gnu port

These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-02-25 09:06:02 +08:00
Frédéric DesbiensandGitHub 4de9be75e5 Merge pull request #490 from akifejaz/rv32-port 
Added a RISC-V32 architecture port layer for GCC.
 2026-02-24 11:06:03 -05:00
Akif Ejaz 757db54d6d Add RISC-V32 arch. port layer 
This update adapts the ThreadX low-level kernel routines
for RV32, including:
  - startup and initialization logic
  - context save/restore implementations
  - interrupt control and scheduler entry
  - thread stack build and system return paths
  - timer interrupt handling
  - made it complient as per new risc-v64/gnu
      & threadx style
  - added reademe for risc-v32/gnu port

These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-02-16 17:15:13 +05:00
Akif Ejaz c1bff3ae34 removed dead code in riscv64/gnu port 
Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-02-16 13:57:51 +05:00
shuta.lst ede5aa2867 Support XuanTie E906 CPU. 
- add ThreadX porting codes for XuanTie E906.
 - add example for XuanTie E906 running on QEMU smartl.
 2026-02-12 23:13:31 +08:00
Frédéric DesbiensandGitHub 579246b4a2 Merge pull request #494 from spir6s/master 
Added missing ULONG64 definition for RX ports needed by USBX and NetX Duo
 2026-02-05 09:52:58 -05:00
Frédéric DesbiensandGitHub 0b0f1d0911 Merge pull request #496 from akifejaz/rv64-gnu-port 
Improved RV64/GNU port robustness, portability, and CSR handling
 2026-02-05 09:50:08 -05:00
Akif Ejaz 21256bed51 Cleanup the macros in tx_port.h & comments in inc/*.S 
- removed the trailing whitespaces

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-02-05 16:16:59 +05:00
Akif Ejaz 99ed67df5a few cleanups 
Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-01-26 16:08:51 +05:00
Akif Ejaz 6c25effb40 improve port robustness, portability, and CSR handling 
- removed tx_port.h dependency from .S files
- replaced tx_timer_interrupt.c with tx_timer_interrupt.S
-  made some cleanups, formatting to better readability
- removed macros (LOAD/STORE/REGBYTES)
  changed register nomenclature to use RISC-V ABI
  names (ra, sp, t0, etc.)
- added readme_threadx.txt

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-01-26 15:48:46 +05:00
Sebastian Paarz b443c0fe2d Added missing ULONG64 definition for RX ports 2026-01-09 13:51:35 +01:00
Mehmet Eren Balasar a7961fe190 Fix VFP build failure in Cortex-A tx_thread_schedule.S 
When TX_ENABLE_VFP_SUPPORT is defined, the build fails due to missing
IRQ_MASK and FIQ_MASK symbols in the restore logic.

This adds the local definitions (0x80 and 0x40) to tx_thread_schedule.S
to match tx_thread_interrupt_restore.S, enabling successful compilation
on GNU and AC6 Cortex-A ports.
 2026-01-06 19:07:48 +03:00
Akif Ejaz 5d2c393fa4 Add RISC-V32 QEMU-virt example 
This commit introduces the complete example build environment for the
RISC-V32/GNU port targeting the QEMU virt machine. It includes basic BSP
components, startup code, drivers, linker script, and a minimal ThreadX
demo application.

Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>
 2026-01-01 14:22:29 +05:00
Frédéric DesbiensandGitHub ca7589ce4a Merge pull request #463 from ericminnerath/fix-iar-include 
Fix IAR include typo.
 2025-09-21 16:50:09 -04:00
ericminnerath 67e415648e initial commit 2025-08-27 17:15:42 -05:00
Huan Nguyen 20958ddcf9 Document GNU library compile flags for Linux and SMP Linux 2025-04-14 13:04:15 -06:00
Frédéric Desbiens 376e26be29 Updated ports version to v6.4.2. 2025-02-24 13:31:48 -05:00
Frédéric DesbiensandGitHub e657568041 Merge pull request #416 from Jer6y/master 
riscv : add riscv qemu virt support and fix fs bit error in mstatus
 2025-02-13 09:58:54 -05:00
Sebastian Paarz bb4540f65a Added missing CMakeLists.txt for Renesas RX ports 2024-11-28 10:02:47 +01:00
Jer6y d24da0e2ea riscv : add riscv qemu virt support and fix fs bit error in mstatus 2024-10-25 20:03:11 +08:00
RavuriN db5e0de743 Updated Microsoft Asure RTOS to Eclipse ThreadX RTOS 2024-03-24 18:43:44 +00:00
TiejunZhou 27f0ce9ca2 Update version number to 6.4.1 2024-02-27 06:00:58 +00:00
bo chen 039a346397 Update the copyright for all assembly files. 2024-02-23 09:39:05 +08:00
Bo Chen (from Dev Box) 3e1da1f0b0 Update version id string. 2024-01-30 08:39:18 +08:00
Bo Chen (from Dev Box) 8276bcf711 Update copyright. 2024-01-29 13:51:15 +08:00
Xiuwen CaiandGitHub 39f3c86c61 Add error handling in lock initialization in the Xtensa port (#340) 
* Add error handling in lock initialization.

* Update release data and version.
 2023-12-28 13:17:58 +08:00
TiejunZhouandGitHub d9ffb0f97d Update release date and version (#338) 
* Update version number in API header

* Update release date and version
 2023-12-28 10:51:29 +08:00
Yajun XiaandGitHub e73843f6d4 Added thumb mode support for threadX GNU ports on armv7a platforms. (#333) 
* Added thumb mode support for threadX GNU ports on armv7a platforms.

https://msazure.visualstudio.com/One/_workitems/edit/26105175/

* move the swi interrupt to tx_initialize_low_level.S.

* update the test log.
 2023-12-28 09:37:39 +08:00
TiejunZhouandGitHub 13b700fd3e Update release version to 6.3.0 and date to 10-31-2023 (#308) 2023-10-23 15:31:03 +08:00
Yajun XiaandGitHub bc4bd804d5 Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A5 GNU port (#306) 
https://msazure.visualstudio.com/One/_workitems/edit/25153813/
 2023-09-26 09:51:47 +08:00
Yajun XiaandGitHub d43cba10b2 Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A9 GNU port. (#303) 
https://msazure.visualstudio.com/One/_workitems/edit/25153785/
 2023-09-18 16:36:36 +08:00
Yajun XiaandGitHub a0a0ef9385 Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A8 GNU port. (#302) 
https://msazure.visualstudio.com/One/_workitems/edit/25139203/
 2023-09-18 10:32:07 +08:00
Yajun XiaandGitHub 6aeefea8e6 Fixed the issue of the data/bss section cannot be read from ARM FVP d… (#301) 
* Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A7 GNU port.

https://msazure.visualstudio.com/One/_workitems/edit/24597276/

* remove untracked files.
 2023-09-15 10:46:20 +08:00
TiejunZhouandGitHub 08380caa77 Unify ThreadX and SMP for ARMv8-A. (#275) 
* Unify ThreadX and SMP for ARMv8-A.

* Fix path in pipeline to check ports arch.

* Add ignore folders for ARM DS

* Generate ThreadX and SMP ports for ARMv8-A.

* Ignore untracked files for ports_arch check.

* Use arch instead of CPU to simplify the project management.
 2023-06-21 18:23:36 +08:00
Yanwu CaiandGitHub 1b2995cea8 Fix compile warnings in Linux port. (#276) 2023-06-19 17:45:16 +08:00