Enable CONFIG_ARCH_IRQ_TO_NDX, CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC
and CONFIG_ARCH_NUSER_INTERRUPTS=2 which are now required by the Xtensa
ESP32-S3 interrupt handling after upstream changes.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
On ESP32-P4 rev < v3, the 768KB HP L2MEM is split into two
non-contiguous regions: sram_low and sram_high. Previously only
sram_low was used for the heap, wasting 384KB of sram_high.
Export _sram_high_heap_start and _sram_high_heap_end symbols from
the linker script and add sram_high to the heap via kumm_addregion()
in riscv_addregion() when MM_REGIONS > 1.
Signed-off-by: likun17 <likun17@xiaomi.com>
The chip revision check was disabled with #if 0 for v1.0 bringup.
Restore the original #ifndef ESP32P4_IGNORE_CHIP_REVISION_CHECK
guard so boards can selectively bypass the PANIC by defining
this macro, while keeping the warning message in the #else branch.
Signed-off-by: likun17 <likun17@xiaomi.com>
Add ESPRESSIF_FLASH_32M Kconfig option and the corresponding
esptool flash size mapping in Config.mk to support boards with
32MB NOR flash.
Signed-off-by: likun17 <likun17@xiaomi.com>
Document the HT32F491x3 ESK32 board, build steps,
flashing flow, and validation commands. Add WSL and
PowerShell flash backends plus a Python wrapper.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Add the ESK32 board with nsh configuration, linker script,
board bring-up, flashing helper, and user LED support.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Add initial HT32F491x3 support with startup, IRQ handling,
serial console, GPIO helpers, custom vectors, and CMake build files.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
This adds support for PBKDF2 (SHA1 and SHA256) while leveraging
the existing infrastructure for HMAC.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
include/cxx contains NuttX's mini C++ ABI shims and must only be added
to the include path when CONFIG_LIBMINIABI is selected. tools/Config.mk
was adding it unconditionally for every non-LIBCXX/non-UCLIBCXX build,
and the platform.cmake files for arm, arm64, risc-v, x86_64 and tricore
were adding it inside the CONFIG_LIBCXXTOOLCHAIN block.
With an unpatched downloaded ARM GNU Toolchain, <cstdlib> uses
newlib's stdlib.h, defining div_t as an anonymous struct. A later
inclusion of NuttX's stdlib.h via <cstdio>->stdio.h->kmalloc.h then
redefines div_t with struct tag div_s, causing a conflicting declaration
error.
Guard the div_t/ldiv_t/lldiv_t definitions in stdlib.h with
redefinitions when a toolchain stdlib.h was already processed.
Also fix lldiv_s members typed as long instead of long long.
Signed-off-by: trns1997 <trns1997@gmail.com>
Add UVC configuration for lckfb-szpi-esp32s3 board based on gc0308
camera config, with USB OTG and UVC gadget driver enabled in
standalone (non-composite) mode.
- defconfig: enable ESP32S3_OTG, USBUVC, UVC example app
- board doc: add uvc section with usage and host verification
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Add USB Video Class 1.1 gadget driver supporting Bulk transport
with uncompressed YUY2 video streaming. Resolution and frame
interval are negotiated dynamically via PROBE/COMMIT control.
- uvc.h: protocol constants, streaming control struct, public API
- uvc.c: class driver with PROBE/COMMIT, bulk EP, /dev/uvc0 chardev
- Kconfig/Make.defs: USBUVC config and build rules
- boardctl.c: BOARDIOC_USBDEV_UVC standalone init path
Hardened against host disconnect:
- Removed nxmutex_lock from USB interrupt context paths
- Added 30s semaphore timeout in uvc_write with EP_CANCEL fallback
- Drain stale wrsem counts in VS_COMMIT before new stream
- Guard uvc_streaming_stop() against double EP_CANCEL race
- Handle EP_SUBMIT returning -ESHUTDOWN gracefully
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
GC0308 sensor supports multiple output formats via register 0x24.
Add YUYV (YCbCr422) alongside existing RGB565 in fmtdescs and
configure the output format register dynamically in start_capture()
based on the requested pixel format.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
- Remove debug polling loop from esp32s3_cam_start_capture() that
busy-waited on DMA status register.
- Fix DMA ISR race: stop DMA before invoking capture callback to
prevent ISR re-triggering while callback processes the buffer.
Check priv->capturing before restarting DMA in ISR.
- Move DMA descriptors from struct to heap allocation, avoiding
stack/BSS alignment issues with cache-line-aligned descriptors.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Export qemu_rv_configure_mpu() and invoke it on the secondary-hart
boot path before riscv_cpu_boot().
This keeps protected SMP builds from faulting on !CPU0 when userspace
work is first scheduled there.
Signed-off-by: Shunchao Hu <ankohuu@gmail.com>
This is necessary because new defconfig were recently added to
Xtensa-based Espressif SoCs and the build job may exceed 2 hours.
In order to avoid increasing job timeout, a specific job for each
supported SoC (ESP32, ESP32-S2 and ESP32-S3) was created instead.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.
Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements
Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
options from interrupt sources to CPU interrupts, providing flexibility
required by modern peripherals. Although this introduces breaking changes
to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper
configuration. This validation prevents runtime issues from configuration
mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
NuttX-native implementations of xt_ints_on/off and interrupt handlers,
avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
RTC/RT-timer code to common-source Espressif integration, including
esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
implementation, including common-source auto-sleep behavior, UART/Wi-Fi
wakeup coordination, and tickless-safe sleep flow compatibility.
Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Tested configurations:
- All defconfigs were tested, including `ostest`.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This is necessary because new defconfig were recently added to
Xtensa-based Espressif SoCs and the build job may exceed 2 hours.
In order to avoid increasing job timeout, a specific job for each
supported SoC (ESP32, ESP32-S2 and ESP32-S3) was created instead.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Fixes the following compilation error.
stm32_gpio.c: In function 'stm32gpio_interrupt':
stm32_gpio.c:150:24: error: 'tm32gpint' undeclared (first use in
this function); did you mean 'stm32gpint'?
150 | tm32gpint->stm32gpio.id);
| ^~~~~~~~~
| stm32gpint
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
The definition of ADC channels should not depend on option
CONFIG_INPUT_AJOYSTICK at all. Moreover, the include of stm32l4_adc.h
file was missing (PWM include was used instead), causing the implicit
declaration of stm32l4_adc_initialize function.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Add rst documentation for the getevent tool under
Documentation/applications/graphics/input/. Content is placed
directly in index.rst following the existing convention used by
other graphics application docs.
Signed-off-by: liuhongchao <liuhongchao@xiaomi.com>
When a developer working on BSP wants UART1 with RTS, the following
needs to be added in the BSP's include/board.h file:
#define PIN_UART1_RTS PIN_UART1_RTS_1
which says that PIN_UART1_RTS_1 -- the first alternative pin with UART1
RTS function -- should be used for the UART1's RTS.
There are no alternative pins for PIN_UART2_RTS, therefore a similar
definition is not used for PIN_UART2_RTS.
However, that is a complication when we want PIN_UART2_RTS to be defined
as GPIO, for example:
#define PIN_UART2_RTS (GPIO_OUTPUT | PIN_PORTB | PIN2)
In such a case, PIN_UART2_RTS is later redefined to the only alternative
function from hardware/kinetis_???pinmux.h file.
This patch avoids the redefinition of already defined names.
We considered renaming PIN_UART2_RTS to PIN_UART2_RTS_1 in the
hardware/kinetis_???pinmux.h file, but that is breaking change. We try
to avoid breaking change.
Signed-off-by: Jiri Vlasak <jvlasak@elektroline.cz>
Because it is not needed anymore.
The original code here is from the initial implementation in the commit
66b873ef77.
Signed-off-by: Jiri Vlasak <jvlasak@elektroline.cz>
When using CONFIG_UART?_RS485CONTROL, RTS pin is set high when sending
data and low otherwise. PIN_UART?_RTS is defined in the board.h file as
the appropriate ALT functionality of the chip's port.
However, it may happen that PIN_UART?_RTS is wired to another pin of the
chip that does not support the RTS as ALT functionality of the UART? in
question. This commit addresses such a situation.
When UART?_RS485CONTROL_RTSISGPIO is set in menuconfig for the given
UART?, it is expected that the PIN_UART?_RTS is defined as GPIO_OUTPUT,
and the PIN_UART?_RTS is set high when sending data and low otherwise.
Signed-off-by: Jiri Vlasak <jvlasak@elektroline.cz>
Rename STM32_IRQ_NEXTINT to STM32_IRQ_NEXTINTS across all stm32
variants.
In stm32_dumpnvic() dynamically print NVIC enable and priority
registers based on STM32_IRQ_NEXTINTS.
Use PRIx32 format specifier instead of 'x' (since uint32_t on arm is
actually a long unsigned int).
Simplify if/else chain in stm32_irqinfo() to determine irq reg/bit.
There's no stm32_irqinfo.c; remove mention in stm32f0l0g0/Make.defs.
Signed-off-by Peter Barada <peter.barada@gmail.com>
Ignore unsupported telnet subnegotiation payload until `IAC SE` so
option bytes do not leak into the first NSH command.
Keep existing NAWS handling intact and also treat `IAC IAC` inside
subnegotiation payload as an escaped `0xFF` data byte rather than a
subnegotiation terminator.
This makes subnegotiation parsing RFC-compliant for both unsupported
options and NAWS payload processing.
Signed-off-by: Shunchao Hu <ankohuu@gmail.com>
Fix adc_oversample() where priv->trovs (a bool, 0 or 1) was OR'd
directly into setbits instead of using ADC_CFGR2_TROVS (bit 9).
This caused triggered oversampling to never actually be enabled.
Fix ANIOC_WDOG_UPPER and ANIOC_WDOG_LOWER ioctls where the TR1
register was overwritten with only the new threshold value, zeroing
out the opposite threshold and the AWDFILT digital filter bits.
Use read-modify-write to preserve the other fields.
Signed-off-by: kywwilson11 <kwilson@2g-eng.com>
Eren Terzioglu
p-szafonimateusz
dependabot[bot]
wangjianyu3
likun17
Felipe Moura
Vlad Pruteanu
trns1997
Alin Jerpelea
Shunchao Hu
Tiago Medicci Serrano
Michal Lenc
liuhongchao
Jiri Vlasak
raiden00pl
Filipe Cavalcanti
simbit18
Peter Barada
SPRESENSE
kywwilson11