32 Commits

Author SHA1 Message Date
Tiago Medicci Serrano c17e16eaed xtensa/espressif: Update common-source integration for Xtensa devices
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.

Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements

Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
  options from interrupt sources to CPU interrupts, providing flexibility
  required by modern peripherals. Although this introduces breaking changes
  to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
  Kconfig option is explicitly checked during startup to ensure proper
  configuration. This validation prevents runtime issues from configuration
  mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
  NuttX-native implementations of xt_ints_on/off and interrupt handlers,
  avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
  RTC/RT-timer code to common-source Espressif integration, including
  esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
  implementation, including common-source auto-sleep behavior, UART/Wi-Fi
  wakeup coordination, and tickless-safe sleep flow compatibility.

Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.

Tested configurations:
- All defconfigs were tested, including `ostest`.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-03-29 00:33:11 +08:00
Eren Terzioglu 1dcbb7c519 boards/xtensa/esp32[-s2|-s3]: Refactor PM board layer
Refactor PM board layer for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-12-02 02:37:06 +08:00
Filipe Cavalcanti 680766d304 arch/xtensa: update SPI Flash driver for ESP32-S2|S3
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-29 09:44:55 -04:00
Filipe Cavalcanti 58cdb9cfea boards/xtensa: optimize linker script IRAM section
Improve IRAM usage.
- Remove unnecessary E-Fuse sources;
- Optimizing (ESP32) and add (S2|S3) libpp(Wi-Fi related).

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-23 20:34:59 +08:00
Eren Terzioglu 6702b4fdb4 boards/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin board support
Add multiple ULP RISC-V bin board support for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu 783e1b8808 boards/xtensa/esp32[-s2|-s3]: Add ULP RISC-V coprocessor support
Add ULP RISC-V coprocessor board support for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-01 14:16:55 -04:00
Filipe Cavalcanti 1d51cfbda7 arch/xtensa: add sys_startup_fn call
Adds SYS_STARTUP_FN which calls constructors and init functions on
common source code. Requires compatibility changes on linker script.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti 187a386cc7 arch/xtensa: update lower-half drivers for ESP32|S2|S3 2025-06-30 22:40:26 +08:00
Tiago Medicci Serrano 4a8af202c6 boards/xtensa/esp32[|s2|s3]: Fix unknown disassembling instructions
This commit adds sections used by the debugger and disassembler to
get more information about raw data present in the code.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-24 10:05:37 -03:00
Tiago Medicci Serrano 31b6cdac6d xtensa/esp32s2: Fix getting the flash mappings by openocd-esp32
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-18 02:25:14 +08:00
Eren Terzioglu 5865d2a8ff esp32[s2|s3]: Enhance SPIRAM/PSRAM support
Add esp_spiram_writeback_range function to flush some areas of spiram cache

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-02-24 10:35:11 -03:00
Tiago Medicci Serrano 08fe636001 xtensa/esp32[s2|c3|c6|h2]: fix sched_[lock|unlock] boot crash
Move the code to iram0 since sched_lock/sched_unlock is called in
the early boot phase.
2025-02-02 00:51:42 +08:00
Filipe Cavalcanti 91511ae280 boards/xtensa: merge MCUBoot and Simple Boot linker scripts on ESP32|S2 2025-01-07 21:58:09 +08:00
Tiago Medicci Serrano 7548db1980 arch/xtensa: Support __thread and thread_local keywords
Enable architecture-specific support for those keywords. This is a
"gcc-based" thread local storage implementation.
2024-12-21 20:49:07 +08:00
Alin Jerpelea d6b299396d boards/xtensa/esp32s2: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-11-12 22:20:59 +08:00
Filipe Cavalcanti 2af7037fa1 xtensa/esp32s2: add WiFi support on ESP32S2 2024-09-06 09:46:59 +08:00
Tiago Medicci Serrano a916de0e14 espressif: Update HAL library reference to include debug assert
During the board bringup, the new HAL reference includes an assert
to check if the critical section flags is being stored as expected.
2024-08-30 21:41:47 +08:00
Tiago Medicci Serrano a763ed1e07 espressif: Fix build with RTC
This commit ensures that RTC data is properly allocated in the RTC
segment in the linker. This fixes the reported problem about using
the legacy bootloader and RTC.
2024-08-29 09:05:17 +08:00
Tiago Medicci Serrano 5680e9d5a4 espressif: Update internal libraries reference
Update internal reference to get the most updated Espressif's
libraries. Those libraries are based on branch `release/v5.1` of
the ESP-IDF and include `v5.1.4` version of it.
2024-08-21 23:28:45 +08:00
Almir Okato 6ec690cbfc esp32[s2|s3]: move rom segments mapping to espressif common folder
Move and unify map_rom_segments function called when starting
Simple Boot and MCUboot compatible images.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-07-04 18:22:24 -03:00
Almir Okato 4178f3ede4 esp32s2: remove legacy bootloader support
Deprecate Legacy Boot for ESP32-S2.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-06-04 18:53:14 -03:00
Almir Okato 16f8966fa9 esp32s2: add simple boot support
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s2 targets and removes the need
for running 'make bootloader' command for it.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-06-04 18:53:14 -03:00
Eren Terzioglu c15392d9b7 xtensa/esp32s2: Add xtwdt and rwdt support 2023-12-22 03:59:18 -08:00
Xiang Xiao ca5a9c711a Remove @ and % tag from all comments
and format the multiple line comments

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-11 17:00:10 -03:00
Eren Terzioglu 77df430f30 xtensa/esp32s2: Add rtc heap support 2023-11-09 23:58:30 +08:00
Eren Terzioglu ded321a515 xtensa/esp32s2: Add support to TWAI/CANBus controller 2023-09-28 09:35:08 +08:00
Alan Carvalho de Assis 1d88d5a370 ESP32S2: Add support to SPI Flash 2023-07-10 17:56:46 +08:00
Lucas Saavedra Vaz a895cd4854 arch/xtensa/esp32s2: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32-S2.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
Gustavo Henrique Nihei 2436065096 espressif: Add missing Apache Foundation copyright header
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-01-19 10:11:34 +08:00
halyssonJr cdbb670e5d Add support to Franzininho board
rename files ESP32S2-Franzininho to Franzininho-WiFi and remove some scripts previously tested
2022-12-20 19:47:37 -03:00
Gustavo Henrique Nihei afd95058c0 xtensa/esp32s2: Rename linker scripts into more meaningful names
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-08 21:55:29 +08:00
Lucas Saavedra Vaz a5d3a6b126 xtensa/esp32s2: Move linker scripts to folder common to all boards 2022-11-03 22:22:54 +01:00