boards/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin board support

Add multiple ULP RISC-V bin board support for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
This commit is contained in:
Eren Terzioglu
2025-09-19 10:54:16 +02:00
committed by Alan C. Assis
parent 24eeff91c0
commit 6702b4fdb4
10 changed files with 39 additions and 2 deletions
+8
View File
@@ -62,3 +62,11 @@ config ESP32S2_LCD_OVERCLOCK
SPI interface is 10MHz. However, in practice the driver chips work
fine with a higher clock rate, and using that gives a better
framerate. Select this to try using the out-of-spec clock rate.
config ESPRESSIF_ULP_USE_TEST_BIN
bool "Run example prebuilt binary for ULP core"
depends on ESPRESSIF_USE_ULP_RISCV_CORE
default n
---help---
Run example prebuilt binary for ULP core which is resides in
`Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/ulp_riscv_blink.bin`
@@ -1 +1,2 @@
/*.ld.tmp
/ulp_aliases.ld
@@ -90,6 +90,10 @@ ifeq ($(CONFIG_MMCSD_SPI), y)
CSRCS += esp32s2_board_sdmmc.c
endif
ifeq ($(CONFIG_ESPRESSIF_ULP_USE_TEST_BIN),y)
include $(TOPDIR)$(DELIM)Documentation$(DELIM)platforms$(DELIM)xtensa$(DELIM)esp32s3$(DELIM)boards$(DELIM)esp32s3-devkit$(DELIM)ulp_makefile
endif
ifeq ($(CONFIG_ESP32S2_TWAI)$(CONFIG_ARCH_BUTTONS)$(CONFIG_DEV_GPIO),y)
CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
CHIPHALDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)chip$(DELIM)esp-hal-3rdparty
@@ -23,7 +23,7 @@ CONFIG_DEV_GPIO=y
CONFIG_ESP32S2_GPIO_IRQ=y
CONFIG_ESP32S2_UART0=y
CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=8000
CONFIG_ESPRESSIF_ULP_RISCV_PROJECT_PATH="Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/ulp_riscv_blink.bin"
CONFIG_ESPRESSIF_ULP_USE_TEST_BIN=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
@@ -127,6 +127,9 @@
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
# include "espressif/esp_ulp.h"
# ifdef CONFIG_ESPRESSIF_ULP_USE_TEST_BIN
# include "ulp/ulp_code.h"
# endif
#endif
#include "esp32s2-saola-1.h"
@@ -515,6 +518,9 @@ int esp32s2_bringup(void)
*/
esp_ulp_init();
# ifdef CONFIG_ESPRESSIF_ULP_USE_TEST_BIN
esp_ulp_load_bin((char *)esp_ulp_bin, esp_ulp_bin_len);
# endif
#endif
/* If we got here then perhaps not all initialization was successful, but
+7
View File
@@ -262,3 +262,10 @@ config ESP32S3_BOARD_I2C
bool
default y if ESP32S3_I2C0 || ESP32S3_I2C1
config ESPRESSIF_ULP_USE_TEST_BIN
bool "Run example prebuilt binary for ULP core"
depends on ESPRESSIF_USE_ULP_RISCV_CORE
default n
---help---
Run example prebuilt binary for ULP core which is resides in
`Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/ulp_riscv_blink.bin`
@@ -1 +1,2 @@
/*.ld.tmp
/ulp_aliases.ld
@@ -113,6 +113,10 @@ ifeq ($(CONFIG_TXTABLE_PARTITION),y)
endif
endif
ifeq ($(CONFIG_ESPRESSIF_ULP_USE_TEST_BIN),y)
include $(TOPDIR)$(DELIM)Documentation$(DELIM)platforms$(DELIM)xtensa$(DELIM)esp32s3$(DELIM)boards$(DELIM)esp32s3-devkit$(DELIM)ulp_makefile
endif
DEPPATH += --dep-path src
VPATH += :src
CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src
@@ -25,7 +25,7 @@ CONFIG_ESP32S3_GPIO_IRQ=y
CONFIG_ESP32S3_UART0=y
CONFIG_ESP32S3_ULP_COPROC_ENABLED=y
CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM=8000
CONFIG_ESPRESSIF_ULP_RISCV_PROJECT_PATH="Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/ulp_riscv_blink.bin"
CONFIG_ESPRESSIF_ULP_USE_TEST_BIN=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
@@ -155,6 +155,9 @@
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
# include "espressif/esp_ulp.h"
# ifdef CONFIG_ESPRESSIF_ULP_USE_TEST_BIN
# include "ulp/ulp_code.h"
# endif
#endif
#include "esp32s3-devkit.h"
@@ -641,6 +644,9 @@ int esp32s3_bringup(void)
*/
esp_ulp_init();
# ifdef CONFIG_ESPRESSIF_ULP_USE_TEST_BIN
esp_ulp_load_bin((char *)esp_ulp_bin, esp_ulp_bin_len);
# endif
#endif
/* If we got here then perhaps not all initialization was successful, but