This defconfig uses the legacy bootloader (based on ESP-IDF's
bootloader) and, due a recent update on SPI flash support, its
initialization was missing data to be moved to the IRAM during the
boot process.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
- Added PWM support on Arduino R4 Minima board.
This board has 5 PWM channels available using the GPT timer from the RA4M1 microcontroller.
- Added a pwm config file to enable PWM supporting GTP2 GTIOCB on P102.
Signed-off-by: leocafonso <leocafonso@gmail.com>
Adds another configuration which includes the CGOL game application.
This gives users something animated and interesting to see on the HDMI
video output, since the frame-buffer example is not as interesting.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Espressif common initialization and lib_cxx_initialize are having
conflicts and multiple linker script issues.
Removing CXX_INITIALIZE solves those problems with no side effects.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Fix a transfer issue in the Kinetis DSPI driver when operating
with transmit and receive FIFOs disabled (`MCR[DIS_TXF]=1`,
`MCR[DIS_RXF]=1`). In this mode, the DSPI module behaves as a
simple double-buffered SPI interface without TX staging.
When FIFOs are disabled, `PUSHR` acts as a single 32-bit
command/data register. Partial (16-bit) writes to its upper or
lower halves can result in incomplete or corrupted transfers.
This patch ensures the full 32-bit packet is prepared and
written in a single operation.
* Resolves broken SPI transactions with LAN9252 (EasyCAT).
* Improves reliability in non-FIFO DSPI configurations.
* No impact on DMA or FIFO-enabled modes.
Signed-off-by: trns1997 <trns1997@gmail.com>
Gdbstub support
===========
The Qemu version must be above 9.2 to support two serial ports.
One window:
./tools/configure.sh qemu-armv7a:gdbstub; make -j25
qemu-system-arm -cpu cortex-a7 -nographic -machine virt,virtualization=off,gic-version=2 -net none -kernel ./nuttx -serial mon:stdio -serial pty
char device redirected to /dev/pts/26 (label serial1)
nx_start: Entry
uart_register: Registering /dev/console
uart_register: Registering /dev/ttyS0
Another window:
gdb-multiarch nuttx -ex "target remot /dev/pts/26"
GNU gdb (Ubuntu 15.0.50.20240403-0ubuntu1) 15.0.50.20240403-git
Copyright (C) 2024 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
Type "show copying" and "show warranty" for details.
This GDB was configured as "x86_64-linux-gnu".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<https://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search for commands related to "word"...
Reading symbols from nuttx...
Remote debugging using /dev/pts/26
gdb_get_registers (state=0x402052f8) at gdbstub/lib_gdbstub.c:1020
1020 reg = state->running_regs;
(gdb) c
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Introduces a very basic frame buffer driver implementation for the RPi4B
which is registered at startup and works with frame buffer graphics
examples (and LVGL). Graphics are displayed on the HDMI0 and HDMI1
output, depending which one is plugged into the display. I have not
tested using both at once, nor does the driver account for that. They
are both referred to as display 0, plane 0 since the RPi4B frame buffer
interface does not seem to have a way of distinguishing.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Gdbstub demo::
The Qemu version must be above 9.2 to support two serial ports.
One window:
./tools/configure.sh qemu-armv8a:gdbstub; make -j25
qemu-system-aarch64 -cpu cortex-a53 -nographic -machine virt,virtualization=on,gic-version=3 -net none -kernel ./nuttx -serial mon:stdio -serial pty
char device redirected to /dev/pts/27 (label serial1)
- Ready to Boot Primary CPU
- Boot from EL2
- Boot from EL1
- Boot to C runtime for OS Initialize
Another window:
gdb-multiarch nuttx -ex "target remot /dev/pts/27"
GNU gdb (Ubuntu 15.0.50.20240403-0ubuntu1) 15.0.50.20240403-git
Copyright (C) 2024 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
Type "show copying" and "show warranty" for details.
This GDB was configured as "x86_64-linux-gnu".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<https://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search for commands related to "word"...
Reading symbols from nuttx...
Remote debugging using /dev/pts/26
gdb_get_registers (state=0x403e1590) at gdbstub/lib_gdbstub.c:1020
1020 reg = state->running_regs;
(gdb) c
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Removing the custom MCUBoot hash from 5 defconfigs.
This custom hash is blocking the MCUBoot update on nuttx-apps due to
changes in source files.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Enable the event module on pcduino-a10 and smartl-c906 boards
to allow event tests to be executed on both ARM and RISC-V
architectures.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
The Nuttx MSS CAN driver has an exclusive interface to the integrated MSS CAN peripheral residing in Polarfire SoC FPGAs. There are two CAN block 0 and 1 that can be configured for use. In normal mode (non AMP), CAN0 and CAN1 block base register addresses are 0x2010C000UL and 0x2010D000UL.
Signed-off-by: Hai To <hai.to@tii.ae>
Increase LCD PWM frequency from 100Hz to 10kHz to eliminate visible flicker
on the lckfb-szpi ESP32S3 board. The higher frequency provides smoother
backlight control and improves display visual quality.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Updates the SPI Flash driver used for user storage MTD.
Updates board linker script and bring up.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
This initial implementation sets up support for the EMMC interfaces on
the BCM2711. Only EMMC2 is tested since it is the interface of interest
(connects to uSD card). MMCSD communication is functional and the boot
partition of the SD card can be mounted and interacted with.
Insertion/removal interrupts do not fire after initial boot, and
sdstress fails with any byte size larger than 1023. 32GB card works
perfectly, while 64GB card exhibits strange behaviour when interacting
with VFAT filesystem.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Adding the stm32h5 pwm driver. This is almost an exact copy of the stm32h7 pwm driver. I confirmed the timers for the h5 are version v2 and added the preprocessor definition. This commit was tested on a stm32h5 nucleo-h563zi development board. Necessary board files and a pwm config have been added. Added pin mappings for all timer outputs.
Signed-off-by: kywwilson11 <kwilson@2g-eng.com>
Added documentation regarding nucleo-h563zi:pwm config.
Removed CONFIG_STM32H5_PWM guard at the top. Fixed IRQs for tim1 and tim8. Added H5 to list of Timer IP v2 timers.
Conditionally compile stm32_serial.c.
Add stm32_pwm.c to CMakeLists.txt
Curently, the driver code for HW accelerated AES is not usable
since it's not registered within esp32_crypto. This commit fixes
it as well as a few bugs.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
- CMake added board Raspberry Pi Pico 2 RISC-V
- Created a file rp23xx_common_pico.h with function
prototype
int rp23xx_dev_gpio_init(void);
to allow cmake + ninja to build without errors.
Signed-off-by: simbit18 <simbit18@gmail.com>
Updates the common source code for the SPI peripheral used by
Espressif's RISC-Vs SoCs. This enables newer SoCs to be supported
in the future while maintaining backwards compatibility.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Nuttx currently has 2 types of sleep interfaces:
1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.
2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.
3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.
Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.
(This PR also aims to make signals optional, further reducing the code size of Nuttx.)
Signed-off-by: chao an <anchao.archer@bytedance.com>
TODO: Fix sama5 arch the same way stm32 to avoid compiling serial drivers
case no serial ports are used.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
