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risc-v/espressif/spi: Update common source code functions

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Updates the common source code for the SPI peripheral used by
Espressif's RISC-Vs SoCs. This enables newer SoCs to be supported
in the future while maintaining backwards compatibility.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit is contained in:
Tiago Medicci Serrano
2025-10-07 15:36:06 -03:00
committed by Xiang Xiao
parent 97db9a499c
commit fcb96babc5
11 changed files with 933 additions and 283 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/risc-v/src/common/espressif/Kconfig
+59 -12
View File
@@ -455,6 +455,10 @@ config ESPRESSIF_SPI
bool
default n
config ESPRESSIF_SPI_SLAVE
bool
default n
config ESPRESSIF_SPI_PERIPH
bool
depends on ESPRESSIF_SPI2
@@ -1652,14 +1656,26 @@ config ESPRESSIF_SPI2_DMATHRESHOLD
When SPI GDMA is enabled, GDMA transfers whose size are below the
defined threshold will be performed by polling logic.
choice ESPRESSIF_SPI2_MODE
prompt "SPI2 mode"
default ESPRESSIF_SPI2_MODE_MASTER
config ESPRESSIF_SPI2_MODE_MASTER
bool "SPI2 Master mode"
depends on SPI_DRIVER
---help---
Configure SPI2 to operate in Master mode.
config ESPRESSIF_SPI2_SLAVE
bool "SPI2 Slave mode"
default n
depends on SPI_SLAVE
select ESPRESSIF_GPIO_IRQ
select ESPRESSIF_SPI_SLAVE
---help---
Configure SPI2 to operate in Slave mode.
endchoice # ESPRESSIF_SPI2_MODE
config ESPRESSIF_SPI2_SLAVE_BUFSIZE
int "SPI2 Slave buffer size"
default 2048
@@ -1672,49 +1688,80 @@ config ESPRESSIF_SPI2_CSPIN
default 10 if ARCH_CHIP_ESP32C3_GENERIC
default 16 if ARCH_CHIP_ESP32C6
default 1 if ARCH_CHIP_ESP32H2
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
config ESPRESSIF_SPI2_CLKPIN
int "SPI2 CLK Pin"
default 6 if !ARCH_CHIP_ESP32H2
default 6 if ARCH_CHIP_ESP32C3_GENERIC
default 6 if ARCH_CHIP_ESP32C6
default 4 if ARCH_CHIP_ESP32H2
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
config ESPRESSIF_SPI2_MOSIPIN
int "SPI2 MOSI Pin"
default 7 if !ARCH_CHIP_ESP32H2
default 7 if ARCH_CHIP_ESP32C3_GENERIC
default 7 if ARCH_CHIP_ESP32C6
default 5 if ARCH_CHIP_ESP32H2
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
config ESPRESSIF_SPI2_MISOPIN
int "SPI2 MISO Pin"
default 2 if !ARCH_CHIP_ESP32H2
default 2 if ARCH_CHIP_ESP32C3_GENERIC
default 2 if ARCH_CHIP_ESP32C6
default 0 if ARCH_CHIP_ESP32H2
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
endif # ESPRESSIF_SPI2
if ESPRESSIF_SPI_BITBANG
choice ESPRESSIF_SPI_BITBANG_OPERATION_MODE
prompt "SPI Bitbang mode"
default ESPRESSIF_SPI_BITBANG_OPERATION_MODE_MASTER
config ESPRESSIF_SPI_BITBANG_OPERATION_MODE_MASTER
bool "SPI Bitbang Master mode"
depends on SPI_DRIVER
---help---
Configure SPI Bitbang to operate in Master mode.
endchoice # ESPRESSIF_SPI_BITBANG_OPERATION_MODE
config ESPRESSIF_SPI_BITBANG_CSPIN
int "SPI Bitbang CS Pin"
default 0
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
config ESPRESSIF_SPI_BITBANG_CLKPIN
int "SPI Bitbang CLK Pin"
default 1
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
config ESPRESSIF_SPI_BITBANG_MOSIPIN
int "SPI Bitbang MOSI Pin"
default 2
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
config ESPRESSIF_SPI_BITBANG_MISOPIN
int "SPI Bitbang MISO Pin"
default 3
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
choice ESPRESSIF_SPI_BITBANG_MODE
prompt "SPI Bitbang mode"
arch/risc-v/src/common/espressif/Make.defs
+1 -1
View File
@@ -195,7 +195,7 @@ endif
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
ifndef ESP_HAL_3RDPARTY_VERSION
ESP_HAL_3RDPARTY_VERSION = bcbd8aa887b2644c08f0b4c42291e5e5ae00d5ab
ESP_HAL_3RDPARTY_VERSION = 84efb531f4cdf3162e91652357cac6a0be8dd73e
endif
ifndef ESP_HAL_3RDPARTY_URL
arch/risc-v/src/common/espressif/esp_spi.c
+413 -116
View File
File diff suppressed because it is too large Load Diff
arch/risc-v/src/common/espressif/esp_spi_bitbang.c
+24 -9
View File
@@ -73,6 +73,23 @@
#define SPI_BITBANG_DISABLEMODE2 1
#endif
#if CONFIG_ESPRESSIF_SPI2_SLAVE && \
(CONFIG_ESPRESSIF_SPI_BITBANG_CSPIN == CONFIG_ESPRESSIF_SPI2_CSPIN) && \
(CONFIG_ESPRESSIF_SPI_BITBANG_MOSIPIN == CONFIG_ESPRESSIF_SPI2_MOSIPIN) && \
(CONFIG_ESPRESSIF_SPI_BITBANG_MISOPIN == CONFIG_ESPRESSIF_SPI2_MISOPIN) && \
(CONFIG_ESPRESSIF_SPI_BITBANG_CLKPIN == CONFIG_ESPRESSIF_SPI2_CLKPIN)
# warning "SPI slave driver is in auto-test mode with SPI master provided by bit-bang driver"
# define CSPIN_FUNCTION (OUTPUT_FUNCTION_2 | INPUT_FUNCTION_2)
# define MOSIPIN_FUNCTION (OUTPUT_FUNCTION_2 | INPUT_FUNCTION_2 | PULLUP)
# define MISOPIN_FUNCTION (INPUT_FUNCTION_2 | OUTPUT_FUNCTION_2 | PULLUP)
# define CLKPIN_FUNCTION (OUTPUT_FUNCTION_2 | INPUT_FUNCTION_2)
#else
# define CSPIN_FUNCTION (OUTPUT_FUNCTION_2)
# define MOSIPIN_FUNCTION (OUTPUT_FUNCTION_2)
# define MISOPIN_FUNCTION (INPUT_FUNCTION_2 | PULLUP)
# define CLKPIN_FUNCTION (OUTPUT_FUNCTION_2)
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
@@ -211,21 +228,19 @@ struct spi_dev_s *esp_spi_bitbang_init(void)
esp_gpiowrite(CONFIG_ESPRESSIF_SPI_BITBANG_MOSIPIN, true);
esp_gpiowrite(CONFIG_ESPRESSIF_SPI_BITBANG_CLKPIN, true);
#if CONFIG_ESPRESSIF_SPI_SWCS
esp_configgpio(CONFIG_ESPRESSIF_SPI_BITBANG_CSPIN, OUTPUT_FUNCTION_1);
esp_configgpio(CONFIG_ESPRESSIF_SPI_BITBANG_CSPIN, CSPIN_FUNCTION);
esp_gpio_matrix_out(CONFIG_ESPRESSIF_SPI_BITBANG_CSPIN, SIG_GPIO_OUT_IDX,
0, 0);
#endif
esp_configgpio(CONFIG_ESPRESSIF_SPI_BITBANG_MOSIPIN, OUTPUT_FUNCTION_1);
esp_configgpio(CONFIG_ESPRESSIF_SPI_BITBANG_MOSIPIN, MOSIPIN_FUNCTION);
esp_gpio_matrix_out(CONFIG_ESPRESSIF_SPI_BITBANG_MOSIPIN, SIG_GPIO_OUT_IDX,
0, 0);
esp_configgpio(CONFIG_ESPRESSIF_SPI_BITBANG_MISOPIN,
INPUT_FUNCTION_1 | PULLUP);
esp_gpio_matrix_out(CONFIG_ESPRESSIF_SPI_BITBANG_MISOPIN, SIG_GPIO_OUT_IDX,
0, 0);
esp_configgpio(CONFIG_ESPRESSIF_SPI_BITBANG_MISOPIN, MISOPIN_FUNCTION);
esp_gpio_matrix_in(CONFIG_ESPRESSIF_SPI_BITBANG_MISOPIN, SIG_GPIO_OUT_IDX,
0);
esp_configgpio(CONFIG_ESPRESSIF_SPI_BITBANG_CLKPIN, OUTPUT_FUNCTION_1);
esp_configgpio(CONFIG_ESPRESSIF_SPI_BITBANG_CLKPIN, CLKPIN_FUNCTION);
esp_gpio_matrix_out(CONFIG_ESPRESSIF_SPI_BITBANG_CLKPIN, SIG_GPIO_OUT_IDX,
0, 0);
arch/risc-v/src/common/espressif/esp_spi_slave.c
+412 -125
View File
File diff suppressed because it is too large Load Diff
arch/risc-v/src/esp32c3/hal_esp32c3.mk
+2
View File
@@ -66,6 +66,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level
@@ -198,6 +199,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)sdm_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)i2c_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)i2s_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)spi_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)timer_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)twai_periph.c
arch/risc-v/src/esp32c6/hal_esp32c6.mk
+2
View File
@@ -66,6 +66,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level
@@ -219,6 +220,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)i2s_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)mcpwm_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_io_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)spi_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)timer_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)twai_periph.c
arch/risc-v/src/esp32h2/hal_esp32h2.mk
+2
View File
@@ -63,6 +63,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
@@ -198,6 +199,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)i2c_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)i2s_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)mcpwm_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)spi_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)timer_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)twai_periph.c
boards/risc-v/esp32c6/esp32c6-devkitc/configs/spislv/defconfig
+3 -3
View File
@@ -7,7 +7,6 @@
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32c6-devkitc"
CONFIG_ARCH_BOARD_COMMON=y
@@ -21,10 +20,10 @@ CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ESPRESSIF_DMA=y
CONFIG_ESPRESSIF_SPI2=y
CONFIG_ESPRESSIF_SPI2_CSPIN=15
CONFIG_ESPRESSIF_SPI2_DMA=y
CONFIG_ESPRESSIF_SPI2_SLAVE=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_SPISLV=y
@@ -51,6 +50,7 @@ CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_SPITOOL=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y
boards/risc-v/esp32c6/esp32c6-devkitc/src/esp32c6_bringup.c
+9 -11
View File
@@ -287,13 +287,20 @@ int esp_bringup(void)
#endif
#ifdef CONFIG_ESPRESSIF_SPI
# ifdef CONFIG_ESPRESSIF_SPI2
# ifdef CONFIG_ESPRESSIF_SPI_SLAVE
ret = board_spislavedev_initialize(ESPRESSIF_SPI2);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize SPI%d Slave driver: %d\n",
ESPRESSIF_SPI2, ret);
}
# else
ret = board_spidev_initialize(ESPRESSIF_SPI2);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init spidev 2: %d\n", ret);
}
# endif /* CONFIG_ESPRESSIF_SPI2 */
# endif
# ifdef CONFIG_ESPRESSIF_SPI_BITBANG
ret = board_spidev_initialize(ESPRESSIF_SPI_BITBANG);
@@ -428,15 +435,6 @@ int esp_bringup(void)
}
#endif
#if defined(CONFIG_SPI_SLAVE) && defined(CONFIG_ESPRESSIF_SPI2)
ret = board_spislavedev_initialize(ESPRESSIF_SPI2);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize SPI%d Slave driver: %d\n",
ESPRESSIF_SPI2, ret);
}
#endif
#ifdef CONFIG_DEV_GPIO
ret = esp_gpio_init();
if (ret < 0)
boards/risc-v/esp32c6/esp32c6-devkitm/configs/spislv/defconfig
+6 -6
View File
@@ -7,24 +7,23 @@
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32c6-devkitc"
CONFIG_ARCH_BOARD="esp32c6-devkitm"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32C6_DEVKITC=y
CONFIG_ARCH_BOARD_ESP32C6_DEVKITM=y
CONFIG_ARCH_CHIP="esp32c6"
CONFIG_ARCH_CHIP_ESP32C6=y
CONFIG_ARCH_CHIP_ESP32C6WROOM1=y
CONFIG_ARCH_CHIP_ESP32C6MINI1=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ESPRESSIF_DMA=y
CONFIG_ESPRESSIF_SPI2=y
CONFIG_ESPRESSIF_SPI2_CSPIN=15
CONFIG_ESPRESSIF_SPI2_DMA=y
CONFIG_ESPRESSIF_SPI2_SLAVE=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_SPISLV=y
@@ -51,6 +50,7 @@ CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_SPITOOL=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y