1. The original method of restoring the register context relies on
the ret instruction, which does not conform to the semantics of
longjmp not returning.
2. There are csa leak during longjmp and need recycle.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Add setjmp/longjmp support for TriCore architecture using iLLD
intrinsics to save and restore the CSA (Context Save Area) chain.
This implementation saves upper/lower context registers and walks
the CSA linked list to restore the full call context on longjmp.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
Initialize the FPU and enable the FZ (flush-to-zero) trap for
TriCore TC4xx processors. This ensures floating-point divide-by-zero
exceptions are properly caught and reported via the trap handler.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
Rename STACK_ALIGNMENT macro to STACKFRAME_ALIGN throughout the codebase
to provide clearer naming semantics. The new name better reflects the macro's
purpose of frame alignment rather than general stack alignment.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
The SRN number in TriCore far exceeds the PN number.
Using IRQ as the PN number would result in an overflow.
Therefore, MINIMAL_VECTORTABLE is used to ensure that
the PN number does not overflow.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
tricore csa is not continuous. when assert prints information, we need to handle the regs specially in order to dump all the registers.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
In the exception panic process, regs needs to use a memory address, which defaults to PCXI. Here, it is uniformly saved as the actual memory address.
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
"tc397" is a chip name which is not appropriate to act as a board name.
the board supported here is actually "a2g-tc397-5v-tft".
The correct definition is : tricore is arch name, tc3xx is arch family
name, tc397 is chip name and the borad name is a2g-tc397-5v-tft
fix nooptimiziation_function definition problem for tricore gnu compiler
arch/tricore:
move tricore_csa2addr and tricore_addr2csa definition from include/arch.h to include/irq.h to fix build error
Inline & inline_function both used make confuze, let's modify all inline
in irq.h to inline_function, also clear the always_inline_funcion
declaration.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Some app with same code runs on different cores in AMP mode,
need the physical core on which the function is called.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
reason:
1 On different architectures, we can utilize more optimized strategies
to implement up_current_regs/up_set_current_regs.
eg. use interrupt registersor percpu registers.
code size
before
text data bss dec hex filename
262848 49985 63893 376726 5bf96 nuttx
after
text data bss dec hex filename
262844 49985 63893 376722 5bf92 nuttx
size change -4
Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
-machine virt,virtualization=on,gic-version=3 \
-net none -chardev stdio,id=con,mux=on -serial chardev:con \
-mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Add support for tricore TC397
1. Porting based on AURIX TC397 KIT_A2G_TC397_5V_TFT evaluation board
https://www.infineon.com/cms/en/product/evaluation-boards/kit_a2g_tc397_5v_tft/
2. In order to avoid license and coding style issues, The chip-level code
still uses the implementation of AURIX Development Studio SDK.
The SDK package will be downloaded as a third-party package during compilation:
https://github.com/anchao/tc397_sdk
3. Single core only, SMP implementation will be provided in the future.
4. Implemented the basic System Timer, ASCLIN UART driver.
5. Only the Tasking tool chain is supported (ctc/ltc, license maybe required)
6. 'ostest' can be completed on the TC397 development board.
How to run?
1. Setup the tasking toolchain and license
$ export TSK_LICENSE_KEY_SW160800=d22f-7473-ff5d-1b70
$ export TSK_LICENSE_SERVER=192.168.36.12:9090
2. Build nuttx ELF
$ ./tools/configure.sh tc397/nsh
$ make -j
...
artc I800: creating archive libc_fpu.a
LD: nuttx
3. Switch to windows PC, setup AURIX-studio to Debugger Launcher
4. Replace runing ELF to nuttx, and re-download ELF
Signed-off-by: chao an <anchao@lixiang.com>
zhangyu117
zhangyuan29
hujun5
wangchengdong
liwenxiang1
xiezhanpeng3
“wangchengdong”
lipengfei28
buxiasen
Alin Jerpelea
chenxiaoyi
chao an
Yanfeng Liu