46 Commits

Author SHA1 Message Date
Bernard Xiong
743b614875 [components][clock_time] Refactor time subsystem around clock_time (#11111)
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* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue
2026-01-31 17:44:27 +08:00
Yulong Wang
ee1fe2024e [lwp][rv64] riscv: fix potential signal handler infinite loop
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2025-07-23 09:39:17 +08:00
Yulong Wang
e7a40ae6ec [lwp][rv64] restore tp register in arch_thread_signal_enter to fix user-mode memory access 2025-07-23 09:38:35 +08:00
bernard
172676e115 [smart] rename the Group name to 'lwProcess' and optimize the error handling for vDSO building. 2025-07-07 09:44:37 +08:00
bernard
921abdfb41 [smart] move vdso.c to arch/common folder. 2025-05-19 18:29:26 +08:00
bernard
721dfbfe01 [smart] Add vDSO support for RISC-V architecture and refactor related components
- Implemented vDSO functionality for the RISC-V architecture, including the necessary source files and linker scripts.
- Introduced a new `vdso_sys.c` file for RISC-V, containing functions to handle time retrieval using the vDSO mechanism.
- Created architecture-specific linker scripts (`vdso.lds.S`) for both AArch64 and RISC-V.
- Updated the build system to support vDSO compilation for RISC-V, including necessary adjustments in `SConstruct` files.
- Refactored existing vDSO code to improve compatibility and maintainability across architectures.
- Adjusted the maximum number of PTY devices in the terminal configuration from 64 to 32 for better resource management.
- Fixed minor issues in existing code, including correcting the path for the vDSO shared library and ensuring proper function definitions.
2025-05-19 18:29:26 +08:00
heyuanjie87
5206b3ae2d [lwp/riscv]修正用户态参数空间占用堆地址空间的问题 (#10014)
* [lwp/riscv]修正用户态参数空间占用堆空间的问题
2025-02-24 09:17:22 +08:00
Chen Wang
7c7ff6e532 kernel: cleanup debug APIs
- `dbg_log` is a “NOT RECOMMENDED API”, convert the calling of this
  API to LOG_x and remove this API.

- `dbg_here`/`dbg_enter`/`dbg_exit`: no one use these APIs, remove
  them directly.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-12-20 17:50:00 -05:00
Shell
9a27de92ae feat: smart: user space context optimization
This patch optimizes the user-space context handling in the ARM64
architecture, specifically improving how the context is saved and
restored during system calls and interrupts. The changes make the
code more efficient and easier to maintain, while ensuring proper
preservation of user context during system transitions.

Changes:
- Introduced a parameter for context saving to improve flexibility.
- Replaced hardcoded stack pointer operations with frame-relative
  references for better readability and code reuse.
- Simplified context restoration, removing redundant operations like
  loading/storing floating-point registers.

Signed-off-by: Shell <smokewood@qq.com>
2024-09-19 23:02:39 -04:00
Shell
7138f340b2 [libcpu/arm64] feat: Trimming General Context
This patch focuses on the ARM64 general context handling code.
The modifications are aimed at enhancing performance by simplifying
context save/restore operations.

Changes include:
- Adjusted stack alignment in `arch_set_thread_context` function.
- Updated `lwp_gcc.S` to reset frame pointer and link register.
- Refined `rt_hw_backtrace_frame_unwind` to handle user space address checks.
- Added `GET_THREAD_SELF` macro in `asm-generic.h`.
- Simplified context saving/restoring in `context_gcc.h` and related files.
- Optimized `rt_hw_context_switch_interrupt` and related assembly routines.

Signed-off-by: Shell <smokewood@qq.com>
2024-07-18 17:41:48 +08:00
rcitachi
14fb55933b [lwp][vdso] Add VDSO functionality under the aarch64 architecture (#9176)
Add VDSO functionality under the aarch64 architecture
2024-07-15 17:58:29 +08:00
Shell
90917cc75a [format] cleanup libcpu/aarch64 (#8950)
* [dfs] fixup compiler warning

Signed-off-by: Shell <smokewood@qq.com>

* [format] libcpu/arm64: separate context switching codes

Signed-off-by: Shell <smokewood@qq.com>

* [format] libcpu/arm64: separate vector

Signed-off-by: Shell <smokewood@qq.com>

* [format] libcpu/arm64: separate context_gcc.S

Signed-off-by: Shell <smokewood@qq.com>

* [format] libcpu/arm64: moving headers to include directory

Signed-off-by: Shell <smokewood@qq.com>

* style: replace tab with space

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-06-28 00:23:09 +08:00
heyuanjie87
a5a89c439f [rv]修正signal退出后用户态sp少8的问题 (#9080) 2024-06-24 21:36:32 +08:00
heyuanjie87
06ad67d549 [rv]信号处理进入用户态前恢复gp (#9072)
* [rv/virt/stackframe.h]添加GP寄存器保存偏移量宏

* 【rv/c906/stackframe.h]定义GP寄存器存储偏移量

* [rv]信号处理切换到用户态前恢复gp
2024-06-21 09:09:41 +08:00
Shell
65c9947225 [libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067)
* [libcpu] support for ARCH_REMAP_KERNEL

These changes introduce support for the ARCH_REMAP_KERNEL configuration,
which isolates kernel space in high virtual address regions. This feature
is necessary to enhance memory protection and management by segregating
user and kernel spaces more effectively.

Changes:
- Updated conditional macros to check for ARCH_REMAP_KERNEL instead of
  ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new
  configuration option.
- Modified qemu-virt64-riscv Kconfig and SConstruct files to include and
  utilize ARCH_REMAP_KERNEL.
- Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv.
- Updated rtconfig.py to use a more flexible execution path setup.
- Enhanced user address space definitions in `lwp_arch.h` to support the
  new virtual address mappings.
- Adjusted kernel memory initialization and mapping logic in `c906/mmu.c`
  and `virt64/mmu.c` to account for high virtual address regions.
- Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures.
- Enhanced memory setup functions to support new mapping scheme, including
  updates to early page table setup and address relocation logic.

These modifications ensure that the system can utilize high memory
addresses for the kernel, improving memory isolation and system stability.

Signed-off-by: Shell <smokewood@qq.com>

* fixup: CI run failed

* bsp: default config without using smart

* fixup: static checks

* restore rt_hw_mmu_kernel_map_init for D1

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-06-18 11:15:59 +08:00
heyuanjie87
326150e2f4 [lwp/riscv]进入libc前初始化用户态sp (#8997) 2024-05-29 06:52:38 +08:00
Shell
5f71da566a [libcpu] arm: fixup signal handling (#8988)
Signed-off-by: Shell <smokewood@qq.com>
2024-05-26 22:00:48 +08:00
Shell
397cdcd132 [libcpu] discard rt_current_thread (#8976)
* [libcpu] rv64: discard rt_current_thread

* arm: using rt_thread_self to fetch current TCB
2024-05-26 22:00:17 +08:00
Shell
017b2a5a44 [smart] fixup arm64 aspace switch (#8925)
* [smart] fixup arm64 aspace switch

Signed-off-by: Shell <smokewood@qq.com>

* fixup: arm add arch_kernel_mmu_table_get

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-05-10 09:17:19 +08:00
Shell
83e95bdff4 sync smart & dfs (#8672)
Signed-off-by: xqyjlj <xqyjlj@126.com>
Signed-off-by: Shell <smokewood@qq.com>
Co-authored-by: xqyjlj <xqyjlj@126.com>
2024-03-28 23:42:56 +08:00
xqyjlj
3283f54c7a 🎈 perf: perf rt_hw_interrupt_disable/enable (#8042)
Signed-off-by: Shell <smokewood@qq.com>
Co-authored-by: Shell <smokewood@qq.com>
2023-10-25 20:31:25 +08:00
Shell
70a8d1d465 [kservice] improve backtrace service in kernel (#8144)
Signed-off-by: Shell <smokewood@qq.com>
2023-10-21 20:14:45 +08:00
geniusgogo
ecd29fda60 Sync dfs lwp (#8123) 2023-10-17 13:07:59 +08:00
Shell
e7c3ca61fd [smart] fix rt_memcpy to lwp_memcpy in smart source (#8033) 2023-09-15 15:57:08 +08:00
Shell
47b183a297 [smart/syscall] fix exit(2) and add exit_group(2) (#8005)
Signed-off-by: shell <smokewood@qq.com>
Signed-off-by: shell <wangxiaoyao@rt-thread.com>
Signed-off-by: Shell <smokewood@qq.com>
2023-09-09 09:35:56 +08:00
Shell
325c3d2a48 [smart] Fix bugs on lwp kill (#7892)
Signed-off-by: Shell <smokewood@qq.com>
2023-08-03 20:25:13 +08:00
Shell
acfa74f078 [libcpu/arm] fix race condition with ldrex,strex (#7842)
Signed-off-by: Shell <smokewood@qq.com>
2023-07-25 14:07:44 +08:00
Shell
58e0ddf287 [component/lwp] support more feature of signal from IEEE Std 1003.1-2017 (#7828)
Signed-off-by: Shell <smokewood@qq.com>
2023-07-20 00:02:41 +08:00
GUI
b424169e17 AArch64: fixup fpu storage's size in stack and append Q16 ~ Q31 (#7815)
Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>
2023-07-15 15:21:23 +08:00
Shell
b7554a70d2 [libcpu][component][debug] add debug info for gdb (#7033) 2023-05-14 23:48:16 +08:00
Shell
470454d201 [components/mm] support for scalable memory management (#7277)
* [mm/page] multi-list page manager
[mm/page] page debugger
[libcpu/aarch64] hugepage support

* [quality] remove void-arith

* [format] remove kasan codes
2023-04-22 23:59:11 +08:00
Shicheng Chu
93f3cb30e4 [kernel] 将rt_thread结构体改为显式继承rt_object (#7131) 2023-04-04 09:06:27 -04:00
wangxiaoyao
672966cc41 [lwp] arch should recycle resource it allocated 2023-03-11 19:01:33 +08:00
Shell
382e9bcac7 [rt-smart] handling kernel from accessing unmapped user stack (#6957)
[rt-smart] handling kernel from accessing unmapped user stack
2023-02-24 14:52:16 +08:00
Shell
7450ef6c4d [rt-smart] kernel virtual memory management layer (#6809)
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
2023-01-08 21:08:55 -05:00
guo
68ca9f07a6 [rt-smart] 弱化 RT_USING_LWP,使用 RT_USING_SMART 作为宏配置 (#6740)
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.
2022-12-16 18:38:28 +08:00
Shell
e991be9c51 [smart][risc-v/libcpu] port rv64 cpu code (#6704)
* [risc-v/libcpu] porting Smart & RTOS
* [fix] rv64 plic
* [risc-v/rv64] remove macro in rtdef
2022-12-10 22:16:42 +08:00
guo
ecf2d82159 sync branch rt-smart. (#6641)
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00
shaojinchun
1e7bd3d8a1 修改lwp支持中arm cortex-a的swi入口函数处理 2019-04-27 13:54:51 +08:00
qz721
2eb1bef773 Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code. 2019-03-25 20:03:49 +08:00
shaojinchun
b225764b84 fix lwp SConscript的头文件目录为空的问题;lwp把arm9改名成arm926 2019-03-14 17:28:44 +08:00
shaojinchun
2b21d2316a 修改许可协议
修改cpu目录名及相关修改
2018-12-10 18:23:21 +08:00
shaojinchun
a8953e9211 add lwp support 2018-12-10 16:44:48 +08:00
Bernard Xiong
ab1a220eae [components] Remove lwP from v3.1.0 2018-09-01 12:03:32 +08:00
heyuanjie
7d3af8e9ff 给lwp传递参数 2018-06-29 15:32:53 +08:00
Bernard Xiong
bca65f30a9 [lwP] Add light weight process component. 2018-06-10 17:57:34 +08:00