[components][clock_time] Refactor time subsystem around clock_time (#11111)
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* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue
This commit is contained in:
Bernard Xiong
2026-01-31 17:44:27 +08:00
committed by GitHub
parent f2a646cff4
commit 743b614875
671 changed files with 10120 additions and 8372 deletions

View File

@@ -47,7 +47,7 @@ Each peripheral supporting condition for this BSP is as follows:
| WIFI | Partial support | There are currently some problems, such as `rt_mq_recive` cannot be used in ISR, etc. |
| BLE | Partially supported | There are currently some problems, such as `NimBLE` running errors after starting for a while |
| GDBStub | Support | You can use the GDB provided by ESP-IDF by turning on the `BSP_ENABLE_GDBSTUB` switch, which will enter GDB mode after a chip error |
| HWTIMER | Support |
| CLOCK_TIMER | Support |
Note:
1. WIFI and BLE cannot be enabled at the same time. When using the BLE driver, be sure to turn off the `RT_USING_WIFI` and `LWIP` switches in `menuconfig`. In addition, due to limited capabilities and lack of debugging equipment, there are problems with WIFI and BLE driver operation. If it can be solved, please contact [timwcx@qq.com](mailto:timwcx@qq.com).

View File

@@ -54,7 +54,7 @@
| WIFI | 部分支持 | 目前存在一些问题例如不能在ISR中使用`rt_mq_recive`等 |
| BLE | 部分支持 | 目前存在一些问题,例如`NimBLE`启动一段时间后运行错误 |
| GDBStub | 支持 | 通过开启`BSP_ENABLE_GDBSTUB`开关即可使用ESP-IDF所提供的GDB其会在芯片出错后进入GDB模式 |
| HWTIMER | 支持 |
| CLOCK_TIMER | 支持 |
注:
1、WIFI和BLE不能同时启用在使用BLE驱动时注意在`menuconfig`中关闭`RT_USING_WIFI``LWIP`开关。另外由于能力有限且缺乏调试设备WIFI和BLE驱动运行都有问题如果可以解决联系[timwcx@qq.com](mailto:timwcx@qq.com)。

View File

@@ -115,13 +115,13 @@ menu "On-chip Peripheral Drivers"
bool "Enable BLE"
default n
menuconfig BSP_USING_HWTIMER
bool "Enable HWTIMER"
select RT_USING_HWTIMER
menuconfig BSP_USING_CLOCK_TIMER
bool "Enable CLOCK_TIMER"
select RT_USING_CLOCK_TIME
default n
if BSP_USING_HWTIMER
if BSP_USING_CLOCK_TIMER
config BSP_USING_TIMER0
bool "Enable HWTIMER0"
bool "Enable CLOCK_TIMER0"
default n
endif

View File

@@ -24,8 +24,8 @@ if GetDepend('BSP_USING_SW_I2C'):
if GetDepend('BSP_USING_PWM'):
src += ['drv_pwm.c']
if GetDepend('BSP_USING_HWTIMER'):
src += ['drv_hwtimer.c']
if GetDepend('BSP_USING_CLOCK_TIMER'):
src += ['drv_timer.c']
if GetDepend('BSP_USING_WIFI'):
src += ['drv_wifi.c']

View File

@@ -8,24 +8,24 @@
* 2023-11-15 BetMul first version
*/
#include "drv_hwtimer.h"
#include "drv_timer.h"
#include <rtthread.h>
#include <rtdevice.h>
#include "driver/gptimer.h"
#include "sdkconfig.h"
#ifdef RT_USING_HWTIMER
#ifdef RT_USING_CLOCK_TIME
/**
* handle interrupt for hwtimer.
* handle interrupt for clock_timer.
*/
static bool mcu_hwtimer_intr_handler(gptimer_handle_t gptimer, const gptimer_alarm_event_data_t *edata, void *user_ctx)
static bool mcu_clock_timer_intr_handler(gptimer_handle_t gptimer, const gptimer_alarm_event_data_t *edata, void *user_ctx)
{
rt_interrupt_enter();
rt_hwtimer_t *hwtimer = (rt_hwtimer_t *)user_ctx;
rt_device_hwtimer_isr(hwtimer);
rt_clock_timer_t *clock_timer = (rt_clock_timer_t *)user_ctx;
rt_clock_timer_isr(clock_timer);
rt_interrupt_leave();
@@ -33,9 +33,9 @@ static bool mcu_hwtimer_intr_handler(gptimer_handle_t gptimer, const gptimer_ala
}
/**
* init the hwtimer
* init the clock_timer
*/
static void mcu_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
static void mcu_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state)
{
gptimer_handle_t gptimer = (gptimer_handle_t)timer->parent.user_data;
@@ -44,15 +44,15 @@ static void mcu_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
}
/**
* start the hwtimer, change status into running
* start the clock_timer, change status into running
*/
static rt_err_t mcu_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
static rt_err_t mcu_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode)
{
gptimer_handle_t gptimer = (gptimer_handle_t)timer->parent.user_data;
gptimer_alarm_config_t alarm_config = {
.alarm_count = cnt,
};
if (mode == HWTIMER_MODE_ONESHOT)
if (mode == CLOCK_TIMER_MODE_ONESHOT)
{
}
@@ -68,9 +68,9 @@ static rt_err_t mcu_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtim
}
/**
* stop the hwtimer, change the status from running into enable
* stop the clock_timer, change the status from running into enable
*/
static void mcu_hwtimer_stop(rt_hwtimer_t *timer)
static void mcu_clock_timer_stop(rt_clock_timer_t *timer)
{
gptimer_handle_t gptimer = (gptimer_handle_t)timer->parent.user_data;
@@ -80,7 +80,7 @@ static void mcu_hwtimer_stop(rt_hwtimer_t *timer)
/**
* get count
*/
static rt_uint32_t mcu_hwtimer_count_get(rt_hwtimer_t *timer)
static rt_uint32_t mcu_clock_timer_count_get(rt_clock_timer_t *timer)
{
gptimer_handle_t gptimer = (gptimer_handle_t)timer->parent.user_data;
// get count number
@@ -90,53 +90,53 @@ static rt_uint32_t mcu_hwtimer_count_get(rt_hwtimer_t *timer)
}
/**
* control the hwtimer
* control the clock_timer
*/
static rt_err_t mcu_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
static rt_err_t mcu_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args)
{
rt_err_t err = RT_EOK;
switch (cmd)
{
case HWTIMER_CTRL_FREQ_SET:
case CLOCK_TIMER_CTRL_FREQ_SET:
err = -RT_ERROR;
break;
case HWTIMER_CTRL_INFO_GET:
case CLOCK_TIMER_CTRL_INFO_GET:
err = -RT_ERROR;
break;
case HWTIMER_CTRL_MODE_SET:
case CLOCK_TIMER_CTRL_MODE_SET:
timer->mode = *(rt_uint32_t *)args;
break;
case HWTIMER_CTRL_STOP:
mcu_hwtimer_stop(timer);
case CLOCK_TIMER_CTRL_STOP:
mcu_clock_timer_stop(timer);
break;
}
return err;
}
static struct rt_hwtimer_device _hwtimer;
static const struct rt_hwtimer_ops _hwtimer_ops =
static struct rt_clock_timer_device _clock_timer;
static const struct rt_clock_timer_ops _clock_timer_ops =
{
.init = mcu_hwtimer_init,
.start = mcu_hwtimer_start,
.stop = mcu_hwtimer_stop,
.count_get = mcu_hwtimer_count_get,
.control = mcu_hwtimer_control};
.init = mcu_clock_timer_init,
.start = mcu_clock_timer_start,
.stop = mcu_clock_timer_stop,
.count_get = mcu_clock_timer_count_get,
.control = mcu_clock_timer_control};
static const struct rt_hwtimer_info _hwtimer_info =
static const struct rt_clock_timer_info _clock_timer_info =
{
// TODO:what is the true max and min?
.maxfreq = 1000000UL,
.minfreq = 1000000UL,
.maxcnt = 0xFFFF,
.cntmode = HWTIMER_MODE_ONESHOT};
.cntmode = CLOCK_TIMER_MODE_ONESHOT};
int rt_hw_hwtimer_init(void)
int rt_hw_clock_timer_init(void)
{
char *name = "timer0";
@@ -149,18 +149,18 @@ int rt_hw_hwtimer_init(void)
};
gptimer_event_callbacks_t cbs = {
.on_alarm = mcu_hwtimer_intr_handler,
.on_alarm = mcu_clock_timer_intr_handler,
};
ESP_ERROR_CHECK(gptimer_new_timer(&timer_config, &gptimer));
ESP_ERROR_CHECK(gptimer_register_event_callbacks(gptimer, &cbs, &_hwtimer));
ESP_ERROR_CHECK(gptimer_register_event_callbacks(gptimer, &cbs, &_clock_timer));
_hwtimer.info = &_hwtimer_info;
_hwtimer.ops = &_hwtimer_ops;
_clock_timer.info = &_clock_timer_info;
_clock_timer.ops = &_clock_timer_ops;
return rt_device_hwtimer_register(&_hwtimer, name, (void *)gptimer);
return rt_clock_timer_register(&_clock_timer, name, (void *)gptimer);
}
INIT_DEVICE_EXPORT(rt_hw_hwtimer_init);
#endif /* RT_USING_HWTIMER */
INIT_DEVICE_EXPORT(rt_hw_clock_timer_init);
#endif /* RT_USING_CLOCK_TIME */

View File

@@ -7,14 +7,14 @@
* Date Author Notes
* 2023-11-15 BetMul first version
*/
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
#ifndef __DRV_CLOCK_TIMER_H__
#define __DRV_CLOCK_TIMER_H__
#include <rtconfig.h>
#ifdef RT_USING_HWTIMER
int rt_hw_hwtimer_init(void);
#ifdef RT_USING_CLOCK_TIME
int rt_hw_clock_timer_init(void);
#endif
#endif /* __DRV_HWTIMER_H__ */
#endif /* __DRV_CLOCK_TIMER_H__ */

View File

@@ -57,7 +57,7 @@ if GetDepend(['RT_USING_DAC']):
src += ['drv_dac.c']
if GetDepend(['BSP_USING_TIM']):
src += ['drv_hwtimer.c']
src += ['drv_timer.c']
if GetDepend(['BSP_USING_ETH']):
src += ['drv_eth.c']

View File

@@ -8,18 +8,18 @@
* 2022-07-29 rtthread qiu first version
*/
#include "drv_common.h"
#include "drv_hwtimer.h"
#include "drv_timer.h"
#include <board.h>
#ifdef BSP_USING_TIM
/*#define DRV_DEBUG*/
#define LOG_TAG "drv.hwtimer"
#define LOG_TAG "drv.clock_timer"
#include <drv_log.h>
static void isr_timer(void *callback_arg, cyhal_timer_event_t event);
#ifdef RT_USING_HWTIMER
#ifdef RT_USING_CLOCK_TIME
enum
{
#ifdef BSP_USING_TIM1
@@ -30,15 +30,15 @@ enum
#endif
};
struct cyp_hwtimer
struct cyp_clock_timer
{
rt_hwtimer_t time_device;
rt_clock_timer_t time_device;
cyhal_timer_t tim_handle;
IRQn_Type tim_irqn;
char *name;
};
static struct cyp_hwtimer cyp_hwtimer_obj[] =
static struct cyp_clock_timer cyp_clock_timer_obj[] =
{
#ifdef BSP_USING_TIM1
TIM1_CONFIG,
@@ -48,7 +48,7 @@ static struct cyp_hwtimer cyp_hwtimer_obj[] =
#endif
};
static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state)
static void timer_init(rt_clock_timer_t *timer, rt_uint32_t state)
{
RT_ASSERT(timer != RT_NULL);
@@ -98,7 +98,7 @@ static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state)
}
}
static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode)
{
RT_ASSERT(timer != RT_NULL);
RT_ASSERT(opmode != RT_NULL);
@@ -122,7 +122,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_
duration */
cyhal_timer_configure(tim, &init_timer_cfg);
if (opmode == HWTIMER_MODE_ONESHOT)
if (opmode == CLOCK_TIMER_MODE_ONESHOT)
{
/* set timer to single mode */
cyhal_timer_stop(tim);
@@ -148,7 +148,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_
return result;
}
static void timer_stop(rt_hwtimer_t *timer)
static void timer_stop(rt_clock_timer_t *timer)
{
RT_ASSERT(timer != RT_NULL);
@@ -160,7 +160,7 @@ static void timer_stop(rt_hwtimer_t *timer)
cyhal_timer_stop(tim);
}
static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer)
{
cyhal_timer_t *tim = RT_NULL;
@@ -175,7 +175,7 @@ static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
return count;
}
static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg)
{
RT_ASSERT(timer != RT_NULL);
RT_ASSERT(arg != RT_NULL);
@@ -188,7 +188,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
switch (cmd)
{
case HWTIMER_CTRL_FREQ_SET:
case CLOCK_TIMER_CTRL_FREQ_SET:
{
rt_uint32_t freq;
rt_uint16_t val;
@@ -213,9 +213,9 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
return result;
}
static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG;
static const struct rt_hwtimer_ops _ops =
static const struct rt_clock_timer_ops _ops =
{
.init = timer_init,
.start = timer_start,
@@ -232,79 +232,79 @@ static void isr_timer(void *callback_arg, cyhal_timer_event_t event)
(void)callback_arg;
(void)event;
#ifdef BSP_USING_TIM1
rt_device_hwtimer_isr(&cyp_hwtimer_obj[TIM1_INDEX].time_device);
rt_clock_timer_isr(&cyp_clock_timer_obj[TIM1_INDEX].time_device);
#endif
#ifdef BSP_USING_TIM2
rt_device_hwtimer_isr(&cyp_hwtimer_obj[TIM2_INDEX].time_device);
rt_clock_timer_isr(&cyp_clock_timer_obj[TIM2_INDEX].time_device);
#endif
/* leave interrupt */
rt_interrupt_leave();
}
int cyp_hwtimer_init(void)
int cyp_clock_timer_init(void)
{
int i = 0;
int result = RT_EOK;
for (i = 0; i < sizeof(cyp_hwtimer_obj) / sizeof(cyp_hwtimer_obj[0]); i++)
for (i = 0; i < sizeof(cyp_clock_timer_obj) / sizeof(cyp_clock_timer_obj[0]); i++)
{
cyp_hwtimer_obj[i].time_device.info = &_info;
cyp_hwtimer_obj[i].time_device.ops = &_ops;
if (rt_device_hwtimer_register(&cyp_hwtimer_obj[i].time_device, cyp_hwtimer_obj[i].name, &cyp_hwtimer_obj[i].tim_handle) != RT_EOK)
cyp_clock_timer_obj[i].time_device.info = &_info;
cyp_clock_timer_obj[i].time_device.ops = &_ops;
if (rt_clock_timer_register(&cyp_clock_timer_obj[i].time_device, cyp_clock_timer_obj[i].name, &cyp_clock_timer_obj[i].tim_handle) != RT_EOK)
{
LOG_E("%s register failed", cyp_hwtimer_obj[i].name);
LOG_E("%s register failed", cyp_clock_timer_obj[i].name);
result = -RT_ERROR;
}
}
return result;
}
INIT_BOARD_EXPORT(cyp_hwtimer_init);
INIT_BOARD_EXPORT(cyp_clock_timer_init);
#endif /*RT_USING_HWTIMER*/
#endif /*RT_USING_CLOCK_TIME*/
#endif /*BSP_USING_TIM*/
/* this is a hwtimer test demo*/
/* this is a clock_timer test demo*/
#include <rtthread.h>
#include <rtdevice.h>
#define HWTIMER_DEV_NAME "time2" /* device name */
#define CLOCK_TIMER_DEV_NAME "time2" /* device name */
static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size)
{
rt_kprintf("this is hwtimer timeout callback fucntion!\n");
rt_kprintf("this is clock_timer timeout callback fucntion!\n");
rt_kprintf("tick is :%d !\n", rt_tick_get());
return 0;
}
int hwtimer_sample()
int clock_timer_sample()
{
rt_err_t ret = RT_EOK;
rt_hwtimerval_t timeout_s;
rt_clock_timerval_t timeout_s;
rt_device_t hw_dev = RT_NULL;
rt_hwtimer_mode_t mode;
rt_clock_timer_mode_t mode;
rt_uint32_t freq = 10000;
hw_dev = rt_device_find(HWTIMER_DEV_NAME);
hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME);
if (hw_dev == RT_NULL)
{
rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME);
rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME);
return -RT_ERROR;
}
ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR);
if (ret != RT_EOK)
{
rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME);
rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME);
return ret;
}
rt_device_set_rx_indicate(hw_dev, timeout_cb);
rt_device_control(hw_dev, HWTIMER_CTRL_FREQ_SET, &freq);
rt_device_control(hw_dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq);
mode = HWTIMER_MODE_PERIOD;
ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode);
mode = CLOCK_TIMER_MODE_PERIOD;
ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode);
if (ret != RT_EOK)
{
rt_kprintf("set mode failed! ret is :%d\n", ret);
@@ -329,4 +329,4 @@ int hwtimer_sample()
}
return ret;
}
MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample);
MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample);

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@@ -8,8 +8,8 @@
* 2022-07-29 rtthread qiu first version
*/
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
#ifndef __DRV_CLOCK_TIMER_H__
#define __DRV_CLOCK_TIMER_H__
#include <rtthread.h>
@@ -24,7 +24,7 @@
.maxfreq = 1000000, \
.minfreq = 2000, \
.maxcnt = 0xFFFF, \
.cntmode = HWTIMER_CNTMODE_UP, \
.cntmode = CLOCK_TIMER_CNTMODE_UP, \
}
#endif /* TIM_DEV_INFO_CONFIG */
@@ -48,4 +48,4 @@
#endif /*TIM2_CONFIG*/
#endif /* BSP_USING_TIM2 */
#endif /* __DRV_HWTIMER_H__ */
#endif /* __DRV_CLOCK_TIMER_H__ */

View File

@@ -239,7 +239,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TIM
config BSP_USING_TIM1
bool "Enable TIM1"

View File

@@ -239,7 +239,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TIM
config BSP_USING_TIM1
bool "Enable TIM1"

View File

@@ -247,7 +247,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TIM
config BSP_USING_TIM1
bool "Enable TIM1"

View File

@@ -251,7 +251,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TIM
config BSP_USING_TIM1
bool "Enable TIM1"

View File

@@ -239,7 +239,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TIM
config BSP_USING_TIM1
bool "Enable TIM1"

View File

@@ -251,7 +251,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TIM
config BSP_USING_TIM1
bool "Enable TIM1"

View File

@@ -295,7 +295,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TIM
config BSP_USING_TIM1
bool "Enable TIM1"

View File

@@ -57,34 +57,34 @@ menu "On-chip Peripheral Drivers"
bool "using adc1"
default n
endif
menuconfig BSP_USING_HWTIMER
bool "Enable hwtimer"
menuconfig BSP_USING_CLOCK_TIMER
bool "Enable clock_timer"
default n
select RT_USING_HWTIMER
if BSP_USING_HWTIMER
config BSP_USING_HWTIMER0
bool "using hwtimer0"
select RT_USING_CLOCK_TIME
if BSP_USING_CLOCK_TIMER
config BSP_USING_CLOCK_TIMER0
bool "using clock_timer0"
default n
config BSP_USING_HWTIMER1
bool "using hwtimer1"
config BSP_USING_CLOCK_TIMER1
bool "using clock_timer1"
default n
config BSP_USING_HWTIMER2
bool "using hwtimer2"
config BSP_USING_CLOCK_TIMER2
bool "using clock_timer2"
default n
config BSP_USING_HWTIMER3
bool "using hwtimer3"
config BSP_USING_CLOCK_TIMER3
bool "using clock_timer3"
default n
config BSP_USING_HWTIMER4
bool "using hwtimer4"
config BSP_USING_CLOCK_TIMER4
bool "using clock_timer4"
default n
config BSP_USING_HWTIMER5
bool "using hwtimer5"
config BSP_USING_CLOCK_TIMER5
bool "using clock_timer5"
default n
config BSP_USING_HWTIMER6
bool "using hwtimer6"
config BSP_USING_CLOCK_TIMER6
bool "using clock_timer6"
default n
config BSP_USING_HWTIMER7
bool "using hwtimer7"
config BSP_USING_CLOCK_TIMER7
bool "using clock_timer7"
default n
endif
config BSP_USING_WDT

View File

@@ -51,7 +51,7 @@ msh />
| UART | 支持 | UART0~4 |
| GPIO | 支持 | GPIOB~F |
| ADC | 未支持 | ADC0~7 |
| HWTIMER | 未支持 | TIMER0~3 |
| CLOCK_TIMER | 未支持 | TIMER0~3 |
| RTC | 未支持 | RTC |
| WDT | 未支持 | Free watchdog timer |
| IIC | 未支持 | I2C0 |

View File

@@ -21,8 +21,8 @@ if GetDepend('RT_USING_PIN'):
if GetDepend('RT_USING_ADC'):
src += ['drv_adc.c']
if GetDepend('RT_USING_HWTIMER'):
src += ['drv_hwtimer.c']
if GetDepend('RT_USING_CLOCK_TIME'):
src += ['drv_timer.c']
if GetDepend('RT_USING_RTC'):
src += ['drv_rtc.c']

View File

@@ -23,5 +23,5 @@ extern "C" {
}
#endif
#endif /* __DRV_HWTIMER_H__ */
#endif /* __DRV_CLOCK_TIMER_H__ */

View File

@@ -57,22 +57,22 @@ menu "On-chip Peripheral Drivers"
bool "using adc0"
default n
endif
menuconfig BSP_USING_HWTIMER
bool "Enable hwtimer"
menuconfig BSP_USING_CLOCK_TIMER
bool "Enable clock_timer"
default n
select RT_USING_HWTIMER
if BSP_USING_HWTIMER
config BSP_USING_HWTIMER0
bool "using hwtimer0"
select RT_USING_CLOCK_TIME
if BSP_USING_CLOCK_TIMER
config BSP_USING_CLOCK_TIMER0
bool "using clock_timer0"
default n
config BSP_USING_HWTIMER1
bool "using hwtimer1"
config BSP_USING_CLOCK_TIMER1
bool "using clock_timer1"
default n
config BSP_USING_HWTIMER2
bool "using hwtimer2"
config BSP_USING_CLOCK_TIMER2
bool "using clock_timer2"
default n
config BSP_USING_HWTIMER3
bool "using hwtimer3"
config BSP_USING_CLOCK_TIMER3
bool "using clock_timer3"
default n
endif
config BSP_USING_WDT

View File

@@ -51,7 +51,7 @@ msh />
| UART | 支持 | UART0~5 |
| GPIO | 支持 | GPIOA~F |
| ADC | 未支持 | ADC0~7 |
| HWTIMER | 未支持 | TIMER0~3 |
| CLOCK_TIMER | 未支持 | TIMER0~3 |
| RTC | 未支持 | RTC |
| WDT | 未支持 | Free watchdog timer |
| IIC | 未支持 | I2C0 |

View File

@@ -21,8 +21,8 @@ if GetDepend('RT_USING_PIN'):
if GetDepend('RT_USING_ADC'):
src += ['drv_adc.c']
if GetDepend('RT_USING_HWTIMER'):
src += ['drv_hwtimer.c']
if GetDepend('RT_USING_CLOCK_TIME'):
src += ['drv_timer.c']
if GetDepend('RT_USING_RTC'):
src += ['drv_rtc.c']

View File

@@ -23,5 +23,5 @@ extern "C" {
}
#endif
#endif /* __DRV_HWTIMER_H__ */
#endif /* __DRV_CLOCK_TIMER_H__ */

View File

@@ -139,31 +139,31 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_TIM1
bool "Enable Timer1"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM3
bool "Enable Timer3"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM6
bool "Enable Timer6"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM14
bool "Enable Timer14"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM15
bool "Enable Timer15"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM16
bool "Enable Timer16"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM17
bool "Enable Timer17"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
endmenu
menu "Hardware WDT"

View File

@@ -12,7 +12,7 @@
#include <rtthread.h>
#include <rtdevice.h>
#ifdef RT_USING_HWTIMER
#ifdef RT_USING_CLOCK_TIME
#include "tim_config.h"
enum
@@ -40,15 +40,15 @@ enum
#endif
};
struct acm32_hwtimer
struct acm32_clock_timer
{
rt_hwtimer_t time_device;
rt_clock_timer_t time_device;
TIM_HandleTypeDef tim_handle;
IRQn_Type tim_irqn;
char *name;
};
static struct acm32_hwtimer acm32_hwtimer_obj[] =
static struct acm32_clock_timer acm32_clock_timer_obj[] =
{
#ifdef BSP_USING_TIM1
TIM1_CONFIG,
@@ -79,7 +79,7 @@ static struct acm32_hwtimer acm32_hwtimer_obj[] =
#endif
};
static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
static void timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state)
{
rt_uint32_t timer_clock = 0;
TIM_HandleTypeDef *tim = RT_NULL;
@@ -100,7 +100,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
tim->Init.Prescaler = (timer_clock / timer->freq) - 1 ;
tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP)
{
tim->Init.CounterMode = TIM_COUNTERMODE_UP;
}
@@ -116,7 +116,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
}
}
static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode)
{
TIM_HandleTypeDef *tim = RT_NULL;
@@ -129,7 +129,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_
/* set tim arr */
tim->Instance->ARR = t - 1;
if (opmode == HWTIMER_MODE_ONESHOT)
if (opmode == CLOCK_TIMER_MODE_ONESHOT)
{
/* set timer to single mode */
SET_BIT(tim->Instance->CR1, BIT3);
@@ -149,7 +149,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_
return RT_EOK;
}
static void timer_stop(rt_hwtimer_t *timer)
static void timer_stop(rt_clock_timer_t *timer)
{
TIM_HandleTypeDef *tim = RT_NULL;
@@ -161,7 +161,7 @@ static void timer_stop(rt_hwtimer_t *timer)
HAL_TIMER_Base_Stop(tim->Instance);
}
static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg)
{
TIM_HandleTypeDef *tim = RT_NULL;
rt_err_t result = RT_EOK;
@@ -173,7 +173,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
switch (cmd)
{
case HWTIMER_CTRL_FREQ_SET:
case CLOCK_TIMER_CTRL_FREQ_SET:
{
rt_uint32_t freq;
rt_uint32_t timer_clock;
@@ -206,16 +206,16 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
return result;
}
static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer)
{
RT_ASSERT(timer != RT_NULL);
return ((TIM_HandleTypeDef *)timer->parent.user_data)->Instance->CNT;
}
static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG;
static const struct rt_hwtimer_ops _ops =
static const struct rt_clock_timer_ops _ops =
{
.init = timer_init,
.start = timer_start,
@@ -233,7 +233,7 @@ void TIM1_BRK_UP_TRG_COM_IRQHandler(void)
/* interrupt service routine */
if (TIM1->SR & TIMER_SR_UIF)
{
rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM1_INDEX].time_device);
rt_clock_timer_isr(&acm32_clock_timer_obj[TIM1_INDEX].time_device);
}
TIM1->SR = 0; /* write 0 to clear hardware flag */
@@ -251,7 +251,7 @@ void TIM3_IRQHandler(void)
if (TIM3->SR & TIMER_SR_UIF)
{
rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM3_INDEX].time_device);
rt_clock_timer_isr(&acm32_clock_timer_obj[TIM3_INDEX].time_device);
}
TIM3->SR = 0; /* write 0 to clear hardware flag */
@@ -269,7 +269,7 @@ void TIM6_IRQHandler(void)
/* interrupt service routine */
if (TIM6->SR & TIMER_SR_UIF)
{
rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM6_INDEX].time_device);
rt_clock_timer_isr(&acm32_clock_timer_obj[TIM6_INDEX].time_device);
}
TIM6->SR = 0; /* write 0 to clear hardware flag */
@@ -285,7 +285,7 @@ void TIM14_IRQHandler(void)
/* interrupt service routine */
if (TIM14->SR & TIMER_SR_UIF)
{
rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM14_INDEX].time_device);
rt_clock_timer_isr(&acm32_clock_timer_obj[TIM14_INDEX].time_device);
}
TIM14->SR = 0; /* write 0 to clear hardware flag */
/* leave interrupt */
@@ -300,7 +300,7 @@ void TIM15_IRQHandler(void)
/* interrupt service routine */
if (TIM15->SR & TIMER_SR_UIF)
{
rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM15_INDEX].time_device);
rt_clock_timer_isr(&acm32_clock_timer_obj[TIM15_INDEX].time_device);
}
TIM15->SR = 0; /* write 0 to clear hardware flag */
/* leave interrupt */
@@ -314,7 +314,7 @@ void TIM16_IRQHandler(void)
rt_interrupt_enter();
if (TIM16->SR & TIMER_SR_UIF)
{
rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM16_INDEX].time_device);
rt_clock_timer_isr(&acm32_clock_timer_obj[TIM16_INDEX].time_device);
}
TIM16->SR = 0; /* write 0 to clear hardware flag */
/* leave interrupt */
@@ -328,7 +328,7 @@ void TIM17_IRQHandler(void)
rt_interrupt_enter();
if (TIM17->SR & TIMER_SR_UIF)
{
rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM17_INDEX].time_device);
rt_clock_timer_isr(&acm32_clock_timer_obj[TIM17_INDEX].time_device);
}
TIM17->SR = 0; /* write 0 to clear hardware flag */
/* leave interrupt */
@@ -336,18 +336,18 @@ void TIM17_IRQHandler(void)
}
#endif
static int acm32_hwtimer_init(void)
static int acm32_clock_timer_init(void)
{
int i = 0;
int result = RT_EOK;
for (i = 0; i < sizeof(acm32_hwtimer_obj) / sizeof(acm32_hwtimer_obj[0]); i++)
for (i = 0; i < sizeof(acm32_clock_timer_obj) / sizeof(acm32_clock_timer_obj[0]); i++)
{
acm32_hwtimer_obj[i].time_device.info = &_info;
acm32_hwtimer_obj[i].time_device.ops = &_ops;
result = rt_device_hwtimer_register(&acm32_hwtimer_obj[i].time_device,
acm32_hwtimer_obj[i].name,
&acm32_hwtimer_obj[i].tim_handle);
acm32_clock_timer_obj[i].time_device.info = &_info;
acm32_clock_timer_obj[i].time_device.ops = &_ops;
result = rt_clock_timer_register(&acm32_clock_timer_obj[i].time_device,
acm32_clock_timer_obj[i].name,
&acm32_clock_timer_obj[i].tim_handle);
if (result != RT_EOK)
{
result = -RT_ERROR;
@@ -357,7 +357,7 @@ static int acm32_hwtimer_init(void)
return result;
}
INIT_BOARD_EXPORT(acm32_hwtimer_init);
INIT_BOARD_EXPORT(acm32_clock_timer_init);
#endif /* RT_USING_HWTIMER */
#endif /* RT_USING_CLOCK_TIME */

View File

@@ -23,7 +23,7 @@ extern "C" {
.maxfreq = 1000000, \
.minfreq = 2000, \
.maxcnt = 0xFFFF, \
.cntmode = HWTIMER_CNTMODE_UP, \
.cntmode = CLOCK_TIMER_CNTMODE_UP, \
}
#endif /* TIM_DEV_INFO_CONFIG */

View File

@@ -2229,7 +2229,7 @@
<name>$PROJ_DIR$\..\..\..\components\drivers\core\device.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c</name>
<name>$PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion_comm.c</name>
@@ -2298,7 +2298,7 @@
<name>$PROJ_DIR$\drivers\drv_pm.c</name>
</file>
<file>
<name>$PROJ_DIR$\drivers\drv_hwtimer.c</name>
<name>$PROJ_DIR$\drivers\drv_timer.c</name>
</file>
<file>
<name>$PROJ_DIR$\drivers\drv_i2c.c</name>

View File

@@ -570,9 +570,9 @@
</Files>
<Files>
<File>
<FileName>hwtimer.c</FileName>
<FileName>clock_timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\hwtimer\hwtimer.c</FilePath>
<FilePath>..\..\..\components\drivers\clock_time\clock_timer.c</FilePath>
<FileOption>
<FileArmAds>
<Cads>
@@ -853,9 +853,9 @@
</Files>
<Files>
<File>
<FileName>drv_hwtimer.c</FileName>
<FileName>drv_timer.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\drv_hwtimer.c</FilePath>
<FilePath>drivers\drv_timer.c</FilePath>
</File>
</Files>
<Files>

View File

@@ -219,43 +219,43 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_TIM1
bool "Enable Timer1"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM2
bool "Enable Timer2"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM3
bool "Enable Timer3"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM4
bool "Enable Timer4"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM6
bool "Enable Timer6"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM7
bool "Enable Timer7"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM14
bool "Enable Timer14"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM15
bool "Enable Timer15"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM16
bool "Enable Timer16"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
config BSP_USING_TIM17
bool "Enable Timer17"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
endmenu
menu "Hardware WDT"

View File

@@ -23,7 +23,7 @@
#define __APP_INC_H__
#include "bl_inc.h"
#include "core_hwtimer.h"
#include "core_clock_timer.h"
#include "core_spi.h"
#include "core_adc.h"
#include "core_dac.h"

View File

@@ -19,8 +19,8 @@
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __CORE_HWTIMER_H__
#define __CORE_HWTIMER_H__
#ifndef __CORE_CLOCK_TIMER_H__
#define __CORE_CLOCK_TIMER_H__
/**

View File

@@ -28,7 +28,7 @@
#define CORE_TICK_1MS (48000)
#define CORE_TICK_1S (48000000)
#define CORE_TICK_IRQ_LEVEL 1
#define HWTIMER_IRQ_LEVEL 0
#define CLOCK_TIMER_IRQ_LEVEL 0
#define SYS_TIMER_TIM 6
#define SYS_TIMER_IRQ TIM0_6_IRQn

View File

@@ -142,7 +142,7 @@ static void __FUNC_IN_RAM__ prvHWTimer_StartOperationQueue(uint8_t HWTimerID, HW
break;
case OP_QUEUE_CMD_ONE_TIME_DELAY:
HWTimer->ContinueDelay = 0;
goto START_HWTIMER;
goto START_CLOCK_TIMER;
break;
case OP_QUEUE_CMD_REPEAT_DELAY:
HWTimer->CurCount++;
@@ -166,7 +166,7 @@ static void __FUNC_IN_RAM__ prvHWTimer_StartOperationQueue(uint8_t HWTimerID, HW
break;
case OP_QUEUE_CMD_CONTINUE_DELAY:
HWTimer->ContinueDelay = 1;
goto START_HWTIMER;
goto START_CLOCK_TIMER;
break;
case OP_QUEUE_CMD_SET_GPIO_DIR_OUT:
@@ -235,7 +235,7 @@ static void __FUNC_IN_RAM__ prvHWTimer_StartOperationQueue(uint8_t HWTimerID, HW
}
}
return ;
START_HWTIMER:
START_CLOCK_TIMER:
TIMM0->TIM[HWTimerID].ControlReg = 0;
Period = HWTimer->Cmd[HWTimer->CurCount].uArg.Time;
Period = Period * SYS_TIMER_1US + HWTimer->Cmd[HWTimer->CurCount].Arg1;
@@ -404,7 +404,7 @@ void HWTimer_StartOperationQueue(uint8_t HWTimerID)
HWTimer_Stop(HWTimerID);
}
ISR_SetHandler(prvHWTimer[HWTimerID].IrqLine, prvHWTimer_IrqHandlerOperationQueue, HWTimerID);
ISR_SetPriority(prvHWTimer[HWTimerID].IrqLine, HWTIMER_IRQ_LEVEL);
ISR_SetPriority(prvHWTimer[HWTimerID].IrqLine, CLOCK_TIMER_IRQ_LEVEL);
prvHWTimer[HWTimerID].Cmd[prvHWTimer[HWTimerID].CmdQueuePos].Operation = OP_QUEUE_CMD_END;
HWTimer_ResetOperationQueue(HWTimerID);

View File

@@ -105,7 +105,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TIM
config BSP_USING_TIM2
bool "Enable TIM2"

View File

@@ -175,61 +175,61 @@ rt_uint32_t air32_tim_clock_get(TIM_TypeDef *timx)
return RCC_Clocks.HCLK_Frequency;
}
struct rt_hwtimer_info hwtimer_info1 =
struct rt_clock_timer_info clock_timer_info1 =
{
.maxfreq = 1000000,
.minfreq = 2000,
.maxcnt = 0xFFFF,
.cntmode = HWTIMER_CNTMODE_UP,
.cntmode = CLOCK_TIMER_CNTMODE_UP,
};
struct rt_hwtimer_info hwtimer_info2 =
struct rt_clock_timer_info clock_timer_info2 =
{
.maxfreq = 1000000,
.minfreq = 2000,
.maxcnt = 0xFFFF,
.cntmode = HWTIMER_CNTMODE_UP,
.cntmode = CLOCK_TIMER_CNTMODE_UP,
};
struct rt_hwtimer_info hwtimer_info3 =
struct rt_clock_timer_info clock_timer_info3 =
{
.maxfreq = 1000000,
.minfreq = 2000,
.maxcnt = 0xFFFF,
.cntmode = HWTIMER_CNTMODE_UP,
.cntmode = CLOCK_TIMER_CNTMODE_UP,
};
struct rt_hwtimer_info hwtimer_info4 =
struct rt_clock_timer_info clock_timer_info4 =
{
.maxfreq = 1000000,
.minfreq = 2000,
.maxcnt = 0xFFFF,
.cntmode = HWTIMER_CNTMODE_UP,
.cntmode = CLOCK_TIMER_CNTMODE_UP,
};
struct rt_hwtimer_info *air32_hwtimer_info_config_get(TIM_TypeDef *timx)
struct rt_clock_timer_info *air32_clock_timer_info_config_get(TIM_TypeDef *timx)
{
struct rt_hwtimer_info *info = RT_NULL;
struct rt_clock_timer_info *info = RT_NULL;
if (timx == TIM1)
{
info = &hwtimer_info1;
info = &clock_timer_info1;
}
else if (timx == TIM2)
{
info = &hwtimer_info2;
info = &clock_timer_info2;
}
else if (timx == TIM3)
{
info = &hwtimer_info3;
info = &clock_timer_info3;
}
else if (timx == TIM4)
{
info = &hwtimer_info4;
info = &clock_timer_info4;
}
return info;

View File

@@ -58,7 +58,7 @@ rt_uint32_t air32_tim_clock_get(TIM_TypeDef *timx);
#endif
#ifdef BSP_USING_TIM
struct rt_hwtimer_info* air32_hwtimer_info_config_get(TIM_TypeDef *timx);
struct rt_clock_timer_info* air32_clock_timer_info_config_get(TIM_TypeDef *timx);
#endif
#ifdef BSP_USING_PWM

View File

@@ -64,7 +64,7 @@ if GetDepend('BSP_USING_PWM'):
src += ['rt_drivers/drv_pwm.c']
if GetDepend('BSP_USING_TIM'):
src += ['rt_drivers/drv_hwtimer.c']
src += ['rt_drivers/drv_timer.c']
if GetDepend('BSP_USING_WDT'):
src += ['rt_drivers/drv_wdt.c']

View File

@@ -1,329 +0,0 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
#include "drv_hwtimer.h"
#ifdef BSP_USING_TIM
#define LOG_TAG "drv.hwtimer"
#include <drv_log.h>
static void air32_hwtimer_init(struct rt_hwtimer_device *device, rt_uint32_t state)
{
struct hwtimer_device *hwtimer_dev;
struct rt_hwtimer_info *hwtimer_info;
rt_uint32_t clk = 0;
rt_uint16_t prescaler_value = 0;
TIM_TimeBaseInitTypeDef TIM_TimeBaseInitType;
NVIC_InitTypeDef NVIC_InitStructure;
RT_ASSERT(device != RT_NULL);
hwtimer_dev = (struct hwtimer_device *)device;
if (state)
{
air32_tim_clock_init(hwtimer_dev->periph);
hwtimer_info = air32_hwtimer_info_config_get(hwtimer_dev->periph);
clk = air32_tim_clock_get(hwtimer_dev->periph);
prescaler_value = (rt_uint16_t)(clk / hwtimer_info->minfreq) - 1;
/*
* (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) )
*/
TIM_TimeBaseInitType.TIM_Period = hwtimer_info->maxcnt - 1;
TIM_TimeBaseInitType.TIM_Prescaler = prescaler_value;
TIM_TimeBaseInitType.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseInitType.TIM_RepetitionCounter = 0;
if (hwtimer_info == RT_NULL)
{
TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up;
}
else
{
if (hwtimer_info->cntmode == HWTIMER_CNTMODE_UP)
{
TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up;
}
else
{
TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Down;
}
}
TIM_TimeBaseInit(hwtimer_dev->periph, &TIM_TimeBaseInitType);
NVIC_InitStructure.NVIC_IRQChannel = hwtimer_dev->irqn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
TIM_ITConfig(hwtimer_dev->periph, TIM_IT_Update, ENABLE);
TIM_ClearITPendingBit(hwtimer_dev->periph, TIM_IT_Update);
LOG_D("%s init success", hwtimer_dev->name);
}
}
static rt_err_t air32_hwtimer_start(struct rt_hwtimer_device *device, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
{
struct hwtimer_device *hwtimer_dev;
RT_ASSERT(device != RT_NULL);
hwtimer_dev = (struct hwtimer_device *)device;
/*
* (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) )
*/
TIM_SetCounter(hwtimer_dev->periph, 0);
TIM_SetAutoreload(hwtimer_dev->periph, cnt - 1);
if (mode == HWTIMER_MODE_ONESHOT)
{
TIM_SelectOnePulseMode(hwtimer_dev->periph, TIM_OPMode_Single);
}
else
{
TIM_SelectOnePulseMode(hwtimer_dev->periph, TIM_OPMode_Repetitive);
}
TIM_Cmd(hwtimer_dev->periph, ENABLE);
LOG_D("%s start, cnt = %d", hwtimer_dev->name, cnt);
return RT_EOK;
}
static void air32_hwtimer_stop(struct rt_hwtimer_device *device)
{
struct hwtimer_device *hwtimer_dev;
RT_ASSERT(device != RT_NULL);
hwtimer_dev = (struct hwtimer_device *)device;
TIM_Cmd(hwtimer_dev->periph, DISABLE);
TIM_SetCounter(hwtimer_dev->periph, 0);
}
static rt_uint32_t air32_hwtimer_counter_get(struct rt_hwtimer_device *device)
{
struct hwtimer_device *hwtimer_dev;
RT_ASSERT(device != RT_NULL);
hwtimer_dev = (struct hwtimer_device *)device;
return hwtimer_dev->periph->CNT;
}
static rt_err_t air32_hwtimer_control(struct rt_hwtimer_device *device, rt_uint32_t cmd, void *arg)
{
struct hwtimer_device *hwtimer_dev;
rt_err_t result = RT_EOK;
RT_ASSERT(device != RT_NULL);
hwtimer_dev = (struct hwtimer_device *)device;
switch (cmd)
{
case HWTIMER_CTRL_FREQ_SET:
{
rt_uint32_t freq = 0;
rt_uint32_t clk = 0;
rt_uint16_t prescaler_value = 0;
/*
* (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) )
*/
if (arg != RT_NULL)
{
freq = *((rt_uint32_t *)arg);
clk = air32_tim_clock_get(hwtimer_dev->periph);
prescaler_value = (rt_uint16_t)(clk / freq) - 1;
TIM_PrescalerConfig(hwtimer_dev->periph, prescaler_value, TIM_PSCReloadMode_Immediate);
}
else
{
result = -RT_EINVAL;
}
}
break;
default:
result = -RT_EINVAL;
break;
}
return result;
}
static const struct rt_hwtimer_ops hwtimer_ops =
{
.init = air32_hwtimer_init,
.start = air32_hwtimer_start,
.stop = air32_hwtimer_stop,
.count_get = air32_hwtimer_counter_get,
.control = air32_hwtimer_control,
};
static int rt_hw_hwtimer_init(void)
{
rt_err_t ret;
struct rt_hwtimer_info *hwtimer_info;
#ifdef BSP_USING_TIM1
hwtimer_info = air32_hwtimer_info_config_get(hwtimer_device1.periph);
hwtimer_device1.parent.info = hwtimer_info;
hwtimer_device1.parent.ops = &hwtimer_ops;
ret = rt_device_hwtimer_register(&hwtimer_device1.parent, hwtimer_device1.name, RT_NULL);
if (ret == RT_EOK)
{
LOG_D("hwtimer: %s register success.", hwtimer_device1.name);
}
else
{
LOG_D("hwtimer: %s register failed.", hwtimer_device1.name);
}
#endif
#ifdef BSP_USING_TIM2
hwtimer_info = air32_hwtimer_info_config_get(hwtimer_device2.periph);
hwtimer_device2.parent.info = hwtimer_info;
hwtimer_device2.parent.ops = &hwtimer_ops;
ret = rt_device_hwtimer_register(&hwtimer_device2.parent, hwtimer_device2.name, RT_NULL);
if (ret == RT_EOK)
{
LOG_D("hwtimer: %s register success.", hwtimer_device2.name);
}
else
{
LOG_D("hwtimer: %s register failed.", hwtimer_device2.name);
}
#endif
#ifdef BSP_USING_TIM3
hwtimer_info = air32_hwtimer_info_config_get(hwtimer_device3.periph);
hwtimer_device3.parent.info = hwtimer_info;
hwtimer_device3.parent.ops = &hwtimer_ops;
ret = rt_device_hwtimer_register(&hwtimer_device3.parent, hwtimer_device3.name, RT_NULL);
if (ret == RT_EOK)
{
LOG_D("hwtimer: %s register success.", hwtimer_device3.name);
}
else
{
LOG_D("hwtimer: %s register failed.", hwtimer_device3.name);
}
#endif
#ifdef BSP_USING_TIM4
hwtimer_info = air32_hwtimer_info_config_get(hwtimer_device4.periph);
hwtimer_device4.parent.info = hwtimer_info;
hwtimer_device4.parent.ops = &hwtimer_ops;
ret = rt_device_hwtimer_register(&hwtimer_device4.parent, hwtimer_device4.name, RT_NULL);
if (ret == RT_EOK)
{
LOG_D("hwtimer: %s register success.", hwtimer_device4.name);
}
else
{
LOG_D("hwtimer: %s register failed.", hwtimer_device4.name);
}
#endif
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_hwtimer_init);
#ifdef BSP_USING_TIM1
void TIM1_UP_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (TIM_GetITStatus(hwtimer_device1.periph, TIM_IT_Update) == SET)
{
TIM_ClearITPendingBit(hwtimer_device1.periph, TIM_IT_Update);
rt_device_hwtimer_isr(&hwtimer_device1.parent);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_TIM2
void TIM2_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (TIM_GetITStatus(hwtimer_device2.periph, TIM_IT_Update) == SET)
{
TIM_ClearITPendingBit(hwtimer_device2.periph, TIM_IT_Update);
rt_device_hwtimer_isr(&hwtimer_device2.parent);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_TIM3
void TIM3_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (TIM_GetITStatus(hwtimer_device3.periph, TIM_IT_Update) == SET)
{
TIM_ClearITPendingBit(hwtimer_device3.periph, TIM_IT_Update);
rt_device_hwtimer_isr(&hwtimer_device3.parent);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_TIM4
void TIM4_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (TIM_GetITStatus(hwtimer_device4.periph, TIM_IT_Update) == SET)
{
TIM_ClearITPendingBit(hwtimer_device4.periph, TIM_IT_Update);
rt_device_hwtimer_isr(&hwtimer_device4.parent);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#endif /* BSP_USING_HWTIMER */

View File

@@ -0,0 +1,329 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-02-22 airm2m first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
#include "drv_timer.h"
#ifdef BSP_USING_TIM
#define LOG_TAG "drv.clock_timer"
#include <drv_log.h>
static void air32_clock_timer_init(struct rt_clock_timer_device *device, rt_uint32_t state)
{
struct clock_timer_device *clock_timer_dev;
struct rt_clock_timer_info *clock_timer_info;
rt_uint32_t clk = 0;
rt_uint16_t prescaler_value = 0;
TIM_TimeBaseInitTypeDef TIM_TimeBaseInitType;
NVIC_InitTypeDef NVIC_InitStructure;
RT_ASSERT(device != RT_NULL);
clock_timer_dev = (struct clock_timer_device *)device;
if (state)
{
air32_tim_clock_init(clock_timer_dev->periph);
clock_timer_info = air32_clock_timer_info_config_get(clock_timer_dev->periph);
clk = air32_tim_clock_get(clock_timer_dev->periph);
prescaler_value = (rt_uint16_t)(clk / clock_timer_info->minfreq) - 1;
/*
* (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) )
*/
TIM_TimeBaseInitType.TIM_Period = clock_timer_info->maxcnt - 1;
TIM_TimeBaseInitType.TIM_Prescaler = prescaler_value;
TIM_TimeBaseInitType.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseInitType.TIM_RepetitionCounter = 0;
if (clock_timer_info == RT_NULL)
{
TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up;
}
else
{
if (clock_timer_info->cntmode == CLOCK_TIMER_CNTMODE_UP)
{
TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up;
}
else
{
TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Down;
}
}
TIM_TimeBaseInit(clock_timer_dev->periph, &TIM_TimeBaseInitType);
NVIC_InitStructure.NVIC_IRQChannel = clock_timer_dev->irqn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
TIM_ITConfig(clock_timer_dev->periph, TIM_IT_Update, ENABLE);
TIM_ClearITPendingBit(clock_timer_dev->periph, TIM_IT_Update);
LOG_D("%s init success", clock_timer_dev->name);
}
}
static rt_err_t air32_clock_timer_start(struct rt_clock_timer_device *device, rt_uint32_t cnt, rt_clock_timer_mode_t mode)
{
struct clock_timer_device *clock_timer_dev;
RT_ASSERT(device != RT_NULL);
clock_timer_dev = (struct clock_timer_device *)device;
/*
* (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) )
*/
TIM_SetCounter(clock_timer_dev->periph, 0);
TIM_SetAutoreload(clock_timer_dev->periph, cnt - 1);
if (mode == CLOCK_TIMER_MODE_ONESHOT)
{
TIM_SelectOnePulseMode(clock_timer_dev->periph, TIM_OPMode_Single);
}
else
{
TIM_SelectOnePulseMode(clock_timer_dev->periph, TIM_OPMode_Repetitive);
}
TIM_Cmd(clock_timer_dev->periph, ENABLE);
LOG_D("%s start, cnt = %d", clock_timer_dev->name, cnt);
return RT_EOK;
}
static void air32_clock_timer_stop(struct rt_clock_timer_device *device)
{
struct clock_timer_device *clock_timer_dev;
RT_ASSERT(device != RT_NULL);
clock_timer_dev = (struct clock_timer_device *)device;
TIM_Cmd(clock_timer_dev->periph, DISABLE);
TIM_SetCounter(clock_timer_dev->periph, 0);
}
static rt_uint32_t air32_clock_timer_counter_get(struct rt_clock_timer_device *device)
{
struct clock_timer_device *clock_timer_dev;
RT_ASSERT(device != RT_NULL);
clock_timer_dev = (struct clock_timer_device *)device;
return clock_timer_dev->periph->CNT;
}
static rt_err_t air32_clock_timer_control(struct rt_clock_timer_device *device, rt_uint32_t cmd, void *arg)
{
struct clock_timer_device *clock_timer_dev;
rt_err_t result = RT_EOK;
RT_ASSERT(device != RT_NULL);
clock_timer_dev = (struct clock_timer_device *)device;
switch (cmd)
{
case CLOCK_TIMER_CTRL_FREQ_SET:
{
rt_uint32_t freq = 0;
rt_uint32_t clk = 0;
rt_uint16_t prescaler_value = 0;
/*
* (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) )
*/
if (arg != RT_NULL)
{
freq = *((rt_uint32_t *)arg);
clk = air32_tim_clock_get(clock_timer_dev->periph);
prescaler_value = (rt_uint16_t)(clk / freq) - 1;
TIM_PrescalerConfig(clock_timer_dev->periph, prescaler_value, TIM_PSCReloadMode_Immediate);
}
else
{
result = -RT_EINVAL;
}
}
break;
default:
result = -RT_EINVAL;
break;
}
return result;
}
static const struct rt_clock_timer_ops clock_timer_ops =
{
.init = air32_clock_timer_init,
.start = air32_clock_timer_start,
.stop = air32_clock_timer_stop,
.count_get = air32_clock_timer_counter_get,
.control = air32_clock_timer_control,
};
static int rt_hw_clock_timer_init(void)
{
rt_err_t ret;
struct rt_clock_timer_info *clock_timer_info;
#ifdef BSP_USING_TIM1
clock_timer_info = air32_clock_timer_info_config_get(clock_timer_device1.periph);
clock_timer_device1.parent.info = clock_timer_info;
clock_timer_device1.parent.ops = &clock_timer_ops;
ret = rt_clock_timer_register(&clock_timer_device1.parent, clock_timer_device1.name, RT_NULL);
if (ret == RT_EOK)
{
LOG_D("clock_timer: %s register success.", clock_timer_device1.name);
}
else
{
LOG_D("clock_timer: %s register failed.", clock_timer_device1.name);
}
#endif
#ifdef BSP_USING_TIM2
clock_timer_info = air32_clock_timer_info_config_get(clock_timer_device2.periph);
clock_timer_device2.parent.info = clock_timer_info;
clock_timer_device2.parent.ops = &clock_timer_ops;
ret = rt_clock_timer_register(&clock_timer_device2.parent, clock_timer_device2.name, RT_NULL);
if (ret == RT_EOK)
{
LOG_D("clock_timer: %s register success.", clock_timer_device2.name);
}
else
{
LOG_D("clock_timer: %s register failed.", clock_timer_device2.name);
}
#endif
#ifdef BSP_USING_TIM3
clock_timer_info = air32_clock_timer_info_config_get(clock_timer_device3.periph);
clock_timer_device3.parent.info = clock_timer_info;
clock_timer_device3.parent.ops = &clock_timer_ops;
ret = rt_clock_timer_register(&clock_timer_device3.parent, clock_timer_device3.name, RT_NULL);
if (ret == RT_EOK)
{
LOG_D("clock_timer: %s register success.", clock_timer_device3.name);
}
else
{
LOG_D("clock_timer: %s register failed.", clock_timer_device3.name);
}
#endif
#ifdef BSP_USING_TIM4
clock_timer_info = air32_clock_timer_info_config_get(clock_timer_device4.periph);
clock_timer_device4.parent.info = clock_timer_info;
clock_timer_device4.parent.ops = &clock_timer_ops;
ret = rt_clock_timer_register(&clock_timer_device4.parent, clock_timer_device4.name, RT_NULL);
if (ret == RT_EOK)
{
LOG_D("clock_timer: %s register success.", clock_timer_device4.name);
}
else
{
LOG_D("clock_timer: %s register failed.", clock_timer_device4.name);
}
#endif
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_clock_timer_init);
#ifdef BSP_USING_TIM1
void TIM1_UP_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (TIM_GetITStatus(clock_timer_device1.periph, TIM_IT_Update) == SET)
{
TIM_ClearITPendingBit(clock_timer_device1.periph, TIM_IT_Update);
rt_clock_timer_isr(&clock_timer_device1.parent);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_TIM2
void TIM2_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (TIM_GetITStatus(clock_timer_device2.periph, TIM_IT_Update) == SET)
{
TIM_ClearITPendingBit(clock_timer_device2.periph, TIM_IT_Update);
rt_clock_timer_isr(&clock_timer_device2.parent);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_TIM3
void TIM3_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (TIM_GetITStatus(clock_timer_device3.periph, TIM_IT_Update) == SET)
{
TIM_ClearITPendingBit(clock_timer_device3.periph, TIM_IT_Update);
rt_clock_timer_isr(&clock_timer_device3.parent);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_TIM4
void TIM4_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if (TIM_GetITStatus(clock_timer_device4.periph, TIM_IT_Update) == SET)
{
TIM_ClearITPendingBit(clock_timer_device4.periph, TIM_IT_Update);
rt_clock_timer_isr(&clock_timer_device4.parent);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#endif /* BSP_USING_CLOCK_TIMER */

View File

@@ -8,24 +8,24 @@
* 2022-02-22 airm2m first version
*/
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
#ifndef __DRV_CLOCK_TIMER_H__
#define __DRV_CLOCK_TIMER_H__
#include <rtthread.h>
#ifdef BSP_USING_TIM
#include <board.h>
struct hwtimer_device
struct clock_timer_device
{
struct rt_hwtimer_device parent;
struct rt_clock_timer_device parent;
TIM_TypeDef *periph;
IRQn_Type irqn;
char *name;
};
#ifdef BSP_USING_TIM1
struct hwtimer_device hwtimer_device1 =
struct clock_timer_device clock_timer_device1 =
{
.periph = TIM1,
.irqn = TIM1_UP_IRQn,
@@ -33,7 +33,7 @@ struct hwtimer_device hwtimer_device1 =
#endif
#ifdef BSP_USING_TIM2
struct hwtimer_device hwtimer_device2 =
struct clock_timer_device clock_timer_device2 =
{
.periph = TIM2,
.irqn = TIM2_IRQn,
@@ -41,7 +41,7 @@ struct hwtimer_device hwtimer_device2 =
#endif
#ifdef BSP_USING_TIM3
struct hwtimer_device hwtimer_device3 =
struct clock_timer_device clock_timer_device3 =
{
.periph = TIM3,
.irqn = TIM3_IRQn,
@@ -49,12 +49,12 @@ struct hwtimer_device hwtimer_device3 =
#endif
#ifdef BSP_USING_TIM4
struct hwtimer_device hwtimer_device4 =
struct clock_timer_device clock_timer_device4 =
{
.periph = TIM4,
.irqn = TIM4_IRQn,
.name = "timer4"};
#endif
#endif /* BSP_USING_HWTIMER */
#endif /* __DRV_HWTIMER_H__ */
#endif /* BSP_USING_CLOCK_TIMER */
#endif /* __DRV_CLOCK_TIMER_H__ */

View File

@@ -52,6 +52,11 @@ struct mem_desc platform_mem_desc[] = {
#endif /* RT_USING_SMART */
rt_uint64_t rt_hw_get_clock_timer_freq(void)
{
return 24000000ULL;
}
// 初始化BSS节区
void init_bss(void)
{

View File

@@ -175,7 +175,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TMR
bool "Enable Timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TMR
config BSP_USING_TMR1
bool "Enable TMR1"

View File

@@ -35,7 +35,7 @@
#if defined(RT_USING_SPI)
#include "apm32e10x_spi.h"
#endif
#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM)
#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM)
#include "apm32e10x_tmr.h"
#endif
#if defined(RT_USING_WDT)

View File

@@ -156,7 +156,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TMR
bool "Enable Timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TMR
config BSP_USING_TMR1
bool "Enable TMR1"

View File

@@ -35,7 +35,7 @@
#if defined(RT_USING_SPI)
#include "apm32e10x_spi.h"
#endif
#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM)
#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM)
#include "apm32e10x_tmr.h"
#endif
#if defined(RT_USING_WDT)

View File

@@ -120,7 +120,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TMR
bool "Enable Timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TMR
config BSP_USING_TMR1
bool "Enable TMR1"

View File

@@ -34,7 +34,7 @@
#if defined(RT_USING_SPI)
#include "apm32f0xx_spi.h"
#endif
#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM)
#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM)
#include "apm32f0xx_tmr.h"
#endif
#if defined(RT_USING_WDT)

View File

@@ -132,7 +132,7 @@ menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_TMR
bool "Enable Timer"
default n
select RT_USING_HWTIMER
select RT_USING_CLOCK_TIME
if BSP_USING_TMR
config BSP_USING_TMR1
bool "Enable TMR1"

View File

@@ -34,7 +34,7 @@
#if defined(RT_USING_SPI)
#include "apm32f0xx_spi.h"
#endif
#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM)
#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM)
#include "apm32f0xx_tmr.h"
#endif
#if defined(RT_USING_WDT)

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