Juha Niskanen ebc6f51641 Fix some typos

2019-09-17 10:46:23 -06:00

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a1x

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am335x

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arm

Squashed commit of the following:

2019-04-29 14:52:05 -06:00

armv6-m

Squashed commit of the following:

2019-04-29 14:52:05 -06:00

armv7-a

Squashed commit of the following:

2019-04-29 14:52:05 -06:00

armv7-m

This commit removes CONFIG_ARCH_INT_DISABLEALL. In the normal course of things, interrupts must occasionally be disabled using the up_irq_save() inline function to prevent contention in use of resources that may be shared between interrupt level and non-interrupt level logic. Now the question arises, if we are using BASEPRI to disable interrupts and have high priority interrupts enabled (CONFIG_ARCH_HIPRI_INTERRUPT=y), do we disable all interrupts except SVCall (we cannot disable SVCall interrupts). Or do we only disable the "normal" interrupts?

2019-08-09 10:52:35 -06:00

armv7-r

Squashed commit of the following:

2019-04-29 14:52:05 -06:00

c5471

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cxd56xx

Fix some typos

2019-09-17 10:46:23 -06:00

dm320

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efm32

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imx1

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imx6

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imxrt

Merged imxrt1020 into master

2019-04-30 16:08:46 -06:00

kinetis

Merged in dagar/nuttx/pr-kinetic_minor_fix (pull request #820)

2019-01-19 15:39:46 +00:00

kl

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lc823450

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lpc17xx_40xx

Merged in jjlange/nuttx/lpc40xx (pull request #946)

2019-07-11 16:50:00 +00:00

lpc31xx

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lpc43xx

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lpc54xx

symtab/Makefile: When system wide locale is set (i.e. en_US.UTF-8) then 'read' is ordered after 'readdir' even if separator is set to quotation mark and key set to 2. When C locale is used result is correct.

2019-08-14 11:02:30 -06:00

lpc214x

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lpc2378

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max326xx

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moxart

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nrf52

arch/arm/include/nrf52/ and arch/arm/src/nrf52: 1. Added 52840 family support 2. Use common irq and memory layout header file for 52832 & 52840.

2019-03-12 09:43:49 -06:00

nuc1xx

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s32k1xx

arch/arm/src/s32k1xx: This commit brings in the LPSPI and LPI2C peripheral drivers from the i.MXRT which used the identical IP.

2019-08-21 11:18:40 -06:00

sam34

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sama5

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samd2l2

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samd5e5

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samv7

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stm32

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stm32f0l0g0

Rename STM32F0L0 to STM32F0L0G0 since it now alsow supports the STM32G0 thanks to Mateusz Szafoni's contribution

2019-05-27 08:16:24 -06:00

stm32f7

*Merged in zhoukejun/nuttx_nucleo-f767zi (pull request #838)

2019-03-11 03:44:57 +00:00

stm32h7

arch/arm/src/stm32h7/: Add stm32h7 ethernet driver. This is the initial push for the ethernet driver. The driver has been tested to be working on a nucleo board. This is still WIP, it doesn't for example do MAC filtering on HW level, but just receives all ethernet packets.

2019-04-30 08:43:39 -06:00

stm32l4

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str71x

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tiva

Tiva directories: Fix TM4C129XNCZAD part number in Kconfig and identifiers. Rationale: Fully specify that this is the 212-pin BGA package (ZAD ending) and for consistency with earlier changes to other Tiva TM4C12x part numbers in Kconfig names and identifiers.

2019-08-30 08:46:57 -06:00

tms570

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xmc4

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.gitignore

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arch.h

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elf.h

arch/arm/include/syscall.h: Add missing inclusion of arch/armv7-r/syscall.h for CortexR.

2019-01-26 07:43:31 -06:00

inttypes.h

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irq.h

arch/arm: Add the initial cortex-a7 archtiecture support

2019-03-19 11:51:29 -06:00

limits.h

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setjmp.h

arch/arm/src/armv7-m: Add ARMv7-M setjmp/longjump functions.

2019-08-06 15:59:19 -06:00

spinlock.h

Fix some typos

2019-09-17 10:46:23 -06:00

stdarg.h

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syscall.h

arch/arm: Add the initial cortex-a7 archtiecture support

2019-03-19 11:51:29 -06:00

tls.h

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types.h

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