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Rename STM32F0L0 to STM32F0L0G0 since it now alsow supports the STM32G0 thanks to Mateusz Szafoni's contribution

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Squashed commit of the following:

    arch/arm:  Rename include/stm32f0l0 and src/stm32f0l0 to stm32f0l0g0.

    Change all occurrences of lower-case stm32f0l0 to stm32f0l0g0.

    Change all occurrences of upper-case STM32F0L0 to STM32F0L0G0.
This commit is contained in:
Gregory Nutt
2019-05-27 08:16:24 -06:00
parent dbb40e5fe7
commit 5cdd038df2
142 changed files with 1560 additions and 1560 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/Kconfig
+2 -2
View File
@@ -684,7 +684,7 @@ config ARCH_CHIP
default "sam34" if ARCH_CHIP_SAM34
default "samv7" if ARCH_CHIP_SAMV7
default "stm32" if ARCH_CHIP_STM32
default "stm32f0l0" if ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32G0
default "stm32f0l0g0" if ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32G0
default "stm32f7" if ARCH_CHIP_STM32F7
default "stm32h7" if ARCH_CHIP_STM32H7
default "stm32l4" if ARCH_CHIP_STM32L4
@@ -917,7 +917,7 @@ if ARCH_CHIP_STM32
source arch/arm/src/stm32/Kconfig
endif
if ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32G0
source arch/arm/src/stm32f0l0/Kconfig
source arch/arm/src/stm32f0l0g0/Kconfig
endif
if ARCH_CHIP_STM32F7
source arch/arm/src/stm32f7/Kconfig
arch/arm/include/stm32f0l0/chip.h → arch/arm/include/stm32f0l0g0/chip.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/include/stm32f0l0/chip.h
* arch/arm/include/stm32f0l0g0/chip.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0_CHIP_H
#define __ARCH_ARM_INCLUDE_STM32F0L0_CHIP_H
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0G0_CHIP_H
#define __ARCH_ARM_INCLUDE_STM32F0L0G0_CHIP_H
/************************************************************************************
* Included Files
@@ -552,4 +552,4 @@
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0_CHIP_H */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0G0_CHIP_H */
arch/arm/include/stm32f0l0/irq.h → arch/arm/include/stm32f0l0g0/irq.h
+7 -7
View File
@@ -38,8 +38,8 @@
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0G0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0G0_IRQ_H
/****************************************************************************
* Included Files
@@ -48,7 +48,7 @@
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include <arch/stm32f0l0/chip.h>
#include <arch/stm32f0l0g0/chip.h>
/****************************************************************************
* Pre-processor Definitions
@@ -79,11 +79,11 @@
/* Include MCU-specific external interrupt definitions */
#if defined(CONFIG_ARCH_CHIP_STM32F0)
# include <arch/stm32f0l0/stm32f0_irq.h>
# include <arch/stm32f0l0g0/stm32f0_irq.h>
#elif defined(CONFIG_ARCH_CHIP_STM32L0)
# include <arch/stm32f0l0/stm32l0_irq.h>
# include <arch/stm32f0l0g0/stm32l0_irq.h>
#elif defined(CONFIG_ARCH_CHIP_STM32G0)
# include <arch/stm32f0l0/stm32g0_irq.h>
# include <arch/stm32f0l0g0/stm32g0_irq.h>
#else
# error Unrecognized STM32 Cortex M0 family
#endif
@@ -119,4 +119,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0G0_IRQ_H */
arch/arm/include/stm32f0l0/stm32f0_irq.h → arch/arm/include/stm32f0l0g0/stm32f0_irq.h
+6 -6
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/include/stm32f0l0/stm32f0_irq.h
* arch/arm/include/stm32f0l0g0/stm32f0_irq.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -38,8 +38,8 @@
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0_STM32F0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0_STM32F0_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32F0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32F0_IRQ_H
/****************************************************************************
* Included Files
@@ -47,7 +47,7 @@
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/stm32f0l0/chip.h>
#include <arch/stm32f0l0g0/chip.h>
/****************************************************************************
* Pre-processor Definitions
@@ -58,7 +58,7 @@
* to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in nuttx/arch/arm/include/stm32f0l0/irq.h
* in nuttx/arch/arm/include/stm32f0l0g0/irq.h
*/
#define STM32_IRQ_WWDG (STM32_IRQ_EXTINT + 0) /* 0: WWDG */
@@ -142,4 +142,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0_STM32F0_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32F0_IRQ_H */
arch/arm/include/stm32f0l0/stm32g0_irq.h → arch/arm/include/stm32f0l0g0/stm32g0_irq.h
+6 -6
View File
@@ -1,5 +1,5 @@
/****************************************************************************************************
* arch/arm/include/stm32f0l0/stm32g0_irq.h
* arch/arm/include/stm32f0l0g0/stm32g0_irq.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Mateusz Szafoni <raiden00@railab.me>
@@ -35,8 +35,8 @@
/* This file should never be included directed but, rather, only indirectly through nuttx/irq.h */
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0_STM32G0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0_STM32G0_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32G0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32G0_IRQ_H
/****************************************************************************************************
* Included Files
@@ -44,7 +44,7 @@
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/stm32f0l0/chip.h>
#include <arch/stm32f0l0g0/chip.h>
/****************************************************************************************************
* Pre-processor Definitions
@@ -55,7 +55,7 @@
* to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in nuttx/arch/arm/include/stm32f0l0/irq.h
* in nuttx/arch/arm/include/stm32f0l0g0/irq.h
*/
#define STM32_IRQ_WWDG (STM32_IRQ_EXTINT + 0) /* 0: Window Watchdog interrupt */
@@ -139,4 +139,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0_STM32G0_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32G0_IRQ_H */
arch/arm/include/stm32f0l0/stm32l0_irq.h → arch/arm/include/stm32f0l0g0/stm32l0_irq.h
+6 -6
View File
@@ -1,5 +1,5 @@
/****************************************************************************************************
* arch/arm/include/stm32f0l0/stm32l0_irq.h
* arch/arm/include/stm32f0l0g0/stm32l0_irq.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Mateusz Szafoni <raiden00@railab.me>
@@ -35,8 +35,8 @@
/* This file should never be included directed but, rather, only indirectly through nuttx/irq.h */
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0_STM32L0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0_STM32L0_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32L0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32L0_IRQ_H
/****************************************************************************************************
* Included Files
@@ -44,7 +44,7 @@
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/stm32f0l0/chip.h>
#include <arch/stm32f0l0g0/chip.h>
/****************************************************************************************************
* Pre-processor Definitions
@@ -55,7 +55,7 @@
* to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be found
* in nuttx/arch/arm/include/stm32f0l0/irq.h
* in nuttx/arch/arm/include/stm32f0l0g0/irq.h
*/
#define STM32_IRQ_WWDG (STM32_IRQ_EXTINT + 0) /* 0: Window Watchdog interrupt */
@@ -129,4 +129,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0_STM32L0_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32L0_IRQ_H */
arch/arm/src/stm32f0l0/Kconfig → arch/arm/src/stm32f0l0g0/Kconfig
+567 -567
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/stm32f0l0/Make.defs → arch/arm/src/stm32f0l0g0/Make.defs
+12 -12
View File
@@ -1,5 +1,5 @@
############################################################################
# arch/arm/src/stm32f0l0/Make.defs
# arch/arm/src/stm32f0l0g0/Make.defs
#
# Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
@@ -66,11 +66,11 @@ CHIP_ASRCS =
CHIP_CSRCS = stm32_start.c stm32_gpio.c stm32_exti_gpio.c stm32_irq.c
CHIP_CSRCS += stm32_lse.c stm32_lowputc.c stm32_serial.c stm32_rcc.c
ifeq ($(CONFIG_STM32F0L0_DMA),y)
ifeq ($(CONFIG_STM32F0L0G0_DMA),y)
CHIP_CSRCS += stm32_dma_v1.c
endif
ifeq ($(CONFIG_STM32F0L0_PWR),y)
ifeq ($(CONFIG_STM32F0L0G0_PWR),y)
CHIP_CSRCS += stm32_pwr.c
endif
@@ -86,7 +86,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += stm32_userspace.c
endif
ifeq ($(CONFIG_STM32F0L0_GPIOIRQ),y)
ifeq ($(CONFIG_STM32F0L0G0_GPIOIRQ),y)
CHIP_CSRCS += stm32_gpioint.c
endif
@@ -94,34 +94,34 @@ ifeq ($(CONFIG_ARCH_IRQPRIO),y)
CHIP_CSRCS += stm32_irqprio.c
endif
ifeq ($(CONFIG_STM32F0L0_HAVE_HSI48),y)
ifeq ($(CONFIG_STM32F0L0G0_HAVE_HSI48),y)
CHIP_CSRCS += stm32_hsi48.c
endif
ifeq ($(CONFIG_STM32F0L0_USB),y)
ifeq ($(CONFIG_STM32F0L0G0_USB),y)
CHIP_CSRCS += stm32_usbdev.c
endif
ifeq ($(CONFIG_STM32F0L0_I2C),y)
ifeq ($(CONFIG_STM32F0L0G0_I2C),y)
CHIP_CSRCS += stm32_i2c.c
endif
ifeq ($(CONFIG_STM32F0L0_SPI),y)
ifeq ($(CONFIG_STM32F0L0G0_SPI),y)
CHIP_CSRCS += stm32_spi.c
endif
ifeq ($(CONFIG_STM32F0L0_PWM),y)
ifeq ($(CONFIG_STM32F0L0G0_PWM),y)
CHIP_CSRCS += stm32_pwm.c
endif
ifeq ($(CONFIG_STM32F0L0_ADC),y)
ifeq ($(CONFIG_STM32F0L0G0_ADC),y)
CHIP_CSRCS += stm32_adc.c
endif
ifeq ($(CONFIG_STM32F0L0_AES),y)
ifeq ($(CONFIG_STM32F0L0G0_AES),y)
CHIP_CSRCS += stm32_aes.c
endif
ifeq ($(CONFIG_STM32F0L0_RNG),y)
ifeq ($(CONFIG_STM32F0L0G0_RNG),y)
CHIP_CSRCS += stm32_rng.c
endif
arch/arm/src/stm32f0l0/chip.h → arch/arm/src/stm32f0l0g0/chip.h
+5 -5
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/chip.h
* arch/arm/src/stm32f0l0g0/chip.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_CHIP_H
#define __ARCH_ARM_SRC_STM32F0L0_CHIP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_CHIP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_CHIP_H
/************************************************************************************
* Included Files
@@ -46,7 +46,7 @@
/* Include the chip capabilities file */
#include <arch/stm32f0l0/chip.h>
#include <arch/stm32f0l0g0/chip.h>
#define ARMV6M_PERIPHERAL_INTERRUPTS 32
@@ -56,4 +56,4 @@
#include "hardware/stm32_memorymap.h"
#endif /* __ARCH_ARM_SRC_STM32F0L0_CHIP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_CHIP_H */
arch/arm/src/stm32f0l0/hardware/stm32_adc.h → arch/arm/src/stm32f0l0g0/hardware/stm32_adc.h
+7 -7
View File
@@ -1,5 +1,5 @@
/********************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_adc.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_adc.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
********************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_ADC_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_ADC_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_ADC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_ADC_H
/********************************************************************************
* Included Files
@@ -62,7 +62,7 @@
/* Support for ADC clock prescaler */
#if defined(CONFIG_STM32F0L0_STM32L0) || defined(CONFIG_STM32F0L0_STM32G0)
#if defined(CONFIG_STM32F0L0G0_STM32L0) || defined(CONFIG_STM32F0L0G0_STM32G0)
# define HAVE_ADC_PRE
#else
# undef HAVE_ADC_PRE
@@ -70,7 +70,7 @@
/* Support for LCD voltage */
#ifdef CONFIG_STM32F0L0_HAVE_LCD
#ifdef CONFIG_STM32F0L0G0_HAVE_LCD
# define HAVE_ADC_VLCD
#else
# undef HAVE_ADC_VLCD
@@ -78,7 +78,7 @@
/* Supprot for Low frequency mode */
#ifdef CONFIG_STM32F0L0_ENERGYLITE
#ifdef CONFIG_STM32F0L0G0_ENERGYLITE
# define HAVE_ADC_LFM
#else
# undef HAVE_ADC_LFM
@@ -268,4 +268,4 @@
# define ADC_CCR_LFMEN (1 << 25) /* Bit 25: Low Frequency Mode enable */
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_ADC_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_ADC_H */
arch/arm/src/stm32f0l0/hardware/stm32_aes.h → arch/arm/src/stm32f0l0g0/hardware/stm32_aes.h
+4 -4
View File
@@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_aes.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_aes.h
*
* Copyright (C) 2015 Haltian Ltd. All rights reserved.
* Author: Juha Niskanen <juha.niskanen@haltian.com>
@@ -33,8 +33,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_AES_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_AES_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_AES_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_AES_H
/********************************************************************************************
* Included Files
@@ -111,4 +111,4 @@
#define AES_SR_RDERR (1 << 1) /* Read Error Flag */
#define AES_SR_WRERR (1 << 2) /* Write Error Flag */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_AES_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_AES_H */
arch/arm/src/stm32f0l0/hardware/stm32_can.h → arch/arm/src/stm32f0l0g0/hardware/stm32_can.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_can.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_can.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CAN_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CAN_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CAN_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CAN_H
/************************************************************************************
* Included Files
@@ -466,4 +466,4 @@
#define CAN_FA1R_FACT_SHIFT (0) /* Bits 13:0: Filter Active */
#define CAN_FA1R_FACT_MASK (0x3fff << CAN_FA1R_FACT_SHIFT)
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CAN_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CAN_H */
arch/arm/src/stm32f0l0/hardware/stm32_comp.h → arch/arm/src/stm32f0l0g0/hardware/stm32_comp.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_comp.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_comp.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Mateusz Szafoni <raiden00@railab.me>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_COMP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_COMP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_COMP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_COMP_H
/************************************************************************************
* Included Files
@@ -135,4 +135,4 @@
#define COMP_CSR_COMP2OUT (1 << 14) /* Bit 14: Comparator 1 output */
#define COMP_CSR_COMP2LOCK (1 << 15) /* Bit 15: Comparator 1 lock */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_COMP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_COMP_H */
arch/arm/src/stm32f0l0/hardware/stm32_crc.h → arch/arm/src/stm32f0l0g0/hardware/stm32_crc.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_crc.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_crc.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRC_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRC_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CRC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CRC_H
/************************************************************************************
* Included Files
@@ -87,4 +87,4 @@
# define CRC_CR_REVIN_WORD (3 << CRC_CR_REVIN_SHIFT) /* 11: reversal done by word */
#define CRC_CR_REVOUT (1 << 7) /* This bit controls the reversal of the bit order of the output data */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRC_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CRC_H */
arch/arm/src/stm32f0l0/hardware/stm32_crs.h → arch/arm/src/stm32f0l0g0/hardware/stm32_crs.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_crs.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_crs.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRS_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRS_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CRS_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CRS_H
/************************************************************************************
* Pre-processor Definitions
@@ -112,4 +112,4 @@
#define CRS_ICR_ERRC (1 << 2) /* Bit 2: Error clear flag */
#define CRS_ICR_ESYNCC (1 << 3) /* Bit 3: Expected SYNC clear flag */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_CRS_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_CRS_H */
arch/arm/src/stm32f0l0/hardware/stm32_dac.h → arch/arm/src/stm32f0l0g0/hardware/stm32_dac.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_dac.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_dac.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DAC_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DAC_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DAC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DAC_H
/************************************************************************************
* Included Files
@@ -215,4 +215,4 @@
#define DAC_SR_DMAUDR1 (1 << 13) /* Bit 13: DAC channel 1 DMA underrun flag */
#define DAC_SR_DMAUDR2 (1 << 29) /* Bit 29: DAC channel 2 DMA underrun flag */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DAC_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DAC_H */
arch/arm/src/stm32f0l0/hardware/stm32_dma_v1.h → arch/arm/src/stm32f0l0g0/hardware/stm32_dma_v1.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_dma_v1.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_dma_v1.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMA_V1_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMA_V1_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DMA_V1_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DMA_V1_H
/************************************************************************************
* Pre-processor Definitions
@@ -550,4 +550,4 @@
# error "Unknown DMA channel assignments"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMA_V1_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DMA_V1_H */
arch/arm/src/stm32f0l0/hardware/stm32_dmamux.h → arch/arm/src/stm32f0l0g0/hardware/stm32_dmamux.h
+5 -5
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_dmamux.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_dmamux.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Mateusz Szafoni <raiden00@railab.me>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMAMUX_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMAMUX_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DMAMUX_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DMAMUX_H
/************************************************************************************
* Included Files
@@ -153,10 +153,10 @@
/* Import DMAMUX map */
#if defined(CONFIG_STM32F0L0_STM32G0)
#if defined(CONFIG_STM32F0L0G0_STM32G0)
# include "chip/stm32g0_dmamux.h"
#else
# error "Unsupported STM32 M0 sub family"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_DMAMUX_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_DMAMUX_H */
arch/arm/src/stm32f0l0/hardware/stm32_exti.h → arch/arm/src/stm32f0l0g0/hardware/stm32_exti.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_exti.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_exti.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_EXTI_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_EXTI_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_EXTI_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_EXTI_H
/************************************************************************************
* Included Files
@@ -54,4 +54,4 @@
# error "Unrecognized STM32 M0 EXTI"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_EXTI_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_EXTI_H */
arch/arm/src/stm32f0l0/hardware/stm32_flash.h → arch/arm/src/stm32f0l0g0/hardware/stm32_flash.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_flash.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_flash.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_FLASH_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_FLASH_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_FLASH_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_FLASH_H
/************************************************************************************
* Included Files
@@ -53,4 +53,4 @@
# error "Unsupported STM32 M0 FLASH"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_FLASH_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_FLASH_H */
arch/arm/src/stm32f0l0/hardware/stm32_gpio.h → arch/arm/src/stm32f0l0g0/hardware/stm32_gpio.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_gpio.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_gpio.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_GPIO_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_GPIO_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_GPIO_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_GPIO_H
/************************************************************************************
* Pre-processor Definitions
@@ -355,4 +355,4 @@
#define GPIO_BRR(n) (1 << (n))
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_GPIO_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_GPIO_H */
arch/arm/src/stm32f0l0/hardware/stm32_i2c.h → arch/arm/src/stm32f0l0g0/hardware/stm32_i2c.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_i2c.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_i2c.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_I2C_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_I2C_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_I2C_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_I2C_H
/************************************************************************************
* Pre-processor Definitions
@@ -235,4 +235,4 @@
#define I2C_TXDR_MASK (0xff)
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_I2C_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_I2C_H */
arch/arm/src/stm32f0l0/hardware/stm32_memorymap.h → arch/arm/src/stm32f0l0g0/hardware/stm32_memorymap.h
+6 -6
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_memorymap.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_memorymap.h
*
* Copyright (C) 2017, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_MEMORYMAP_H
/************************************************************************************
* Included Files
@@ -44,8 +44,8 @@
#include <nuttx/config.h>
#include "chip.h"
#if defined(CONFIG_STM32F0L0_STM32F05X) || defined(CONFIG_STM32F0L0_STM32F07X) || \
defined(CONFIG_STM32F0L0_STM32F09X)
#if defined(CONFIG_STM32F0L0G0_STM32F05X) || defined(CONFIG_STM32F0L0G0_STM32F07X) || \
defined(CONFIG_STM32F0L0G0_STM32F09X)
# include "hardware/stm32f05xf07xf09x_memorymap.h"
#elif defined(CONFIG_ARCH_CHIP_STM32L0)
# include "hardware/stm32l0_memorymap.h"
@@ -55,4 +55,4 @@
# error "Unsupported STM32 M0 memory map"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_MEMORYMAP_H */
arch/arm/src/stm32f0l0/hardware/stm32_pinmap.h → arch/arm/src/stm32f0l0g0/hardware/stm32_pinmap.h
+7 -7
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_pinmap.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_pinmap.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_PINMAP_H
/************************************************************************************
* Included Files
@@ -43,11 +43,11 @@
#include <nuttx/config.h>
#include "chip.h"
#if defined(CONFIG_STM32F0L0_STM32F05X)
#if defined(CONFIG_STM32F0L0G0_STM32F05X)
# include "hardware/stm32f05x_pinmap.h"
#elif defined(CONFIG_STM32F0L0_STM32F07X)
#elif defined(CONFIG_STM32F0L0G0_STM32F07X)
# include "hardware/stm32f07x_pinmap.h"
#elif defined(CONFIG_STM32F0L0_STM32F09X)
#elif defined(CONFIG_STM32F0L0G0_STM32F09X)
# include "hardware/stm32f09x_pinmap.h"
#elif defined(CONFIG_ARCH_CHIP_STM32L0)
# include "hardware/stm32l0_pinmap.h"
@@ -57,4 +57,4 @@
# error "Unsupported STM32 M0 pin map"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_PINMAP_H */
arch/arm/src/stm32f0l0/hardware/stm32_pwr.h → arch/arm/src/stm32f0l0g0/hardware/stm32_pwr.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_pwr.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_pwr.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_PWR_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_PWR_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_PWR_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_PWR_H
/************************************************************************************
* Included Files
@@ -54,5 +54,5 @@
# error "Unsupported STM32 M0 PWR"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_PWR_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_PWR_H */
arch/arm/src/stm32f0l0/hardware/stm32_rcc.h → arch/arm/src/stm32f0l0g0/hardware/stm32_rcc.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_rcc.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_rcc.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RCC_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RCC_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RCC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RCC_H
/************************************************************************************
* Included Files
@@ -54,4 +54,4 @@
# error "Unsupported STM32 M0 RCC"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RCC_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RCC_H */
arch/arm/src/stm32f0l0/hardware/stm32_rng.h → arch/arm/src/stm32f0l0g0/hardware/stm32_rng.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_rng.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_rng.h
*
* Copyright (C) 2012 Max Holtzberg. All rights reserved.
* Author: Max Holtzberg <mh@uvc.de>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RNG_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RNG_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RNG_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RNG_H
/************************************************************************************
* Included Files
@@ -75,4 +75,4 @@
#define RNG_SR_CEIS (1 << 5) /* Bit 5: Clock error interrupt status */
#define RNG_SR_SEIS (1 << 6) /* Bit 6: Seed error interrupt status */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RNG_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RNG_H */
arch/arm/src/stm32f0l0/hardware/stm32_rtcc.h → arch/arm/src/stm32f0l0g0/hardware/stm32_rtcc.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_rtcc.h.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_rtcc.h.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RTCC_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RTCC_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RTCC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RTCC_H
/************************************************************************************
* Pre-processor Definitions
@@ -321,4 +321,4 @@
#define RTC_ALRMSSR_MASKSS_SHIFT (24) /* Bits 24-27: Mask the most-significant bits starting at this bit */
#define RTC_ALRMSSR_MASKSS_MASK (0xf << RTC_ALRMSSR_MASKSS_SHIFT)
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_RTCC_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RTCC_H */
arch/arm/src/stm32f0l0/hardware/stm32_spi.h → arch/arm/src/stm32f0l0g0/hardware/stm32_spi.h
+6 -6
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_spi.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_spi.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SPI_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SPI_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_SPI_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_SPI_H
/************************************************************************************
* Included Files
@@ -45,9 +45,9 @@
/* Select STM32 SPI IP core */
#if defined(CONFIG_STM32F0L0_STM32F0)
#if defined(CONFIG_STM32F0L0G0_STM32F0)
# define HAVE_IP_SPI_V2
#elif defined(CONFIG_STM32F0L0_STM32L0)
#elif defined(CONFIG_STM32F0L0G0_STM32L0)
# define HAVE_IP_SPI_V1
#else
# error Unsupported family
@@ -269,4 +269,4 @@
#define SPI_I2SPR_ODD (1 << 8) /* Bit 8: Odd factor for the prescaler */
#define SPI_I2SPR_MCKOE (1 << 9) /* Bit 9: Master clock output enable */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SPI_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_SPI_H */
arch/arm/src/stm32f0l0/hardware/stm32_syscfg.h → arch/arm/src/stm32f0l0g0/hardware/stm32_syscfg.h
+4 -4
View File
@@ -1,5 +1,5 @@
/****************************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_syscfg.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_syscfg.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
****************************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SYSCFG_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SYSCFG_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_SYSCFG_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_SYSCFG_H
/****************************************************************************************************
* Included Files
@@ -54,4 +54,4 @@
# error "Unsupported STM32 M0 SYSCFG"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_SYSCFG_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_SYSCFG_H */
arch/arm/src/stm32f0l0/hardware/stm32_tim.h → arch/arm/src/stm32f0l0g0/hardware/stm32_tim.h
+4 -4
View File
@@ -1,5 +1,5 @@
/****************************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_tim.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_tim.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
****************************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_TIM_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_TIM_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_TIM_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_TIM_H
/****************************************************************************************************
* Pre-processor Definitions
@@ -49,4 +49,4 @@
/* Register Bitfield Definitions ********************************************************************/
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_TIM_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_TIM_H */
arch/arm/src/stm32f0l0/hardware/stm32_uart.h → arch/arm/src/stm32f0l0g0/hardware/stm32_uart.h
+6 -6
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_uart.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_uart.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_UART_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_UART_H
/************************************************************************************
* Included Files
@@ -44,12 +44,12 @@
#include <nuttx/config.h>
#include "chip.h"
#if defined(CONFIG_STM32F0L0_HAVE_IP_USART_V1)
#if defined(CONFIG_STM32F0L0G0_HAVE_IP_USART_V1)
# include "hardware/stm32_uart_v1.h"
#elif defined(CONFIG_STM32F0L0_HAVE_IP_USART_V2)
#elif defined(CONFIG_STM32F0L0G0_HAVE_IP_USART_V2)
# include "hardware/stm32_uart_v2.h"
#else
# error "Unsupported STM32 M0 USART"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_UART_H */
arch/arm/src/stm32f0l0/hardware/stm32_uart_v1.h → arch/arm/src/stm32f0l0g0/hardware/stm32_uart_v1.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_uart_v1.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_uart_v1.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_UART_V1_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_UART_V1_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_UART_V1_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_UART_V1_H
/************************************************************************************
* Included Files
@@ -313,4 +313,4 @@
#define USART_TDR_SHIFT (0) /* Bits 8:0: Data value */
#define USART_TDR_MASK (0xff << USART_TDR_SHIFT)
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_V1_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_UART_V1_H */
arch/arm/src/stm32f0l0/hardware/stm32_uart_v2.h → arch/arm/src/stm32f0l0g0/hardware/stm32_uart_v2.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_uart_v2.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_uart_v2.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_UART_V2_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_UART_V2_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_UART_V2_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_UART_V2_H
/************************************************************************************
* Included Files
@@ -360,4 +360,4 @@
# define USART_PRESC_DIV128 (10 << USART_PRESC_SHIFT) /* Input clock divided by 128 */
# define USART_PRESC_DIV256 (11 << USART_PRESC_SHIFT) /* Input clock divided by 256 */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_UART_V2_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_UART_V2_H */
arch/arm/src/stm32f0l0/hardware/stm32_usbdev.h → arch/arm/src/stm32f0l0g0/hardware/stm32_usbdev.h
+6 -6
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_usbdev.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_usbdev.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_USBDEV_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_USBDEV_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_USBDEV_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_USBDEV_H
/************************************************************************************
* Included Files
@@ -43,7 +43,7 @@
#include <nuttx/config.h>
#include <chip.h>
#ifdef CONFIG_STM32F0L0_HAVE_USBDEV
#ifdef CONFIG_STM32F0L0G0_HAVE_USBDEV
/************************************************************************************
* Pre-processor Definitions
@@ -260,5 +260,5 @@
#define USB_COUNT_RX_SHIFT (0) /* Bits 9-0: Reception Byte Count */
#define USB_COUNT_RX_MASK (0x03ff << USB_COUNT_RX_SHIFT)
#endif /* CONFIG_STM32F0L0_HAVE_USBDEV */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_USBDEV_H */
#endif /* CONFIG_STM32F0L0G0_HAVE_USBDEV */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_USBDEV_H */
arch/arm/src/stm32f0l0/hardware/stm32_wdt.h → arch/arm/src/stm32f0l0g0/hardware/stm32_wdt.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_wdt.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_wdt.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_WDG_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_WDG_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_WDG_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_WDG_H
/************************************************************************************
* Included Files
@@ -139,4 +139,4 @@
#define WWDG_SR_EWIF (1 << 0) /* Bit 0: Early Wakeup Interrupt Flag */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32_WDG_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_WDG_H */
arch/arm/src/stm32f0l0/hardware/stm32f05x_pinmap.h → arch/arm/src/stm32f0l0g0/hardware/stm32f05x_pinmap.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32f05x_pinmap.h
* arch/arm/src/stm32f0l0g0/hardware/stm32f05x_pinmap.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F05X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F05X_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05X_PINMAP_H
/************************************************************************************
* Included Files
@@ -133,4 +133,4 @@
#define GPIO_I2C2_SCL (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_HIGH | GPIO_PORTB | GPIO_PIN10)
#define GPIO_I2C2_SDA (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_SPEED_HIGH | GPIO_PORTB | GPIO_PIN11)
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F05X_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05X_PINMAP_H */
arch/arm/src/stm32f0l0/hardware/stm32f05xf07xf09x_memorymap.h → arch/arm/src/stm32f0l0g0/hardware/stm32f05xf07xf09x_memorymap.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32f05xf07xf09x_memorymap.h
* arch/arm/src/stm32f0l0g0/hardware/stm32f05xf07xf09x_memorymap.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H
/************************************************************************************
* Pre-processor Definitions
@@ -154,4 +154,4 @@
#define STM32_SCS_BASE 0xe000e000
#define STM32_DEBUGMCU_BASE 0xe0042000
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_ST32F05XF07XF09X_MEMORYMAP_H */
arch/arm/src/stm32f0l0/hardware/stm32f07x_pinmap.h → arch/arm/src/stm32f0l0g0/hardware/stm32f07x_pinmap.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32f07x_pinmap.h
* arch/arm/src/stm32f0l0g0/hardware/stm32f07x_pinmap.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F07X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F07X_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F07X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F07X_PINMAP_H
/************************************************************************************
* Included Files
@@ -397,4 +397,4 @@
#define GPIO_USB_NOE (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN13)
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F07X_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F07X_PINMAP_H */
arch/arm/src/stm32f0l0/hardware/stm32f09x_pinmap.h → arch/arm/src/stm32f0l0g0/hardware/stm32f09x_pinmap.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32f09x_pinmap.h
* arch/arm/src/stm32f0l0g0/hardware/stm32f09x_pinmap.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F09X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F09X_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F09X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F09X_PINMAP_H
/************************************************************************************
* Included Files
@@ -427,4 +427,4 @@
#define GPIO_USART8_RX_3 (GPIO_ALT | GPIO_AF0 | GPIO_PORTD | GPIO_PIN13)
#define GPIO_USART8_CK_RST (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN14)
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F09X_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F09X_PINMAP_H */
arch/arm/src/stm32f0l0/hardware/stm32f0_exti.h → arch/arm/src/stm32f0l0g0/hardware/stm32f0_exti.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32_exti.h
* arch/arm/src/stm32f0l0g0/hardware/stm32_exti.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_EXTI_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_EXTI_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_EXTI_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_EXTI_H
/************************************************************************************
* Included Files
@@ -128,4 +128,4 @@
#define EXTI_PR_SHIFT (0) /* Bits 0-X: Pending bit for all lines */
#define EXTI_PR_MASK STM32_EXTI_MASK
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_EXTI_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_EXTI_H */
arch/arm/src/stm32f0l0/hardware/stm32f0_flash.h → arch/arm/src/stm32f0l0g0/hardware/stm32f0_flash.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32f0_flash.h
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_flash.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_FLASH_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_FLASH_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_FLASH_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_FLASH_H
/************************************************************************************
* Included Files
@@ -105,4 +105,4 @@
#define FLASH_OBR_ /* To be provided */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_FLASH_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_FLASH_H */
arch/arm/src/stm32f0l0/hardware/stm32f0_pwr.h → arch/arm/src/stm32f0l0g0/hardware/stm32f0_pwr.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32f0_pwr.h
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_pwr.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_PWR_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_PWR_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_PWR_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_PWR_H
/************************************************************************************
* Included Files
@@ -97,4 +97,4 @@
#define PWR_CSR_EWUP7 (1 << 14) /* Bit 14: Enable WKUP7 pin */
#define PWR_CSR_EWUP8 (1 << 15) /* Bit 15: Enable WKUP8 pin */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_PWR_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_PWR_H */
arch/arm/src/stm32f0l0/hardware/stm32f0_rcc.h → arch/arm/src/stm32f0l0g0/hardware/stm32f0_rcc.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32f0_rcc.h
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_rcc.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_RCC_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_RCC_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_RCC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_RCC_H
/************************************************************************************
* Pre-processor Definitions
@@ -393,4 +393,4 @@
#define RCC_CR2_HSI48CAL_SHIFT (24) /* Bits 24-31: HSI48 factory clock calibration */
#define RCC_CR2_HSI48CAL_MASK (0xff << RCC_CR2_HSI48CAL_SHIFT)
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_RCC_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_RCC_H */
arch/arm/src/stm32f0l0/hardware/stm32f0_syscfg.h → arch/arm/src/stm32f0l0g0/hardware/stm32f0_syscfg.h
+4 -4
View File
@@ -1,5 +1,5 @@
/****************************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32f0_syscfg.h
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_syscfg.h
*
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
****************************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_SYSCFG_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_SYSCFG_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_SYSCFG_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_SYSCFG_H
/****************************************************************************************************
* Included Files
@@ -388,4 +388,4 @@
#define SYSCFG_ITLINE30_CEC (1 << 0) /* Bit 0: CEC interrupt request pending, combined with EXTI line 27 */
#define SYSCFG_ITLINE30_CAN (1 << 1) /* Bit 1: CAN interrupt request pending */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32F0_SYSCFG_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_SYSCFG_H */
arch/arm/src/stm32f0l0/hardware/stm32g0_dmamux.h → arch/arm/src/stm32f0l0g0/hardware/stm32g0_dmamux.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32g0_dmamux.h
* arch/arm/src/stm32f0l0g0/hardware/stm32g0_dmamux.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Mateusz Szafoni <raiden00@railab.me>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_DMAMUX_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_DMAMUX_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_DMAMUX_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_DMAMUX_H
/************************************************************************************
* Included Files
@@ -71,4 +71,4 @@
/* TODO: ... */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_DMAMUX_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_DMAMUX_H */
arch/arm/src/stm32f0l0/hardware/stm32g0_exti.h → arch/arm/src/stm32f0l0g0/hardware/stm32g0_exti.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32g0_exti.h
* arch/arm/src/stm32f0l0g0/hardware/stm32g0_exti.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Mateusz Szafoni <raiden00@railab.me>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_EXTI_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_EXTI_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_EXTI_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_EXTI_H
/************************************************************************************
* Included Files
@@ -100,4 +100,4 @@
/* TODO */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_EXTI_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_EXTI_H */
arch/arm/src/stm32f0l0/hardware/stm32g0_flash.h → arch/arm/src/stm32f0l0g0/hardware/stm32g0_flash.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32g0_flash.h
* arch/arm/src/stm32f0l0g0/hardware/stm32g0_flash.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_FLASH_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_FLASH_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_FLASH_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_FLASH_H
/************************************************************************************
* Included Files
@@ -104,4 +104,4 @@
/* TODO */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_FLASH_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_FLASH_H */
arch/arm/src/stm32f0l0/hardware/stm32g0_memorymap.h → arch/arm/src/stm32f0l0g0/hardware/stm32g0_memorymap.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32g0_memorymap.h
* arch/arm/src/stm32f0l0g0/hardware/stm32g0_memorymap.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Mateusz Szafoni <raiden00@railab.me>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32G0_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32G0_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_ST32G0_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_ST32G0_MEMORYMAP_H
/************************************************************************************
* Pre-processor Definitions
@@ -137,4 +137,4 @@
#define STM32_SCS_BASE 0xe000e000
#define STM32_DEBUGMCU_BASE 0xe0042000
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_ST32G0_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_ST32G0_MEMORYMAP_H */
arch/arm/src/stm32f0l0/hardware/stm32g0_pinmap.h → arch/arm/src/stm32f0l0g0/hardware/stm32g0_pinmap.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32f0l0/hardware/stm32g0_pinmap.h
* arch/arm/src/stm32f0l0g0/hardware/stm32g0_pinmap.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Mateusz Szafoni <raiden00@railab.me>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_PINMAP_H
/************************************************************************************
* Included Files
@@ -119,4 +119,4 @@
/* TODO: CEC */
#endif /* __ARCH_ARM_SRC_STM32F0L0_HARDWARE_STM32G0_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32G0_PINMAP_H */

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