prep for 0.4.2 release

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1542 42af7a65-404d-4744-a932-0658087f49c3
Fix errors in handling interrupt bits on context restore
2025-12-16 01:34:58 +08:00 · 2009-02-28 22:12:29 +00:00 · 2009-02-28 21:58:27 +00:00 · 2009-02-28 21:52:35 +00:00 · 2009-02-28 21:51:53 +00:00 · 2009-02-28 21:51:23 +00:00
222 changed files with 16208 additions and 1365 deletions
--- a/43
+++ b/43
@@ -599,4 +599,45 @@
 	* Integrated the new font support with a font test in examples/nx
 	* Add documentation for NX graphics subsystem

-0.4.1 2008-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
+0.4.1 2009-02-06 Gregory Nutt <spudmonkey@racsa.co.cr>
+	* Added board support fot the ZiLog ez80Acclaim! ez80f910200zco Development Kit.
+	* Fixed several compilation errors in fixed precision math library when built
+	  against toolchains that do not support 64-bit type 'long long'.
+	* Fix errors in some function prototypes in dirent.h
+	* Add eZ80F91 EMAC driver
+	* Fix recvfrom() compilation error -- only noted under ZDS
+	* Updated all ARM Make.def files to work with gcc 2.4.2 (However, there are
+	  still some build issues associated with that toolchain in use of arm-elf-objcopy
+	  -- see the TODO.txt list for details)
+	* Fix problems with Z16F and eZ80 compilation introduced with recent changes.
+
+0.4.2 2009-02-28 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* M16C: Add support for the Renesas M16C MCU and the SKP16C26 StarterKit. However, 
+	  the target cannot be built because the GNU m16c-elf-ld link fails with 
+	  the following message:
+
+	    m32c-elf-ld: BFD (GNU Binutils) 2.19 assertion fail /home/Owner/projects/nuttx/buildroot/toolchain_build_m32c/binutils-2.19/bfd/elf32-m32c.c:482
+
+	  Where the reference line is:
+
+	    /* If the symbol is out of range for a 16-bit address,
+	       we must have allocated a plt entry.  */
+	     BFD_ASSERT (*plt_offset != (bfd_vma) -1);
+
+	  No workaround is known at this time.  This is a show stopper for M16C.
+
+	* ez80Acclaim!: Fix interrupt vectors positioning; they were being positioned
+	  wrong by 64 bytes (Kevin Franzen).
+	* ez80Acclaim!: Corrected some stack handling errors during interrupt handling
+	   context save and restore (Kevin Franzen).
+	* ez80Acclaim!: Corrected vector intialization logic (Kevin Franzen).
+	* ez80Acclaim!: Corrected overflow problem in the calculation of UART baud rate
+	    divisor, the system timer divisor, and the EMAC poll timer.
+	* ez80Acclaim!: Fixed GPIO pin configuration get serial output
+	* ez80Acclaim!: Correct stack overflow in ostest example configuration
+	* ez80Acclaim!: Fixed restoration of interrupts state on interrupt level context swith.
+
+0.4.3 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
+
+
--- a/Documentation/NXGraphicsSubsystem.html
+++ b/Documentation/NXGraphicsSubsystem.html
@@ -342,7 +342,7 @@
 </p>
 <p>
  However, the same end result can be obtained by using the
-  <a href="nxrequestbkgd"><code>nx_requestbkgd()</code></a> API.
+  <a href="#nxrequestbkgd"><code>nx_requestbkgd()</code></a> API.
  It still may be possible to reduce the footprint in this usage case by developing
  and even thinner NXNULL front-end.
  That is a possible future development.
--- a/Documentation/NuttX.html
+++ b/Documentation/NuttX.html
@@ -8,7 +8,7 @@
  <tr align="center" bgcolor="#e4e4e4">
    <td>
      <h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
-      <p>Last Updated: December 6, 2008</p>
+      <p>Last Updated: February 28, 2009</p>
    </td>
  </tr>
 </table>
@@ -671,29 +671,36 @@
  </tr>
 </table>

-<p><b>nuttx-0.4.0</b>.
-  The 32<sup>nd</sup> release of NuttX (nuttx-0.4.10) is available for download
+<p><b>nuttx-0.4.2</b>.
+  The 34<sup>th</sup> release of NuttX (nuttx-0.4.2) is available for download
  from the <a href="http://sourceforge.net/project/showfiles.php?group_id=189573">SourceForge</a>
  website.
  The change log associated with the release is available <a href="#currentrelease">here</a>.
  Unreleased changes after this release are available in CVS.
  These unreleased changes are listed <a href="#pendingchanges">here</a>.
 </p>
-  This release adds graphics support and a tiny windowing subsystem.
-  That new graphics subystem is documented in a <a href="NXGraphicsSubsystem.html">user manual</a>.
-  No other substantial changes were made.
+<p>
+  This release adds no new OS features but does include support for two new architectures:
+  <ul>
+  <li>
+    <b>ez80Acclaim!</b>
+      Basic support has been integrated and verified for the ez80f910200zcog-d board (eZ80F91-based).
+      That basic support includes timer interrupts and serial console.
+      Ongoing work includes an EMAC driver that should be integrated for the next release nuttx-0.4.2.
+    </p>
+    <p>
+       eZ80Acclaim! support has been in the code base for some time, but has only just
+       been integrated due to toolchain issues.
+    </p>
+  <li>
+    <p>Renesas M16C/20</b>.
+      Support for the Renesas SKP16C20 board has been included in the NuttX source tree.
+      However, as was with the eZ80Acclaim!, testing and integration of that port is stalled due to toolchain issues.
+    </p>
+  </li>
 </p>
 <p>
-  The version number was bumped up to 0.4.0 in part to reflect the new graphics subsystem,
-  but also to recognize the NuttX is approaching complete functionality.  In the 0.3.x
-  versions, network support was added, Pascal P-code runtime support was added, FAT and
-  ROMFS filesystems were added, MMC/SD and USB device support were added.  There were
-  also numerous extensions to the NuttShell, NuttX APIs, and architecture ports.
-</p>
-<p>
-  These changes were verified only on the NuttX simulation platform with X11 windows
-  simulating a device framebuffer.
-  Please report any errors to me.
+  These changes were verified only on the ZiLOG ez80f910200zcog-d platform. Please report any errors to me.
 </p>

 <table width ="100%">
@@ -863,6 +870,41 @@
    </p>
   </td>
 </tr>
+<tr>
+  <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
+  <td bgcolor="#5eaee1">
+    <b>Renesas M16C/26</b>
+  </td>
+</tr>
+<tr>
+  <td><br></td>
+  <td>
+    <p>
+      <b>Renesas M16C/26 Microncontroller</b>.
+      This port uses the Renesas SKP16C26 Starter kit and the GNU M32C toolchain. 
+      The development environment is either Linux or Cygwin under WinXP.
+    </p>
+    <p>
+      <b>STATUS:</b>
+      Initial source files released in nuttx-0.4.2.
+      At this point, the port has not been integrated;	the target cannot be built
+      because the GNU <code>m16c-elf-ld</code> link fails with  the following message:
+    </p>
+    <ul>
+    <code>m32c-elf-ld: BFD (GNU Binutils) 2.19 assertion fail /home/Owner/projects/nuttx/buildroot/toolchain_build_m32c/binutils-2.19/bfd/elf32-m32c.c:482</code>
+    </ul>
+    <p>Where the reference line is:</p>
+    <ul><pre>
+/* If the symbol is out of range for a 16-bit address,
+   we must have allocated a plt entry.  */
+BFD_ASSERT (*plt_offset != (bfd_vma) -1);
+</pre></ul>
+    <p>
+      No workaround is known at this time.  This is a show stopper for M16C for
+      the time being.
+    </p>
+   </td>
+</tr>
 <tr>
  <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
  <td bgcolor="#5eaee1">
@@ -895,13 +937,24 @@
  <td>
    <p>
      <b>Zilog eZ80Acclaim! Microncontroller</b>.
-      This port uses the ZiLOG ez80f0910200kitg development kit, eZ80F091 part
-      and the Zilog ZDS-II Windows command line tools.
+      There are two eZ80Acclaim! ports:
+    </p>
+    <ul>
+      <li>One uses the ZiLOG ez80f0910200kitg development kit, and
+      <li>The other uses the ZiLOG ez80f0910200zcog-d development kit.
+    </ul>
+    <p>
+      Both boards are based on the eZ80F091 part and both use the Zilog ZDS-II
+      Windows command line tools.
      The development environment is Cygwin under WinXP.
    </p>
    <p>
      <b>STATUS:</b>
-      This is a work in progress.  Verified ez80 support will be announced in a future NuttX release.
+      Testing with the ZiLOG ez80f0910200kitg has been performed only on the on the ZDS-II simulator.
+      However, support for the  ZiLOG ez80f0910200zcog-d is complete.
+      The first integrated version was released in NuttX version 0.4.2.
+      As of this writing, that port provides basic board support with a serial console.
+      An eZ80F09 EMAC driver has been developed, but not fully tested as of that release.
    </p>
   </td>
 </tr>
@@ -1105,7 +1158,7 @@ m68k, m68hc11, m68hc12, and SuperH ports.</blockquote>
      </p>
    </ul>
    <p>
-      At present, on the Zilog Z16F port uses a native Windows toolchain
+      At present, only the Zilog Z16F, z8Encore, and ez80Acclaim ports use a native Windows toolchain
      (the Zilog ZDS-II toolchain).
    </p.
  </td>
@@ -1250,16 +1303,31 @@ Other memory:
 </table>

 <pre><ul>
-nuttx-0.4.0 2008-12-06 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
-	* Initial release of a tiny windowing system for NuttX
-	* Add fixed precision sin() and cos() (not well tested at initial check-in)
-	* Add an X11-based simulated framebuffer driver
-	* The simulated target now has an option (CONFIG_SIM_WALLTIME) that will let the simulation
-	  run in more-or-less realtime.
-	* Added more more extensive window support:  frames, toolbars, etc.
-	* Added support for bitmap fonts
-	* Integrated the new font support with a font test in examples/nx
-	* Add documentation for NX graphics subsystem
+nuttx-0.4.2 2009-02-28 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+
+	* M16C: Add support for the Renesas M16C MCU and the SKP16C26 StarterKit. However, 
+	  the target cannot be built because the GNU m16c-elf-ld link fails with 
+	  the following message:
+
+	    m32c-elf-ld: BFD (GNU Binutils) 2.19 assertion fail /home/Owner/projects/nuttx/buildroot/toolchain_build_m32c/binutils-2.19/bfd/elf32-m32c.c:482
+
+	  Where the reference line is:
+
+	    /* If the symbol is out of range for a 16-bit address,
+	       we must have allocated a plt entry.  */
+	     BFD_ASSERT (*plt_offset != (bfd_vma) -1);
+
+	  No workaround is known at this time.  This is a show stopper for M16C.
+
+	* ez80Acclaim!: Fix interrupt vectors positioning; they were being positioned
+	  wrong by 64 bytes (Kevin Franzen).
+	* ez80Acclaim!: Corrected some stack handling errors during interrupt handling
+	   context save and restore (Kevin Franzen).
+	* ez80Acclaim!: Corrected vector intialization logic (Kevin Franzen).
+	* ez80Acclaim!: Corrected overflow problem in the calculation of UART baud rate
+	    divisor, the system timer divisor, and the EMAC poll timer.
+	* ez80Acclaim!: Fixed GPIO pin configuration get serial output
+	* ez80Acclaim!: Correct stack overflow in ostest example configuration

 pascal-0.1.2 2008-02-10 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

@@ -1287,13 +1355,19 @@ buildroot-0.1.2 2007-11-06 &lt;spudmonkey@racsa.co.cr&gt
 </table>

 <pre><ul>
-nuttx-0.4.1 2008-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+nuttx-0.4.3 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

-pascal-0.1.3 2008-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+pascal-0.1.3 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

-buildroot-0.1.3 2008-xx-xx &lt;spudmonkey@racsa.co.cr&gt;
+buildroot-0.1.3 2009-xx-xx &lt;spudmonkey@racsa.co.cr&gt;

 	* Add support for H8/300 toolchain
+	* Add support for GCC 4.2.4 and binutils 2.19
+	* Various fixes for newer Linux environments
+	* New ARM configuration using  GCC 4.2.4 and binutils 2.19
+	  (Note: this doesn't work with NuttX yet... to nuttx TODO.txt list).
+	* Add Renesas R8C/M16C/M32C configuration using GCC 4.2.4 and binutils 2.19
+
 </pre></ul>

 <table width ="100%">
--- a/2
+++ b/2
@@ -251,7 +251,7 @@ subdir_clean:
 	@$(MAKE) -C mm -f Makefile.test TOPDIR="$(TOPDIR)" clean

 clean: subdir_clean
-	@rm -f $(BIN) $(BIN).* mm_test *.map *~
+	@rm -f $(BIN) nuttx.* mm_test *.map *~

 subdir_distclean:
 	@for dir in $(CLEANDIRS) ; do \
--- a/39
+++ b/39
@@ -769,3 +769,42 @@ also numerous extensions to the NuttShell, NuttX APIs, and architecture ports.

 This tarball contains a complete CVS snapshot from December 6, 2008.

+nuttx-0.4.1
+^^^^^^^^^^^
+
+This is the 33rd release of NuttX.  This is a minor bugfix release.  The primary reason
+for this release is to correct numerous build errors that have accumulated for the ZiLOG
+ZDS-II based targets.  All ZDS-II targets now build correctly (but have not been re-tested).
+In addition to platform-specific build failures,  release also adds the following features
+which were not tested as of the time of the release:
+
+	* Board support fot the ZiLog ez80Acclaim! ez80f910200zco Development Kit
+	* ZiLOG eZ80F91 EMAC driver
+
+These changes were verified only on the NuttX simulation platform. Please report any errors
+to me.
+
+This tarball contains a complete CVS snapshot from Februrary 6, 2009.
+
+nuttx-0.4.2
+^^^^^^^^^^^
+
+This is the 34th release of NuttX.  This release adds no new OS features but does include
+support for two new architectures:
+
+	* ez80Acclaim!  Basic support has been integrated and verified for the ez80f910200zcog-d
+	  board (eZ80F91-based).  That basic support includes timer interrupts and serial
+	  console.  Ongoing work includes an EMAC driver that should be integrated for
+	  the next release nuttx-0.4.2.
+
+	  eZ80Acclaim! support has been in the code base for some time, but has only just
+	  been integrated due to toolchain issues.
+
+	* Renesas M16C/20.  Support for the Renesas SKP16C20 board has been included in
+	  the NuttX source tree.  However, as the the eZ80Acclaim!, testing and integration
+	  of that port is stalled due to toolchain issues.
+
+These changes were verified only on the ZiLOG eZ80910200zcog-d board. Please report any errors
+to me.
+
+This tarball contains a complete CVS snapshot from Februrary 28, 2009.
--- a/54
+++ b/54
@@ -1,4 +1,4 @@
-NuttX TODO List (Last updated November 20, 2008)
+NuttX TODO List (Last updated February 19, 2009)
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

  (7)  Task/Scheduler (sched/)
@@ -14,7 +14,7 @@ NuttX TODO List (Last updated November 20, 2008)
  (2)  Graphics subystem (graphics/)
  (1)  Pascal add-on (pcode/)
  (2)  Documentation (Documentation/)
-  (5)  Build system
+  (5)  Build system / Toolchains
  (2)  NuttShell (NSH) (examples/nsh)
  (1)  Other Applications & Tests (examples/)
  (1)  Linux/Cywgin simulation (arch/sim)
@@ -24,7 +24,8 @@ NuttX TODO List (Last updated November 20, 2008)
  (6)  ARM/LPC214x (arch/arm/src/lpc214x/)
  (3)  ARM/STR71x (arch/arm/src/str71x/)
  (4)  pjrc-8052 / MCS51 (arch/pjrc-8051/)
-  (1)  SH-1 (arch/sh)
+  (2)  Hitachi/Renesas SH-1 (arch/sh/src/sh1)
+  (4)  Renesas M16C/26 (arch/sh/src/m16c)
  (8)  z80/z8/ez80 (arch/z80/)
  (8)  z16 (arch/z16/)

@@ -367,6 +368,13 @@ o Build system
  Status:      Open
  Priority:    Medium-low

+  Descripton   I am having trouble using the newer gcc 4.2.4 + binutils 2.19
+               toolchain for ARM.  The problem is in arch/arm/src/Makefile:
+               In the call to objcopy to relocate the .data section, arm-elf-objcopy
+               dies with a 'Floating point exception'  No clue to the cause yet.
+  Status:      Open
+  Priority:    Medium-Low -- workaroung, stick with the 3.4.6 toolchain
+
 o NuttShell (NSH) (examples/nsh)
  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

@@ -540,8 +548,8 @@ o pjrc-8052 / MCS51 (arch/pjrc-8051/)
  Priority:    Low -- only because there as so many other issues with 8051


-o SH-1 (arch/sh)
-  ^^^^^^^^^^^^^^
+o Hitachi/Renesas SH-1 (arch/sh/src/sh1)
+  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

  Description:  There are instabilities that make the SH-1 port un-usable.  The
                nature of these is not understood; the behavior is that certain SH-1
@@ -563,6 +571,42 @@ o SH-1 (arch/sh)
  Priority:     Low -- because the SH-1, SH7032, is very old and only of historical
                interest.

+  Description:  arch/sh has been restructured to support M16C.  Need to verify that
+                SH-1 still builds.
+  Status:       Open
+  Priority:     Low
+
+  Description:  The M16C target cannot be built.  The GNU m16c-elf-ld link fails with 
+                the following message:
+
+                m32c-elf-ld: BFD (GNU Binutils) 2.19 assertion fail /home/Owner/projects/nuttx/buildroot/toolchain_build_m32c/binutils-2.19/bfd/elf32-m32c.c:482
+
+                Where the reference line is:
+
+                /* If the symbol is out of range for a 16-bit address,
+                   we must have allocated a plt entry.  */
+                BFD_ASSERT (*plt_offset != (bfd_vma) -1);
+
+                No workaround is known at this time.
+  Status:       Open
+  Priority:     High -- this is a show stopper for M16C.
+
+o Renesas M16C/26 (arch/sh/src/m16c)
+  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+  Description: Coding of the initial port is complete, but is untested.
+  Status:      Open
+  Priority:    Low
+
+  Description: Serial drivers were developed for the M16C, however, the SKP16C26
+               StarterKit has no serial connectors.
+  Status:      Open
+  Priority:    Low
+
+  Description: Should implement SPI, I2C, Virual EEPROM, FLASH, RTC drivers
+  Status:      Open
+  Priority:    Medium
+
 o z80/z8/ez80 (arch/z80)
 ^^^^^^^^^^^^^^^^^^^^^^^

--- a/arch/sh/include/irq.h
+++ b/arch/sh/include/irq.h
@@ -55,30 +55,6 @@
 * Public Types
 ****************************************************************************/

-/* This struct defines the way the registers are stored.  We need to save: */
-
-#ifndef __ASSEMBLY__
-struct xcptcontext
-{
-  /* The following function pointer is non-zero if there are pending signals
-   * to be processed.
-   */
-
-#ifndef CONFIG_DISABLE_SIGNALS
-  void *sigdeliver; /* Actual type is sig_deliver_t */
-
-  /* These are saved copies of LR and SR used during signal processing. */
-
-  uint32 saved_pc;
-  uint32 saved_sr;
-#endif
-
-  /* Register save area */
-
-  uint32 regs[XCPTCONTEXT_REGS];
-};
-#endif
-
 /****************************************************************************
 * Inline functions
 ****************************************************************************/
--- a/arch/sh/include/limits.h
+++ b/arch/sh/include/limits.h
@@ -1,7 +1,7 @@
 /****************************************************************************
 * arch/sh/include/limits.h
 *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -40,36 +40,10 @@
 * Included Files
 ****************************************************************************/

+#include <arch/chip/limits.h>
+
 /****************************************************************************
 * Definitions
 ****************************************************************************/

-#define CHAR_BIT        8
-#define SCHAR_MIN	0x80
-#define SCHAR_MAX	0x7f
-#define UCHAR_MAX	0xff
-
-/* These could be different on machines where char is unsigned */
-
-#define CHAR_MIN	SCHAR_MIN
-#define CHAR_MAX	SCHAR_MAX
-
-#define SHRT_MIN	0x8000
-#define SHRT_MAX	0x7fff
-#define USHRT_MAX	0xffff
-
-#define INT_MIN         0x80000000
-#define INT_MAX         0x7fffffff
-#define UINT_MAX	0xffffffff
-
-/* These change on 32-bit and 64-bit platforms */
-
-#define LONG_MAX	0x80000000
-#define LONG_MIN	0x7fffffff
-#define ULONG_MAX	0xffffffff
-
-#define LLONG_MAX	0x8000000000000000
-#define LLONG_MIN	0x7fffffffffffffff
-#define ULLONG_MAX	0xffffffffffffffff
-
 #endif /* __ARCH_SH_INCLUDE_LIMITS_H */
--- a/arch/sh/include/m16c/README.txt
+++ b/arch/sh/include/m16c/README.txt
@@ -0,0 +1 @@
+This directory contains header files specific to the M16c architectures.
--- a/arch/sh/include/m16c/irq.h
+++ b/arch/sh/include/m16c/irq.h
@@ -0,0 +1,320 @@
+/************************************************************************************
+ * arch/sh/include/m16c/irq.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/irq.h
+ */
+
+#ifndef __ARCH_SH_INCLUDE_M16C_IRQ_H
+#define __ARCH_SH_INCLUDE_M16C_IRQ_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* IRQ numbers **********************************************************************/
+
+/* Fixed vector table */
+
+#define M16C_UNDEFINST_IRQ     0                 /* fffdc: Undefined instruction */
+#define M16C_OVERFLOW_IRQ      1                 /* fffe0: Overflow */
+#define M16C_BRK_IRQ           2                 /* fffe4: BRK instruction */
+#define M16C_ADDRMATCH_IRQ     3                 /* fffe8: Address match */
+#ifdef CONFIG_M16C_DEBUGGER
+#  define M16C_SSTEP_IRQ       4                 /* fffec: Single step */
+#  define M16C_WDOG_IRQ        5                 /* ffff0: Watchdog timer */
+#  define M16C_DBC_IRQ         6                 /* ffff4: DBC */
+#  define M16C_NMI_IRQ         7                 /* ffff8: NMI */
+#  define _LAST_FIXED          7
+#else
+#  define M16C_WDOG_IRQ        4                 /* ffff0: Watchdog timer */
+#  define M16C_NMI_IRQ         5                 /* ffff8: NMI */
+#  define _LAST_FIXED          5
+#endif
+
+/* Variable vector table (fixed at address 0xffd00) */
+
+#ifdef CONFIG_M16C_SWINTS
+#  define M16C_BRK_IRQ        (_LAST_FIXED+1)    /* ffd00: BRK instruction */
+#  define M16C_SWINT0_IRQ     M16C_BRK_IRQ       /*        S/W interrupt  0 */
+#  define M16C_INT3_IRQ       (_LAST_FIXED+2)    /* ffd10: INT3 */
+#  define M16C_SWINT4_IRQ     M16C_INT3_IRQ      /*        S/W interrupt  4 */
+#  define M16C_CTXSV_SWINT    (_LAST_FIXED+3)    /* ffd14: Reserved -- used by NuttX */
+#  define M16C_SWINT5_IRQ     M16C_CTXSV_SWINT   /*        S/W interrupt 5 */
+#  define M16C_SWINT6_IRQ     (_LAST_FIXED+4)    /* ffd18: Reserved / S/W interrupt 6 */
+#  define M16C_SWINT7_IRQ     (_LAST_FIXED+5)    /* ffd1c: Reserved / S/W interrupt 7 */
+#  define M16C_INT5_IRQ       (_LAST_FIXED+6)    /* ffd20: INT5 */
+#  define M16C_SWINT8_IRQ     M16C_INT5_IRQ      /*        S/W interrupt  8 */
+#  define M16C_INT4_IRQ       (_LAST_FIXED+7)    /* ffd24: INT4 */
+#  define M16C_SWINT9_IRQ     M16C_INT4_IRQ      /*         S/W interrupt  9 */
+#  define M16C_UART2BCD_IRQ   (_LAST_FIXED+8)    /* ffd28: UART2 bus collision detection */
+#  define M16C_SWINT10_IRQ    M16C_UART2BCD_IRQ  /*         S/W interrupt  10 */
+#  define M16C_DMA0_IRQ       (_LAST_FIXED+9)    /* ffd2c: DMA0 */
+#  define M16C_SWINT11_IRQ    M16C_DMA0_IRQ      /*         S/W interrupt  11 */
+#  define M16C_DMA1_IRQ       (_LAST_FIXED+10)   /* ffd30: DMA1 */
+#  define M16C_SWINT12_IRQ    M16C_DMA1_IRQ      /*         S/W interrupt  12 */
+#  define M16C_KEYINP_IRQ     (_LAST_FIXED+11)   /* ffd34: Key input interrupt */
+#  define M16C_SWINT13_IRQ    M16C_KEYINP_IRQ    /*         S/W interrupt 13 */
+#  define M16C_ADC_IRQ        (_LAST_FIXED+12)   /* ffd38: A-D */
+#  define M16C_SWINT14_IRQ    M16C_ADC_IRQ       /*         S/W interrupt  14 */
+#  define M16C_UARTXNAK_IRQ   (_LAST_FIXED+13)   /* ffd3c UART2 transmit/NACK2 */
+#  define M16C_SWINT15_IRQ    M16C_UARTNAK_IRQ   /*         S/W interrupt  15 */
+#  define M16C_UARTRACK_IRQ   (_LAST_FIXED+14)   /* ffd40: UART2 receive/ACK2 */
+#  define M16C_SWINT16_IRQ    M16C_UARTRACK_IRQ  /*         S/W interrupt 16 */
+#  define M16C_UART0XMT_IRQ   (_LAST_FIXED+15)   /* ffd44: UART0 transmit */
+#  define M16C_SWINT17_IRQ    M16C_UART0XMT_IRQ  /*         S/W interrupt 17 */
+#  define M16C_UART0RCV_IRQ   (_LAST_FIXED+16)   /* ffd48: UART0 receive */
+#  define M16C_SWINT18_IRQ    M16C_UART0RCV_IRQ  /*        S/W interrupt 18 */
+#  define M16C_UART1XMT_IRQ   (_LAST_FIXED+17)   /* ffd4c: UART1 transmit */
+#  define M16C_SWINT19_IRQ    M16C_UART1XMT_IRQ  /*        S/W interrupt 19 */
+#  define M16C_UART1RCV_IRQ   (_LAST_FIXED+18)   /* ffd50: UART1 receive */
+#  define M16C_SWINT20_IRQ    M16C_UART1RCV_IRQ  /*        S/W interrupt 20 */
+#  define M16C_TMRA0_IRQ      (_LAST_FIXED+19)   /* ffd54: Timer A0 */
+#  define M16C_SWINT21_IRQ    M16C_TMRA0_IRQ     /*        S/W interrupt 21 */
+#  define M16C_TMRA1_IRQ      (_LAST_FIXED+20)   /* ffd58: Timer A1 */
+#  define M16C_SWINT22_IRQ    M16C_TMRA1_IRQ     /*        S/W interrupt 22 */
+#  define M16C_TMRA2_IRQ      (_LAST_FIXED+21)   /* ffd5c: Timer A2 */
+#  define M16C_SWINT23_IRQ    M16C_TMRA2_IRQ     /*        S/W interrupt 23 */
+#  define M16C_TMRA3_IRQ      (_LAST_FIXED+22)   /* ffd60: Timer A3 */
+#  define M16C_SWINT24_IRQ    M16C_TMRA3_IRQ     /*        S/W interrupt 24 */
+#  define M16C_TMRA4_IRQ      (_LAST_FIXED+23)   /* ffd64: Timer A4 */
+#  define M16C_SWINT25_IRQ    M16C_TMRA4_IRQ     /*        S/W interrupt 25 */
+#  define M16C_TMRB0_IRQ      (_LAST_FIXED+24)   /* ffd68: Timer B0 */
+#  define M16C_SWINT26_IRQ    M16C_TMRB0_IRQ     /*        S/W interrupt 26 */
+#  define M16C_TMRB1_IRQ      (_LAST_FIXED+25)   /* ffd6c: Timer B1 */
+#  define M16C_SWINT27_IRQ    M16C_TMRB1_IRQ     /*        S/W interrupt 27 */
+#  define M16C_TMRB2_IRQ      (_LAST_FIXED+26)   /* ffd70: Timer B2 */
+#  define M16C_SWINT28_IRQ    M16C_TMRB2_IRQ     /*        S/W interrupt 28 */
+#  define M16C_INT0_IRQ       (_LAST_FIXED+27)   /* ffd74: INT0 */
+#  define M16C_SWINT29_IRQ    M16C_INT0_IRQ      /*        S/W interrupt 29 */
+#  define M16C_INT1_IRQ       (_LAST_FIXED+28)   /* ffd78: INT1 */
+#  define M16C_SWINT30_IRQ    M16C_INT1_IRQ      /*        S/W interrupt 30 */
+#  define M16C_SWINT31_IRQ    (_LAST_FIXED+29)   /* ffd7c: Reserved / S/W interrupt 31 */
+#  define M16C_CTXRSTR_SWINT  (_LAST_FIXED+30)   /* ffd80: Used by NuttX */
+#  define M16C_SWINT32IRQ     M16C_CTXRSTR_SWINT /*        S/W interrupt 32 */
+#  define M16C_SWINT33_IRQ    (_LAST_FIXED+31)   /* ffd84: S/W interrupt 33 */
+#  define M16C_SWINT34_IRQ    (_LAST_FIXED+32)   /* ffd88: S/W interrupt 34 */
+#  define M16C_SWINT35_IRQ    (_LAST_FIXED+33)   /* ffd8c: S/W interrupt 35 */
+#  define M16C_SWINT36_IRQ    (_LAST_FIXED+34)   /* ffd90: S/W interrupt 36 */
+#  define M16C_SWINT37_IRQ    (_LAST_FIXED+35)   /* ffd94: S/W interrupt 37 */
+#  define M16C_SWINT38_IRQ    (_LAST_FIXED+36)   /* ffd98: S/W interrupt 38 */
+#  define M16C_SWINT39_IRQ    (_LAST_FIXED+37)   /* ffd9c: S/W interrupt 39 */
+#  define M16C_SWINT40_IRQ    (_LAST_FIXED+38)   /* ffda0: S/W interrupt 40 */
+#  define M16C_SWINT41_IRQ    (_LAST_FIXED+39)   /* ffda4: S/W interrupt 41 */
+#  define M16C_SWINT42_IRQ    (_LAST_FIXED+40)   /* ffda8: S/W interrupt 42 */
+#  define M16C_SWINT43_IRQ    (_LAST_FIXED+41)   /* ffdac: S/W interrupt 43 */
+#  define M16C_SWINT44_IRQ    (_LAST_FIXED+42)   /* ffdb0: S/W interrupt 44 */
+#  define M16C_SWINT45_IRQ    (_LAST_FIXED+43)   /* ffdb4: S/W interrupt 45 */
+#  define M16C_SWINT46_IRQ    (_LAST_FIXED+44)   /* ffdb8: S/W interrupt 46 */
+#  define M16C_SWINT47_IRQ    (_LAST_FIXED+45)   /* ffdbc: S/W interrupt 47 */
+#  define M16C_SWINT48_IRQ    (_LAST_FIXED+46)   /* ffdc0: S/W interrupt 48 */
+#  define M16C_SWINT49_IRQ    (_LAST_FIXED+47)   /* ffdc4: S/W interrupt 49 */
+#  define M16C_SWINT50_IRQ    (_LAST_FIXED+48)   /* ffdc8: S/W interrupt 50 */
+#  define M16C_SWINT51_IRQ    (_LAST_FIXED+49)   /* ffdcc: S/W interrupt 51 */
+#  define M16C_SWINT52_IRQ    (_LAST_FIXED+50)   /* ffdd0: S/W interrupt 52 */
+#  define M16C_SWINT53_IRQ    (_LAST_FIXED+51)   /* ffdd4: S/W interrupt 53 */
+#  define M16C_SWINT54_IRQ    (_LAST_FIXED+52)   /* ffdd8: S/W interrupt 54 */
+#  define M16C_SWINT55_IRQ    (_LAST_FIXED+53)   /* ffddc: S/W interrupt 55 */
+#  define M16C_SWINT56_IRQ    (_LAST_FIXED+54)   /* ffde0: S/W interrupt 56 */
+#  define M16C_SWINT57_IRQ    (_LAST_FIXED+55)   /* ffde4: S/W interrupt 57 */
+#  define M16C_SWINT58_IRQ    (_LAST_FIXED+56)   /* ffde8: S/W interrupt 58 */
+#  define M16C_SWINT59_IRQ    (_LAST_FIXED+57)   /* ffdec: S/W interrupt 59 */
+#  define M16C_SWINT60_IRQ    (_LAST_FIXED+58)   /* ffdf0: S/W interrupt 60 */
+#  define M16C_SWINT61_IRQ    (_LAST_FIXED+59)   /* ffdf4: S/W interrupt 61 */
+#  define M16C_SWINT62_IRQ    (_LAST_FIXED+60)   /* ffdf8: S/W interrupt 62 */
+#  define M16C_SWINT63_IRQ    (_LAST_FIXED+61)   /* ffdfc: S/W interrupt 63 */
+
+#  define NR_IRQS             (_LAST_FIXED+62)   /* Total number of supported IRQs */
+#else
+#  define M16C_BRK_IRQ        (_LAST_FIXED+1)    /* ffd00: BRK instruction */
+#  define M16C_INT3_IRQ       (_LAST_FIXED+2)    /* ffd10: INT3 */
+#  define M16C_CTXSV_SWINT    (_LAST_FIXED+3)    /* ffd14: Reserved -- SWINT5 used by NuttX */
+#  define M16C_INT5_IRQ       (_LAST_FIXED+5)    /* ffd20: INT5 */
+#  define M16C_INT4_IRQ       (_LAST_FIXED+6)    /* ffd24: INT4 */
+#  define M16C_UART2BCD_IRQ   (_LAST_FIXED+7)    /* ffd28: UART2 bus collision detection */
+#  define M16C_DMA0_IRQ       (_LAST_FIXED+8)    /* ffd2c: DMA0 */
+#  define M16C_DMA1_IRQ       (_LAST_FIXED+9)    /* ffd30: DMA1 */
+#  define M16C_KEYINP_IRQ     (_LAST_FIXED+10)   /* ffd34: Key input interrupt */
+#  define M16C_ADC_IRQ        (_LAST_FIXED+11)   /* ffd38: A-D */
+#  define M16C_UARTXNAK_IRQ   (_LAST_FIXED+12)   /* ffd3c UART2 transmit/NACK2 */
+#  define M16C_UARTRACK_IRQ   (_LAST_FIXED+13)   /* ffd40: UART2 receive/ACK2 */
+#  define M16C_UART0XMT_IRQ   (_LAST_FIXED+14)   /* ffd44: UART0 transmit */
+#  define M16C_UART0RCV_IRQ   (_LAST_FIXED+15)   /* ffd48: UART0 receive */
+#  define M16C_UART1XMT_IRQ   (_LAST_FIXED+16)   /* ffd4c: UART1 transmit */
+#  define M16C_UART1RCV_IRQ   (_LAST_FIXED+17)   /* ffd50: UART1 receive */
+#  define M16C_TMRA0_IRQ      (_LAST_FIXED+18)   /* ffd54: Timer A0 */
+#  define M16C_TMRA1_IRQ      (_LAST_FIXED+19)   /* ffd58: Timer A1 */
+#  define M16C_TMRA2_IRQ      (_LAST_FIXED+20)   /* ffd5c: Timer A2 */
+#  define M16C_TMRA3_IRQ      (_LAST_FIXED+21)   /* ffd60: Timer A3 */
+#  define M16C_TMRA4_IRQ      (_LAST_FIXED+22)   /* ffd64: Timer A4 */
+#  define M16C_TMRB0_IRQ      (_LAST_FIXED+23)   /* ffd68: Timer B0 */
+#  define M16C_TMRB1_IRQ      (_LAST_FIXED+24)   /* ffd6c: Timer B1 */
+#  define M16C_TMRB2_IRQ      (_LAST_FIXED+25)   /* ffd70: Timer B2 */
+#  define M16C_INT0_IRQ       (_LAST_FIXED+26)   /* ffd74: INT0 */
+#  define M16C_INT1_IRQ       (_LAST_FIXED+27)   /* ffd78: INT1 */
+#  define M16C_CTXRSTR_SWINT  (_LAST_FIXED+4)    /* ffd80: S/W interrupt 32, used by NuttX */
+
+#  define NR_IRQS             (_LAST_FIXED+28)   /* Total number of supported IRQs */
+#endif
+
+/* Timer A0 is the system timer used by NuttX */
+
+#define M16C_SYSTIMER_IRQ     M16C_TMRA0_IRQ
+
+/* IRQ Stack Frame Format.  The M16C has a push down stack.  The CPU performs
+ * the following actions when an interrupt is taken:
+ *
+ *  - Save FLG register
+ *  - Clear I, D, and U flags in FLG register
+ *  - Builds stack frame like:
+ * 
+ *    sp   -> PC bits 0-7
+ *    sp+1 -> PC bits 8-15
+ *    sp+2 -> FLG bits 0-7
+ *    sp+3 -> FLG (Bits 12-14) + PC (bits 16-19)
+ *
+ *  - Sets IPL
+ *  - Vectors to interrupt handler
+ */
+
+#define REG_FLGPCHI            0    /* 8-bit FLG (bits 12-14) + PC (bits 16-19) as would be
+                                     * presented by an interrupt */
+#define REG_FLG                1    /* 8-bit FLG register (bits 0-7) */
+#define REG_PC                 2    /* 16-bit PC [0]:bits8-15 [1]:bits 0-7 */
+#define REG_FB                 4    /* 16-bit FB register */
+#define REG_SB                 6    /* 16-bit SB register */
+#define REG_A1                 8    /* 16-bit A1 register */
+#define REG_A0                10    /* 16-bit A0 register */
+#define REG_R3                12    /* 16-bit R3 register */
+#define REG_R2                14    /* 16-bit R2 register */
+#define REG_R1                16    /* 16-bit R1 register */
+#define REG_R0                18    /* 16-bit R0 register */
+#define REG_SP                20    /* 16-bit user stack pointer */
+
+#define XCPTCONTEXT_SIZE      22
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+/* This struct defines the way the registers are stored.  We need to save: */
+
+#ifndef __ASSEMBLY__
+struct xcptcontext
+{
+  /* The following function pointer is non-zero if there are pending signals
+   * to be processed.
+   */
+
+#ifndef CONFIG_DISABLE_SIGNALS
+  void *sigdeliver; /* Actual type is sig_deliver_t */
+
+  /* These are saved copies of LR and SR used during signal processing. */
+
+  ubyte saved_pc[2];
+  ubyte saved_flg;
+#endif
+
+  /* Register save area */
+
+  ubyte regs[XCPTCONTEXT_SIZE];
+};
+#endif
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Save the current interrupt enable state & disable IRQs */
+
+static inline irqstate_t irqsave(void)
+{
+  irqstate_t flags;
+  __asm__ __volatile__
+    (
+     "\tstc	flg, %0\n"
+     "\tfclr	I\n"
+     : "=r" (flags)
+     :
+     : "memory");
+  return flags;
+}
+
+/* Restore saved IRQ & FIQ state */
+
+static inline void irqrestore(irqstate_t flags)
+{
+  __asm__ __volatile__
+    (
+     "ldc	%0, flg"
+     :
+     : "r" (flags)
+     : "memory");
+}
+
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_SH_INCLUDE_M16C_IRQ_H */
+
--- a/arch/sh/include/m16c/limits.h
+++ b/arch/sh/include/m16c/limits.h
@@ -0,0 +1,77 @@
+/****************************************************************************
+ * arch/sh/include/m16c/limits.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_SH_INCLUDE_M16C_LIMITS_H
+#define __ARCH_SH_INCLUDE_M16C_LIMITS_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+#define CHAR_BIT        8
+#define SCHAR_MIN	0x80
+#define SCHAR_MAX	0x7f
+#define UCHAR_MAX	0xff
+
+/* These could be different on machines where char is unsigned */
+
+#define CHAR_MIN	SCHAR_MIN
+#define CHAR_MAX	SCHAR_MAX
+
+#define SHRT_MIN	0x8000
+#define SHRT_MAX	0x7fff
+#define USHRT_MAX	0xffff
+
+/* For M16C, type int is 16-bits, the same size as type 'short int' */
+
+#define INT_MIN         SHRT_MIN
+#define INT_MAX         SHRT_MAX
+#define UINT_MAX	USHRT_MAX
+
+/* For M16C, typle 'long int' is 32-bits */
+
+#define LONG_MAX	0x80000000
+#define LONG_MIN	0x7fffffff
+#define ULONG_MAX	0xffffffff
+
+#define LLONG_MAX	0x8000000000000000
+#define LLONG_MIN	0x7fffffffffffffff
+#define ULLONG_MAX	0xffffffffffffffff
+
+#endif /* __ARCH_SH_INCLUDE_M16C_LIMITS_H */
--- a/arch/sh/include/m16c/types.h
+++ b/arch/sh/include/m16c/types.h
@@ -0,0 +1,83 @@
+/****************************************************************************
+ * arch/sh/include/m16c/types.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly\
+ * through sys/types.h
+ */
+
+#ifndef __ARCH_SH_INCLUDE_SH1_TYPES_H
+#define __ARCH_SH_INCLUDE_SH1_TYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Type Declarations
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* These are the sizes of the standard GNU types.  int is 16-bits and
+ * long is 32-bits */
+
+typedef char sbyte;
+typedef unsigned char ubyte;
+typedef unsigned char uint8;
+typedef unsigned char boolean;
+typedef int sint16;
+typedef unsigned int uint16;
+typedef long sint32;
+typedef unsigned long uint32;
+typedef long long sint64;
+typedef unsigned long long uint64;
+
+/* This is the size of the interrupt state save returned by
+ * irqsave()
+ */
+
+typedef uint16 irqstate_t;
+
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Global Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_SH_INCLUDE_SH1_TYPES_H */
--- a/arch/sh/include/sh1/README.txt
+++ b/arch/sh/include/sh1/README.txt
@@ -1,3 +1 @@
-This directory contains header files common to all SH architectures.
-Sub-directories within this directory contain header files unique to
-specific SH architectures.
+This directory contains header files specific to the SH-1 architecture.
--- a/arch/sh/include/sh1/irq.h
+++ b/arch/sh/include/sh1/irq.h
@@ -454,6 +454,30 @@
 * Public Types
 ************************************************************************************/

+/* This struct defines the way the registers are stored.  We need to save: */
+
+#ifndef __ASSEMBLY__
+struct xcptcontext
+{
+  /* The following function pointer is non-zero if there are pending signals
+   * to be processed.
+   */
+
+#ifndef CONFIG_DISABLE_SIGNALS
+  void *sigdeliver; /* Actual type is sig_deliver_t */
+
+  /* These are saved copies of LR and SR used during signal processing. */
+
+  uint32 saved_pc;
+  uint32 saved_sr;
+#endif
+
+  /* Register save area */
+
+  uint32 regs[XCPTCONTEXT_REGS];
+};
+#endif
+
 /************************************************************************************
 * Public Data
 ************************************************************************************/
--- a/arch/sh/include/sh1/limits.h
+++ b/arch/sh/include/sh1/limits.h
@@ -0,0 +1,77 @@
+/****************************************************************************
+ * arch/sh/include/sh1/limits.h
+ *
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_SH_INCLUDE_SH1_LIMITS_H
+#define __ARCH_SH_INCLUDE_SH1_LIMITS_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+#define CHAR_BIT        8
+#define SCHAR_MIN	0x80
+#define SCHAR_MAX	0x7f
+#define UCHAR_MAX	0xff
+
+/* These could be different on machines where char is unsigned */
+
+#define CHAR_MIN	SCHAR_MIN
+#define CHAR_MAX	SCHAR_MAX
+
+#define SHRT_MIN	0x8000
+#define SHRT_MAX	0x7fff
+#define USHRT_MAX	0xffff
+
+/* On SH-1, type 'int' is 32-bits */
+
+#define INT_MIN         0x80000000
+#define INT_MAX         0x7fffffff
+#define UINT_MAX	0xffffffff
+
+/* On SH-1, type 'long' is the same size as type 'int', 32-bits */
+
+#define LONG_MAX	INT_MIN
+#define LONG_MIN	INT_MAX
+#define ULONG_MAX	UINT_MAX
+
+#define LLONG_MAX	0x8000000000000000
+#define LLONG_MIN	0x7fffffffffffffff
+#define ULLONG_MAX	0xffffffffffffffff
+
+#endif /* __ARCH_SH_INCLUDE_SH1_LIMITS_H */
--- a/arch/sh/include/sh1/types.h
+++ b/arch/sh/include/sh1/types.h
@@ -0,0 +1,82 @@
+/****************************************************************************
+ * arch/sh/include/sh1/types.h
+ *
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather, only indirectly\
+ * through sys/types.h
+ */
+
+#ifndef __ARCH_SH_INCLUDE_SH1_TYPES_H
+#define __ARCH_SH_INCLUDE_SH1_TYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Type Declarations
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* These are the sizes of the standard GNU types */
+
+typedef char sbyte;
+typedef unsigned char ubyte;
+typedef unsigned char uint8;
+typedef unsigned char boolean;
+typedef short sint16;
+typedef unsigned short uint16;
+typedef int sint32;
+typedef unsigned int uint32;
+typedef long long sint64;
+typedef unsigned long long uint64;
+
+/* This is the size of the interrupt state save returned by
+ * irqsave()
+ */
+
+typedef unsigned long irqstate_t;
+
+#endif /* __ASSEMBLY__ */
+
+/****************************************************************************
+ * Global Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_SH_INCLUDE_SH1_TYPES_H */
--- a/arch/sh/include/types.h
+++ b/arch/sh/include/types.h
@@ -1,7 +1,7 @@
 /****************************************************************************
 * arch/sh/include/types.h
 *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -14,7 +14,7 @@
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
@@ -33,8 +33,8 @@
 *
 ****************************************************************************/

-/* This file should never be included directed but, rather,
- * only indirectly through sys/types.h
+/* This file should never be included directed but, rather, only indirectly
+ * through sys/types.h
 */

 #ifndef __ARCH_SH_INCLUDE_TYPES_H
@@ -44,6 +44,8 @@
 * Included Files
 ****************************************************************************/

+#include <arch/chip/types.h>
+
 /****************************************************************************
 * Definitions
 ****************************************************************************/
@@ -52,29 +54,6 @@
 * Type Declarations
 ****************************************************************************/

-#ifndef __ASSEMBLY__
-
-/* These are the sizes of the standard GNU types */
-
-typedef char sbyte;
-typedef unsigned char ubyte;
-typedef unsigned char uint8;
-typedef unsigned char boolean;
-typedef short sint16;
-typedef unsigned short uint16;
-typedef int sint32;
-typedef unsigned int uint32;
-typedef long long sint64;
-typedef unsigned long long uint64;
-
-/* This is the size of the interrupt state save returned by
- * irqsave()
- */
-
-typedef unsigned long irqstate_t;
-
-#endif /* __ASSEMBLY__ */
-
 /****************************************************************************
 * Global Function Prototypes
 ****************************************************************************/
--- a/arch/sh/src/common/up_assert.c
+++ b/arch/sh/src/common/up_assert.c
@@ -72,177 +72,6 @@
 * Private Functions
 ****************************************************************************/

-/****************************************************************************
- * Name: up_getsp
- ****************************************************************************/
-
-/****************************************************************************
- * Name: getsp
- ****************************************************************************/
-
-static inline uint32 up_getsp(void)
-{
-  uint32 sp;
-
-  __asm__ __volatile__
-    (
-      "mov   r15, %0\n\t"
-      : "=&z" (sp)
-      :
-      : "memory"
-    );
-  return sp;
-}
-
-/****************************************************************************
- * Name: up_stackdump
- ****************************************************************************/
-
-#ifdef CONFIG_ARCH_STACKDUMP
-static void up_stackdump(uint32 sp, uint32 stack_base)
-{
-  uint32 stack ;
-
-  for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
-    {
-      uint32 *ptr = (uint32*)stack;
-      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-             stack, ptr[0], ptr[1], ptr[2], ptr[3],
-             ptr[4], ptr[5], ptr[6], ptr[7]);
-    }
-}
-#else
-# define up_stackdump()
-#endif
-
-/****************************************************************************
- * Name: up_registerdump
- ****************************************************************************/
-
-#ifdef CONFIG_ARCH_STACKDUMP
-static inline void up_registerdump(void)
-{
-  uint32 *ptr = current_regs;
-
-  /* Are user registers available from interrupt processing? */
-
-  if (ptr)
-    {
-      /* Yes.. dump the interrupt registers */
-
-      lldbg("PC: %08x SR=%08x\n",
-            ptr[REG_PC], ptr[REG_SR]);
-
-      lldbg("PR: %08x GBR: %08x MACH: %08x MACL: %08x\n",
-            ptr[REG_PR], ptr[REG_GBR], ptr[REG_MACH], ptr[REG_MACL]);
-
-      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0,
-            ptr[REG_R0], ptr[REG_R1], ptr[REG_R2], ptr[REG_R3],
-            ptr[REG_R4], ptr[REG_R5], ptr[REG_R6], ptr[REG_R7]);
-
-      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8,
-            ptr[REG_R8], ptr[REG_R9], ptr[REG_R10], ptr[REG_R11],
-            ptr[REG_R12], ptr[REG_R13], ptr[REG_R14], ptr[REG_R15]);
-    }
-}
-#else
-# define up_registerdump()
-#endif
-
-/****************************************************************************
- * Name: up_dumpstate
- ****************************************************************************/
-
-#ifdef CONFIG_ARCH_STACKDUMP
-static void up_dumpstate(void)
-{
-  _TCB *rtcb        = (_TCB*)g_readytorun.head;
-  uint32 sp         = up_getsp();
-  uint32 ustackbase;
-  uint32 ustacksize;
-#if CONFIG_ARCH_INTERRUPTSTACK > 3
-  uint32 istackbase;
-  uint32 istacksize;
-#endif
-
-  /* Get the limits on the user stack memory */
-
-  if (rtcb->pid == 0)
-    {
-      ustackbase = g_heapbase - 4;
-      ustacksize = CONFIG_IDLETHREAD_STACKSIZE;
-    }
-  else
-    {
-      ustackbase = (uint32)rtcb->adj_stack_ptr;
-      ustacksize = (uint32)rtcb->adj_stack_size;
-    }
-
-  /* Get the limits on the interrupt stack memory */
-
-#if CONFIG_ARCH_INTERRUPTSTACK > 3
-  istackbase = (uint32)&g_userstack;
-  istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4;
-
-  /* Show interrupt stack info */
-
-  lldbg("sp:     %08x\n", sp);
-  lldbg("IRQ stack:\n");
-  lldbg("  base: %08x\n", istackbase);
-  lldbg("  size: %08x\n", istacksize);
-
-  /* Does the current stack pointer lie within the interrupt
-   * stack?
-   */
-
-  if (sp <= istackbase && sp > istackbase - istacksize)
-    {
-      /* Yes.. dump the interrupt stack */
-
-      up_stackdump(sp, istackbase);
-
-      /* Extract the user stack pointer which should lie
-       * at the base of the interrupt stack.
-       */
-
-      sp = g_userstack;
-      lldbg("sp:     %08x\n", sp);
-    }
-
-  /* Show user stack info */
-
-  lldbg("User stack:\n");
-  lldbg("  base: %08x\n", ustackbase);
-  lldbg("  size: %08x\n", ustacksize);
-#else
-  lldbg("sp:         %08x\n", sp);
-  lldbg("stack base: %08x\n", ustackbase);
-  lldbg("stack size: %08x\n", ustacksize);
-#endif
-
-  /* Dump the user stack if the stack pointer lies within the allocated user
-   * stack memory.
-   */
-
-  if (sp > ustackbase || sp <= ustackbase - ustacksize)
-    {
-#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
-      lldbg("ERROR: Stack pointer is not within allocated stack\n");
-#endif
-    }
-  else
-    {
-      up_stackdump(sp, ustackbase);
-    }
-
-  /* Then dump the registers (if available) */
-
-  up_registerdump();
-}
-#else
-# define up_dumpstate()
-#endif
-
 /****************************************************************************
 * Name: _up_assert
 ****************************************************************************/
--- a/arch/sh/src/common/up_initialize.c
+++ b/arch/sh/src/common/up_initialize.c
@@ -136,10 +136,15 @@ void up_initialize(void)
  devnull_register();   /* Standard /dev/null */
 #endif

-  /* Initialize the serial device driver */
+  /* Initialize the console device driver.  NOTE that the naming
+   * implies that the console is a serial driver.  That is usually the case,
+   * however, if no UARTs are enabled, the console could als be provided
+   * through some other device, such as an LCD.  Architecture-specific logic
+   * will have to detect that case.
+   */

 #ifdef CONFIG_USE_SERIALDRIVER
-  up_serialinit();
+  up_consoleinit();
 #elif defined(CONFIG_DEV_LOWCONSOLE)
  lowconsole_init();
 #endif
--- a/arch/sh/src/common/up_internal.h
+++ b/arch/sh/src/common/up_internal.h
@@ -1,7 +1,7 @@
 /****************************************************************************
 * arch/sh/src/common/up_internal.h
 *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,12 @@
 #undef  CONFIG_SUPPRESS_SCI_CONFIG    /* DEFINED: Do not reconfig SCI */
 #undef  CONFIG_DUMP_ON_EXIT           /* DEFINED: Dump task state on exit */

-/* Determine which (if any) console driver to use */
+/* Determine which (if any) console driver to use.  NOTE that the naming
+ * implies that the console is a serial driver.  That is usually the case,
+ * however, if no UARTs are enabled, the console could als be provided
+ * through some other device, such as an LCD.  Architecture-specific logic
+ * will have to detect that case.
+ */

 #if CONFIG_NFILE_DESCRIPTORS == 0 || defined(CONFIG_DEV_LOWCONSOLE)
 #  undef CONFIG_USE_SERIALDRIVER
@@ -98,12 +103,6 @@ extern uint32 *current_regs;
 */

 extern uint32 g_heapbase;
-
-/* Address of the saved user stack pointer */
-
-#if CONFIG_ARCH_INTERRUPTSTACK > 3
-extern uint32 g_userstack;
-#endif
 #endif

 /****************************************************************************
@@ -148,11 +147,11 @@ extern void up_vectorfiq(void);
 /* Defined in up_serial.c */

 #if CONFIG_NFILE_DESCRIPTORS > 0
-extern void up_earlyserialinit(void);
-extern void up_serialinit(void);
+extern void up_earlyconsoleinit(void);
+extern void up_consoleinit(void);
 #else
-# define up_earlyserialinit()
-# define up_serialinit()
+# define up_earlyconsoleinit()
+# define up_consoleinit()
 #endif

 /* Defined in drivers/lowconsole.c */
@@ -191,6 +190,16 @@ extern void up_ledoff(int led);
 # define up_ledoff(led)
 #endif

+/* Defined in board/up_lcd.c */
+
+#ifdef CONFIG_ARCH_LCD
+extern void up_lcdinit(void);
+extern void up_lcdputc(char ch);
+#else
+# define up_lcdinit()
+# define up_lcdputc(ch)
+#endif
+
 /* Defined in board/up_network.c */

 #ifdef CONFIG_NET
@@ -209,6 +218,14 @@ extern void up_usbuninitialize(void);
 # define up_usbuninitialize()
 #endif

+/* Defined in chip-specific logic */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+extern void up_dumpstate(void);
+#else
+#  define up_dumpstate()
+#endif
+
 #endif /* __ASSEMBLY__ */

 #endif  /* ___ARCH_SH_SRC_COMMON_UP_INTERNAL_H */
--- a/arch/sh/src/m16c/Make.defs
+++ b/arch/sh/src/m16c/Make.defs
@@ -0,0 +1,53 @@
+##############################################################################
+# arch/sh/src/m16c/Make.defs
+#
+#   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+##############################################################################
+
+HEAD_ASRC	= m16c_head.S
+
+CMN_ASRCS	= 
+CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c \
+		  up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c \
+		  up_interruptcontext.c up_lowputs.c up_mdelay.c up_puts.c \
+		  up_releasepending.c up_releasestack.c up_reprioritizertr.c \
+		  up_udelay.c up_unblocktask.c up_usestack.c
+
+CHIP_ASRCS	= m16c_vectors.S
+CHIP_CSRCS	= m16c_initialstate.c m16c_copystate.c m16c_lowputc.c m16c_irq.c \
+		  m16c_timerisr.c m16c_serial.c m16c_dumpstate.c
+
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+CHIP_CSRCS	+= m16c_schedulesigaction.c m16c_sigdeliver.c
+endif
+
+
--- a/arch/sh/src/m16c/README.txt
+++ b/arch/sh/src/m16c/README.txt
@@ -0,0 +1,2 @@
+This directory contains source files that are unique to the M16C
+chip architecture.
--- a/arch/sh/src/m16c/chip.h
+++ b/arch/sh/src/m16c/chip.h
@@ -0,0 +1,279 @@
+/************************************************************************************
+ * arch/sh/src/m16c/chip.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_SH_SRC_M16C_CHIP_H
+#define __ARCH_SH_SRC_M16C_CHIP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* FLG register bits */
+
+#define M16C_FLG_C         0x0001    /* Bit 0: Carry flag */
+#define M16C_FLG_D         0x0002    /* Bit 1: Debug flag */
+#define M16C_FLG_Z         0x0004    /* Bit 2: Zero flag */
+#define M16C_FLG_S         0x0008    /* Bit 3: Sign flag */
+#define M16C_FLG_B         0x0010    /* Bit 4: Register bank flag */
+#define M16C_FLG_O         0x0020    /* Bit 5: Overflow flag */
+#define M16C_FLG_I         0x0040    /* Bit 6: Interrupt enable flag */
+#define M16C_FLG_U         0x0080    /* Bit 7: Stack pointer select flag */
+                                     /* Bits 8-11: Reserved */
+#define M16C_FLG_IPLMASK   0x7000    /* Bits 12:14: Processor interrupt priority level */
+                                     /* Bit 15: Reserved */
+/* Memory Map */
+
+/* Memory-mapped special function registers begin at address 0x00000 */
+
+#define M16C_SFR_BASE      0x00000   /* 00000-003ff: Special Function Registers */
+
+/* Internal, on-chip SRAM begins at address 0x00400 for all chips, regardless of the
+ * size of the on-chip SRAM.
+ */
+
+#define M16C_IRAM_BASE     0x00400   /* 00400-00xxx: Internal RAM */
+#if defined(CONFIG_ARCH_CHIP_M30262F3) || defined(CONFIG_ARCH_CHIP_M30262F4)
+#  define M16C_IRAM_END    0x007ff   /*              End+1 address of internal RAM */
+                                     /* 00800-0efff: Reserved */
+#elif defined(CONFIG_ARCH_CHIP_M30262F6) || defined(CONFIG_ARCH_CHIP_M30262F8)
+#  define M16C_IRAM_END    0x00bff   /*              End+1 address of internal RAM */
+                                     /* 00c00-0efff: Reserved */
+#endif
+
+/* Two banks of virtual EEPROM (all parts) */
+
+#define M16C_VEEPROM1_BASE 0x0f000   /* 0f000-0f7fff: Virtual EEPPROM block 1 */
+#define M16C_VEEPROM2_BASE 0x0f800   /* 0f800-0fffff: Virtual EEPPROM block 2 */
+
+/* If there were external, "far" RAM, it would be begin at 0x10000.  However, these
+ * specific chips do not support external RAM.
+ */
+
+/* Each part has a different amount on on-chip FLASH.  The ending FLASH address is
+ * 0xfffff for all chips, but the starting address varies depening on the amount
+ * of on-chip FLASH.
+ */
+
+#if defined(CONFIG_ARCH_CHIP_M30262F3)
+                                     /* 10000-f9ffff: Reserved */
+#  define M16C_FLASH_BASE    0xfa000 /* fa000-ffffff: Flash ROM (M30262F8) */
+#elif defined(CONFIG_ARCH_CHIP_M30262F4)
+                                     /* 10000-f7ffff: Reserved */
+#  define M16C_FLASH_BASE    0xf8000 /* f8000-ffffff: Flash ROM (M30262F8) */
+#elif defined(CONFIG_ARCH_CHIP_M30262F6)
+                                     /* 10000-f3ffff: Reserved */
+#  define M16C_FLASH_BASE    0xf4000 /* f4000-ffffff: Flash ROM (M30262F8) */
+#elif defined(CONFIG_ARCH_CHIP_M30262F8)
+                                     /* 10000-efffff: Reserved */
+#  define M16C_FLASH_BASE    0xf0000 /* f0000-ffffff: Flash ROM (M30262F8) */
+#endif
+
+/* Special Function Register Addresses */
+
+#define M16C_PM0           0x00004    /* Processor mode 0 */
+#define M16C_PM1           0x00005    /* Processor mode 1 */
+#define M16C_CM0           0x00006    /* System clock control 0 */
+#define M16C_CM1           0x00007    /* System clock control 1 */
+#define M16C_AIER          0x00009    /* Addrese match interrupt enable */
+#define M16C_PRCR          0x0000a    /* Protect */
+#define M16C_CM2           0x0000c    /* Oscillation stop detection */
+#define M16C_WDTS          0x0000e    /* Watchdog timer start */
+#define M16C_WDC           0x0000f    /* Watchdog timer control */
+#define M16C_RMAD0         0x00010    /* Address match interrupt 0 */
+#define M16C_RMAD1         0x00014    /* Address match interrupt 1 */
+#define M16C_VCR1          0x00019    /* Power supply detection 1 */
+#define M16C_VCR2          0x0001a    /* Power supply detection 2 */
+#define M16C_PM2           0x0001e    /* Processor mode 2 */
+#define M16C_D4INT         0x0001f    /* Power supply 4V detection */
+#define M16C_SAR0          0x00020    /* DMA0 source pointer */
+#define M16C_DAR0          0x00024    /* DMA0 destination pointer */
+#define M16C_TCR0          0x00028    /* DMA0 transfer counter */
+#define M16C_DM0CON        0x0002c    /* DMA0 control */
+#define M16C_SAR1          0x00030    /* DMA1 source pointer */
+#define M16C_DAR1          0x00034    /* DMA1 destination pointer */
+#define M16C_TCR1          0x00038    /* DMA1 transfer counter */
+#define M16C_DM1CON        0x0003c    /* DMA1 control */
+#define M16C_INT3IC        0x00044    /* INT3 interrupt control */
+#define M16C_INT5IC        0x00048    /* INT5 interrupt control */
+#define M16C_INT4IC        0x00049    /* INT4 interrupt control */
+#define M16C_BCNIC         0x0004a    /* Bus collision detection interrupt control */
+#define M16C_DM0IC         0x0004b    /* DMA0 interrupt control */
+#define M16C_DM1IC         0x0004c    /* DMA1 interrupt control */
+#define M16C_KUPIC         0x0004d    /* Key input interrupt control */
+#define M16C_ADIC          0x0004e    /* A-D conversion interrupt control */
+#define M16C_S2TIC         0x0004f    /* UART2 transmit interrupt control */
+#define M16C_S2RIC         0x00050    /* UART2 receive interrupt control */
+#define M16C_S0TIC         0x00051    /* UART0 transmit interrupt control */
+#define M16C_S0RIC         0x00052    /* UART0 receive interrupt control */
+#define M16C_S1TIC         0x00053    /* UART1 transmit interrupt control */
+#define M16C_S1RIC         0x00054    /* UART1 receive interrupt control */
+#define M16C_TA0IC         0x00055    /* Timer A0 interrupt control */
+#define M16C_TA1IC         0x00056    /* Timer A1 interrupt control */
+#define M16C_TA2IC         0x00057    /* Timer A2 interrupt control */
+#define M16C_TA3IC         0x00058    /* Timer A3 interrupt control */
+#define M16C_TA4IC         0x00059    /* Timer A4 interrupt control */
+#define M16C_TB0IC         0x0005a    /* Timer B0 interrupt control */
+#define M16C_TB1IC         0x0005b    /* Timer B1 interrupt control */
+#define M16C_TB2IC         0x0005c    /* Timer B2 interrupt control */
+#define M16C_INT0IC        0x0005d    /* INT0 interrupt control */
+#define M16C_INT1IC        0x0005e    /* INT1 interrupt control */
+#define M16C_FMR4          0x001b3    /* Flash Control 4 */
+#define M16C_FMR1          0x001b5    /* Flash Control 1 */
+#define M16C_FMR0          0x001b7    /* Flash Control 0 */
+#define M16C_PCLKR         0x0025e    /* Peripheral Clock Select */
+#define M16C_TA11          0x00342    /* Timer A1-1 */
+#define M16C_TA21          0x00344    /* Timer A2-1 */
+#define M16C_TA41          0x00346    /* Timer A4-1 */
+#define M16C_INVC0         0x00348    /* Three-phase PWM control 0 */
+#define M16C_INVC1         0x00349    /* Three-phase PWM control 1 */
+#define M16C_IDB0          0x0034a    /* Three-phase output buffer 0 */
+#define M16C_IDB1          0x0034b    /* Three-phase output buffer 1 */
+#define M16C_DTT           0x0034c    /* Dead time timer */
+#define M16C_ICTB2         0x0034d    /* Timer B2 interrupt occurences frequency set counter */
+#define M16C_IFSR          0x0035f    /* Interrupt request cause select */
+#define M16C_U2SMR4        0x00374    /* UART2 special mode register4 */
+#define M16C_U2SMR3        0x00375    /* UART2 special mode register3 */
+#define M16C_U2SMR2        0x00376    /* UART2 special mode register2 */
+#define M16C_U2SMR         0x00377    /* UART2 special mode */
+#define M16C_U2MR          0x00378    /* UART2 transmit/receive mode */
+#define M16C_U2BRG         0x00379    /* UART2 bit rate generator */
+#define M16C_U2TB          0x0037a    /* UART2 transmit buffer */
+#define M16C_U2C0          0x0037c    /* UART2 transmit/receive control 0 */
+#define M16C_U2C1          0x0037d    /* UART2 transmit/receive control 1 */
+#define M16C_U2RB          0x0037e    /* UART2 receive buffer */
+#define M16C_TABSR         0x00380    /* Count start flag */
+#define M16C_CPSRF         0x00381    /* Clock prescaler reset flag */
+#define M16C_ONSF          0x00382    /* One-shot start flag */
+#define M16C_TRGSR         0x00383    /* Trigger select */
+#define M16C_UDF           0x00384    /* Up-down flag */
+#define M16C_TA0           0x00386    /* Timer A0 */
+#define M16C_TA1           0x00388    /* Timer A1 */
+#define M16C_TA2           0x0038a    /* Timer A2 */
+#define M16C_TA3           0x0038c    /* Timer A3 */
+#define M16C_TA4           0x0038e    /* Timer A4 */
+#define M16C_TB0           0x00390    /* Timer B0 */
+#define M16C_TB1           0x00392    /* Timer B1 */
+#define M16C_TB2           0x00394    /* Timer B2 */
+#define M16C_TA0MR         0x00396    /* Timer A0 mode */
+#define M16C_TA1MR         0x00397    /* Timer A1 mode */
+#define M16C_TA2MR         0x00398    /* Timer A2 mode */
+#define M16C_TA3MR         0x00399    /* Timer A3 mode */
+#define M16C_TA4MR         0x0039a    /* Timer A4 mode */
+#define M16C_TB0MR         0x0039b    /* Timer B0 mode */
+#define M16C_TB1MR         0x0039c    /* Timer B1 mode */
+#define M16C_TB2MR         0x0039d    /* Timer B2 mode */
+#define M16C_TB2SC         0x0039e    /* Timer B2 special mode */
+#define M16C_U0MR          0x003a0    /* UART0 transmit/receive mode */
+#define M16C_U0BRG         0x003a1    /* UART0 bit rate generator */
+#define M16C_U0TB          0x003a2    /* UART0 transmit buffer */
+#define M16C_U0C0          0x003a4    /* UART0 transmit/receive control 0 */
+#define M16C_U0C1          0x003a5    /* UART0 transmit/receive control 1 */
+#define M16C_U0RB          0x003a6    /* UART0 receive buffer */
+#define M16C_U1MR          0x003a8    /* UART1 transmit/receive mode */
+#define M16C_U1BRG         0x003a9    /* UART1 bit rate generator */
+#define M16C_U1TB          0x003aa    /* UART1 transmit buffer */
+#define M16C_U1C0          0x003ac    /* UART1 transmit/receive control 0 */
+#define M16C_U1C1          0x003ad    /* UART1 transmit/receive control 1 */
+#define M16C_U1RB          0x003ae    /* UART1 receive buffer */
+#define M16C_UCON          0x003b0    /* UART2 transmit/receive control 2 */
+#define M16C_DM0SL         0x003b8    /* DMA0 cause select */
+#define M16C_DM1SL         0x003ba    /* DMA1 cause select */
+#define M16C_AD0           0x003c0    /* A-D 0 */
+#define M16C_AD1           0x003c2    /* A-D 1 */
+#define M16C_AD2           0x003c4    /* A-D 2 */
+#define M16C_AD3           0x003c6    /* A-D 3 */
+#define M16C_AD4           0x003c8    /* A-D 4 */
+#define M16C_AD5           0x003ca    /* A-D 5 */
+#define M16C_AD6           0x003cc    /* A-D 6 */
+#define M16C_AD7           0x003ce    /* A-D 7 */
+#define M16C_ADCON2        0x003d4    /* A-D control 2 */
+#define M16C_ADCON0        0x003d6    /* A-D control 0 */
+#define M16C_ADCON1        0x003d7    /* A-D control 1 */
+#define M16C_P1            0x003e1    /* Port P1 */
+#define M16C_PD1           0x003e3    /* Port P1 direction */
+#define M16C_P6            0x003ec    /* Port P6 */
+#define M16C_P7            0x003ed    /* Port P7 */
+#define M16C_PD6           0x003ee    /* Port P6 direction */
+#define M16C_PD7           0x003ef    /* Port P7 direction */
+#define M16C_P8            0x003f0    /* Port P8 */
+#define M16C_P9            0x003f1    /* Port P9 */
+#define M16C_PD8           0x003f2    /* Port P8 direction */
+#define M16C_PD9           0x003f3    /* Port P9 direction */
+#define M16C_P10           0x003f4    /* Port P10 */
+#define M16C_PD10          0x003f6    /* Port P10 direction */
+#define M16C_PUR0          0x003fc    /* Pull-up control 0 */
+#define M16C_PUR1          0x003fd    /* Pull-up control 1 */
+#define M16C_PUR2          0x003fe    /* Pull-up control 2 */
+#define M16C_PCR           0x003ff    /* Port control */
+
+/************************************************************************************
+ * Global Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+extern uint16   g_snbss;	/* Start of near .bss */
+extern uint16   g_enbss;	/* End+1 of near .bss */
+extern uint16   g_sndata;	/* Start of near .data */
+extern uint16   g_endata;	/* End+1 of near .data */
+extern uint32   g_enronly;	/* Start of relocated read-only data in FLASH */
+#ifdef CONFIG_M16C_HAVEFARRAM
+  extern uint32 g_sfbss;	/* Start of far .bss */
+  extern uint32 g_efbss;	/* End+1 of far .bss */
+  extern uint32 g_sfdata;	/* Start of far .data */
+  extern uint32 g_efdata;	/* End_1 of far .data */
+  xtern uint32  g_efronly;	/* Start of relocated read-only data in FLASH */
+#endif
+extern uint32   g_svarvect;	/* Start of variable vectors */
+extern uint32   g_heapbase;	/* Start of the heap */
+
+/* Address of the saved user stack pointer */
+
+#ifndef __ASSEMBLY__
+#  if CONFIG_ARCH_INTERRUPTSTACK > 3
+     extern uint16 g_userstack;
+#  endif
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_SH_SRC_M16C_CHIP_H */
--- a/arch/sh/src/m16c/m16c_copystate.c
+++ b/arch/sh/src/m16c/m16c_copystate.c
@@ -0,0 +1,74 @@
+/****************************************************************************
+ * arch/sh/src/m16c/up_copystate.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <string.h>
+
+#include "os_internal.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_copystate
+ ****************************************************************************/
+
+/* A little faster than most memcpy's */
+
+void up_copystate(uint32 *dest, uint32 *src)
+{
+  memcpy(dest, src, XCPTCONTEXT_SIZE);
+}
+
--- a/arch/sh/src/m16c/m16c_dumpstate.c
+++ b/arch/sh/src/m16c/m16c_dumpstate.c
@@ -0,0 +1,251 @@
+/****************************************************************************
+ * arch/sh/src/m16c/m16c_assert.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+#include "os_internal.h"
+#include "chip.h"
+
+#ifdef CONFIG_ARCH_STACKDUMP
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Output debug info if stack dump is selected -- even if  debug is not
+ * selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: m16c_getsp
+ ****************************************************************************/
+
+static inline uint16 m16c_getsp(void)
+{
+  uint16 sp;
+
+  __asm__ __volatile__
+    (
+      "\tstc sp, %0\n\t"
+      : "=r" (sp)
+      :
+      : "memory"
+    );
+  return sp;
+}
+
+/****************************************************************************
+ * Name: m16c_getusersp
+ ****************************************************************************/
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+static inline uint16 m16c_getusersp(void)
+{
+  ubyte *ptr = (ubyte*) current_regs;
+  return (uint16)ptr[REG_SP] << 8 | ptr[REG_SP+1];
+}
+#endif
+
+/****************************************************************************
+ * Name: m16c_stackdump
+ ****************************************************************************/
+
+static void m16c_stackdump(uint16 sp, uint16 stack_base)
+{
+  uint16 stack;
+
+  for (stack = sp & ~7; stack < stack_base; stack += 8)
+    {
+      ubyte *ptr = (ubyte*)stack;
+      lldbg("%04x: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+             stack, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]);
+    }
+}
+
+/****************************************************************************
+ * Name: m16c_registerdump
+ ****************************************************************************/
+
+static inline void m16c_registerdump(void)
+{
+  ubyte *ptr = (ubyte*) current_regs;
+
+  /* Are user registers available from interrupt processing? */
+
+  if (ptr)
+    {
+      /* Yes.. dump the interrupt registers */
+
+      lldbg("PC: %02x%02x%02x FLG: %02x00%02x FB: %02x%02x SB: %02x%02x SP: %02x%02x\n",
+            ptr[REG_FLGPCHI] & 0xff, ptr[REG_PC], ptr[REG_PC+1],
+            ptr[REG_FLGPCHI] >> 8, ptr[REG_FLG],
+            ptr[REG_FB], ptr[REG_FB+1],
+            ptr[REG_SB], ptr[REG_SB+1],
+            ptr[REG_SP], ptr[REG_SP+1]);
+
+      lldbg("R0: %02x%02x R1: %02x%02x R2: %02x%02x A0: %02x%02x A1: %02x%02x\n",
+            ptr[REG_R0], ptr[REG_R0+1], ptr[REG_R1], ptr[REG_R1+1],
+            ptr[REG_R2], ptr[REG_R2+1], ptr[REG_R3], ptr[REG_R3+1],
+            ptr[REG_A0], ptr[REG_A0+1], ptr[REG_A1], ptr[REG_A1+1]);
+
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_dumpstate
+ ****************************************************************************/
+
+void up_dumpstate(void)
+{
+  _TCB *rtcb        = (_TCB*)g_readytorun.head;
+  uint16 sp         = m16c_getsp();
+  uint16 ustackbase;
+  uint16 ustacksize;
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  uint16 istackbase;
+  uint16 istacksize;
+#endif
+
+  /* Get the limits on the user stack memory */
+
+  if (rtcb->pid == 0)
+    {
+      ustackbase = g_heapbase - 1;
+      ustacksize = CONFIG_IDLETHREAD_STACKSIZE;
+    }
+  else
+    {
+      ustackbase = (uint16)rtcb->adj_stack_ptr;
+      ustacksize = (uint16)rtcb->adj_stack_size;
+    }
+
+  /* Get the limits on the interrupt stack memory. The near RAM memory map is as follows:
+   * 
+   * 0x00400 - DATA		Size: Determined by linker
+   *           BSS		Size: Determined by linker
+   *           Interrupt stack	Size: CONFIG_ARCH_INTERRUPTSTACK
+   *           Idle stack		Size: CONFIG_IDLETHREAD_STACKSIZE
+   *           Heap		Size: Everything remaining
+   * 0x00bff - (end+1)
+   */
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  istackbase = g_enbss;
+  istacksize = CONFIG_ARCH_INTERRUPTSTACK;
+
+  /* Show interrupt stack info */
+
+  lldbg("sp:     %04x\n", sp);
+  lldbg("IRQ stack:\n");
+  lldbg("  base: %04x\n", istackbase);
+  lldbg("  size: %04x\n", istacksize);
+
+  /* Does the current stack pointer lie within the interrupt
+   * stack?
+   */
+
+  if (sp <= istackbase && sp > istackbase - istacksize)
+    {
+      /* Yes.. dump the interrupt stack */
+
+      m16c_stackdump(sp, istackbase);
+
+      /* Extract the user stack pointer from the register area */
+
+      sp = m16c_getusersp();
+      lldbg("sp:     %04x\n", sp);
+    }
+
+  /* Show user stack info */
+
+  lldbg("User stack:\n");
+  lldbg("  base: %04x\n", ustackbase);
+  lldbg("  size: %04x\n", ustacksize);
+#else
+  lldbg("sp:         %04x\n", sp);
+  lldbg("stack base: %04x\n", ustackbase);
+  lldbg("stack size: %04x\n", ustacksize);
+#endif
+
+  /* Dump the user stack if the stack pointer lies within the allocated user
+   * stack memory.
+   */
+
+  if (sp > ustackbase || sp <= ustackbase - ustacksize)
+    {
+#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
+      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+#endif
+    }
+  else
+    {
+      m16c_stackdump(sp, ustackbase);
+    }
+
+  /* Then dump the registers (if available) */
+
+  m16c_registerdump();
+}
+
+#endif /* CONFIG_ARCH_STACKDUMP */
--- a/arch/sh/src/m16c/m16c_head.S
+++ b/arch/sh/src/m16c/m16c_head.S
@@ -0,0 +1,278 @@
+/************************************************************************************
+ * arch/sh/src/m16c/m16c_head.S
+ *
+ *	 Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *	 Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *		notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *		notice, this list of conditions and the following disclaimer in
+ *		the documentation and/or other materials provided with the
+ *		distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *		used to endorse or promote products derived from this software
+ *		without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include "chip.h"
+#include "up_internal.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Macro Definitions
+ ************************************************************************************/
+
+/*****************************************************************************
+ * Name: showprogress
+ *
+ * Description:
+ *   Print a character on the UART to show boot status.
+ *
+ *****************************************************************************/
+
+	.macro	showprogress, code
+#ifdef CONFIG_DEBUG
+	.globl	_up_lowputc
+	mov.b	r#\code1l		/* Character to print */
+	jsr.a	_up_lowputc		/* Print it */
+#endif
+	.endm
+
+/************************************************************************************
+ * Data
+ ************************************************************************************/
+
+/* The near RAM memory map is as follows:
+ * 
+ * 0x00400 - DATA		Size: Determined by linker
+ *           BSS		Size: Determined by linker
+ *           Interrupt stack	Size: CONFIG_ARCH_INTERRUPTSTACK
+ *           Idle stack		Size: CONFIG_IDLETHREAD_STACKSIZE
+ *           Heap		Size: Everything remaining
+ * 0x00bff - (end+1)
+ */
+
+	.section .rodata
+	.globl	_g_snbss
+	.type	_g_snbss, object
+_g_snbss:
+	.word	_g_snbss
+	.size	_g_snbss, .-_g_snbss
+
+	.globl	_g_enbss
+	.type	_g_enbss, object
+_g_enbss:
+	.word	_g_enbss
+	.size	_g_enbss, .-_g_enbss
+
+	.globl	_g_sndata
+	.type	_g_sndata, object
+_g_sndata:
+	.word	_g_sndata
+	.size	_g_sndata, .-_g_sndata
+
+	.globl	_g_endata
+	.type	_g_endata, object
+_g_endata:
+	.word	_g_endata
+	.size	_g_endata, .-_g_endata
+
+	.globl	_g_enronly
+	.type	_g_enronly, object
+_g_enronly:
+	.long	_g_enronly
+	.size	_g_enronly, .-_g_efronly
+
+#ifdef CONFIG_M16C_HAVEFARRAM
+	.globl	_g_sfbss
+	.type	_g_sfbss, object
+_g_sfbss:
+	.long	_g_sfbss
+	.size	_g_sfbss, .-_g_sfbss
+
+	.globl	_g_efbss
+	.type	_g_efbss, object
+_g_efbss:
+	.long	_g_efbss
+	.size	_g_efbss, .-_g_efbss
+
+	.globl	_g_sfdata
+	.type	_g_sfdata, object
+_g_sfdata:
+	.long	_g_sfdata
+	.size	_g_sfdata, .-_g_sfdata
+
+	.globl	_g_efdata
+	.type	_g_efdata, object
+_g_efdata:
+	.long	_g_efdata
+	.size	_g_efdata, .-_g_efdata
+
+	.globl	_g_efronly
+	.type	_g_efronly, object
+_g_efronly:
+	.long	_g_efronly
+	.size	_g_efronly, .-_g_efronly
+#endif
+	.globl	_g_svarvect
+	.type	_g_svarvect, object
+_g_svarvect:
+	.long	_svarvect
+	.size	_g_svarvect, .-_g_svarvect
+
+	.globl	_g_heapbase
+	.type	_g_heapbase, object
+_g_heapbase:
+	.long	_enbss+CONFIG_ARCH_INTERRUPTSTACK+CONFIG_IDLETHREAD_STACKSIZE
+	.size	_g_heapbase, .-_g_heapbase
+
+/************************************************************************************
+ * Code
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: _start
+ *
+ * Description:
+ *   After reset, program execution starts here.
+ *
+ ************************************************************************************/
+
+ 	.text
+	.globl	__start
+	.globl	_enbss
+	.type	__start, #function
+__start:
+
+/* Set the interrupt and user stack pointers */
+
+	mov.w	#_enbss, R0
+	ldc	R0, isp			/* Set the interrupt stack pointer to the end of BSS */
+	add.w	#CONFIG_IDLETHREAD_STACKSIZE, R0
+	fset	U			/* Set bit 7 (U) to select the user stack pointer */
+	ldc	R0, sp			/* Set the user stack pointer */
+
+/* Set BCLK speed. At reset, the processor clock  (BLCK) defaults to a divisor of 8.
+ * This sets clock to F1 (divide by 1) on XIN: BCLK = XIN frequency.
+ */
+
+ 	mov.b	#0x01, M16C_PRCR	/* Unprotect CM0 to change clock setting */
+	mov.b	#0x08, M16C_CM0		/* enable CM17 and CM16 to set BCLK to F1
+					 * CM17 & CM16 defaults to 0 after reset and
+					 * so we only need to reset CM06 to 0 */
+	mov.b	#0x00,M16C_PRCR		/* protect CM0 */
+
+/* The two MS bits of the interrupt cause select register must be set to
+ * enable the use of INT4 and INT5
+ */
+
+ 	mov.b	#0xc0, M16C_IFSR	/* Set b7 & b6 if application will use INT4 & INT5 */
+	ldc	#M16C_IRAM_BASE, sb	/* Set sb register (to what?) */
+
+/* Set up INTB to point to location of variable vector table */
+
+	mov.w	_g_svarvect, r0		/* R0 = lower 16-bits */
+	mov.w	_g_svarvect+2, r1	/* R1 = upper 4-bits */
+	ldc	r1, intbh
+	ldc	r0, intbl
+
+/* Configure the uart so that we can get debug output as soon as possible. */
+
+	.globl	_up_lowsetup		/* Early initialization of UART */
+	jsr.a	_up_lowsetup
+	showprogress 'A'
+
+/* Clear near .bss sections */
+
+	mov.b	#0x00, r0l		/* r0l: 0 */
+	mov.w	_g_snbss, a1		/* a1: start of near .bss */
+	mov.w	_g_enbss, r3		/* r3: end of near .bss */
+	sub.w	a1, r3			/* r3: size of near .bss */
+	sstr.b				/* Clear near .bss */
+
+/* Clear far .bss sections */
+
+	showprogress 'B'
+
+#ifdef CONFIG_M16C_HAVEFARRAM
+# warning "Far RAM support not implemented"
+#endif
+
+/* Initialize near .data sections (.rodata is not moved) */
+
+	mov.w	_g_enronly, a0		/* a0: Low 16 bits of source address */
+	mov.b	_g_enronly+2, r1h	/* 4 MS of 20-bit source address */
+	mov.w	_g_sndata, a1		/* a1: start of near .data */
+	mov.w	_g_endata, r3		/* r3: end of near .data */
+	sub.w	a1, r3			/* r3: size of near .data */
+	smovf.b				/* Copy source to near .data */
+
+/* Initialize far .data sections (.rodata is not moved) */
+
+	showprogress 'C'
+
+#ifdef CONFIG_M16C_HAVEFARRAM
+# warning "Far RAM support not implemented"
+#endif
+
+/* Perform early console initialization */
+
+#ifdef CONFIG_USE_EARLYSERIALINIT
+	.globl	_up_earlyconsoleinit	/* Early initialization of console driver */
+	jsr.a	 _up_earlyconsoleinit	/* Call it */
+	showprogress 'D'
+#endif
+
+/* Call C++ constructors */
+
+#ifdef CONFIG_CPLUSPLUS
+#  warning "No C++ support yet"
+	showprogress 'E'
+#endif
+
+/* Initialize onboard LEDs */
+
+#ifdef CONFIG_ARCH_LEDS
+	.globl	_up_ledinit		/* Boot LED setup */
+	jsr.a	_up_ledinit		/* Call it */
+#endif
+	showprogress '\n'
+
+/* Pass control to NuttX */
+
+	.globl	_os_start
+	jsr.a	_os_start
+
+/* NuttX will not return, but just in case... */
+
+_os_exit:
+	jmp.s	_os_exit
+	.size	__start, .-__start
+	.end
--- a/arch/sh/src/m16c/m16c_initialstate.c
+++ b/arch/sh/src/m16c/m16c_initialstate.c
@@ -0,0 +1,110 @@
+/****************************************************************************
+ *  arch/sh/src/m16c/m16c_initialstate.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <string.h>
+
+#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+/****************************************************************************
+ * Preprocessor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_initial_state
+ *
+ * Description:
+ *   A new thread is being started and a new TCB has been created. This
+ *   function is called to initialize the processor specific portions of the
+ *   new TCB.
+ *
+ *   This function must setup the intial architecture registers and/or stack
+ *   so that execution will begin at tcb->start on the next context switch.
+ *
+ ****************************************************************************/
+
+void up_initial_state(FAR _TCB *tcb)
+{
+  FAR struct xcptcontext *xcp  = &tcb->xcp;
+  FAR ubyte              *regs = xcp->regs;
+
+  /* Initialize the initial exception register context structure */
+
+  memset(xcp, 0, sizeof(struct xcptcontext));
+
+  /* Offset 0: FLG (bits 12-14) PC (bits 16-19) as would be present by an interrupt */
+
+  *regs++ = ((M16C_DEFAULT_IPL << 4) | ((uint32)tcb->start >> 16));
+
+  /* Offset 1: FLG (bits 0-7) */
+
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  *regs++ = M16C_FLG_U;
+#else
+  *regs++ = M16C_FLG_U | M16C_FLG_I;
+#endif
+
+  /* Offset 2-3: 16-bit PC [0]:bits8-15 [1]:bits 0-7 */
+
+  *regs++ = (uint32)tcb->start >> 8;  /* Bits 8-15 of PC */
+  *regs++ = (uint32)tcb->start;       /* Bits 0-7 of PC */
+
+  /* Offset 18-20: User stack pointer */
+
+   regs   = &xcp->regs[REG_SP];
+  *regs++ = (uint32)tcb->adj_stack_ptr >> 8;  /* Bits 8-15 of SP */
+  *regs   = (uint32)tcb->adj_stack_ptr;       /* Bits 0-7 of SP */
+}
--- a/arch/sh/src/m16c/m16c_irq.c
+++ b/arch/sh/src/m16c/m16c_irq.c
@@ -0,0 +1,127 @@
+/****************************************************************************
+ * arch/sh/src/m16c/m16c_irq.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <nuttx/arch.h>
+#include <nuttx/irq.h>
+
+#include "up_internal.h"
+
+/****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* This holds a references to the current interrupt level register storage
+ * structure.  If is non-NULL only during interrupt processing.
+ */
+
+uint32 *current_regs; /* Actually a pointer to the beginning or a ubyte array */
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_irqinitialize
+ ****************************************************************************/
+
+void up_irqinitialize(void)
+{
+  current_regs = NULL;
+  
+  /* And finally, enable interrupts */
+
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+  asm("fset i");
+#endif
+}
+
+/****************************************************************************
+ * Name: up_disable_irq
+ *
+ * Description:
+ *   On many architectures, there are three levels of interrupt enabling: (1)
+ *   at the global level, (2) at the level of the interrupt controller,
+ *   and (3) at the device level.  In order to receive interrupts, they
+ *   must be enabled at all three levels.
+ *
+ *   This function implements disabling of the device specified by 'irq'
+ *   at the interrupt controller level if supported by the architecture
+ *   (irqsave() supports the global level, the device level is hardware
+ *   specific).
+ *
+ ****************************************************************************/
+
+#ifndef CONFIG_ARCH_NOINTC
+void up_disable_irq(int irq)
+{
+  /* There are no ez80 interrupt controller settings to disable IRQs */
+}
+
+/****************************************************************************
+ * Name: up_enable_irq
+ *
+ * Description:
+ *   This function implements enabling of the device specified by 'irq'
+ *   at the interrupt controller level if supported by the architecture
+ *   (irqsave() supports the global level, the device level is hardware
+ *   specific).
+ *
+ ****************************************************************************/
+
+void up_enable_irq(int irq)
+{
+  /* There are no ez80 interrupt controller settings to enable IRQs */
+}
+
+#endif /* CONFIG_ARCH_NOINTC */
--- a/arch/sh/src/m16c/m16c_lowputc.c
+++ b/arch/sh/src/m16c/m16c_lowputc.c
@@ -0,0 +1,343 @@
+/**************************************************************************
+ * arch/sh/src/m16c/m16c_lowputc.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************/
+
+/**************************************************************************
+ * Included Files
+ **************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+#include <nuttx/arch.h>
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "up_internal.h"
+#include "m16c_uart.h"
+
+/**************************************************************************
+ * Private Definitions
+ **************************************************************************/
+
+/* Configuration **********************************************************/
+
+#ifndef M16C_XIN_PRESCALER
+#  define M16C_XIN_PRESCALER 1
+#endif
+
+/* Is there any serial support?  This might be the case if the board does
+ * not have serial ports but supports stdout through, say, an LCD.
+ */
+
+#if defined(CONFIG_UART0_DISABLE) || defined(CONFIG_UART1_DISABLE) || defined(CONFIG_UART2_DISABLE)
+#  define HAVE_SERIAL
+#else
+#  undef HAVE_SERIAL
+#endif
+
+/* Is one of the serial ports a console? */
+
+#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_UART0_DISABLE)
+#  define HAVE_SERIALCONSOLE 1
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE)
+#  define HAVE_SERIALCONSOLE 1
+#  undef CONFIG_UART0_SERIAL_CONSOLE
+#  undef CONFIG_UART2_SERIAL_CONSOLE
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && !defined(CONFIG_UART2_DISABLE)
+#  define HAVE_SERIALCONSOLE 1
+#  undef CONFIG_UART0_SERIAL_CONSOLE
+#  undef CONFIG_UART1_SERIAL_CONSOLE
+#else
+#  if defined(CONFIG_UART0_SERIAL_CONSOLE) || defined(CONFIG_UART1_SERIAL_CONSOLE)|| defined(CONFIG_UART2_SERIAL_CONSOLE)
+#    error "A serial console selected, but corresponding UART not enabled"
+#  endif
+#  undef HAVE_SERIALCONSOLE
+#endif
+
+#if defined(HAVE_SERIALCONSOLE) && defined(CONFIG_LCD_CONSOLE)
+#  error "Both serial and LCD consoles are defined"
+#elif !defined(HAVE_SERIALCONSOLE) && !defined(CONFIG_LCD_CONSOLE)
+#  warning "No console is defined"
+#endif
+
+/* Select UART parameters for the selected console */
+
+#ifdef HAVE_SERIALCONSOLE
+#if defined(CONFIG_UART0_SERIAL_CONSOLE)
+#  define M16C_UART_BASE     M16C_UART0_BASE
+#  define M16C_UART_BAUD     CONFIG_UART0_BAUD
+#  define M16C_UART_BITS     CONFIG_UART0_BITS
+#  define M16C_UART_PARITY   CONFIG_UART0_PARITY
+#  define M16C_UART_2STOP    CONFIG_UART0_2STOP
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+#  define M16C_UART_BASE     M16C_UART1_BASE
+#  define M16C_UART_BAUD     CONFIG_UART1_BAUD
+#  define M16C_UART_BITS     CONFIG_UART1_BITS
+#  define M16C_UART_PARITY   CONFIG_UART1_PARITY
+#  define M16C_UART_2STOP    CONFIG_UART1_2STOP
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
+#  define M16C_UART_BASE     M16C_UART2_BASE
+#  define M16C_UART_BAUD     CONFIG_UART2_BAUD
+#  define M16C_UART_BITS     CONFIG_UART2_BITS
+#  define M16C_UART_PARITY   CONFIG_UART2_PARITY
+#  define M16C_UART_2STOP    CONFIG_UART2_2STOP
+#else
+#  error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
+#endif
+
+/* Get mode setting */
+
+#if M16C_UART_BITS == 7
+#  define M16C_MR_SMDBITS UART_MR_SMD7BITS
+#elif M16C_UART_BITS == 8
+#  define M16C_MR_SMDBITS UART_MR_SMD8BITS
+#elif M16C_UART_BITS == 8
+#  define M16C_MR_SMDBITS UART_MR_SMD9BITS
+#else
+#  error "Number of bits not supported"
+#endif
+
+#if M16C_UART_PARITY == 0
+#  define M16C_MR_PARITY (0)
+#elif M16C_UART_PARITY == 1
+#  define M16C_MR_PARITY UART_MR_PRYE
+#elif M16C_UART_PARITY == 2
+#  define M16C_MR_PARITY (UART_MR_PRYE|UART_MR_PRY)
+#else
+#  error "Invalid parity selection"
+#endif
+
+#if M16C_UART_2STOP != 0
+#  define M16C_MR_STOPBITS UART_MR_STPS
+#else
+#  define M16C_MR_STOPBITS (0)
+#endif
+
+/* The full MR setting: */
+
+#define M16C_MR_VALUE (M16C_MR_SMDBITS|M16C_MR_PARITY|M16C_MR_STOPBITS)
+
+/* Clocking ***************************************************************/
+
+/* The Bit Rate Generator (BRG) value can be calculated by:
+ *
+ * BRG = source-frequency / prescaler / 16 / baud rate - 1
+ *
+ * Example:
+ *  source-frequency = 20,000,000 (20MHz)
+ *  prescaler = 1
+ *  baud rate = 19200
+ *  BRG = 20,000,000/1/16/19200 - 1 = 64
+ */
+
+#define M16C_UART_BRG_VALUE \
+	((M16C_XIN_FREQ / (16 * M16C_XIN_PRESCALER * M16C_UART_BAUD)) - 1)
+
+#endif /* HAVE_SERIALCONSOLE */
+
+/**************************************************************************
+ * Private Types
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Function Prototypes
+ **************************************************************************/
+
+/**************************************************************************
+ * Global Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: up_txready
+ *
+ * Description:
+ *   Return TRUE of the Transmit Data Register is empty
+ *
+ **************************************************************************/
+
+#ifdef HAVE_SERIALCONSOLE
+static inline int up_txready(void)
+{
+  /* Check the TI bit in the CI register.  1=Transmit buffer empty */
+
+  return ((getreg8(M16C_UART_BASE + M16C_UART_C1) & UART_C1_TI) != 0);
+}
+#endif /* HAVE_SERIALCONSOLE */
+
+/**************************************************************************
+ * Name: up_lowserialsetup
+ *
+ * Description:
+ *   This performs basic initialization of the UART used for the serial
+ *   console.  Its purpose is to get the console output availabe as soon
+ *   as possible.
+ *
+ **************************************************************************/
+
+#if defined(HAVE_SERIALCONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+static inline void up_lowserialsetup(void)
+{
+  ubyte regval;
+
+  /* Set the baud rate generator */
+
+  putreg8(M16C_UART_BRG_VALUE, M16C_UART_BASE + M16C_UART_BRG);
+
+  /* Disable CTS/RTS */
+
+  putreg8(UART_C0_CRD, M16C_UART_BASE + M16C_UART_C0);
+
+  /* Disable RX/TX interrupts */
+
+#if 0
+  putreg8(0, M16C_UCON);
+#endif
+
+/* Set interrupt cause=TX complete and continuous receive mode */
+
+#if defined(CONFIG_UART0_SERIAL_CONSOLE)
+  regval  = getreg8(M16C_UCON);
+  regval |= (UART_CON_U0IRS|UART_CON_U0RRM);
+  putreg8(regval, M16C_UCON);
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+  regval = getreg8(M16C_UCON);
+  regval |= (UART_CON_U1IRS|UART_CON_U1RRM);
+  putreg8(regval, M16C_UCON);
+#else
+  regval = getreg8(M16C_U2C1);
+  regval |= (UART_C1_U2IRS|UART_C1_U2RRM);
+  putreg8(regval, M16C_U2C1);
+#endif
+
+  /* Set UART transmit/receive control register 1 to enable transmit and receive */
+
+  putreg8(UART_C1_TE|UART_C1_RE, M16C_UART_BASE + M16C_UART_C1);
+	
+  /* Set UART transmit/receive mode register data bits, stop bits, parity */
+
+  putreg8(M16C_MR_VALUE, M16C_UART_BASE + M16C_UART_MR);
+
+  /* Set port direction registers for Rx/TX pins */
+
+ #if defined(CONFIG_UART0_SERIAL_CONSOLE)
+  regval  = getreg8(M16C_PD6);
+  regval &= ~(1 << 2);                         /* PD6-2:RxD1 */
+  regval |=  (1 << 3);                         /* PD6-3:TxD1 */
+  putreg8(regval, M16C_PD6);
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+  regval = getreg8(M16C_PD6);
+  regval &= ~(1 << 6);                         /* PD6-6:RxD1 */
+  regval |=  (1 << 7);                         /* PD6-7:TxD1 */
+  putreg8(regval, M16C_PD6);
+#else
+  regval = getreg8(M16C_PD7);
+  regval &= ~(1 << 1);                         /* PD7-1:RxD1 */
+  regval &=  (1 << 0);                         /* PD7-0:TxD1 */
+  putreg8(regval, M16C_PD7);
+#endif
+
+  /* Read any data left in the RX fifo */
+
+  regval = (ubyte)getreg16(M16C_UART_BASE + M16C_UART_RB);
+}
+#endif /* HAVE_SERIALCONFIG && !CONFIG_SUPPRESS_UART_CONFIG */
+
+/**************************************************************************
+ * Public Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: up_lowputc
+ *
+ * Description:
+ *   Output one byte on the serial console.
+ *
+ **************************************************************************/
+
+#if defined(HAVE_SERIAL) && !defined(CONFIG_LCD_CONSOLE)
+void up_lowputc(char ch)
+{
+#ifdef HAVE_SERIALCONSOLE
+  /* Wait until the transmit buffer is empty */
+
+  while (!up_txready());
+
+  /* Write the data to the transmit buffer */
+
+  putreg16((uint16)ch, M16C_UART_BASE + M16C_UART_TB);
+#endif
+}
+#endif
+
+/**************************************************************************
+ * Name: up_lowsetup
+ *
+ * Description:
+ *   This performs basic initialization of the UART used for the serial
+ *   console.  Its purpose is to get the console output availabe as soon
+ *   as possible.
+ *
+ **************************************************************************/
+
+void up_lowsetup(void)
+{
+  /* Here we initialize the serial console early so that it can be used
+   * for bring-up debugging.
+   */
+
+#if defined(HAVE_SERIALCONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+  up_lowserialsetup()
+#endif
+
+  /* The LCD is initialized here to because it may be that the LCD is
+   * used for console output.
+   */
+
+#ifdef CONFIG_ARCH_LCD
+  up_lcdinit();
+#endif
+}
--- a/arch/sh/src/m16c/m16c_schedulesigaction.c
+++ b/arch/sh/src/m16c/m16c_schedulesigaction.c
@@ -0,0 +1,201 @@
+/****************************************************************************
+ * arch/sh/src/m16c/m16c_schedulesigaction.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+
+#include "os_internal.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Funictions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_schedule_sigaction
+ *
+ * Description:
+ *   This function is called by the OS when one or more
+ *   signal handling actions have been queued for execution.
+ *   The architecture specific code must configure things so
+ *   that the 'igdeliver' callback is executed on the thread
+ *   specified by 'tcb' as soon as possible.
+ *
+ *   This function may be called from interrupt handling logic.
+ *
+ *   This operation should not cause the task to be unblocked
+ *   nor should it cause any immediate execution of sigdeliver.
+ *   Typically, a few cases need to be considered:
+ *
+ *   (1) This function may be called from an interrupt handler
+ *       During interrupt processing, all xcptcontext structures
+ *       should be valid for all tasks.  That structure should
+ *       be modified to invoke sigdeliver() either on return
+ *       from (this) interrupt or on some subsequent context
+ *       switch to the recipient task.
+ *   (2) If not in an interrupt handler and the tcb is NOT
+ *       the currently executing task, then again just modify
+ *       the saved xcptcontext structure for the recipient
+ *       task so it will invoke sigdeliver when that task is
+ *       later resumed.
+ *   (3) If not in an interrupt handler and the tcb IS the
+ *       currently executing task -- just call the signal
+ *       handler now.
+ *
+ ****************************************************************************/
+
+void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver)
+{
+  /* Refuse to handle nested signal actions */
+
+  sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+
+  if (!tcb->xcp.sigdeliver)
+    {
+      irqstate_t flags;
+
+      /* Make sure that interrupts are disabled */
+
+      flags = irqsave();
+
+      /* First, handle some special cases when the signal is
+       * being delivered to the currently executing task.
+       */
+
+      sdbg("rtcb=0x%p current_regs=0x%p\n", g_readytorun.head, current_regs);
+
+      if (tcb == (_TCB*)g_readytorun.head)
+        {
+          /* CASE 1:  We are not in an interrupt handler and
+           * a task is signalling itself for some reason.
+           */
+
+          if (!current_regs)
+            {
+              /* In this case just deliver the signal now. */
+
+              sigdeliver(tcb);
+            }
+
+          /* CASE 2:  We are in an interrupt handler AND the
+           * interrupted task is the same as the one that
+           * must receive the signal, then we will have to modify
+           * the return state as well as the state in the TCB.
+           */
+
+          else
+            {
+              /* Save the return PC and SR and one scratch register
+               * These will be restored by the signal trampoline after
+               * the signals have been delivered.
+               */
+
+              tcb->xcp.sigdeliver    = sigdeliver;
+              tcb->xcp.saved_pc[0]   = current_regs[REG_PC];
+              tcb->xcp.saved_pc[1]   = current_regs[REG_PC+1];
+              tcb->xcp.saved_flg     = current_regs[REG_FLG];
+
+              /* Then set up to vector to the trampoline with interrupts
+               * disabled
+               */
+
+              current_regs[REG_PC]   = (uint32)up_sigdeliver >> 8;
+              current_regs[REG_PC+1] = (uint32)up_sigdeliver;
+              current_regs[REG_FLG] &= ~M16C_FLG_I;
+
+              /* And make sure that the saved context in the TCB
+               * is the same as the interrupt return context.
+               */
+
+              up_copystate(tcb->xcp.regs, current_regs);
+            }
+        }
+
+      /* Otherwise, we are (1) signaling a task is not running
+       * from an interrupt handler or (2) we are not in an
+       * interrupt handler and the running task is signalling
+       * some non-running task.
+       */
+
+      else
+        {
+          /* Save the return PC and SR and one scratch register
+           * These will be restored by the signal trampoline after
+           * the signals have been delivered.
+           */
+
+          tcb->xcp.sigdeliver     = sigdeliver;
+          tcb->xcp.saved_pc[0]    = tcb->xcp.regs[REG_PC];
+          tcb->xcp.saved_pc[1]    = tcb->xcp.regs[REG_PC+1];
+          tcb->xcp.saved_flg      = tcb->xcp.regs[REG_FLG];
+
+          /* Then set up to vector to the trampoline with interrupts
+           * disabled
+           */
+
+          tcb->xcp.regs[REG_PC]   = (uint32)up_sigdeliver >> 8;
+          tcb->xcp.regs[REG_PC+1] = (uint32)up_sigdeliver;
+          tcb->xcp.regs[REG_FLG] &= ~M16C_FLG_I;
+        }
+
+      irqrestore(flags);
+    }
+}
+
+#endif /* !CONFIG_DISABLE_SIGNALS */
--- a/arch/sh/src/m16c/m16c_serial.c
+++ b/arch/sh/src/m16c/m16c_serial.c
--- a/arch/sh/src/m16c/m16c_sigdeliver.c
+++ b/arch/sh/src/m16c/m16c_sigdeliver.c
@@ -0,0 +1,146 @@
+/****************************************************************************
+ * arch/sh/src/m16c/m16c_sigdeliver.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+
+#include "os_internal.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#ifndef CONFIG_DISABLE_SIGNALS
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_sigdeliver
+ *
+ * Description:
+ *   This is the a signal handling trampoline.  When a
+ *   signal action was posted.  The task context was mucked
+ *   with and forced to branch to this location with interrupts
+ *   disabled.
+ *
+ ****************************************************************************/
+
+void up_sigdeliver(void)
+{
+#ifndef CONFIG_DISABLE_SIGNALS
+  _TCB  *rtcb = (_TCB*)g_readytorun.head;
+  ubyte regs[XCPTCONTEXT_SIZE];
+  sig_deliver_t sigdeliver;
+
+  /* Save the errno.  This must be preserved throughout the
+   * signal handling so that the the user code final gets
+   * the correct errno value (probably EINTR).
+   */
+
+  int saved_errno = rtcb->pterrno;
+
+  up_ledon(LED_SIGNAL);
+
+  sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+  ASSERT(rtcb->xcp.sigdeliver != NULL);
+
+  /* Save the real return state on the stack. */
+
+  up_copystate(regs, rtcb->xcp.regs);
+  regs[REG_PC]   = rtcb->xcp.saved_pc[0];
+  regs[REG_PC+1] = rtcb->xcp.saved_pc[1];
+  regs[REG_FLG]  = rtcb->xcp.saved_flg;
+
+  /* Get a local copy of the sigdeliver function pointer.
+   * we do this so that we can nullify the sigdeliver
+   * function point in the TCB and accept more signal
+   * deliveries while processing the current pending
+   * signals.
+   */
+
+  sigdeliver           = rtcb->xcp.sigdeliver;
+  rtcb->xcp.sigdeliver = NULL;
+
+  /* Then restore the task interrupt state. */
+
+  irqrestore(rtcb->xcp.saved_flg);
+
+  /* Deliver the signals */
+
+  sigdeliver(rtcb);
+
+  /* Output any debug messaged BEFORE restoreing errno
+   * (becuase they may alter errno), then restore the
+   * original errno that is needed by the user logic
+   * (it is probably EINTR).
+   */
+
+  sdbg("Resuming\n");
+  rtcb->pterrno = saved_errno;
+
+  /* Then restore the correct state for this thread of
+   * execution.
+   */
+
+  up_ledoff(LED_SIGNAL);
+  up_fullcontextrestore(regs);
+#endif
+}
+
+#endif /* !CONFIG_DISABLE_SIGNALS */
+
--- a/arch/sh/src/m16c/m16c_timer.h
+++ b/arch/sh/src/m16c/m16c_timer.h
@@ -0,0 +1,227 @@
+/************************************************************************************
+ * arch/sh/src/m16c/m16c_timer.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_SH_SRC_M16C_M16C_TIMER_H
+#define __ARCH_SH_SRC_M16C_M16C_TIMER_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Register Bit Definitions *********************************************************/
+
+#define M16C_TA0IC         0x00055    /* Timer A0 interrupt control */
+#define M16C_TA1IC         0x00056    /* Timer A1 interrupt control */
+#define M16C_TA2IC         0x00057    /* Timer A2 interrupt control */
+#define M16C_TA3IC         0x00058    /* Timer A3 interrupt control */
+#define M16C_TA4IC         0x00059    /* Timer A4 interrupt control */
+
+/* Count Start Flag Register (8-bit access) Register */
+
+#define TABSR_TA0S         0x01       /* Bit 0: Timer A0 count start */
+#define TABSR_TA1S         0x02       /* Bit 1: Timer A1 count start */
+#define TABSR_TA2S         0x04       /* Bit 2: Timer A2 count start */
+#define TABSR_TA3S         0x08       /* Bit 3: Timer A3 count start */
+#define TABSR_TA4S         0x10       /* Bit 4: Timer A4 count start */
+#define TABSR_TB0S         0x20       /* Bit 5: Timer B0 count start */
+#define TABSR_TB1S         0x40       /* Bit 6: Timer B1 count start */
+#define TABSR_TB2S         0x80       /* Bit 7: Timer B2 count start */
+
+/* Clock Prescaler Reset Flag Register */
+                                      /* Bits 0-6: Not used */
+#define CPSRF_CPSR         0x80       /* Bit 7: 1=Prescaler is reset */
+
+/* On-Shot Start Flag Register (8-bit access) */
+
+#define ONSF_TA0OS         0x01       /* Bit 0: Timer A0 one shot start */
+#define ONSF_TA1OS         0x02       /* Bit 1: Timer A1 one shot start */
+#define ONSF_TA2OS         0x04       /* Bit 2: Timer A2 one shot start */
+#define ONSF_TA3OS         0x08       /* Bit 3: Timer A3 one shot start */
+#define ONSF_TA4OS         0x10       /* Bit 4: Timer A4 one shot start */
+                                      /* Bit 5: Reserved */
+#define ONSF_TA0TG_MASK    0xc0       /* Bit 6-7: Timer A0 event trigger select bits */
+#define ONSF_TAOTG_INTAON  0x00       /*   00 : Input on TA0IN is selected */
+#define ONSF_TAOTG_TB2OVF  0x40       /*   01 : TB2 overflow is selected */
+#define ONSF_TAOTG_TB4OVF  0x80       /*   10 : TB4 overflow is selected */
+#define ONSF_TAOTG_TB1OVF  0xc0       /*   11 : TB1 overflow is selected */
+
+/* Trigger Select Register */
+
+#define TRGSR_TA1TG_MASK   0x03       /* Bit 0-1: Timer A1 event trigger select bits */
+#define TRGSR_TA1TG_INTAON 0x00       /*   00 : Input on TA1IN is selected */
+#define TRGSR_TA1TG_TB2OVF 0x01       /*   01 : TB2 overflow is selected */
+#define TRGSR_TA1TG_TB4OVF 0x02       /*   10 : TB4 overflow is selected */
+#define TRGSR_TA1TG_TB1OVF 0x03       /*   11 : TB1 overflow is selected */
+#define TRGSR_TA2TG_MASK   0x0c       /* Bit 2-3: Timer A2 event trigger select bits */
+#define TRGSR_TA2TG_INTAON 0x00       /*   00 : Input on TA2IN is selected */
+#define TRGSR_TA2TG_TB2OVF 0x04       /*   01 : TB2 overflow is selected */
+#define TRGSR_TA2TG_TB4OVF 0x08       /*   10 : TB4 overflow is selected */
+#define TRGSR_TA2TG_TB1OVF 0x0c       /*   11 : TB1 overflow is selected */
+#define TRGSR_TA3TG_MASK   0x30       /* Bit 4-5: Timer A3 event trigger select bits */
+#define TRGSR_TA3TG_INTAON 0x00       /*   00 : Input on TA3IN is selected */
+#define TRGSR_TA3TG_TB2OVF 0x10       /*   01 : TB2 overflow is selected */
+#define TRGSR_TA3TG_TB4OVF 0x20       /*   10 : TB4 overflow is selected */
+#define TRGSR_TA3TG_TB1OVF 0x30       /*   11 : TB1 overflow is selected */
+#define TRGSR_TA4TG_MASK   0xc0       /* Bit 6-7: Timer A4 event trigger select bits */
+#define TRGSR_TA4TG_INTAON 0x00       /*   00 : Input on TA4IN is selected */
+#define TRGSR_TA4TG_TB2OVF 0x40       /*   01 : TB2 overflow is selected */
+#define TRGSR_TA4TG_TB4OVF 0x80       /*   10 : TB4 overflow is selected */
+#define TRGSR_TA4TG_TB1OVF 0xc0       /*   11 : TB1 overflow is selected */
+
+/* Up-Down Flag Register */
+
+#define UDF_TA0UD          0x01       /* Bit 0: 1=Timer A0 up count */
+#define UDF_TA1UD          0x02       /* Bit 1: 1=Timer A1 up count */
+#define UDF_TA2UD          0x04       /* Bit 2: 1=Timer A2 up count */
+#define UDF_TA3UD          0x08       /* Bit 3: 1=Timer A3 up count */
+#define UDF_TA4UD          0x10       /* Bit 4: 1=Timer A4 up count */
+#define UDF_TA2P           0x20       /* Bit 5: Timer A2 two-phase pulse signal processing select */
+#define UDF_TA3P           0x40       /* Bit 5: Timer A3 two-phase pulse signal processing select */
+#define UDF_TA4P           0x80       /* Bit 5: Timer A4 two-phase pulse signal processing select */
+
+/* Timer A Registers (16-bit access), simple value range 0000-ffff
+ *                                    (except in PWM mode)
+ */
+
+/* Timer B Registers (16-bit access), simple value range 0000-ffff
+ *                                    (except in Pulse period/pulse width measurement mode)
+ */
+
+/* Timer A Mode Register (8-bit access) */
+
+#define TAnMR_TMOD_MASK    0x03       /* Bits 0-1: Operation mode select */
+#define TAnMR_TMOD_TIMER   0x00       /*   00 : Timer mode */
+#define TAnMR_TMOD_EVENT   0x01       /*   01 : Event counter mode */
+#define TAnMR_TMOD_ONESHOT 0x02       /*   10 : One-shot timer mode */
+#define TAnMR_TMOD_PWM     0x03       /*   11 : Pulse width modulation (PWM) mode */
+#define TAnMR_MR_MASK      0x3c       /* Bits 2-5: Mode function values */
+                                      /* Timer Mode: */
+#define TAnMR_MR_TMNOOUT   0x00       /*   0xx0 : No output */
+#define TAnMR_MR_TMOUT     0x04       /*   0xx1 : Pulse is output */
+#define TAnMR_MR_TMNOGATE  0x00       /*   00xx : Gate function not available */
+#define TAnMR_MR_TMTAINLO  0x10       /*   010x : Timer counts when TAiIN pin is L */
+#define TAnMR_MR_TMTAINHI  0x18       /*   011x : Timer counts when TAiIN pin is H */
+                                      /* Event Counter Mode: */
+#define TAnMR_MR_EC2PHASE  0x10       /*   0100 : Settings required for 2-phase mode */
+#define TAnMR_MR_ECNOOUT   0x00       /*   0xx0 : No output */
+#define TAnMR_MR_ECOUT     0x04       /*   0xx1 : 1=Pulse is output */
+#define TAnMR_MR_ECFALLING 0x00       /*   0x0x : Count polarity falling edge */
+#define TAnMR_MR_ECRISING  0x08       /*   0x1x : Count polarity rising edge */
+#define TAnMR_MR_ECUDC     0x00       /*   00xx : Up/down switching on up/down content */
+#define TAnMR_MR_ECINP     0x10       /*   01xx : Up/down switching on TAnOUT input signal */
+                                      /* One Shot Mode: */
+#define TAnMR_MR_OSNOOUT   0x00       /*   0xx0 : No output */
+#define TAnMR_MR_OSOUT     0x04       /*   0xx1 : Pulse is output */
+#define TAnMR_MR_OSFALLING 0x00       /*   0x0x : TAin falling edge */
+#define TAnMR_MR_OSRISING  0x08       /*   0x1x : TAin rising edge */
+#define TAnMR_MR_OSSFLAG   0x00       /*   00xx : Trigger select one-shot start flag */
+#define TAnMR_MR_OSSTRIG   0x10       /*   01xx : Trigger Selected by event/trigger select bits */
+                                      /* PWM Mode: */
+#define TAnMR_MR_PMFALLING 0x00       /*   xx00 : TAin falling edge */
+#define TAnMR_MR_PMRISING  0x08       /*   xx10 : TAin rising edge */
+#define TAnMR_MR_PMSFLAG   0x00       /*   x0x0 : Trigger select one-shot start flag */
+#define TAnMR_MR_PMTRIG    0x10       /*   x1x0 : Trigger Selected by event/trigger select bits */
+#define TAnMR_MR_PM16BIT   0x00       /*   0xx0 : Functions as a 16-bit pulse width modulator */
+#define TAnMR_MR_PM8BIT    0x20       /*   1xx0 : Functions as an 8-bit pulse width modul */
+#define TAnMR_TCK_MASK     0xc0       /* Bits 6-7: Count source select */
+                                      /* Timer Mode: */
+#define TAnMR_TCK_TMF1     0x00       /*   00: f1 or f2 */
+#define TAnMR_TCK_TMF8     0x40       /*   01: f8 */
+#define TAnMR_TCK_TMF32    0x80       /*   10: f32 */
+#define TAnMR_TCK_TMFC32   0xc0       /*   11: fc32 */
+                                      /* Event Counter Mode: */
+#define TAnMR_TCK_ECRELOAD 0x00       /*   x0: Reload count operation*/
+#define TAnMR_TCK_ECFRUN   0x40       /*   x1: Free run count operation*/
+#define TAnMR_TCK_ECNORMAL 0x00       /*   0x: Normal processing operation */
+#define TAnMR_TCK_ECMUL4   0x80       /*   1x: Multiply-by-4 processing operation */
+                                      /* One Shot Mode: */
+#define TAnMR_TCK_OSF1     0x00       /*   00: f1 or f2 */
+#define TAnMR_TCK_OSF8     0x40       /*   01: f8 */
+#define TAnMR_TCK_OSF32    0x80       /*   10: f32 */
+#define TAnMR_TCK_OSFC32   0xc0       /*   11: fc32 */
+                                      /* PWM Mode: */
+#define TAnMR_TCK_PMF1     0x00       /*   00: f1 or f2 */
+#define TAnMR_TCK_PMF8     0x40       /*   01: f8 */
+#define TAnMR_TCK_PMF32    0x80       /*   10: f32 */
+#define TAnMR_TCK_PMFC32   0xc0       /*   11: fc32 */
+
+/* Timer B Mode Register (8-bit access) */
+
+#define TBnMR_TMOD_MASK    0x03       /* Bits 0-1: Operation mode select */
+#define TBnMR_TMOD_TIMER   0x00       /*   00 : Timer mode */
+#define TBnMR_TMOD_EVENT   0x01       /*   01 : Event counter mode */
+#define TBnMR_TMOD_PWM     0x02       /*   10 : Pulse period/pulse width measurement mode */
+#define TBnMR_MR_MASK      0x3c       /* Bits 2-5: Mode function values */
+                                      /* Timer Mode: */
+#define TBnMR_MR_TM        0x00       /*   0000 : Required bit settings for timer mode */
+                                      /* Event Counter Mode: */
+#define TBnMR_MR_ECFALLING 0x00       /*   0000 : Counts external signal's falling edges */
+#define TBnMR_MR_ECRISING  0x04       /*   0001 : Counts external signal's rising edges */
+#define TBnMR_MR_ECXTFALL  0x00       /*   0010 : Counts external signal's falling and rising edges */
+                                      /* Pulse period/pulse width measurement mode: */
+#define TBnMR_MR_PMFALLING 0x00       /*   0000 : Period between falling edge to falling edge */
+#define TBnMR_MR_PMRISING  0x08       /*   0001 : Period between rising edge to rising edge */
+#define TBnMR_MR_PMSVAL    0x00       /*   0010 : Width between edge(s) to edge(s) */
+#define TBnMR_TCK_MASK     0xc0       /* Bits 6-7: Count source select */
+                                      /* Timer Mode: */
+#define TBnMR_TCK_TMF1     0x00       /*   00: f1 or f2 */
+#define TBnMR_TCK_TMF8     0x40       /*   01: f8 */
+#define TBnMR_TCK_TMF32    0x80       /*   10: f32 */
+#define TBnMR_TCK_TMFC32   0xc0       /*   11: fc32 */
+                                      /* Event Counter Mode: */
+#define TBnMR_TCK_ECTBIN   0x00       /*   00: Input from TBnIN pin */
+#define TBnMR_TCK_ECTBOVF  0x80       /*   10: TBj overflow */
+                                      /* Pulse period/pulse width measurement mode: */
+#define TBnMR_TCK_PMF1     0x00       /*   00: f1 or f2 */
+#define TBnMR_TCK_PMF8     0x40       /*   01: f8 */
+#define TBnMR_TCK_PMF32    0x80       /*   10: f32 */
+#define TBnMR_TCK_PMFC32   0xc0       /*   11: fc32 */
+
+/************************************************************************************
+ * Global Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_SH_SRC_M16C_M16C_TIMER_H */
--- a/arch/sh/src/m16c/m16c_timerisr.c
+++ b/arch/sh/src/m16c/m16c_timerisr.c
@@ -0,0 +1,185 @@
+/****************************************************************************
+ * arch/sh/src/m16c/m16c_timerisr.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <time.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
+#include "clock_internal.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "m16c_timer.h"
+
+/****************************************************************************
+ * Preprocessor Definitions
+ ****************************************************************************/
+/* Configuration */
+
+#ifndef M16C_TA0_PRIO              /* Timer A0 interrupt priority */
+#  define M16C_TA0_PRIO   5
+#endif
+
+/* Determine the ideal preload value for the timer.
+ *
+ * For example, given a 20MHz input frequency and a desired 100 Hz, clock,
+ * the ideal reload value would be:
+ *
+ *  20,000,000 / 100 = 200,000
+ *
+ * The ideal prescaler value would be the one, then that drops this to exactly
+ * 66535:
+ *
+ *  M16C_IDEAL_PRESCALER = 200,000 / 65535 = 3.05
+ *
+ * And any value greater than 3.05 would also work with less and less precision.
+ * The following calculation will produce the ideal prescaler as the next integer
+ * value above any fractional values:
+ */
+
+#define M16C_DIVISOR (65535 * CLK_TCK)
+#define M16C_IDEAL_PRESCALER \
+	((M16C_XIN_FREQ + M16C_DIVISOR - 1) / M16C_DIVISOR)
+
+/* Now, given this idel prescaler value, pick between available choices: 1, 8, and 32 */
+
+#if M16C_IDEAL_PRESCALER > 8
+#  define M16C_PRESCALE_VALUE 32
+#  define M16C_PRESCALE_BITS TAnMR_TCK_TMF32
+#elif M16C_IDEL_PRESCALER > 1
+#  define M16C_PRESCALE_VALUE 8
+#  define M16C_PRESCALE_BITS TAnMR_TCK_TMF8
+#else
+#  define M16C_PRESCALE_VALUE 1
+#  define M16C_PRESCALE_BITS TAnMR_TCK_TMF1
+#endif
+
+/* Timer 0 Mode Settings */
+
+#define M16C_TA0MODE_CONFIG \
+	(TAnMR_TMOD_TIMER|TAnMR_MR_TMNOOUT|TAnMR_MR_TMNOGATE|M16C_PRESCALE_BITS)
+
+/* The actual reload value matching the selected prescaler value */
+
+#define M16C_RELOAD_VALUE \
+	((M16C_XIN_FREQ / M16C_PRESCALE_VALUE / CLK_TCK)  - 1)
+
+/****************************************************************************
+ * Private Type Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Global Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  up_timerisr
+ *
+ * Description:
+ *   The timer ISR will perform a variety of services for various portions
+ *   of the systems.
+ *
+ ****************************************************************************/
+
+int up_timerisr(int irq, uint32 *regs)
+{
+   /* Process timer interrupt */
+
+   sched_process_timer();
+   return 0;
+}
+
+/****************************************************************************
+ * Function:  up_timerinit
+ *
+ * Description:
+ *   This function is called during start-up to initialize
+ *   the timer interrupt.
+ *
+ ****************************************************************************/
+
+void up_timerinit(void)
+{
+  /* Make sure that no timers are running and that all timer interrupts are
+   * disabled.
+   */
+
+  putreg8(0, M16C_TABSR);
+  putreg8(0, M16C_TA0IC);
+  putreg8(0, M16C_TA1IC);
+  putreg8(0, M16C_TA2IC);
+  putreg8(0, M16C_TA3IC);
+  putreg8(0, M16C_TA4IC);
+  putreg8(0, M16C_TB0IC);
+  putreg8(0, M16C_TB1IC);
+  putreg8(0, M16C_TB2IC);
+
+  /* Set up timer 0 mode register for timer mode with the calculated prescaler value */
+ 
+  putreg8(M16C_TA0MODE_CONFIG, M16C_TA0MR);
+
+  /* Set the calculated reload value */
+
+  putreg16(M16C_RELOAD_VALUE, M16C_TA0);
+ 
+  /* Attach the interrupt handler */
+
+  irq_attach(M16C_SYSTIMER_IRQ, (xcpt_t)up_timerisr);
+
+  /* Enable timer interrupts */
+
+  putreg8(1, M16C_TA0IC);
+  
+  /* Set the interrupt priority */
+
+  putreg8(M16C_TA0_PRIO, M16C_TA0IC);
+
+  /* Start the timer */
+
+  putreg8(TABSR_TA0S, M16C_TABSR);
+}
--- a/arch/sh/src/m16c/m16c_uart.h
+++ b/arch/sh/src/m16c/m16c_uart.h
@@ -0,0 +1,146 @@
+/************************************************************************************
+ * arch/sh/src/m16c/m16c_uart.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_SH_SRC_M16C_M16C_UART_H
+#define __ARCH_SH_SRC_M16C_M16C_UART_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* UART Register Block Base Addresses ***********************************************/
+
+#define M16C_UART0_BASE    0x003a0    /* First UART0 register */
+#define M16C_UART1_BASE    0x003a8    /* First UART1 register */
+#define M16C_UART2_BASE    0x00378    /* First UART2 register (ignoring special regs) */
+
+/* UART Register Offsets ************************************************************/
+
+#define M16C_UART_MR       0x00       /*  8-bit UART transmit/receive mode  */
+#define M16C_UART_BRG      0x01       /*  8-bit UART bit rate generator    */
+#define M16C_UART_TB       0x02       /* 16-bit UART transmit buffer  */
+#define M16C_UART_C0       0x04       /*  8-bit UART transmit/receive control 0  */
+#define M16C_UART_C1       0x05       /*  8-bit UART transmit/receive control 1  */
+#define M16C_UART_RB       0x06       /* 16-bit UART receive buffer  */
+
+/* UART Register Bit Definitions ****************************************************/
+
+/* UART transmit/receive mode */
+
+#define UART_MR_SMDMASK    0x07       /* Serial I/O mode select */
+#define UART_MR_SMDINVALID 0x00       /*  000: Serial I/O invalid */
+#define UART_MR_SMDSYNCH   0x01       /*  001: Required in Sync Mode (UART0/1) Serial I/O (UART2) */
+#define UART_MR_SMDINHIB1  0x02       /*  010: Inhibited (UART0/1) I2C mode (UART2) */
+#define UART_MR_SMDINHIB2  0x03       /*  011: Inhibited */
+#define UART_MR_SMD7BITS   0x04       /*  100: Transfer data 7 bits long */
+#define UART_MR_SMD8BITS   0x05       /*  101: Transfer data 8 bits long */
+#define UART_MR_SMD9BITS   0x06       /*  110: Transfer data 9 bits long */
+#define UART_MR_SMDINHIB3  0x07       /*  111: Inhibited */
+#define UART_MR_CKDIR      0x08       /* Bit 3: Internal/external clock select 1=external */
+#define UART_MR_STPS       0x10       /* Bit 4: Stop bit length select 1=2 stop bits */
+#define UART_MR_PRY        0x20       /* Bit 5: Odd/even parity select bit 1=Even parity */
+#define UART_MR_PRYE       0x40       /* Bit 6: Parity enable 1=enabled */
+#define UART_MR_IOPOL      0x80       /* Bit 7: Reserved (UART0/1) Tx/Rx polarity reverse (UART2) */
+
+/* UART receive buffer register (16-bit) */
+
+#define UART_RB_DATAMASK   0x01ff     /* Bits 0-8: Receive data */
+                                      /* Bits 9-10: Reserved */
+#define UART_RB_ABT        0x0800     /* Bit 11: Arbitration lost detecting flag */
+#define UART_RB_OER        0x1000     /* Bit 12: Overrun error flag */
+#define UART_RB_FER        0x2000     /* Bit 13: Framing error flag */
+#define UART_RB_PER        0x4000     /* Bit 14: Parity error flag */
+#define UART_RB_SUM        0x8000     /* Bit 15: Error sum flag */
+
+/* UART Transmit/Receive Control 0 */
+
+#define UART_C0_CLKMASK    0x02       /* Bits 0-1: BRG count source select */
+#define UART_C0_F1SIO      0x00       /*   00 : f1SIO or f2SIO is selected */
+#define UART_C0_F8SIO      0x01       /*   01 : f8SIO is selected */
+#define UART_C0_F32SIO     0x02       /*   10 : f32SIO is selected */
+#define UART_C0_INHIB      0x03       /*   11 : Inhibited */
+#define UART_C0_CRS        0x04       /* Bit 2: CTS/RTS function select 1=RTS */
+#define UART_C0_TXEPT      0x08       /* Bit 3: Transmit register empty 1=empty */
+#define UART_C0_CRD        0x10       /* Bit 4: CTS/RTS disable bit 1=CTS/RTS disabled */
+#define UART_C0_NCH        0x20       /* Bit 5: Data output select 1=TxDi is N-channel open drain output */
+#define UART_C0_CKPOL      0x40       /* Bit 6: CLK polarity select 1=XMT rising, recieve falling */
+#define UART_C0_UFORM      0x80       /* Bit 7: Transfer format select 1=MSB first */
+
+/* UART Transmit/Receive Control 1 */
+
+#define UART_C1_TE         0x01       /* Bit 0: Transmit enable 1=enable */
+#define UART_C1_TI         0x02       /* Bit 1: Transmit buffer empty 1=empty */
+#define UART_C1_RE         0x04       /* Bit 2: Receive enable 1=enable */
+#define UART_C1_RI         0x08       /* Bit 3: Receive complete 1=data in read buffer */
+                                      /* The following are only defined for UART2: */
+#define UART_C1_U2IRS      0x10       /* Bit 4: UART2 transmit interrupt cause select */
+#define UART_C1_U2RRM      0x20       /* Bit 5: UART2 continuous receive mode enable */
+#define UART_C1_U2LCH      0x40       /* Bit 6: UART2 Data logic select */
+#define UART_C1_U2ERE      0x80       /* Bit 7: UART2 Error signal output enable */
+
+/* UART2 Transmit/Receive Control 2 */
+
+#define UART_CON_U0IRS      0x01       /* Bit 0: UART0 transmit interrupt cause select */
+#define UART_CON_U1IRS      0x02       /* Bit 1: UART1 transmit interrupt cause select */
+#define UART_CON_U0RRM      0x04       /* Bit 2: UART0 continuous receive mode enable */
+#define UART_CON_U1RRM      0x08       /* Bit 3: UART1 continuous receive mode enable */
+#define UART_CON_CLKMD0     0x10       /* Bit 4: CLK/CLKS select bit 0 */
+#define UART_CON_CLKMD1     0x20       /* Bit 5: CLK/CLKS select bit  */
+#define UART_CON_RCSP       0x40       /* Bit 6: Separate CTS/RTS bit */
+                                       /* Bit 7: Reserved */
+/* UART2 special mode register 1 (to be provided) */
+
+/* UART2 special mode register 2 (to be provided) */
+
+/* UART2 special mode register 3 (to be provided) */
+
+/* UART2 special mode register 4 (to be provided) */
+
+/************************************************************************************
+ * Global Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARCH_SH_SRC_M16C_M16C_UART_H */
--- a/arch/sh/src/m16c/m16c_vectors.S
+++ b/arch/sh/src/m16c/m16c_vectors.S
--- a/arch/sh/src/sh1/Make.defs
+++ b/arch/sh/src/sh1/Make.defs
@@ -1,7 +1,7 @@
 ##############################################################################
 # arch/sh/src/sh1/Make.defs
 #
-#   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -36,18 +36,19 @@
 HEAD_ASRC	= sh1_head.S

 CMN_ASRCS	= 
-CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
+CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c \
 		  up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c \
 		  up_initialstate.c up_interruptcontext.c up_lowputs.c \
 		  up_mdelay.c up_puts.c up_releasepending.c up_releasestack.c \
 		  up_reprioritizertr.c up_udelay.c up_unblocktask.c up_usestack.c

-ifneq ($(CONFIG_DISABLE_SIGNALS),y)
-CMN_CSRCS	+= up_schedulesigaction.c up_sigdeliver.c
-endif
-
 CHIP_ASRCS	= sh1_vector.S sh1_saveusercontext.S
-CHIP_CSRCS	= sh1_lowputc.c sh1_irq.c sh1_timerisr.c sh1_serial.c
+CHIP_CSRCS	= sh1_lowputc.c sh1_irq.c sh1_timerisr.c sh1_serial.c \
+		  sh1_initialstate.c sh1_copystate.c sh1_dumpstate.c
+
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+CMN_CSRCS	+= sh1_schedulesigaction.c sh1_sigdeliver.c
+endif

 ifeq ($(CONFIG_USBDEV),y)
 CHIP_CSRCS	+= 
--- a/arch/sh/src/sh1/chip.h
+++ b/arch/sh/src/sh1/chip.h
@@ -59,6 +59,14 @@
 * Public Data
 ************************************************************************************/

+/* Address of the saved user stack pointer */
+
+#ifndef __ASSEMBLY__
+#  if CONFIG_ARCH_INTERRUPTSTACK > 3
+     extern uint32 g_userstack;
+#  endif
+#endif
+
 /************************************************************************************
 * Public Functions
 ************************************************************************************/
--- a/arch/sh/src/common/up_copystate.c
+++ b/arch/sh/src/common/up_copystate.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/sh/src/common/up_copystate.c
+ * arch/sh/src/sh1/up_copystate.c
 *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -61,7 +61,7 @@
 ****************************************************************************/

 /****************************************************************************
- * Name: up_undefinedinsn
+ * Name: up_copystate
 ****************************************************************************/

 /* A little faster than most memcpy's */
--- a/arch/sh/src/sh1/sh1_dumpstate.c
+++ b/arch/sh/src/sh1/sh1_dumpstate.c
@@ -0,0 +1,234 @@
+/****************************************************************************
+ * arch/sh/src/sh1/sh1_assert.c
+ *
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+#include "os_internal.h"
+
+#ifdef CONFIG_ARCH_STACKDUMP
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sh1_getsp
+ ****************************************************************************/
+
+static inline uint32 sh1_getsp(void)
+{
+  uint32 sp;
+
+  __asm__ __volatile__
+    (
+      "mov   r15, %0\n\t"
+      : "=&z" (sp)
+      :
+      : "memory"
+    );
+  return sp;
+}
+
+/****************************************************************************
+ * Name: sh1_stackdump
+ ****************************************************************************/
+
+static void sh1_stackdump(uint32 sp, uint32 stack_base)
+{
+  uint32 stack ;
+
+  for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
+    {
+      uint32 *ptr = (uint32*)stack;
+      lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+             stack, ptr[0], ptr[1], ptr[2], ptr[3],
+             ptr[4], ptr[5], ptr[6], ptr[7]);
+    }
+}
+
+/****************************************************************************
+ * Name: sh1_registerdump
+ ****************************************************************************/
+
+static inline void sh1_registerdump(void)
+{
+  uint32 *ptr = current_regs;
+
+  /* Are user registers available from interrupt processing? */
+
+  if (ptr)
+    {
+      /* Yes.. dump the interrupt registers */
+
+      lldbg("PC: %08x SR=%08x\n",
+            ptr[REG_PC], ptr[REG_SR]);
+
+      lldbg("PR: %08x GBR: %08x MACH: %08x MACL: %08x\n",
+            ptr[REG_PR], ptr[REG_GBR], ptr[REG_MACH], ptr[REG_MACL]);
+
+      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0,
+            ptr[REG_R0], ptr[REG_R1], ptr[REG_R2], ptr[REG_R3],
+            ptr[REG_R4], ptr[REG_R5], ptr[REG_R6], ptr[REG_R7]);
+
+      lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8,
+            ptr[REG_R8], ptr[REG_R9], ptr[REG_R10], ptr[REG_R11],
+            ptr[REG_R12], ptr[REG_R13], ptr[REG_R14], ptr[REG_R15]);
+    }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_dumpstate
+ ****************************************************************************/
+
+void up_dumpstate(void)
+{
+  _TCB *rtcb        = (_TCB*)g_readytorun.head;
+  uint32 sp         = sh1_getsp();
+  uint32 ustackbase;
+  uint32 ustacksize;
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  uint32 istackbase;
+  uint32 istacksize;
+#endif
+
+  /* Get the limits on the user stack memory */
+
+  if (rtcb->pid == 0)
+    {
+      ustackbase = g_heapbase - 4;
+      ustacksize = CONFIG_IDLETHREAD_STACKSIZE;
+    }
+  else
+    {
+      ustackbase = (uint32)rtcb->adj_stack_ptr;
+      ustacksize = (uint32)rtcb->adj_stack_size;
+    }
+
+  /* Get the limits on the interrupt stack memory */
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+  istackbase = (uint32)&g_userstack;
+  istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4;
+
+  /* Show interrupt stack info */
+
+  lldbg("sp:     %08x\n", sp);
+  lldbg("IRQ stack:\n");
+  lldbg("  base: %08x\n", istackbase);
+  lldbg("  size: %08x\n", istacksize);
+
+  /* Does the current stack pointer lie within the interrupt
+   * stack?
+   */
+
+  if (sp <= istackbase && sp > istackbase - istacksize)
+    {
+      /* Yes.. dump the interrupt stack */
+
+      sh1_stackdump(sp, istackbase);
+
+      /* Extract the user stack pointer which should lie
+       * at the base of the interrupt stack.
+       */
+
+      sp = g_userstack;
+      lldbg("sp:     %08x\n", sp);
+    }
+
+  /* Show user stack info */
+
+  lldbg("User stack:\n");
+  lldbg("  base: %08x\n", ustackbase);
+  lldbg("  size: %08x\n", ustacksize);
+#else
+  lldbg("sp:         %08x\n", sp);
+  lldbg("stack base: %08x\n", ustackbase);
+  lldbg("stack size: %08x\n", ustacksize);
+#endif
+
+  /* Dump the user stack if the stack pointer lies within the allocated user
+   * stack memory.
+   */
+
+  if (sp > ustackbase || sp <= ustackbase - ustacksize)
+    {
+#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
+      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+#endif
+    }
+  else
+    {
+      sh1_stackdump(sp, ustackbase);
+    }
+
+  /* Then dump the registers (if available) */
+
+  sh1_registerdump();
+}
+
+#endif /* CONFIG_ARCH_STACKDUMP */
--- a/arch/sh/src/sh1/sh1_head.S
+++ b/arch/sh/src/sh1/sh1_head.S
@@ -62,7 +62,7 @@

 	.globl	_up_lowsetup		/* Early initialization of UART */
 #ifdef CONFIG_USE_EARLYSERIALINIT
-	.globl	_up_earlyserialinit	/* Early initialization of serial driver */
+	.globl	_up_earlyconsoleinit	/* Early initialization of console driver */
 #endif
 #ifdef CONFIG_ARCH_LEDS
 	.globl	_up_ledinit		/* Boot LED setup */
@@ -161,7 +161,7 @@

 	.macro	showprogress, code
 #ifdef CONFIG_DEBUG
-	mov.l   .Llowputc, r0		/* Address of up_earlyserialinit */
+	mov.l   .Llowputc, r0		/* Address of up_earlyconsoleinit */
 	jsr     @r0			/* Call it */
 	mov	#\code, r4		/* Delay slot */
 #endif
@@ -424,10 +424,10 @@ __start0:

 	showprogress 'A'

-	/* Perform early serial initialization */
+	/* Perform early console initialization */

 #ifdef CONFIG_USE_EARLYSERIALINIT
-	mov.l   .Learlyser, r0		/* Address of up_earlyserialinit */
+	mov.l   .Learlyconsole, r0	/* Address of up_earlyconsoleinit */
 	jsr     @r0			/* Call it */
 	or      r0, r0			/* Delay slot */
 #endif
@@ -482,8 +482,8 @@ __start0:
 .Lebss:
 	.long   _ebss
 #ifdef CONFIG_USE_EARLYSERIALINIT
-.Learlyser:
-	.long	_up_earlyserialinit
+.Learlyconsole:
+	.long	_up_earlyconsoleinit
 #endif
 .Llowsetup:
 	.long	_up_lowsetup
--- a/arch/sh/src/common/up_initialstate.c
+++ b/arch/sh/src/common/up_initialstate.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- *  arch/sh/src/common/up_initialstate.c
+ *  arch/sh/src/sh1/sh1_initialstate.c
 *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
--- a/arch/sh/src/sh1/sh1_saveusercontext.S
+++ b/arch/sh/src/sh1/sh1_saveusercontext.S
@@ -1,7 +1,7 @@
 /**************************************************************************
 * arch/sh/src/sh1/sh1_saveusercontext.S
 *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
--- a/arch/sh/src/common/up_schedulesigaction.c
+++ b/arch/sh/src/common/up_schedulesigaction.c
@@ -1,7 +1,7 @@
 /****************************************************************************
- * common/up_schedulesigaction.c
+ * arch/sh/src/sh1/sh1_schedulesigaction.c
 *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
--- a/arch/sh/src/sh1/sh1_serial.c
+++ b/arch/sh/src/sh1/sh1_serial.c
@@ -829,16 +829,16 @@ static boolean up_txready(struct uart_dev_s *dev)
 ****************************************************************************/

 /****************************************************************************
- * Name: up_serialinit
+ * Name: up_earlyconsoleinit
 *
 * Description:
 *   Performs the low level SCI initialization early in 
 *   debug so that the serial console will be available
- *   during bootup.  This must be called before up_serialinit.
+ *   during bootup.  This must be called before up_consoleinit.
 *
 ****************************************************************************/

-void up_earlyserialinit(void)
+void up_earlyconsoleinit(void)
 {
  /* NOTE:  All GPIO configuration for the SCIs was performed in
   * up_lowsetup
@@ -862,15 +862,15 @@ void up_earlyserialinit(void)
 }

 /****************************************************************************
- * Name: up_serialinit
+ * Name: up_consoleinit
 *
 * Description:
 *   Register serial console and serial ports.  This assumes
- *   that up_earlyserialinit was called previously.
+ *   that up_earlyconsoleinit was called previously.
 *
 ****************************************************************************/

-void up_serialinit(void)
+void up_consoleinit(void)
 {
  /* Register the console */

--- a/arch/sh/src/common/up_sigdeliver.c
+++ b/arch/sh/src/common/up_sigdeliver.c
--- a/arch/sim/src/Makefile
+++ b/arch/sim/src/Makefile
@@ -45,7 +45,10 @@ CSRCS		= up_initialize.c up_idle.c up_interruptcontext.c \
 		  up_releasepending.c up_reprioritizertr.c \
 		  up_exit.c up_schedulesigaction.c up_allocateheap.c \
 		  up_devconsole.c up_framebuffer.c
-HOSTSRCS	= up_stdio.c up_hostusleep.c up_x11framebuffer.c
+HOSTSRCS	= up_stdio.c up_hostusleep.c
+ifneq ($(HOSTOS),Cygwin) 
+  HOSTSRCS	+=  up_x11framebuffer.c
+endif
 ifeq ($(CONFIG_FS_FAT),y)
 CSRCS		+= up_blockdevice.c up_deviceimage.c
 endif
@@ -63,7 +66,11 @@ SRCS		= $(ASRCS) $(CSRCS) $(HOSTSRCS)
 OBJS		= $(AOBJS) $(COBJS) $(HOSTOBJS)

 LDFLAGS		= $(ARCHSCRIPT)
-STDLIBS		= -lX11 -lXext -lc
+ifneq ($(HOSTOS),Cygwin)
+  STDLIBS	= -lX11 -lXext -lc
+else
+  STDLIBS       = -lc
+endif
 ifeq ($(CONFIG_FS_FAT),y)
 STDLIBS		+= -lz
 endif
--- a/arch/z16/src/Makefile
+++ b/arch/z16/src/Makefile
@@ -39,7 +39,7 @@
 COMPILER	= ${shell basename $(CC)}
 ARCHSRCDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src
 ifeq ($(COMPILER),zneocc.exe)
-WARCHSRCDIR	= ${shell cygpath -w $(ARCHSRCDIR)}
+WARCHSRCDIR	:= ${shell cygpath -w $(ARCHSRCDIR)}
 USRINCLUDES	= -usrinc:'.;$(WTOPDIR)\sched;$(WARCHSRCDIR);$(WARCHSRCDIR)\common'
 else
 WARCHSRCDIR	= $(ARCHSRCDIR)
@@ -85,11 +85,7 @@ $(OBJS) $(HEAD_AOBJ): %$(OBJEXT): %.S
 endif

 $(COBJS): %$(OBJEXT): %.c
-ifeq ($(COMPILER),zneocc.exe)
-	$(call COMPILE, `cygpath -w $<`, $@)
-else
 	$(call COMPILE, $<, $@)
-endif

 libarch$(LIBEXT): $(OBJS)
 	@( for obj in $(OBJS) ; do \
--- a/arch/z80/include/ez80/irq.h
+++ b/arch/z80/include/ez80/irq.h
@@ -219,8 +219,8 @@ struct xcptcontext

  /* The following retains that state during signal execution */

-  chipreg_t saved_pc;     /* Saved return address */
-  chipreg_t saved_irqctl; /* Saved interrupt state */
+  chipreg_t saved_pc;    /* Saved return address */
+  chipreg_t saved_i;     /* Saved interrupt state */
 #endif
 };
 #endif
--- a/arch/z80/src/Makefile.zdsii
+++ b/arch/z80/src/Makefile.zdsii
@@ -77,10 +77,10 @@ $(HEAD_GENSRC) $(GENSRCS) : %$(ASMEXT): %.S
 	@rm $@.tmp

 $(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %$(ASMEXT)
-	$(call ASSEMBLE, `cygpath -w $<`, $@)
+	$(call ASSEMBLE, $<, $@)

 $(COBJS): %$(OBJEXT): %.c
-	$(call COMPILE, `cygpath -w $<`, $@)
+	$(call COMPILE, $<, $@)

 libarch$(LIBEXT): $(OBJS)
 	@( for obj in $(OBJS) ; do \
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
patacongo	1a7c3aba48	prep for 0.4.2 release git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1542 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 22:12:29 +00:00
patacongo	434c6c27ca	Fix errors in handling interrupt bits on context restore git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1541 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 21:58:27 +00:00
patacongo	6c0b393697	Fix errors in handling interrupt bits on context restore git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1540 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 21:52:35 +00:00
patacongo	bd0d170002	Enable signals git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1539 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 21:51:53 +00:00
patacongo	b5d1f70c77	Can't display interrupt glyph because LEDs are interrupt driven git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1538 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 21:51:23 +00:00
patacongo	3b78e0a8f3	Fix more overflow/truncation problems in timer setups git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1537 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 18:50:44 +00:00
patacongo	01a50c427d	upate git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1536 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 14:26:27 +00:00
patacongo	53a5ea9459	cosmetic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1535 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 14:24:48 +00:00
patacongo	adf3ac8b7b	Increase ostest stack size git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1534 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 14:23:49 +00:00
patacongo	2bd33dbe70	Fix signal-related compilation errors git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1533 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 14:23:20 +00:00
patacongo	5640825b3f	Add up_puts git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1532 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 14:22:57 +00:00
patacongo	144644600e	Fixe ez80 serial setup git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1531 42af7a65-404d-4744-a932-0658087f49c3	2009-02-28 01:27:30 +00:00
patacongo	ea4e5d904f	Bring all eZ80 config files to same level git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1530 42af7a65-404d-4744-a932-0658087f49c3	2009-02-26 03:56:35 +00:00
patacongo	371881444e	Fix for overflow in calculation of baud divisor git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1529 42af7a65-404d-4744-a932-0658087f49c3	2009-02-26 02:07:53 +00:00
patacongo	ec2e5163af	cosmetic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1528 42af7a65-404d-4744-a932-0658087f49c3	2009-02-26 02:07:06 +00:00
patacongo	4a55031b2d	Fix error in calculating baud rate generation value git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1527 42af7a65-404d-4744-a932-0658087f49c3	2009-02-26 00:47:30 +00:00
patacongo	99c50ff0a5	Misc changes to match output from F91 project git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1526 42af7a65-404d-4744-a932-0658087f49c3	2009-02-26 00:44:12 +00:00
patacongo	428f7a08f5	Console needs to be enabled git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1525 42af7a65-404d-4744-a932-0658087f49c3	2009-02-26 00:41:21 +00:00
patacongo	54434c99ba	Fix error in calculating baud rate generation value git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1524 42af7a65-404d-4744-a932-0658087f49c3	2009-02-26 00:40:44 +00:00
patacongo	710ba7a8f0	update git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1523 42af7a65-404d-4744-a932-0658087f49c3	2009-02-25 01:53:38 +00:00
patacongo	94d4825055	update git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1522 42af7a65-404d-4744-a932-0658087f49c3	2009-02-24 01:28:17 +00:00
patacongo	ef0f434bb1	update git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1521 42af7a65-404d-4744-a932-0658087f49c3	2009-02-21 00:49:52 +00:00
patacongo	dad4547c71	Fix some stack sizes git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1520 42af7a65-404d-4744-a932-0658087f49c3	2009-02-21 00:13:23 +00:00
patacongo	1122bafccd	Add support for M16C buttons and LEDs git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1519 42af7a65-404d-4744-a932-0658087f49c3	2009-02-20 00:59:18 +00:00
patacongo	dd080051f5	Improve console configuration settings git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1518 42af7a65-404d-4744-a932-0658087f49c3	2009-02-19 02:26:04 +00:00
patacongo	6d307da147	Add basic LCD support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1517 42af7a65-404d-4744-a932-0658087f49c3	2009-02-19 02:08:36 +00:00
patacongo	35fe68c3d8	Use the lowconsole driver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1516 42af7a65-404d-4744-a932-0658087f49c3	2009-02-19 00:07:46 +00:00
patacongo	f1cd38a52f	Remove all references to serial git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1515 42af7a65-404d-4744-a932-0658087f49c3	2009-02-19 00:07:23 +00:00
patacongo	7ba1fb4daf	add framework for an LCD console. git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1514 42af7a65-404d-4744-a932-0658087f49c3	2009-02-19 00:06:38 +00:00
patacongo	6286423da8	cosmetic renaming git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1513 42af7a65-404d-4744-a932-0658087f49c3	2009-02-18 12:02:22 +00:00
patacongo	b1298c8c4c	Add support for boards with no serial ports git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1512 42af7a65-404d-4744-a932-0658087f49c3	2009-02-18 12:00:36 +00:00
patacongo	729525f67c	Hook in low-level UART init git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1511 42af7a65-404d-4744-a932-0658087f49c3	2009-02-18 03:22:17 +00:00
patacongo	39d7ac0d2b	Complete coding of M16C port git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1510 42af7a65-404d-4744-a932-0658087f49c3	2009-02-17 02:53:24 +00:00
patacongo	f4aceff482	Add M16C serial driver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1509 42af7a65-404d-4744-a932-0658087f49c3	2009-02-17 02:43:47 +00:00
patacongo	32fddbe1d2	Add low level UART support for M16C git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1508 42af7a65-404d-4744-a932-0658087f49c3	2009-02-15 23:28:10 +00:00
patacongo	59f461ac30	Added support for M16C small memory model git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1507 42af7a65-404d-4744-a932-0658087f49c3	2009-02-15 19:10:29 +00:00
patacongo	4880ca3f30	Add support for nestable interrupts git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1506 42af7a65-404d-4744-a932-0658087f49c3	2009-02-15 19:09:28 +00:00
patacongo	5b7fcc12a2	Add support for M16C timer interrupt git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1505 42af7a65-404d-4744-a932-0658087f49c3	2009-02-15 18:29:40 +00:00
patacongo	a06bc37358	cosmet git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1504 42af7a65-404d-4744-a932-0658087f49c3	2009-02-15 18:29:14 +00:00
patacongo	f73bfa5307	Add M16C register dump logic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1503 42af7a65-404d-4744-a932-0658087f49c3	2009-02-15 01:43:01 +00:00
patacongo	87dd780ff5	Need to export symbols git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1502 42af7a65-404d-4744-a932-0658087f49c3	2009-02-15 00:27:24 +00:00
patacongo	ede5f9792e	Add interrupt initialization logic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1501 42af7a65-404d-4744-a932-0658087f49c3	2009-02-15 00:27:06 +00:00
patacongo	1b8bc0682a	ez80Acclaim fixes from Kevin Franzen git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1500 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 23:57:26 +00:00
patacongo	4a0b4eb68c	Change updates git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1499 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 22:12:57 +00:00
patacongo	6a31e650e8	Use MAX_INT, not 0x7fffffff. On some machines int is 16-bits git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1498 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 22:11:58 +00:00
patacongo	7127caf67d	Back out last change git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1497 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 22:11:22 +00:00
patacongo	c9cdb5b1a1	Add M16C interrupt/context switch logic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1496 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 22:10:30 +00:00
patacongo	dc8f09cc34	Need separate limits.h files to support M16Climits.h git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1495 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 22:09:46 +00:00
patacongo	8a66212a6d	cosmetic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1494 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 01:56:40 +00:00
patacongo	364e4ac100	Add FAR to sigdeliver_t git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1493 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 01:11:14 +00:00
patacongo	db5679f13d	Add task register intialization logic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1492 42af7a65-404d-4744-a932-0658087f49c3	2009-02-14 01:08:39 +00:00
patacongo	bf31ea1816	Fix syntax errors git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1491 42af7a65-404d-4744-a932-0658087f49c3	2009-02-13 01:01:16 +00:00
patacongo	7d2247f00c	Fix assembly errors git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1490 42af7a65-404d-4744-a932-0658087f49c3	2009-02-13 00:56:23 +00:00
patacongo	0fcb411368	Move vectors to a separate file (more needed) git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1489 42af7a65-404d-4744-a932-0658087f49c3	2009-02-13 00:51:57 +00:00
patacongo	fa6eb024dc	Fix some assembly errors (some still exist) git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1488 42af7a65-404d-4744-a932-0658087f49c3	2009-02-12 00:30:33 +00:00
patacongo	313eedf9b5	signal deliver is specific to SoC git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1487 42af7a65-404d-4744-a932-0658087f49c3	2009-02-12 00:30:04 +00:00
patacongo	97bdcb112f	Adding M16C support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1486 42af7a65-404d-4744-a932-0658087f49c3	2009-02-09 00:11:22 +00:00
patacongo	24fea23151	Addng M16C logic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1485 42af7a65-404d-4744-a932-0658087f49c3	2009-02-08 22:55:04 +00:00
patacongo	9d1965ba08	M16C chip support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1484 42af7a65-404d-4744-a932-0658087f49c3	2009-02-08 22:52:08 +00:00
patacongo	2bf7ee9ad8	Add M16C info git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1483 42af7a65-404d-4744-a932-0658087f49c3	2009-02-08 20:30:10 +00:00
patacongo	b863621984	Improve build instructions git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1482 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 22:33:24 +00:00
patacongo	2ec8813b98	Add framework for MC16C buttons git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1480 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 20:43:22 +00:00
patacongo	37328232b7	Add instructions for building toolchain git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1479 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 20:43:04 +00:00
patacongo	48ee466699	Renesas M16C support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1478 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 15:24:32 +00:00
patacongo	073914c5bc	Renesas M16C support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1477 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 15:17:58 +00:00
patacongo	e0dd51f808	Renesas M16C Support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1476 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 15:16:55 +00:00
patacongo	a87b9791d1	Prep for 0.4.1 release git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1475 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 03:23:50 +00:00
patacongo	f5ed3ae106	X11 stuff doesn't build correctly on Cygwin git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1474 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 03:10:03 +00:00
patacongo	196260a8c5	Fix compilation problems with eZ80 targets git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1473 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 02:46:14 +00:00
patacongo	88bb6cca07	Fixes for z16f compile git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1472 42af7a65-404d-4744-a932-0658087f49c3	2009-02-07 02:07:42 +00:00
patacongo	0fc51ed9e2	nettest config git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1471 42af7a65-404d-4744-a932-0658087f49c3	2009-01-21 22:24:52 +00:00
patacongo	e4e5c620be	update git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1470 42af7a65-404d-4744-a932-0658087f49c3	2009-01-21 21:56:52 +00:00
patacongo	c20aaf755a	update project git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1469 42af7a65-404d-4744-a932-0658087f49c3	2009-01-20 14:01:17 +00:00
patacongo	4fb8a871ab	Add support for gcc 2.4.2 toolchain git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1466 42af7a65-404d-4744-a932-0658087f49c3	2009-01-06 14:34:33 +00:00
patacongo	79dc0fd773	bad hyperlink git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1455 42af7a65-404d-4744-a932-0658087f49c3	2009-01-04 16:09:38 +00:00
patacongo	a6c528bcd1	More fixes for picky ZDS archiver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1454 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 19:02:28 +00:00
patacongo	6930fc4262	Name changes for ZDS archiver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1453 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 18:57:05 +00:00
patacongo	bb45db5b2e	Filename changes needed by ZDS archiver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1452 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 18:33:36 +00:00
patacongo	703a3b1e88	Misc fixes for ZDS compile/build git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1451 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 18:01:25 +00:00
patacongo	a51a122fb8	Add eZ80F91 EMAC driver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1450 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 16:57:52 +00:00
patacongo	1a3d9672fe	Fix compile error only noted with ZDS git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1449 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 16:55:51 +00:00
patacongo	1d66317ea8	Eliminate warnings with ZDS git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1448 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 16:55:31 +00:00
patacongo	23dbbcdcdf	Add Am79c874 register definitions git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1447 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 13:56:07 +00:00
patacongo	1e94c9f7e2	Add MDC clock divisors git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1446 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 02:20:03 +00:00
patacongo	88d4e7e0df	MII definitions needed by ez80 EMAC driver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1445 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 02:19:07 +00:00
patacongo	74e239317c	cosmetic git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1444 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 02:18:34 +00:00
patacongo	56eac423c4	fix typo in comments git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1443 42af7a65-404d-4744-a932-0658087f49c3	2008-12-12 02:17:15 +00:00
patacongo	6c1cdc5213	Move EMAC definitions to a separate file git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1442 42af7a65-404d-4744-a932-0658087f49c3	2008-12-11 02:30:58 +00:00
patacongo	4b88c289d7	Move some memory map definitions to a common file git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1441 42af7a65-404d-4744-a932-0658087f49c3	2008-12-11 02:30:37 +00:00
patacongo	721696a066	Add more EMAC register definitions git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1440 42af7a65-404d-4744-a932-0658087f49c3	2008-12-09 01:07:11 +00:00
patacongo	c0dfcb5084	Need to use cygpath consistently for compilation in subdirectories git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1439 42af7a65-404d-4744-a932-0658087f49c3	2008-12-08 21:21:46 +00:00
patacongo	0a7fb63270	fix CC case-ness git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1438 42af7a65-404d-4744-a932-0658087f49c3	2008-12-08 20:45:26 +00:00
patacongo	09de1a3a52	Remove Olimex references git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1437 42af7a65-404d-4744-a932-0658087f49c3	2008-12-08 18:54:39 +00:00
patacongo	c0f9c73868	ez80f910200zco port git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1436 42af7a65-404d-4744-a932-0658087f49c3	2008-12-08 18:44:43 +00:00
patacongo	ee5fbae36e	Remove extra line git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1435 42af7a65-404d-4744-a932-0658087f49c3	2008-12-08 17:00:16 +00:00
patacongo	b933b1cad6	Add LED support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1434 42af7a65-404d-4744-a932-0658087f49c3	2008-12-08 16:59:46 +00:00
patacongo	2b8ff49fe0	Add button support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1433 42af7a65-404d-4744-a932-0658087f49c3	2008-12-08 16:58:18 +00:00
patacongo	922ecbf5aa	Fix errors in prototypes git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1432 42af7a65-404d-4744-a932-0658087f49c3	2008-12-07 18:22:36 +00:00
patacongo	b6e4104733	Several syntax errors git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1431 42af7a65-404d-4744-a932-0658087f49c3	2008-12-07 17:36:04 +00:00
patacongo	72c61eeef8	NX needs to be disabled git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1430 42af7a65-404d-4744-a932-0658087f49c3	2008-12-07 17:35:04 +00:00
patacongo	a652c323e7	Add ez80f910200zco board config git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1429 42af7a65-404d-4744-a932-0658087f49c3	2008-12-07 15:46:06 +00:00
patacongo	764606c852	Config for ez80f910200zco board git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1428 42af7a65-404d-4744-a932-0658087f49c3	2008-12-07 15:44:56 +00:00
				`@@ -0,0 +1 @@`
				`This directory contains header files specific to the M16c architectures.`