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riscv/riscv_exception_common.S: Allow chips to define the exception

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section.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit is contained in:
Abdelatif Guettouche
2022-04-07 20:34:55 +02:00
committed by Xiang Xiao
parent 875dd46207
commit e8134a8b57
1 changed files with 7 additions and 1 deletions
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arch/risc-v/src/common/riscv_exception_common.S
+7 -1
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@@ -49,6 +49,12 @@
# endif
#endif
/* Provide a default section for the exeception handler. */
#ifndef EXCEPTION_SECTION
# define EXCEPTION_SECTION .text
#endif
/****************************************************************************
* Public Symbols
****************************************************************************/
@@ -62,7 +68,7 @@
*
****************************************************************************/
.section .text
.section EXCEPTION_SECTION
.global exception_common
.align 8