riscv/riscv_exception_commin.S: Don't call riscv_hartid in single core

mode.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>

arch/risc-v/src/common/riscv_exception_common.S

@@ -95,7 +95,11 @@ exception_common:
   /* Offset to hartid */
 
   mv         s0, a0               /* save cause */
+#ifdef CONFIG_SMP
   jal        x1, riscv_mhartid    /* get hartid */
+#else
+  li         a0, 0
+#endif
 
   /* Switch to interrupt stack */