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https://github.com/apache/nuttx.git
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arch/xtensa/esp32[-s2|-s3]: Add RTC I2C support
Add RTC I2C support for esp32[-s2|-s3] Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
This commit is contained in:
committed by
Matteo Golin
parent
3637aea9ec
commit
743b694560
@@ -480,9 +480,16 @@ config ESP32S2_I2C1
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select ESP32S2_I2C
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select I2C
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config ESP32S2_RTC_I2C
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bool "RTC I2C"
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default n
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select ESP32S2_I2C
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select I2C
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config ESP32S2_I2C_PERIPH_MASTER_MODE
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bool
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depends on (ESP32S2_I2C0_MASTER_MODE || ESP32S2_I2C1_MASTER_MODE)
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depends on (ESP32S2_I2C0_MASTER_MODE || ESP32S2_I2C1_MASTER_MODE || ESP32S2_RTC_I2C)
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default y if ESP32S2_RTC_I2C
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default n
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select ESPRESSIF_I2C_PERIPH_MASTER_MODE
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@@ -839,6 +846,44 @@ config ESP32S2_I2C1_SDAPIN
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endif # ESPRESSIF_I2C1
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if ESP32S2_RTC_I2C
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choice
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prompt "RTC I2C SCL Pin"
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default ESP32S2_RTC_I2C_SCLPIN_2
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config ESP32S2_RTC_I2C_SCLPIN_0
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bool "Use GPIO0 as RTC I2C SCL Pin"
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config ESP32S2_RTC_I2C_SCLPIN_2
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bool "Use GPIO2 as RTC I2C SCL Pin"
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endchoice # RTC I2C SCL Pin
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config ESP32S2_RTC_I2C_SCLPIN
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int
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default 0 if ESP32S2_RTC_I2C_SCLPIN_0
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default 2 if ESP32S2_RTC_I2C_SCLPIN_2
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choice
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prompt "RTC I2C SDA Pin"
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default ESP32S2_RTC_I2C_SDAPIN_3
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config ESP32S2_RTC_I2C_SDAPIN_1
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bool "Use GPIO1 as RTC I2C SDA Pin"
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config ESP32S2_RTC_I2C_SDAPIN_3
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bool "Use GPIO3 as RTC I2C SDA Pin"
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endchoice # RTC I2C SDA Pin
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config ESP32S2_RTC_I2C_SDAPIN
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int
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default 1 if ESP32S2_RTC_I2C_SDAPIN_1
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default 3 if ESP32S2_RTC_I2C_SDAPIN_3
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endif # ESP32S2_RTC_I2C
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config ESP32S2_I2CTIMEOSEC
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int "Timeout seconds"
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default 0
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@@ -133,7 +133,7 @@ endif
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ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
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ifndef ESP_HAL_3RDPARTY_VERSION
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ESP_HAL_3RDPARTY_VERSION = b6fa6c9098318007a61acc7c9f0f180443bb80c2
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ESP_HAL_3RDPARTY_VERSION = 8e7f6a123659cb96f2240575b950748afc9b3dc0
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endif
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ifndef ESP_HAL_3RDPARTY_URL
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@@ -56,6 +56,11 @@
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#include "hardware/esp32s2_soc.h"
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#include "hardware/esp32s2_system.h"
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#ifdef CONFIG_ESP32S2_RTC_I2C
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# include "ulp_riscv.h"
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# include "ulp_riscv_i2c.h"
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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@@ -197,6 +202,11 @@ struct esp32s2_i2c_config_s
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uint32_t sda_insig; /* I2C SDA input signal index */
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uint32_t sda_outsig; /* I2C SDA output signal index */
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#ifdef CONFIG_ESP32S2_RTC_I2C
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/* Pin and timing information configuration struct for RTC I2C */
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ulp_riscv_i2c_cfg_t *rtc_i2c_cfg;
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#endif
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};
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/* I2C Device Private Data */
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@@ -293,6 +303,13 @@ static const struct i2c_ops_s g_esp32s2_i2c_ops =
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#endif
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};
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#ifdef CONFIG_ESP32S2_RTC_I2C
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static const struct i2c_ops_s g_esp32s2_rtc_i2c_ops =
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{
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.transfer = NULL,
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};
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#endif
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/* I2C device structures */
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#ifdef CONFIG_ESP32S2_I2C0
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@@ -367,6 +384,32 @@ static struct esp32s2_i2c_priv_s g_esp32s2_i2c1_priv =
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};
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#endif /* CONFIG_ESP32S2_I2C1 */
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#ifdef CONFIG_ESP32S2_RTC_I2C
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ulp_riscv_i2c_cfg_t rtc_i2c_cfg = ULP_RISCV_I2C_DEFAULT_CONFIG();
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static const struct esp32s2_i2c_config_s g_esp32s2_rtc_i2c_config =
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{
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.scl_pin = CONFIG_ESP32S2_RTC_I2C_SCLPIN,
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.sda_pin = CONFIG_ESP32S2_RTC_I2C_SDAPIN,
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.rtc_i2c_cfg = &rtc_i2c_cfg,
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};
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static struct esp32s2_i2c_priv_s g_esp32s2_rtc_i2c_priv =
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{
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.ops = &g_esp32s2_rtc_i2c_ops,
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.id = ESP32S2_RTC_I2C,
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.config = &g_esp32s2_rtc_i2c_config,
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.refs = 0,
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.lock = NXMUTEX_INITIALIZER,
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.i2cstate = I2CSTATE_IDLE,
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.msgv = NULL,
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.msgid = 0,
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.bytes = 0,
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.ready_read = false,
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};
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#endif /* CONFIG_ESP32S2_RTC_I2C */
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/* Trace events strings */
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#ifdef CONFIG_I2C_TRACE
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@@ -699,57 +742,69 @@ static void i2c_init_clock(struct esp32s2_i2c_priv_s *priv,
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static void i2c_init(struct esp32s2_i2c_priv_s *priv)
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{
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const struct esp32s2_i2c_config_s *config = priv->config;
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if (priv->id != ESP32S2_RTC_I2C)
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{
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esp32s2_gpiowrite(config->scl_pin, 1);
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esp32s2_configgpio(config->scl_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
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esp32s2_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
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esp32s2_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
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esp32s2_gpiowrite(config->scl_pin, 1);
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esp32s2_configgpio(config->scl_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
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esp32s2_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
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esp32s2_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
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esp32s2_gpiowrite(config->sda_pin, 1);
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esp32s2_configgpio(config->sda_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
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esp32s2_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
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esp32s2_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
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esp32s2_gpiowrite(config->sda_pin, 1);
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esp32s2_configgpio(config->sda_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
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esp32s2_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
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esp32s2_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
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/* Enable I2C hardware */
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/* Enable I2C hardware */
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modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, config->clk_bit);
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modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
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modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, config->clk_bit);
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modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
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/* Disable I2C interrupts */
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/* Disable I2C interrupts */
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i2c_intr_disable(priv);
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i2c_intr_disable(priv);
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/* Initialize I2C Master */
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/* Initialize I2C Master */
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putreg32(I2C_MS_MODE | I2C_CLK_EN |
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I2C_SCL_FORCE_OUT | I2C_SDA_FORCE_OUT,
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I2C_CTR_REG(priv->id));
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putreg32(I2C_MS_MODE | I2C_CLK_EN | I2C_SCL_FORCE_OUT | I2C_SDA_FORCE_OUT,
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I2C_CTR_REG(priv->id));
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/* Set FIFO mode */
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/* Set FIFO mode */
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modifyreg32(I2C_FIFO_CONF_REG(priv->id), I2C_NONFIFO_EN, 0);
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modifyreg32(I2C_FIFO_CONF_REG(priv->id), I2C_NONFIFO_EN, 0);
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/* Ensure I2C data mode is set to MSB */
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/* Ensure I2C data mode is set to MSB */
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modifyreg32(I2C_CTR_REG(priv->id),
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I2C_TX_LSB_FIRST | I2C_RX_LSB_FIRST, 0);
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modifyreg32(I2C_CTR_REG(priv->id), I2C_TX_LSB_FIRST | I2C_RX_LSB_FIRST, 0);
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i2c_reset_fifo(priv);
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i2c_reset_fifo(priv);
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/* Configure the hardware filter function */
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/* Configure the hardware filter function */
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putreg32(I2C_SCL_FILTER_EN |
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VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SCL_FILTER_THRES),
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I2C_SCL_FILTER_CFG_REG(priv->id));
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putreg32(I2C_SDA_FILTER_EN |
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VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SDA_FILTER_THRES),
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I2C_SDA_FILTER_CFG_REG(priv->id));
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putreg32(I2C_SCL_FILTER_EN |
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VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SCL_FILTER_THRES),
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I2C_SCL_FILTER_CFG_REG(priv->id));
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putreg32(I2C_SDA_FILTER_EN |
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VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SDA_FILTER_THRES),
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I2C_SDA_FILTER_CFG_REG(priv->id));
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/* Set I2C source clock */
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/* Set I2C source clock */
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modifyreg32(I2C_CTR_REG(priv->id), 0, I2C_REF_ALWAYS_ON);
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modifyreg32(I2C_CTR_REG(priv->id), 0, I2C_REF_ALWAYS_ON);
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/* Configure I2C bus frequency */
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/* Configure I2C bus frequency */
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i2c_init_clock(priv, config->clk_freq);
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i2c_init_clock(priv, config->clk_freq);
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}
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#ifdef CONFIG_ESP32S2_RTC_I2C
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else
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{
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priv->config->rtc_i2c_cfg->i2c_pin_cfg.scl_io_num = config->scl_pin;
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priv->config->rtc_i2c_cfg->i2c_pin_cfg.sda_io_num = config->sda_pin;
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ulp_riscv_i2c_master_init(priv->config->rtc_i2c_cfg);
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}
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#endif
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}
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/****************************************************************************
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@@ -1521,6 +1576,11 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
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case ESP32S2_I2C1:
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priv = &g_esp32s2_i2c1_priv;
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break;
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#endif
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#ifdef CONFIG_ESP32S2_RTC_I2C
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case ESP32S2_RTC_I2C:
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priv = &g_esp32s2_rtc_i2c_priv;
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break;
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#endif
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default:
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return NULL;
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@@ -1534,32 +1594,36 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
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}
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#ifndef CONFIG_I2C_POLLED
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config = priv->config;
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/* Set up to receive peripheral interrupts on the current CPU */
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priv->cpuint = esp32s2_setup_irq(config->periph, 1, ESP32S2_CPUINT_LEVEL);
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if (priv->cpuint < 0)
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if (priv->id != ESP32S2_RTC_I2C)
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{
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/* Failed to allocate a CPU interrupt of this type */
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config = priv->config;
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priv->refs--;
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nxmutex_unlock(&priv->lock);
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/* Set up to receive peripheral interrupts on the current CPU */
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return NULL;
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priv->cpuint = esp32s2_setup_irq(config->periph,
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1, ESP32S2_CPUINT_LEVEL);
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if (priv->cpuint < 0)
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{
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/* Failed to allocate a CPU interrupt of this type */
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priv->refs--;
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nxmutex_unlock(&priv->lock);
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return NULL;
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}
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ret = irq_attach(config->irq, i2c_irq, priv);
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if (ret != OK)
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{
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esp32s2_teardown_irq(config->periph, priv->cpuint);
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priv->refs--;
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nxmutex_unlock(&priv->lock);
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return NULL;
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}
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up_enable_irq(config->irq);
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}
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ret = irq_attach(config->irq, i2c_irq, priv);
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if (ret != OK)
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{
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esp32s2_teardown_irq(config->periph, priv->cpuint);
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priv->refs--;
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nxmutex_unlock(&priv->lock);
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return NULL;
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}
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up_enable_irq(config->irq);
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#endif
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i2c_init(priv);
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@@ -1602,13 +1666,16 @@ int esp32s2_i2cbus_uninitialize(struct i2c_master_s *dev)
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return OK;
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}
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if (priv->id != ESP32S2_RTC_I2C)
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{
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#ifndef CONFIG_I2C_POLLED
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up_disable_irq(priv->config->irq);
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esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
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up_disable_irq(priv->config->irq);
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esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
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#endif
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i2c_deinit(priv);
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nxmutex_unlock(&priv->lock);
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i2c_deinit(priv);
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nxmutex_unlock(&priv->lock);
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}
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return OK;
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}
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@@ -47,6 +47,8 @@
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# define ESP32S2_I2C1 1
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#endif
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#define ESP32S2_RTC_I2C 2
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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@@ -170,6 +170,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)pcnt_hal.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rtc_io_hal.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sdm_hal.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)i2s_hal.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sha_hal.c
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@@ -195,6 +196,8 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common$(DELIM)ulp_adc.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv_lock.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv_i2c.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)io_mux.c
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# Bootloader files
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c
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@@ -753,9 +753,16 @@ config ESP32S3_I2C1
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select ESP32S3_I2C
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select I2C
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config ESP32S3_RTC_I2C
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bool "RTC I2C"
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default n
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select ESP32S3_I2C
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select I2C
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config ESP32S3_I2C_PERIPH_MASTER_MODE
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bool
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depends on (ESP32S3_I2C0_MASTER_MODE || ESP32S3_I2C1_MASTER_MODE)
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depends on (ESP32S3_I2C0_MASTER_MODE || ESP32S3_I2C1_MASTER_MODE || ESP32S3_RTC_I2C)
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default y if ESP32S3_RTC_I2C
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default n
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select ESPRESSIF_I2C_PERIPH_MASTER_MODE
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@@ -1481,6 +1488,45 @@ config ESP32S3_I2C1_SDAPIN
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endif # ESP32S3_I2C1
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||||
|
||||
if ESP32S3_RTC_I2C
|
||||
|
||||
choice
|
||||
prompt "RTC I2C SCL Pin"
|
||||
default ESP32S3_RTC_I2C_SCLPIN_0 if ESP32S3_I2C0
|
||||
default ESP32S3_RTC_I2C_SCLPIN_2 if !ESP32S3_I2C0
|
||||
|
||||
config ESP32S3_RTC_I2C_SCLPIN_0
|
||||
bool "Use GPIO0 as RTC I2C SCL Pin"
|
||||
|
||||
config ESP32S3_RTC_I2C_SCLPIN_2
|
||||
bool "Use GPIO2 as RTC I2C SCL Pin"
|
||||
|
||||
endchoice # RTC I2C SCL Pin
|
||||
|
||||
config ESP32S3_RTC_I2C_SCLPIN
|
||||
int
|
||||
default 0 if ESP32S3_RTC_I2C_SCLPIN_0
|
||||
default 2 if ESP32S3_RTC_I2C_SCLPIN_2
|
||||
|
||||
choice
|
||||
prompt "RTC I2C SDA Pin"
|
||||
default ESP32S3_RTC_I2C_SDAPIN_3
|
||||
|
||||
config ESP32S3_RTC_I2C_SDAPIN_1
|
||||
bool "Use GPIO1 as RTC I2C SDA Pin"
|
||||
|
||||
config ESP32S3_RTC_I2C_SDAPIN_3
|
||||
bool "Use GPIO3 as RTC I2C SDA Pin"
|
||||
|
||||
endchoice # RTC I2C SDA Pin
|
||||
|
||||
config ESP32S3_RTC_I2C_SDAPIN
|
||||
int
|
||||
default 1 if ESP32S3_RTC_I2C_SDAPIN_1
|
||||
default 3 if ESP32S3_RTC_I2C_SDAPIN_3
|
||||
|
||||
endif # ESP32S3_RTC_I2C
|
||||
|
||||
config ESP32S3_I2CTIMEOSEC
|
||||
int "Timeout seconds"
|
||||
default 0
|
||||
|
||||
@@ -207,7 +207,7 @@ endif
|
||||
|
||||
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
|
||||
ifndef ESP_HAL_3RDPARTY_VERSION
|
||||
ESP_HAL_3RDPARTY_VERSION = b6fa6c9098318007a61acc7c9f0f180443bb80c2
|
||||
ESP_HAL_3RDPARTY_VERSION = 8e7f6a123659cb96f2240575b950748afc9b3dc0
|
||||
endif
|
||||
|
||||
ifndef ESP_HAL_3RDPARTY_URL
|
||||
|
||||
@@ -56,6 +56,11 @@
|
||||
#include "hardware/esp32s3_soc.h"
|
||||
#include "hardware/esp32s3_system.h"
|
||||
|
||||
#ifdef CONFIG_ESP32S3_RTC_I2C
|
||||
# include "ulp_riscv.h"
|
||||
# include "ulp_riscv_i2c.h"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
@@ -190,6 +195,11 @@ struct esp32s3_i2c_config_s
|
||||
|
||||
uint32_t sda_insig; /* I2C SDA input signal index */
|
||||
uint32_t sda_outsig; /* I2C SDA output signal index */
|
||||
#ifdef CONFIG_ESP32S3_RTC_I2C
|
||||
/* Pin and timing information configuration struct for RTC I2C */
|
||||
|
||||
ulp_riscv_i2c_cfg_t *rtc_i2c_cfg;
|
||||
#endif
|
||||
};
|
||||
|
||||
/* I2C Device Private Data */
|
||||
@@ -287,6 +297,13 @@ static const struct i2c_ops_s g_esp32s3_i2c_ops =
|
||||
#endif
|
||||
};
|
||||
|
||||
#ifdef CONFIG_ESP32S3_RTC_I2C
|
||||
static const struct i2c_ops_s g_esp32s3_rtc_i2c_ops =
|
||||
{
|
||||
.transfer = NULL,
|
||||
};
|
||||
#endif
|
||||
|
||||
/* I2C device structures */
|
||||
|
||||
#ifdef CONFIG_ESP32S3_I2C0
|
||||
@@ -361,6 +378,32 @@ static struct esp32s3_i2c_priv_s g_esp32s3_i2c1_priv =
|
||||
};
|
||||
#endif /* CONFIG_ESP32S3_I2C1 */
|
||||
|
||||
#ifdef CONFIG_ESP32S3_RTC_I2C
|
||||
|
||||
ulp_riscv_i2c_cfg_t rtc_i2c_cfg = ULP_RISCV_I2C_DEFAULT_CONFIG();
|
||||
|
||||
static const struct esp32s3_i2c_config_s g_esp32s3_rtc_i2c_config =
|
||||
{
|
||||
.scl_pin = CONFIG_ESP32S3_RTC_I2C_SCLPIN,
|
||||
.sda_pin = CONFIG_ESP32S3_RTC_I2C_SDAPIN,
|
||||
.rtc_i2c_cfg = &rtc_i2c_cfg,
|
||||
};
|
||||
|
||||
static struct esp32s3_i2c_priv_s g_esp32s3_rtc_i2c_priv =
|
||||
{
|
||||
.ops = &g_esp32s3_rtc_i2c_ops,
|
||||
.id = ESP32S3_RTC_I2C,
|
||||
.config = &g_esp32s3_rtc_i2c_config,
|
||||
.refs = 0,
|
||||
.lock = NXMUTEX_INITIALIZER,
|
||||
.i2cstate = I2CSTATE_IDLE,
|
||||
.msgv = NULL,
|
||||
.msgid = 0,
|
||||
.bytes = 0,
|
||||
.ready_read = false,
|
||||
};
|
||||
#endif /* CONFIG_ESP32S3_RTC_I2C */
|
||||
|
||||
/* Trace events strings */
|
||||
|
||||
#ifdef CONFIG_I2C_TRACE
|
||||
@@ -731,59 +774,71 @@ static void i2c_init_clock(struct esp32s3_i2c_priv_s *priv,
|
||||
static void i2c_init(struct esp32s3_i2c_priv_s *priv)
|
||||
{
|
||||
const struct esp32s3_i2c_config_s *config = priv->config;
|
||||
if (priv->id != ESP32S3_RTC_I2C)
|
||||
{
|
||||
esp32s3_gpiowrite(config->scl_pin, 1);
|
||||
esp32s3_configgpio(config->scl_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
|
||||
esp32s3_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
|
||||
esp32s3_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
|
||||
|
||||
esp32s3_gpiowrite(config->scl_pin, 1);
|
||||
esp32s3_configgpio(config->scl_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
|
||||
esp32s3_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
|
||||
esp32s3_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
|
||||
esp32s3_gpiowrite(config->sda_pin, 1);
|
||||
esp32s3_configgpio(config->sda_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
|
||||
esp32s3_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
|
||||
esp32s3_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
|
||||
|
||||
esp32s3_gpiowrite(config->sda_pin, 1);
|
||||
esp32s3_configgpio(config->sda_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
|
||||
esp32s3_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
|
||||
esp32s3_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
|
||||
/* Enable I2C hardware */
|
||||
|
||||
/* Enable I2C hardware */
|
||||
modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, config->clk_bit);
|
||||
modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
|
||||
|
||||
modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, config->clk_bit);
|
||||
modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
|
||||
/* Disable I2C interrupts */
|
||||
|
||||
/* Disable I2C interrupts */
|
||||
i2c_intr_disable(priv);
|
||||
|
||||
i2c_intr_disable(priv);
|
||||
/* Initialize I2C Master */
|
||||
|
||||
/* Initialize I2C Master */
|
||||
putreg32(I2C_MS_MODE | I2C_CLK_EN |
|
||||
I2C_SCL_FORCE_OUT | I2C_SDA_FORCE_OUT,
|
||||
I2C_CTR_REG(priv->id));
|
||||
|
||||
putreg32(I2C_MS_MODE | I2C_CLK_EN | I2C_SCL_FORCE_OUT | I2C_SDA_FORCE_OUT,
|
||||
I2C_CTR_REG(priv->id));
|
||||
/* Set FIFO mode */
|
||||
|
||||
/* Set FIFO mode */
|
||||
modifyreg32(I2C_FIFO_CONF_REG(priv->id), I2C_NONFIFO_EN, 0);
|
||||
|
||||
modifyreg32(I2C_FIFO_CONF_REG(priv->id), I2C_NONFIFO_EN, 0);
|
||||
/* Ensure I2C data mode is set to MSB */
|
||||
|
||||
/* Ensure I2C data mode is set to MSB */
|
||||
modifyreg32(I2C_CTR_REG(priv->id),
|
||||
I2C_TX_LSB_FIRST | I2C_RX_LSB_FIRST, 0);
|
||||
|
||||
modifyreg32(I2C_CTR_REG(priv->id), I2C_TX_LSB_FIRST | I2C_RX_LSB_FIRST, 0);
|
||||
i2c_reset_fifo(priv);
|
||||
|
||||
i2c_reset_fifo(priv);
|
||||
/* Configure the hardware filter function */
|
||||
|
||||
/* Configure the hardware filter function */
|
||||
putreg32(I2C_SCL_FILTER_EN | I2C_SDA_FILTER_EN |
|
||||
VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SCL_FILTER_THRES) |
|
||||
VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SDA_FILTER_THRES),
|
||||
I2C_FILTER_CFG_REG(priv->id));
|
||||
|
||||
putreg32(I2C_SCL_FILTER_EN | I2C_SDA_FILTER_EN |
|
||||
VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SCL_FILTER_THRES) |
|
||||
VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SDA_FILTER_THRES),
|
||||
I2C_FILTER_CFG_REG(priv->id));
|
||||
/* Set I2C source clock */
|
||||
|
||||
/* Set I2C source clock */
|
||||
modifyreg32(I2C_CLK_CONF_REG(priv->id), I2C_SCLK_SEL, 0);
|
||||
|
||||
modifyreg32(I2C_CLK_CONF_REG(priv->id), I2C_SCLK_SEL, 0);
|
||||
/* Configure I2C bus frequency */
|
||||
|
||||
/* Configure I2C bus frequency */
|
||||
i2c_init_clock(priv, config->clk_freq);
|
||||
|
||||
i2c_init_clock(priv, config->clk_freq);
|
||||
/* Update I2C configuration */
|
||||
|
||||
/* Update I2C configuration */
|
||||
|
||||
modifyreg32(I2C_CTR_REG(priv->id), 0, I2C_CONF_UPGATE);
|
||||
modifyreg32(I2C_CTR_REG(priv->id), 0, I2C_CONF_UPGATE);
|
||||
}
|
||||
#ifdef CONFIG_ESP32S3_RTC_I2C
|
||||
else
|
||||
{
|
||||
priv->config->rtc_i2c_cfg->i2c_pin_cfg.scl_io_num = config->scl_pin;
|
||||
priv->config->rtc_i2c_cfg->i2c_pin_cfg.sda_io_num = config->sda_pin;
|
||||
ulp_riscv_i2c_master_init(priv->config->rtc_i2c_cfg);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -1553,6 +1608,11 @@ struct i2c_master_s *esp32s3_i2cbus_initialize(int port)
|
||||
case ESP32S3_I2C1:
|
||||
priv = &g_esp32s3_i2c1_priv;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_ESP32S3_RTC_I2C
|
||||
case ESP32S3_RTC_I2C:
|
||||
priv = &g_esp32s3_rtc_i2c_priv;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return NULL;
|
||||
@@ -1566,34 +1626,37 @@ struct i2c_master_s *esp32s3_i2cbus_initialize(int port)
|
||||
}
|
||||
|
||||
#ifndef CONFIG_I2C_POLLED
|
||||
config = priv->config;
|
||||
|
||||
/* Set up to receive peripheral interrupts on the current CPU */
|
||||
|
||||
priv->cpu = this_cpu();
|
||||
priv->cpuint = esp32s3_setup_irq(priv->cpu, config->periph,
|
||||
1, ESP32S3_CPUINT_LEVEL);
|
||||
if (priv->cpuint < 0)
|
||||
if (priv->id != ESP32S3_RTC_I2C)
|
||||
{
|
||||
/* Failed to allocate a CPU interrupt of this type */
|
||||
config = priv->config;
|
||||
|
||||
priv->refs--;
|
||||
nxmutex_unlock(&priv->lock);
|
||||
/* Set up to receive peripheral interrupts on the current CPU */
|
||||
|
||||
return NULL;
|
||||
priv->cpu = this_cpu();
|
||||
priv->cpuint = esp32s3_setup_irq(priv->cpu, config->periph,
|
||||
1, ESP32S3_CPUINT_LEVEL);
|
||||
if (priv->cpuint < 0)
|
||||
{
|
||||
/* Failed to allocate a CPU interrupt of this type */
|
||||
|
||||
priv->refs--;
|
||||
nxmutex_unlock(&priv->lock);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
ret = irq_attach(config->irq, i2c_irq, priv);
|
||||
if (ret != OK)
|
||||
{
|
||||
esp32s3_teardown_irq(priv->cpu, config->periph, priv->cpuint);
|
||||
priv->refs--;
|
||||
|
||||
nxmutex_unlock(&priv->lock);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
up_enable_irq(config->irq);
|
||||
}
|
||||
|
||||
ret = irq_attach(config->irq, i2c_irq, priv);
|
||||
if (ret != OK)
|
||||
{
|
||||
esp32s3_teardown_irq(priv->cpu, config->periph, priv->cpuint);
|
||||
priv->refs--;
|
||||
|
||||
nxmutex_unlock(&priv->lock);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
up_enable_irq(config->irq);
|
||||
#endif
|
||||
|
||||
i2c_init(priv);
|
||||
@@ -1636,13 +1699,16 @@ int esp32s3_i2cbus_uninitialize(struct i2c_master_s *dev)
|
||||
return OK;
|
||||
}
|
||||
|
||||
if (priv->id != ESP32S3_RTC_I2C)
|
||||
{
|
||||
#ifndef CONFIG_I2C_POLLED
|
||||
up_disable_irq(priv->config->irq);
|
||||
esp32s3_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint);
|
||||
up_disable_irq(priv->config->irq);
|
||||
esp32s3_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint);
|
||||
#endif
|
||||
|
||||
i2c_deinit(priv);
|
||||
nxmutex_unlock(&priv->lock);
|
||||
i2c_deinit(priv);
|
||||
nxmutex_unlock(&priv->lock);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
@@ -47,6 +47,8 @@
|
||||
# define ESP32S3_I2C1 1
|
||||
#endif
|
||||
|
||||
#define ESP32S3_RTC_I2C 2
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
@@ -154,6 +154,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)pcnt_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rtc_io_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sdm_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)i2s_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sha_hal.c
|
||||
@@ -196,6 +197,8 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common$(DELIM)ulp_adc.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv_lock.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv_i2c.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)io_mux.c
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)rtc_io.c
|
||||
|
||||
|
||||
Reference in New Issue
Block a user