diff --git a/arch/xtensa/src/esp32s2/Kconfig b/arch/xtensa/src/esp32s2/Kconfig
index 1fcf2800a46..9354e39b984 100644
--- a/arch/xtensa/src/esp32s2/Kconfig
+++ b/arch/xtensa/src/esp32s2/Kconfig
@@ -480,9 +480,16 @@ config ESP32S2_I2C1
 	select ESP32S2_I2C
 	select I2C
 
+config ESP32S2_RTC_I2C
+	bool "RTC I2C"
+	default n
+	select ESP32S2_I2C
+	select I2C
+
 config ESP32S2_I2C_PERIPH_MASTER_MODE
 	bool
-	depends on (ESP32S2_I2C0_MASTER_MODE || ESP32S2_I2C1_MASTER_MODE)
+	depends on (ESP32S2_I2C0_MASTER_MODE || ESP32S2_I2C1_MASTER_MODE || ESP32S2_RTC_I2C)
+	default y if ESP32S2_RTC_I2C
 	default n
 	select ESPRESSIF_I2C_PERIPH_MASTER_MODE
 
@@ -839,6 +846,44 @@ config ESP32S2_I2C1_SDAPIN
 
 endif # ESPRESSIF_I2C1
 
+if ESP32S2_RTC_I2C
+
+choice
+	prompt "RTC I2C SCL Pin"
+	default ESP32S2_RTC_I2C_SCLPIN_2
+
+config ESP32S2_RTC_I2C_SCLPIN_0
+	bool "Use GPIO0 as RTC I2C SCL Pin"
+
+config ESP32S2_RTC_I2C_SCLPIN_2
+	bool "Use GPIO2 as RTC I2C SCL Pin"
+
+endchoice # RTC I2C SCL Pin
+
+config ESP32S2_RTC_I2C_SCLPIN
+	int
+	default 0 if ESP32S2_RTC_I2C_SCLPIN_0
+	default 2 if ESP32S2_RTC_I2C_SCLPIN_2
+
+choice
+	prompt "RTC I2C SDA Pin"
+	default ESP32S2_RTC_I2C_SDAPIN_3
+
+config ESP32S2_RTC_I2C_SDAPIN_1
+	bool "Use GPIO1 as RTC I2C SDA Pin"
+
+config ESP32S2_RTC_I2C_SDAPIN_3
+	bool "Use GPIO3 as RTC I2C SDA Pin"
+
+endchoice # RTC I2C SDA Pin
+
+config ESP32S2_RTC_I2C_SDAPIN
+	int
+	default 1 if ESP32S2_RTC_I2C_SDAPIN_1
+	default 3 if ESP32S2_RTC_I2C_SDAPIN_3
+
+endif # ESP32S2_RTC_I2C
+
 config ESP32S2_I2CTIMEOSEC
 	int "Timeout seconds"
 	default 0
diff --git a/arch/xtensa/src/esp32s2/Make.defs b/arch/xtensa/src/esp32s2/Make.defs
index 2b442a9b7cd..b8e29264374 100644
--- a/arch/xtensa/src/esp32s2/Make.defs
+++ b/arch/xtensa/src/esp32s2/Make.defs
@@ -133,7 +133,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO   = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = b6fa6c9098318007a61acc7c9f0f180443bb80c2
+	ESP_HAL_3RDPARTY_VERSION = 8e7f6a123659cb96f2240575b950748afc9b3dc0
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL
diff --git a/arch/xtensa/src/esp32s2/esp32s2_i2c.c b/arch/xtensa/src/esp32s2/esp32s2_i2c.c
index 8d2aab4a6b0..a20658394aa 100644
--- a/arch/xtensa/src/esp32s2/esp32s2_i2c.c
+++ b/arch/xtensa/src/esp32s2/esp32s2_i2c.c
@@ -56,6 +56,11 @@
 #include "hardware/esp32s2_soc.h"
 #include "hardware/esp32s2_system.h"
 
+#ifdef CONFIG_ESP32S2_RTC_I2C
+#  include "ulp_riscv.h"
+#  include "ulp_riscv_i2c.h"
+#endif
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -197,6 +202,11 @@ struct esp32s2_i2c_config_s
 
   uint32_t sda_insig;         /* I2C SDA input signal index */
   uint32_t sda_outsig;        /* I2C SDA output signal index */
+#ifdef CONFIG_ESP32S2_RTC_I2C
+  /* Pin and timing information configuration struct for RTC I2C */
+
+  ulp_riscv_i2c_cfg_t *rtc_i2c_cfg;
+#endif
 };
 
 /* I2C Device Private Data */
@@ -293,6 +303,13 @@ static const struct i2c_ops_s g_esp32s2_i2c_ops =
 #endif
 };
 
+#ifdef CONFIG_ESP32S2_RTC_I2C
+static const struct i2c_ops_s g_esp32s2_rtc_i2c_ops =
+{
+  .transfer = NULL,
+};
+#endif
+
 /* I2C device structures */
 
 #ifdef CONFIG_ESP32S2_I2C0
@@ -367,6 +384,32 @@ static struct esp32s2_i2c_priv_s g_esp32s2_i2c1_priv =
 };
 #endif /* CONFIG_ESP32S2_I2C1 */
 
+#ifdef CONFIG_ESP32S2_RTC_I2C
+
+ulp_riscv_i2c_cfg_t rtc_i2c_cfg = ULP_RISCV_I2C_DEFAULT_CONFIG();
+
+static const struct esp32s2_i2c_config_s g_esp32s2_rtc_i2c_config =
+{
+  .scl_pin     = CONFIG_ESP32S2_RTC_I2C_SCLPIN,
+  .sda_pin     = CONFIG_ESP32S2_RTC_I2C_SDAPIN,
+  .rtc_i2c_cfg = &rtc_i2c_cfg,
+};
+
+static struct esp32s2_i2c_priv_s g_esp32s2_rtc_i2c_priv =
+{
+  .ops        = &g_esp32s2_rtc_i2c_ops,
+  .id         = ESP32S2_RTC_I2C,
+  .config     = &g_esp32s2_rtc_i2c_config,
+  .refs       = 0,
+  .lock       = NXMUTEX_INITIALIZER,
+  .i2cstate   = I2CSTATE_IDLE,
+  .msgv       = NULL,
+  .msgid      = 0,
+  .bytes      = 0,
+  .ready_read = false,
+};
+#endif /* CONFIG_ESP32S2_RTC_I2C */
+
 /* Trace events strings */
 
 #ifdef CONFIG_I2C_TRACE
@@ -699,57 +742,69 @@ static void i2c_init_clock(struct esp32s2_i2c_priv_s *priv,
 static void i2c_init(struct esp32s2_i2c_priv_s *priv)
 {
   const struct esp32s2_i2c_config_s *config = priv->config;
+  if (priv->id != ESP32S2_RTC_I2C)
+    {
+      esp32s2_gpiowrite(config->scl_pin, 1);
+      esp32s2_configgpio(config->scl_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
+      esp32s2_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
+      esp32s2_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
 
-  esp32s2_gpiowrite(config->scl_pin, 1);
-  esp32s2_configgpio(config->scl_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
-  esp32s2_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
-  esp32s2_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
+      esp32s2_gpiowrite(config->sda_pin, 1);
+      esp32s2_configgpio(config->sda_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
+      esp32s2_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
+      esp32s2_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
 
-  esp32s2_gpiowrite(config->sda_pin, 1);
-  esp32s2_configgpio(config->sda_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
-  esp32s2_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
-  esp32s2_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
+      /* Enable I2C hardware */
 
-  /* Enable I2C hardware */
+      modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, config->clk_bit);
+      modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
 
-  modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, config->clk_bit);
-  modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
+      /* Disable I2C interrupts */
 
-  /* Disable I2C interrupts */
+      i2c_intr_disable(priv);
 
-  i2c_intr_disable(priv);
+      /* Initialize I2C Master */
 
-  /* Initialize I2C Master */
+      putreg32(I2C_MS_MODE | I2C_CLK_EN |
+               I2C_SCL_FORCE_OUT | I2C_SDA_FORCE_OUT,
+               I2C_CTR_REG(priv->id));
 
-  putreg32(I2C_MS_MODE | I2C_CLK_EN | I2C_SCL_FORCE_OUT | I2C_SDA_FORCE_OUT,
-           I2C_CTR_REG(priv->id));
+      /* Set FIFO mode */
 
-  /* Set FIFO mode */
+      modifyreg32(I2C_FIFO_CONF_REG(priv->id), I2C_NONFIFO_EN, 0);
 
-  modifyreg32(I2C_FIFO_CONF_REG(priv->id), I2C_NONFIFO_EN, 0);
+      /* Ensure I2C data mode is set to MSB */
 
-  /* Ensure I2C data mode is set to MSB */
+      modifyreg32(I2C_CTR_REG(priv->id),
+                  I2C_TX_LSB_FIRST | I2C_RX_LSB_FIRST, 0);
 
-  modifyreg32(I2C_CTR_REG(priv->id), I2C_TX_LSB_FIRST | I2C_RX_LSB_FIRST, 0);
+      i2c_reset_fifo(priv);
 
-  i2c_reset_fifo(priv);
+      /* Configure the hardware filter function */
 
-  /* Configure the hardware filter function */
+      putreg32(I2C_SCL_FILTER_EN |
+                VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SCL_FILTER_THRES),
+              I2C_SCL_FILTER_CFG_REG(priv->id));
+      putreg32(I2C_SDA_FILTER_EN |
+                VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SDA_FILTER_THRES),
+              I2C_SDA_FILTER_CFG_REG(priv->id));
 
-  putreg32(I2C_SCL_FILTER_EN |
-             VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SCL_FILTER_THRES),
-           I2C_SCL_FILTER_CFG_REG(priv->id));
-  putreg32(I2C_SDA_FILTER_EN |
-             VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SDA_FILTER_THRES),
-           I2C_SDA_FILTER_CFG_REG(priv->id));
+      /* Set I2C source clock */
 
-  /* Set I2C source clock */
+      modifyreg32(I2C_CTR_REG(priv->id), 0, I2C_REF_ALWAYS_ON);
 
-  modifyreg32(I2C_CTR_REG(priv->id), 0, I2C_REF_ALWAYS_ON);
+      /* Configure I2C bus frequency */
 
-  /* Configure I2C bus frequency */
-
-  i2c_init_clock(priv, config->clk_freq);
+      i2c_init_clock(priv, config->clk_freq);
+    }
+#ifdef CONFIG_ESP32S2_RTC_I2C
+  else
+    {
+      priv->config->rtc_i2c_cfg->i2c_pin_cfg.scl_io_num = config->scl_pin;
+      priv->config->rtc_i2c_cfg->i2c_pin_cfg.sda_io_num = config->sda_pin;
+      ulp_riscv_i2c_master_init(priv->config->rtc_i2c_cfg);
+    }
+#endif
 }
 
 /****************************************************************************
@@ -1521,6 +1576,11 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
       case ESP32S2_I2C1:
         priv = &g_esp32s2_i2c1_priv;
         break;
+#endif
+#ifdef CONFIG_ESP32S2_RTC_I2C
+      case ESP32S2_RTC_I2C:
+        priv = &g_esp32s2_rtc_i2c_priv;
+        break;
 #endif
       default:
         return NULL;
@@ -1534,32 +1594,36 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
     }
 
 #ifndef CONFIG_I2C_POLLED
-  config = priv->config;
-
-  /* Set up to receive peripheral interrupts on the current CPU */
-
-  priv->cpuint = esp32s2_setup_irq(config->periph, 1, ESP32S2_CPUINT_LEVEL);
-  if (priv->cpuint < 0)
+  if (priv->id != ESP32S2_RTC_I2C)
     {
-      /* Failed to allocate a CPU interrupt of this type */
+      config = priv->config;
 
-      priv->refs--;
-      nxmutex_unlock(&priv->lock);
+      /* Set up to receive peripheral interrupts on the current CPU */
 
-      return NULL;
+      priv->cpuint = esp32s2_setup_irq(config->periph,
+                                       1, ESP32S2_CPUINT_LEVEL);
+      if (priv->cpuint < 0)
+        {
+          /* Failed to allocate a CPU interrupt of this type */
+
+          priv->refs--;
+          nxmutex_unlock(&priv->lock);
+
+          return NULL;
+        }
+
+      ret = irq_attach(config->irq, i2c_irq, priv);
+      if (ret != OK)
+        {
+          esp32s2_teardown_irq(config->periph, priv->cpuint);
+          priv->refs--;
+
+          nxmutex_unlock(&priv->lock);
+          return NULL;
+        }
+
+      up_enable_irq(config->irq);
     }
-
-  ret = irq_attach(config->irq, i2c_irq, priv);
-  if (ret != OK)
-    {
-      esp32s2_teardown_irq(config->periph, priv->cpuint);
-      priv->refs--;
-
-      nxmutex_unlock(&priv->lock);
-      return NULL;
-    }
-
-  up_enable_irq(config->irq);
 #endif
 
   i2c_init(priv);
@@ -1602,13 +1666,16 @@ int esp32s2_i2cbus_uninitialize(struct i2c_master_s *dev)
       return OK;
     }
 
+  if (priv->id != ESP32S2_RTC_I2C)
+    {
 #ifndef CONFIG_I2C_POLLED
-  up_disable_irq(priv->config->irq);
-  esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
+      up_disable_irq(priv->config->irq);
+      esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
 #endif
 
-  i2c_deinit(priv);
-  nxmutex_unlock(&priv->lock);
+      i2c_deinit(priv);
+      nxmutex_unlock(&priv->lock);
+    }
 
   return OK;
 }
diff --git a/arch/xtensa/src/esp32s2/esp32s2_i2c.h b/arch/xtensa/src/esp32s2/esp32s2_i2c.h
index 4b83c33c076..797f44e2454 100644
--- a/arch/xtensa/src/esp32s2/esp32s2_i2c.h
+++ b/arch/xtensa/src/esp32s2/esp32s2_i2c.h
@@ -47,6 +47,8 @@
 #  define ESP32S2_I2C1 1
 #endif
 
+#define ESP32S2_RTC_I2C 2
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
diff --git a/arch/xtensa/src/esp32s2/hal.mk b/arch/xtensa/src/esp32s2/hal.mk
index 6afa2606437..b0093808a4e 100644
--- a/arch/xtensa/src/esp32s2/hal.mk
+++ b/arch/xtensa/src/esp32s2/hal.mk
@@ -170,6 +170,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)pcnt_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rtc_io_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sdm_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)i2s_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sha_hal.c
@@ -195,6 +196,8 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common$(DELIM)ulp_adc.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv_lock.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv_i2c.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)io_mux.c
 
 # Bootloader files
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c
diff --git a/arch/xtensa/src/esp32s3/Kconfig b/arch/xtensa/src/esp32s3/Kconfig
index 02585b3cc8a..8697b5d0163 100644
--- a/arch/xtensa/src/esp32s3/Kconfig
+++ b/arch/xtensa/src/esp32s3/Kconfig
@@ -753,9 +753,16 @@ config ESP32S3_I2C1
 	select ESP32S3_I2C
 	select I2C
 
+config ESP32S3_RTC_I2C
+	bool "RTC I2C"
+	default n
+	select ESP32S3_I2C
+	select I2C
+
 config ESP32S3_I2C_PERIPH_MASTER_MODE
 	bool
-	depends on (ESP32S3_I2C0_MASTER_MODE || ESP32S3_I2C1_MASTER_MODE)
+	depends on (ESP32S3_I2C0_MASTER_MODE || ESP32S3_I2C1_MASTER_MODE || ESP32S3_RTC_I2C)
+	default y if ESP32S3_RTC_I2C
 	default n
 	select ESPRESSIF_I2C_PERIPH_MASTER_MODE
 
@@ -1481,6 +1488,45 @@ config ESP32S3_I2C1_SDAPIN
 
 endif # ESP32S3_I2C1
 
+if ESP32S3_RTC_I2C
+
+choice
+	prompt "RTC I2C SCL Pin"
+	default ESP32S3_RTC_I2C_SCLPIN_0 if ESP32S3_I2C0
+	default ESP32S3_RTC_I2C_SCLPIN_2 if !ESP32S3_I2C0
+
+config ESP32S3_RTC_I2C_SCLPIN_0
+	bool "Use GPIO0 as RTC I2C SCL Pin"
+
+config ESP32S3_RTC_I2C_SCLPIN_2
+	bool "Use GPIO2 as RTC I2C SCL Pin"
+
+endchoice # RTC I2C SCL Pin
+
+config ESP32S3_RTC_I2C_SCLPIN
+	int
+	default 0 if ESP32S3_RTC_I2C_SCLPIN_0
+	default 2 if ESP32S3_RTC_I2C_SCLPIN_2
+
+choice
+	prompt "RTC I2C SDA Pin"
+	default ESP32S3_RTC_I2C_SDAPIN_3
+
+config ESP32S3_RTC_I2C_SDAPIN_1
+	bool "Use GPIO1 as RTC I2C SDA Pin"
+
+config ESP32S3_RTC_I2C_SDAPIN_3
+	bool "Use GPIO3 as RTC I2C SDA Pin"
+
+endchoice # RTC I2C SDA Pin
+
+config ESP32S3_RTC_I2C_SDAPIN
+	int
+	default 1 if ESP32S3_RTC_I2C_SDAPIN_1
+	default 3 if ESP32S3_RTC_I2C_SDAPIN_3
+
+endif # ESP32S3_RTC_I2C
+
 config ESP32S3_I2CTIMEOSEC
 	int "Timeout seconds"
 	default 0
diff --git a/arch/xtensa/src/esp32s3/Make.defs b/arch/xtensa/src/esp32s3/Make.defs
index e71b090a754..c80d9412c09 100644
--- a/arch/xtensa/src/esp32s3/Make.defs
+++ b/arch/xtensa/src/esp32s3/Make.defs
@@ -207,7 +207,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = b6fa6c9098318007a61acc7c9f0f180443bb80c2
+	ESP_HAL_3RDPARTY_VERSION = 8e7f6a123659cb96f2240575b950748afc9b3dc0
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL
diff --git a/arch/xtensa/src/esp32s3/esp32s3_i2c.c b/arch/xtensa/src/esp32s3/esp32s3_i2c.c
index 238605878a4..eea8d041af7 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_i2c.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_i2c.c
@@ -56,6 +56,11 @@
 #include "hardware/esp32s3_soc.h"
 #include "hardware/esp32s3_system.h"
 
+#ifdef CONFIG_ESP32S3_RTC_I2C
+#  include "ulp_riscv.h"
+#  include "ulp_riscv_i2c.h"
+#endif
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
@@ -190,6 +195,11 @@ struct esp32s3_i2c_config_s
 
   uint32_t sda_insig;         /* I2C SDA input signal index */
   uint32_t sda_outsig;        /* I2C SDA output signal index */
+#ifdef CONFIG_ESP32S3_RTC_I2C
+  /* Pin and timing information configuration struct for RTC I2C */
+
+  ulp_riscv_i2c_cfg_t *rtc_i2c_cfg;
+#endif
 };
 
 /* I2C Device Private Data */
@@ -287,6 +297,13 @@ static const struct i2c_ops_s g_esp32s3_i2c_ops =
 #endif
 };
 
+#ifdef CONFIG_ESP32S3_RTC_I2C
+static const struct i2c_ops_s g_esp32s3_rtc_i2c_ops =
+{
+  .transfer = NULL,
+};
+#endif
+
 /* I2C device structures */
 
 #ifdef CONFIG_ESP32S3_I2C0
@@ -361,6 +378,32 @@ static struct esp32s3_i2c_priv_s g_esp32s3_i2c1_priv =
 };
 #endif /* CONFIG_ESP32S3_I2C1 */
 
+#ifdef CONFIG_ESP32S3_RTC_I2C
+
+ulp_riscv_i2c_cfg_t rtc_i2c_cfg = ULP_RISCV_I2C_DEFAULT_CONFIG();
+
+static const struct esp32s3_i2c_config_s g_esp32s3_rtc_i2c_config =
+{
+  .scl_pin     = CONFIG_ESP32S3_RTC_I2C_SCLPIN,
+  .sda_pin     = CONFIG_ESP32S3_RTC_I2C_SDAPIN,
+  .rtc_i2c_cfg = &rtc_i2c_cfg,
+};
+
+static struct esp32s3_i2c_priv_s g_esp32s3_rtc_i2c_priv =
+{
+  .ops        = &g_esp32s3_rtc_i2c_ops,
+  .id         = ESP32S3_RTC_I2C,
+  .config     = &g_esp32s3_rtc_i2c_config,
+  .refs       = 0,
+  .lock       = NXMUTEX_INITIALIZER,
+  .i2cstate   = I2CSTATE_IDLE,
+  .msgv       = NULL,
+  .msgid      = 0,
+  .bytes      = 0,
+  .ready_read = false,
+};
+#endif /* CONFIG_ESP32S3_RTC_I2C */
+
 /* Trace events strings */
 
 #ifdef CONFIG_I2C_TRACE
@@ -731,59 +774,71 @@ static void i2c_init_clock(struct esp32s3_i2c_priv_s *priv,
 static void i2c_init(struct esp32s3_i2c_priv_s *priv)
 {
   const struct esp32s3_i2c_config_s *config = priv->config;
+  if (priv->id != ESP32S3_RTC_I2C)
+    {
+      esp32s3_gpiowrite(config->scl_pin, 1);
+      esp32s3_configgpio(config->scl_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
+      esp32s3_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
+      esp32s3_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
 
-  esp32s3_gpiowrite(config->scl_pin, 1);
-  esp32s3_configgpio(config->scl_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
-  esp32s3_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
-  esp32s3_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
+      esp32s3_gpiowrite(config->sda_pin, 1);
+      esp32s3_configgpio(config->sda_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
+      esp32s3_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
+      esp32s3_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
 
-  esp32s3_gpiowrite(config->sda_pin, 1);
-  esp32s3_configgpio(config->sda_pin, INPUT_PULLUP | OUTPUT_OPEN_DRAIN);
-  esp32s3_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
-  esp32s3_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
+      /* Enable I2C hardware */
 
-  /* Enable I2C hardware */
+      modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, config->clk_bit);
+      modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
 
-  modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, config->clk_bit);
-  modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
+      /* Disable I2C interrupts */
 
-  /* Disable I2C interrupts */
+      i2c_intr_disable(priv);
 
-  i2c_intr_disable(priv);
+      /* Initialize I2C Master */
 
-  /* Initialize I2C Master */
+      putreg32(I2C_MS_MODE | I2C_CLK_EN |
+               I2C_SCL_FORCE_OUT | I2C_SDA_FORCE_OUT,
+               I2C_CTR_REG(priv->id));
 
-  putreg32(I2C_MS_MODE | I2C_CLK_EN | I2C_SCL_FORCE_OUT | I2C_SDA_FORCE_OUT,
-           I2C_CTR_REG(priv->id));
+      /* Set FIFO mode */
 
-  /* Set FIFO mode */
+      modifyreg32(I2C_FIFO_CONF_REG(priv->id), I2C_NONFIFO_EN, 0);
 
-  modifyreg32(I2C_FIFO_CONF_REG(priv->id), I2C_NONFIFO_EN, 0);
+      /* Ensure I2C data mode is set to MSB */
 
-  /* Ensure I2C data mode is set to MSB */
+      modifyreg32(I2C_CTR_REG(priv->id),
+                  I2C_TX_LSB_FIRST | I2C_RX_LSB_FIRST, 0);
 
-  modifyreg32(I2C_CTR_REG(priv->id), I2C_TX_LSB_FIRST | I2C_RX_LSB_FIRST, 0);
+      i2c_reset_fifo(priv);
 
-  i2c_reset_fifo(priv);
+      /* Configure the hardware filter function */
 
-  /* Configure the hardware filter function */
+      putreg32(I2C_SCL_FILTER_EN | I2C_SDA_FILTER_EN |
+              VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SCL_FILTER_THRES) |
+                VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SDA_FILTER_THRES),
+              I2C_FILTER_CFG_REG(priv->id));
 
-  putreg32(I2C_SCL_FILTER_EN | I2C_SDA_FILTER_EN |
-           VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SCL_FILTER_THRES) |
-             VALUE_TO_FIELD(I2C_FILTER_CYC_NUM_DEF, I2C_SDA_FILTER_THRES),
-           I2C_FILTER_CFG_REG(priv->id));
+      /* Set I2C source clock */
 
-  /* Set I2C source clock */
+      modifyreg32(I2C_CLK_CONF_REG(priv->id), I2C_SCLK_SEL, 0);
 
-  modifyreg32(I2C_CLK_CONF_REG(priv->id), I2C_SCLK_SEL, 0);
+      /* Configure I2C bus frequency */
 
-  /* Configure I2C bus frequency */
+      i2c_init_clock(priv, config->clk_freq);
 
-  i2c_init_clock(priv, config->clk_freq);
+      /* Update I2C configuration */
 
-  /* Update I2C configuration */
-
-  modifyreg32(I2C_CTR_REG(priv->id), 0, I2C_CONF_UPGATE);
+      modifyreg32(I2C_CTR_REG(priv->id), 0, I2C_CONF_UPGATE);
+    }
+#ifdef CONFIG_ESP32S3_RTC_I2C
+  else
+    {
+      priv->config->rtc_i2c_cfg->i2c_pin_cfg.scl_io_num = config->scl_pin;
+      priv->config->rtc_i2c_cfg->i2c_pin_cfg.sda_io_num = config->sda_pin;
+      ulp_riscv_i2c_master_init(priv->config->rtc_i2c_cfg);
+    }
+#endif
 }
 
 /****************************************************************************
@@ -1553,6 +1608,11 @@ struct i2c_master_s *esp32s3_i2cbus_initialize(int port)
       case ESP32S3_I2C1:
         priv = &g_esp32s3_i2c1_priv;
         break;
+#endif
+#ifdef CONFIG_ESP32S3_RTC_I2C
+      case ESP32S3_RTC_I2C:
+        priv = &g_esp32s3_rtc_i2c_priv;
+        break;
 #endif
       default:
         return NULL;
@@ -1566,34 +1626,37 @@ struct i2c_master_s *esp32s3_i2cbus_initialize(int port)
     }
 
 #ifndef CONFIG_I2C_POLLED
-  config = priv->config;
-
-  /* Set up to receive peripheral interrupts on the current CPU */
-
-  priv->cpu = this_cpu();
-  priv->cpuint = esp32s3_setup_irq(priv->cpu, config->periph,
-                                   1, ESP32S3_CPUINT_LEVEL);
-  if (priv->cpuint < 0)
+  if (priv->id != ESP32S3_RTC_I2C)
     {
-      /* Failed to allocate a CPU interrupt of this type */
+      config = priv->config;
 
-      priv->refs--;
-      nxmutex_unlock(&priv->lock);
+      /* Set up to receive peripheral interrupts on the current CPU */
 
-      return NULL;
+      priv->cpu = this_cpu();
+      priv->cpuint = esp32s3_setup_irq(priv->cpu, config->periph,
+                                      1, ESP32S3_CPUINT_LEVEL);
+      if (priv->cpuint < 0)
+        {
+          /* Failed to allocate a CPU interrupt of this type */
+
+          priv->refs--;
+          nxmutex_unlock(&priv->lock);
+
+          return NULL;
+        }
+
+      ret = irq_attach(config->irq, i2c_irq, priv);
+      if (ret != OK)
+        {
+          esp32s3_teardown_irq(priv->cpu, config->periph, priv->cpuint);
+          priv->refs--;
+
+          nxmutex_unlock(&priv->lock);
+          return NULL;
+        }
+
+      up_enable_irq(config->irq);
     }
-
-  ret = irq_attach(config->irq, i2c_irq, priv);
-  if (ret != OK)
-    {
-      esp32s3_teardown_irq(priv->cpu, config->periph, priv->cpuint);
-      priv->refs--;
-
-      nxmutex_unlock(&priv->lock);
-      return NULL;
-    }
-
-  up_enable_irq(config->irq);
 #endif
 
   i2c_init(priv);
@@ -1636,13 +1699,16 @@ int esp32s3_i2cbus_uninitialize(struct i2c_master_s *dev)
       return OK;
     }
 
+  if (priv->id != ESP32S3_RTC_I2C)
+    {
 #ifndef CONFIG_I2C_POLLED
-  up_disable_irq(priv->config->irq);
-  esp32s3_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint);
+      up_disable_irq(priv->config->irq);
+      esp32s3_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint);
 #endif
 
-  i2c_deinit(priv);
-  nxmutex_unlock(&priv->lock);
+      i2c_deinit(priv);
+      nxmutex_unlock(&priv->lock);
+    }
 
   return OK;
 }
diff --git a/arch/xtensa/src/esp32s3/esp32s3_i2c.h b/arch/xtensa/src/esp32s3/esp32s3_i2c.h
index b5b253745d3..a049740b082 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_i2c.h
+++ b/arch/xtensa/src/esp32s3/esp32s3_i2c.h
@@ -47,6 +47,8 @@
 #  define ESP32S3_I2C1 1
 #endif
 
+#define ESP32S3_RTC_I2C 2
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
diff --git a/arch/xtensa/src/esp32s3/hal.mk b/arch/xtensa/src/esp32s3/hal.mk
index d5140c89140..dea64a4181e 100644
--- a/arch/xtensa/src/esp32s3/hal.mk
+++ b/arch/xtensa/src/esp32s3/hal.mk
@@ -154,6 +154,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)pcnt_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rtc_io_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sdm_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)i2s_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sha_hal.c
@@ -196,6 +197,8 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common$(DELIM)ulp_adc.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv_lock.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_riscv$(DELIM)ulp_riscv_i2c.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)io_mux.c
 
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)rtc_io.c