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boards/xtensa/esp32[-s2|-s3]: Add RTC GPIO board support for esp32[-s2|-s3]

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Add RTC GPIO board support for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
This commit is contained in:
Eren Terzioglu
2025-08-22 17:03:47 +02:00
committed by Matteo Golin
parent 36616025c7
commit 3637aea9ec
4 changed files with 218 additions and 1 deletions
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boards/xtensa/esp32s2/common/src/Make.defs
+2 -1
View File
@@ -90,13 +90,14 @@ ifeq ($(CONFIG_MMCSD_SPI), y)
CSRCS += esp32s2_board_sdmmc.c
endif
ifeq ($(CONFIG_ESP32S2_TWAI)$(CONFIG_ARCH_BUTTONS),y)
ifeq ($(CONFIG_ESP32S2_TWAI)$(CONFIG_ARCH_BUTTONS)$(CONFIG_DEV_GPIO),y)
CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
CHIPHALDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)chip$(DELIM)esp-hal-3rdparty
CFLAGS += -Wno-undef
CFLAGS += ${INCDIR_PREFIX}$(CHIPHALDIR)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(CHIPHALDIR)$(DELIM)components$(DELIM)esp_common$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(CHIPHALDIR)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(CHIPHALDIR)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register
endif
ifeq ($(CONFIG_ETC_ROMFS),y)
boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c
+102
View File
@@ -46,6 +46,10 @@
#include "espressif/esp_dedic_gpio.h"
#endif
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
#include "esp32s2_rtc_gpio.h"
#endif
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
/****************************************************************************
@@ -76,6 +80,9 @@
#define GPIO_DEDIC2 5
#define GPIO_DEDIC_COUNT 2
#define GPIO_RTC1 0
#define GPIO_RTC_COUNT 1
/****************************************************************************
* Private Types
****************************************************************************/
@@ -111,6 +118,10 @@ static int gpint_attach(struct gpio_dev_s *dev,
pin_interrupt_t callback);
static int gpint_enable(struct gpio_dev_s *dev, bool enable);
#endif
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
static int gprtc_read(struct gpio_dev_s *dev, bool *value);
static int gprtc_write(struct gpio_dev_s *dev, bool value);
#endif
/****************************************************************************
* Private Data
@@ -200,10 +211,84 @@ struct esp_dedic_gpio_config_s dedic_gpio_conf =
struct file *dedicated_gpio = NULL;
#endif
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
static const struct gpio_operations_s gprtc_ops =
{
.go_read = gprtc_read,
.go_write = gprtc_write,
.go_attach = NULL,
.go_enable = NULL,
.go_setpintype = NULL,
};
/* This array maps the GPIO pins used as OUTPUT */
static const uint32_t g_gpiortc[GPIO_RTC_COUNT] =
{
GPIO_RTC1
};
static struct esp32s2gpio_dev_s g_gprtc[GPIO_RTC_COUNT];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
/****************************************************************************
* Name: gprtc_read
*
* Description:
* Read a RTC digital output pin.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* value - A pointer to store the state of the pin.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
static int gprtc_read(struct gpio_dev_s *dev, bool *value)
{
struct esp32s2gpio_dev_s *espgpio = (struct esp32s2gpio_dev_s *)dev;
DEBUGASSERT(espgpio != NULL && value != NULL);
gpioinfo("Reading...\n");
*value = esp32s2_rtcioread(g_gpiortc[espgpio->id]);
return OK;
}
/****************************************************************************
* Name: gprtc_write
*
* Description:
* Write to a RTC digital output pin.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* value - The value to be written.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
static int gprtc_write(struct gpio_dev_s *dev, bool value)
{
struct esp32s2gpio_dev_s *espgpio = (struct esp32s2gpio_dev_s *)dev;
DEBUGASSERT(espgpio != NULL);
gpioinfo("Writing %d\n", (int)value);
esp32s2_rtciowrite(g_gpiortc[espgpio->id], value);
return OK;
}
#endif
/****************************************************************************
* Name: gpout_read
*
@@ -510,6 +595,23 @@ int esp32s2_gpio_init(void)
pincount++;
#endif
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
for (int i = 0; i < GPIO_RTC_COUNT; i++)
{
/* Setup and register the GPIO pin */
g_gprtc[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
g_gprtc[i].gpio.gp_ops = &gprtc_ops;
g_gprtc[i].id = i;
gpio_pin_register(&g_gprtc[i].gpio, pincount);
/* Configure the pins that will be used as input/output */
esp32s2_configrtcio(g_gpiortc[i], RTC_INPUT | RTC_OUTPUT);
pincount++;
}
#endif
return OK;
}
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
boards/xtensa/esp32s3/common/src/Make.defs
+12
View File
@@ -117,4 +117,16 @@ DEPPATH += --dep-path src
VPATH += :src
CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src
ifeq ($(CONFIG_DEV_GPIO),y)
ifeq ($(CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE),y)
CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
CHIPHALDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)chip$(DELIM)esp-hal-3rdparty
CFLAGS += -Wno-undef
CFLAGS += ${INCDIR_PREFIX}$(CHIPHALDIR)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(CHIPHALDIR)$(DELIM)components$(DELIM)esp_common$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(CHIPHALDIR)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(CHIPHALDIR)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register
endif
endif
endif
boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_gpio.c
+102
View File
@@ -44,6 +44,10 @@
#include "espressif/esp_dedic_gpio.h"
#endif
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
#include "esp32s3_rtc_gpio.h"
#endif
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
/****************************************************************************
@@ -80,6 +84,9 @@
#define GPIO_DEDIC2 5
#define GPIO_DEDIC_COUNT 2
#define GPIO_RTC1 0
#define GPIO_RTC_COUNT 1
/****************************************************************************
* Private Types
****************************************************************************/
@@ -115,6 +122,10 @@ static int gpint_attach(struct gpio_dev_s *dev,
pin_interrupt_t callback);
static int gpint_enable(struct gpio_dev_s *dev, bool enable);
#endif
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
static int gprtc_read(struct gpio_dev_s *dev, bool *value);
static int gprtc_write(struct gpio_dev_s *dev, bool value);
#endif
/****************************************************************************
* Private Data
@@ -204,10 +215,84 @@ struct esp_dedic_gpio_config_s dedic_gpio_conf =
struct file *dedicated_gpio = NULL;
#endif
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
static const struct gpio_operations_s gprtc_ops =
{
.go_read = gprtc_read,
.go_write = gprtc_write,
.go_attach = NULL,
.go_enable = NULL,
.go_setpintype = NULL,
};
/* This array maps the GPIO pins used as OUTPUT */
static const uint32_t g_gpiortc[GPIO_RTC_COUNT] =
{
GPIO_RTC1
};
static struct esp32s3gpio_dev_s g_gprtc[GPIO_RTC_COUNT];
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
/****************************************************************************
* Name: gprtc_read
*
* Description:
* Read a RTC digital output pin.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* value - A pointer to store the state of the pin.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
static int gprtc_read(struct gpio_dev_s *dev, bool *value)
{
struct esp32s3gpio_dev_s *espgpio = (struct esp32s3gpio_dev_s *)dev;
DEBUGASSERT(espgpio != NULL && value != NULL);
gpioinfo("Reading...\n");
*value = esp32s3_rtcioread(g_gpiortc[espgpio->id]);
return OK;
}
/****************************************************************************
* Name: gprtc_write
*
* Description:
* Write to a RTC digital output pin.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* value - The value to be written.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
static int gprtc_write(struct gpio_dev_s *dev, bool value)
{
struct esp32s3gpio_dev_s *espgpio = (struct esp32s3gpio_dev_s *)dev;
DEBUGASSERT(espgpio != NULL);
gpioinfo("Writing %d\n", (int)value);
esp32s3_rtciowrite(g_gpiortc[espgpio->id], value);
return OK;
}
#endif
/****************************************************************************
* Name: gpout_read
****************************************************************************/
@@ -430,6 +515,23 @@ int esp32s3_gpio_init(void)
pincount++;
#endif
#ifdef CONFIG_ESPRESSIF_USE_ULP_RISCV_CORE
for (i = 0; i < GPIO_RTC_COUNT; i++)
{
/* Setup and register the GPIO pin */
g_gprtc[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
g_gprtc[i].gpio.gp_ops = &gprtc_ops;
g_gprtc[i].id = i;
gpio_pin_register(&g_gprtc[i].gpio, pincount);
/* Configure the pins that will be used as input/output */
esp32s3_configrtcio(g_gpiortc[i], RTC_INPUT | RTC_OUTPUT);
pincount++;
}
#endif
return OK;
}
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */