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Merged nuttx/nuttx into anuttx/master

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neil H
2016-06-21 15:31:08 -07:00
parent bc67a9e9a4 0150991503
commit 597af7c885
965 changed files with 15829 additions and 8822 deletions
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ChangeLog
+72
View File
@@ -12045,3 +12045,75 @@
- escape LASTXFER: this suppresses the LASTXFER bit at the end of the
next transfer. The "escape"-Flag is reset automatically.
From Frank Benkert (2016-06-14)
* Many CONFIG_DEBUG_* options did not have matching macros defined in
include/debug.h. Rather, there were various definitions scattered
throughout the sourse tree. These were collected together and
centralized with single macro definitions in include/debug.h
(2016-06-15)
* STM32F7: Add SPI, I2C, and ADC drivers. From Lok Tep (2016-06-15).
* err(), warn(), info(), and alert() renamed to include leading '_'.
This was done to avoid some naming collisions (2-06-16
* STM32: Move backup domain reset to to earlier in the initialization
sequence (stm32_rcc.c() in order to avoid disabling LSE during RTC
initialiation. From Alan Carvalho de Assis (2016-06-16).
* SYSLOG: syslog() will now automatically redirect output to lowsyslog()
if called from an interrupt handler (2016-06-16).
* STM32: When configuring a GPIO via stm32_configgpio() the function
will first set the mode to output and then set the initial state of
the gpio later on. If you have an application with an externaly
pulled-up pin, this would lead to a glitch on the line that may be
dangerous in some applications (e.G. Reset Line for other chips,
etc). This changes sets the output state before configuring the pin
as an output. From Pascal Speck (2016-06-17).
* STM32 F7: Apply Pascal Speck's GPIO STM32 change to STM32 L4
(2016-06-17).
* STM32 L4: Apply Pascal Speck's GPIO STM32 change to STM32 L4.
From Sebastien Lorquet (2016-06-17).
* Review all uses of *err(). These macro family should indicate only
error conditions. Convert *err() to either *info() or add ERROR:,
depending on if an error is reported (2016-06-17).
* STM32F7: Review, correct, and update I2C, SPI, and ADC drivers. From
David Sidrane (2016-06-17).
* LPC17 Ethernet: Needs to correctly ignore PHYID2 revision number
when comparing PHY IDs (2016-06-18).
* SYSLOG: Consolidate all SYSLOG logic in drivers/syslog. Add an
abstraction layer that supports: (1) redirection of SYSLOG outpout.
This is usually so that you can boot with one SYSLOG output but
transition to another SYSLOG output when the OS has initialialized,
(2) adds common serialization of interrupt output as a configuration
option. Without this configuration setting, interrupt level output
will be asynchronous. And (3) vsyslog is now a system call and is
usable with other-than-FLAT builds (2016-06-19).
* TCP Networking: While working with version 7.10 I discovered a
problem in TCP stack that could be observed on high network load.
Generally speaking, the problem is that RST flag is set in
unnecessary case, in which between loss of some TCP packet and its
proper retransmission, another packets had been successfully sent.
The scenario is as follows: NuttX did not receive ACK for some
sent packet, so it has been probably lost somewhere. But before
its retransmission starts, NuttX is correctly issuing next TCP
packets, with sequence numbers increasing properly. When the
retransmission of previously lost packet finally succeeds, tcp_input
receives the accumulated ACK value, which acknowledges also the
packets sent in the meantime (i.e. between unsuccessful sending of
lost packet and its proper retransmission). However, variable unackseq
is still set to conn->isn + conn->sent, which is truth only if no
further packets transmission occurred in the meantime. Because of
incorrect (in such specific case) unackseq value, few lines further
condition if (ackseq <= unackseq)is not met, and, as a result, we
are going to reset label. From Jakub Łągwa (2016-06-20).
* SYSLOG: Remove lowsyslog(), vlowsyslog(), and associated macros
*llinfo(), *llwarn(), and llerr(). In the redesigned syslog() logic,
these serve no purpose (2016-06-20).
* Make system: Need to build the drivers/ directory even it file
descriptors are not supported. There are things in the drivers/
directory that are still needed (like SYSLOG logic) (2016-06-20).
* assert.h: Define static assert for C++ usage. From Paul Alexander
Patience (2016-06-21).
* arch/arm/src/stm32l4: Add ioctls to set/get bit timing in stm32l4.
Add ioctl hooks to allow future management of can id filters. From
Sebastien Lorquet (2016-06-21).
* drivers/can.c: Add support for poll. From Paul Alexander Patience
(2016-06-21).
* drivers/syslog: Extend SYSLOG logic so that we can send SYSLOG output
to a file. Not verified on initial commit (2016-06-21).
Directories.mk
+6 -3
View File
@@ -59,7 +59,10 @@ endif
#
# FSDIRS depend on file descriptor support; NONFSDIRS do not (except for parts
# of FSDIRS). We will exclude FSDIRS from the build if file descriptor
# support is disabled
# support is disabled. NOTE that drivers, in general, depends on file
# descriptor support but is always built because there are other components
# in the drivers directory that are needed even if file descriptors are not
# supported.
# CONTEXTDIRS include directories that have special, one-time pre-build
# requirements. Normally this includes things like auto-generation of
# configuration specific files or creation of configurable symbolic links
@@ -69,8 +72,8 @@ endif
# be cleaned to prevent garbage from collecting in them when changing
# configurations.
NONFSDIRS = sched configs $(ARCH_SRC) $(NUTTX_ADDONS)
FSDIRS = fs drivers binfmt
NONFSDIRS = sched drivers configs $(ARCH_SRC) $(NUTTX_ADDONS)
FSDIRS = fs binfmt
CONTEXTDIRS = $(APPDIR)
USERDIRS =
OTHERDIRS = lib
FlatLibs.mk
+7 -4
View File
@@ -45,6 +45,12 @@
NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
USERLIBS =
# Driver support. Generally depends on file descriptor support but there
# are some components in the drivers directory that are needed even if file
# descriptors are not supported.
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
# Add libraries for board support
NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
@@ -89,11 +95,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
endif
ifeq ($(CONFIG_NET),y)
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
endif
else
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
endif
# Add libraries for the NX graphics sub-system
Kconfig
+5
View File
@@ -395,9 +395,14 @@ endmenu # Customize Header Files
menu "Debug Options"
config DEBUG_ALERT
bool
default n
config DEBUG_FEATURES
bool "Enable Debug Features"
default n
select DEBUG_ALERT
---help---
Enables built-in debug features. Selecting this option will (1) Enable
debug assertions in the code, (2) enable extended parameter testing in
KernelLibs.mk
+7 -4
View File
@@ -45,6 +45,12 @@
NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
USERLIBS =
# Driver support. Generally depends on file descriptor support but there
# are some components in the drivers directory that are needed even if file
# descriptors are not supported.
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
# Add libraries for board support
NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
@@ -83,11 +89,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
endif
ifeq ($(CONFIG_NET),y)
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
endif
else
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
endif
# Add libraries for the NX graphics sub-system
ProtectedLibs.mk
+7 -4
View File
@@ -45,6 +45,12 @@
NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
USERLIBS =
# Driver support. Generally depends on file descriptor support but there
# are some components in the drivers directory that are needed even if file
# descriptors are not supported.
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
# Add libraries for board support
NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
@@ -89,11 +95,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
endif
ifeq ($(CONFIG_NET),y)
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
endif
else
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
endif
# Add libraries for the NX graphics sub-system
arch/Kconfig
+2
View File
@@ -58,6 +58,7 @@ config ARCH_SIM
select ARCH_HAVE_TLS
select ARCH_HAVE_TICKLESS
select ARCH_HAVE_POWEROFF
select SERIAL_CONSOLE
---help---
Linux/Cywgin user-mode simulation.
@@ -525,6 +526,7 @@ config ARCH_IRQPRIO
config ARCH_STACKDUMP
bool "Dump stack on assertions"
default n
select DEBUG_ALERT
---help---
Enable to do stack dumps after assertions
arch/arm/include/stm32f7/chip.h
+2 -1
View File
@@ -2,7 +2,8 @@
* arch/arm/include/stm32f7/chip.h
*
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
arch/arm/src/a1x/a1x_serial.c
+1 -1
View File
@@ -1192,7 +1192,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
default:
{
_llerr("Unexpected IIR: %02x\n", status);
_err("ERROR: Unexpected IIR: %02x\n", status);
break;
}
}
arch/arm/src/arm/up_assert.c
+2 -2
View File
@@ -151,7 +151,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
/* Let vsyslog do the real work */
va_start(ap, fmt);
ret = lowvsyslog(LOG_INFO, fmt, ap);
ret = vsyslog(LOG_EMERG, fmt, ap);
va_end(ap);
return ret;
}
@@ -311,7 +311,7 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
#if CONFIG_TASK_NAME_SIZE > 0
#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
struct tcb_s *rtcb = this_task();
#endif
arch/arm/src/arm/up_dataabort.c
+2 -2
View File
@@ -107,7 +107,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
* fatal error.
*/
pgllerr("FSR: %08x FAR: %08x\n", fsr, far);
pginfo("FSR: %08x FAR: %08x\n", fsr, far);
if ((fsr & FSR_MASK) != FSR_PAGE)
{
goto segfault;
@@ -118,7 +118,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
* (It has not yet been saved in the register context save area).
*/
pgllinfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
pginfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
if (far < PG_PAGED_VBASE || far >= PG_PAGED_VEND)
{
goto segfault;
arch/arm/src/arm/up_elf.c
+7 -7
View File
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC
}
@@ -185,7 +185,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr("ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -256,7 +256,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -266,6 +266,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
berr("RELA relocation not supported\n");
berr("ERROR: RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/arm/up_prefetchabort.c
+2 -2
View File
@@ -99,8 +99,8 @@ void up_prefetchabort(uint32_t *regs)
* virtual addresses.
*/
pgllerr("VADDR: %08x VBASE: %08x VEND: %08x\n",
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
pginfo("VADDR: %08x VBASE: %08x VEND: %08x\n",
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
{
arch/arm/src/arm/up_releasepending.c
+1 -1
View File
@@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
sllerr("From TCB=%p\n", rtcb);
sinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
arch/arm/src/arm/up_reprioritizertr.c
+1 -1
View File
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
sllerr("TCB=%p PRI=%d\n", tcb, priority);
sinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
arch/arm/src/arm/up_schedulesigaction.c
+2 -2
View File
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
arch/arm/src/arm/up_sigdeliver.c
+2 -2
View File
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
arch/arm/src/armv6-m/up_assert.c
+2 -2
View File
@@ -193,7 +193,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
/* Let vsyslog do the real work */
va_start(ap, fmt);
ret = lowvsyslog(LOG_INFO, fmt, ap);
ret = vsyslog(LOG_EMERG, fmt, ap);
va_end(ap);
return ret;
}
@@ -366,7 +366,7 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
#if CONFIG_TASK_NAME_SIZE > 0
#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
struct tcb_s *rtcb = this_task();
#endif
arch/arm/src/armv6-m/up_dumpnvic.c
+16 -16
View File
@@ -72,27 +72,27 @@ void up_dumpnvic(FAR const char *msg)
flags = enter_critical_section();
_llinfo("NVIC: %s\n", msg);
_llinfo(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER),
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
_info("NVIC: %s\n", msg);
_info(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER),
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
for (i = 0 ; i < 8; i += 4)
{
_llinfo(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
i, getreg32(ARMV6M_NVIC_IPR(i)),
i+1, getreg32(ARMV6M_NVIC_IPR(i+1)),
i+2, getreg32(ARMV6M_NVIC_IPR(i+2)),
i+3, getreg32(ARMV6M_NVIC_IPR(i+3)));
_info(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
i, getreg32(ARMV6M_NVIC_IPR(i)),
i+1, getreg32(ARMV6M_NVIC_IPR(i+1)),
i+2, getreg32(ARMV6M_NVIC_IPR(i+2)),
i+3, getreg32(ARMV6M_NVIC_IPR(i+3)));
}
_llinfo("SYSCON:\n");
_llinfo(" CPUID: %08x ICSR: %08x AIRCR: %08x SCR: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR),
getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR));
_llinfo(" CCR: %08x SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2),
getreg32(ARMV6M_SYSCON_SHPR3));
_info("SYSCON:\n");
_info(" CPUID: %08x ICSR: %08x AIRCR: %08x SCR: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR),
getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR));
_info(" CCR: %08x SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2),
getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);
#endif
arch/arm/src/armv6-m/up_elf.c
+8 -8
View File
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -181,7 +181,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr("ERROR: ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -290,7 +290,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
berr("ERROR: ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -300,7 +300,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
berr("ERROR: ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -451,7 +451,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -461,6 +461,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
berr("RELA relocation not supported\n");
berr("ERROR: RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/armv6-m/up_hardfault.c
+17 -17
View File
@@ -55,9 +55,9 @@
****************************************************************************/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hferr(format, ...) _llerr(format, ##__VA_ARGS__)
# define hfinfo(format, ...) _alert(format, ##__VA_ARGS__)
#else
# define hferr(x...)
# define hfinfo(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
@@ -106,7 +106,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
hferr(" PC: %p INSN: %04x\n", pc, insn);
hfinfo(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@@ -114,7 +114,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hferr("Forward SVCall\n");
hfinfo("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@@ -122,22 +122,22 @@ int up_hardfault(int irq, FAR void *context)
#if defined(CONFIG_DEBUG_HARDFAULT)
/* Dump some hard fault info */
hferr("\nHard Fault:\n");
hferr(" IRQ: %d regs: %p\n", irq, regs);
hferr(" PRIMASK: %08x IPSR: %08x\n",
getprimask(), getipsr());
hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
_alert("\nHard Fault:\n");
_alert(" IRQ: %d regs: %p\n", irq, regs);
_alert(" PRIMASK: %08x IPSR: %08x\n",
getprimask(), getipsr());
_alert(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
_alert(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
_alert(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
(void)up_irq_save();
_llerr("PANIC!!! Hard fault\n");
_alert("PANIC!!! Hard fault\n");
PANIC();
return OK; /* Won't get here */
}
arch/arm/src/armv6-m/up_releasepending.c
+1 -1
View File
@@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
sllerr("From TCB=%p\n", rtcb);
sinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
arch/arm/src/armv6-m/up_reprioritizertr.c
+1 -1
View File
@@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
sllerr("TCB=%p PRI=%d\n", tcb, priority);
sinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just removed the head
arch/arm/src/armv6-m/up_schedulesigaction.c
+2 -2
View File
@@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
arch/arm/src/armv6-m/up_sigdeliver.c
+2 -2
View File
@@ -100,7 +100,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -135,7 +135,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
arch/arm/src/armv6-m/up_svcall.c
+29 -29
View File
@@ -147,19 +147,19 @@ int up_svcall(int irq, FAR void *context)
if (cmd > SYS_switch_context)
# endif
{
svcllinfo("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcllinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcllinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
# ifdef CONFIG_BUILD_PROTECTED
svcllinfo(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
svcinfo(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
# else
svcllinfo(" PSR: %08x PRIMASK: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK]);
svcinfo(" PSR: %08x PRIMASK: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK]);
# endif
}
#endif
@@ -444,7 +444,7 @@ int up_svcall(int irq, FAR void *context)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
svcllerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
}
break;
@@ -459,30 +459,30 @@ int up_svcall(int irq, FAR void *context)
if (regs != CURRENT_REGS)
# endif
{
svcllinfo("SVCall Return:\n");
svcllinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
svcllinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
svcinfo("SVCall Return:\n");
svcinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
svcinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
svcllinfo(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
svcinfo(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
svcllinfo(" PSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
svcinfo(" PSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
else
{
svcllinfo("SVCall Return: %d\n", regs[REG_R0]);
svcinfo("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif
arch/arm/src/armv7-a/arm_assert.c
+2 -2
View File
@@ -185,7 +185,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
/* Let vsyslog do the real work */
va_start(ap, fmt);
ret = lowvsyslog(LOG_INFO, fmt, ap);
ret = vsyslog(LOG_EMERG, fmt, ap);
va_end(ap);
return ret;
}
@@ -372,7 +372,7 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
#if CONFIG_TASK_NAME_SIZE > 0
#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
arch/arm/src/armv7-a/arm_cpustart.c
+7 -7
View File
@@ -64,19 +64,19 @@ static inline void arm_registerdump(FAR struct tcb_s *tcb)
{
int regndx;
_llerr("CPU%d:\n", up_cpu_index());
_info("CPU%d:\n", up_cpu_index());
/* Dump the startup registers */
for (regndx = REG_R0; regndx <= REG_R15; regndx += 8)
{
uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx];
_llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regndx, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
_info("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regndx, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
_llerr("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
_info("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
}
#else
# define arm_registerdump(tcb)
@@ -106,7 +106,7 @@ int arm_start_handler(int irq, FAR void *context)
{
FAR struct tcb_s *tcb;
sllinfo("CPU%d Started\n", up_cpu_index());
sinfo("CPU%d Started\n", up_cpu_index());
/* Reset scheduler parameters */
@@ -155,7 +155,7 @@ int arm_start_handler(int irq, FAR void *context)
int up_cpu_start(int cpu)
{
sllinfo("Starting CPU%d\n", cpu);
sinfo("Starting CPU%d\n", cpu);
DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
arch/arm/src/armv7-a/arm_dataabort.c
+2 -2
View File
@@ -104,7 +104,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
* fatal error.
*/
pgllerr("DFSR: %08x DFAR: %08x\n", dfsr, dfar);
pginfo("DFSR: %08x DFAR: %08x\n", dfsr, dfar);
if ((dfsr & FSR_MASK) != FSR_PAGE)
{
goto segfault;
@@ -115,7 +115,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
* (It has not yet been saved in the register context save area).
*/
pgllinfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
pginfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
if (dfar < PG_PAGED_VBASE || dfar >= PG_PAGED_VEND)
{
goto segfault;
arch/arm/src/armv7-a/arm_elf.c
+7 -7
View File
@@ -74,7 +74,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC;
}
@@ -175,7 +175,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr("ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -246,7 +246,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -256,6 +256,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
berr("RELA relocation not supported\n");
berr("ERROR: RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/armv7-a/arm_gicv2.c
+1 -1
View File
@@ -387,7 +387,7 @@ uint32_t *arm_decodeirq(uint32_t *regs)
regval = getreg32(GIC_ICCIAR);
irq = (regval & GIC_ICCIAR_INTID_MASK) >> GIC_ICCIAR_INTID_SHIFT;
irqllinfo("irq=%d\n", irq);
irqinfo("irq=%d\n", irq);
/* Ignore spurions IRQs. ICCIAR will report 1023 if there is no pending
* interrupt.
arch/arm/src/armv7-a/arm_gicv2_dump.c
+48 -48
View File
@@ -69,22 +69,22 @@
static inline void arm_gic_dump_cpu(bool all, int irq, int nlines)
{
irqllinfo(" CPU Interface Registers:\n");
irqllinfo(" ICR: %08x PMR: %08x BPR: %08x IAR: %08x\n",
getreg32(GIC_ICCICR), getreg32(GIC_ICCPMR),
getreg32(GIC_ICCBPR), getreg32(GIC_ICCIAR));
irqllinfo(" RPR: %08x HPIR: %08x ABPR: %08x\n",
getreg32(GIC_ICCRPR), getreg32(GIC_ICCHPIR),
getreg32(GIC_ICCABPR));
irqllinfo(" AIAR: %08x AHPIR: %08x IDR: %08x\n",
getreg32(GIC_ICCAIAR), getreg32(GIC_ICCAHPIR),
getreg32(GIC_ICCIDR));
irqllinfo(" APR1: %08x APR2: %08x APR3: %08x APR4: %08x\n",
getreg32(GIC_ICCAPR1), getreg32(GIC_ICCAPR2),
getreg32(GIC_ICCAPR3), getreg32(GIC_ICCAPR4));
irqllinfo(" NSAPR1: %08x NSAPR2: %08x NSAPR3: %08x NSAPR4: %08x\n",
getreg32(GIC_ICCNSAPR1), getreg32(GIC_ICCNSAPR2),
getreg32(GIC_ICCNSAPR3), getreg32(GIC_ICCNSAPR4));
irqinfo(" CPU Interface Registers:\n");
irqinfo(" ICR: %08x PMR: %08x BPR: %08x IAR: %08x\n",
getreg32(GIC_ICCICR), getreg32(GIC_ICCPMR),
getreg32(GIC_ICCBPR), getreg32(GIC_ICCIAR));
irqinfo(" RPR: %08x HPIR: %08x ABPR: %08x\n",
getreg32(GIC_ICCRPR), getreg32(GIC_ICCHPIR),
getreg32(GIC_ICCABPR));
irqinfo(" AIAR: %08x AHPIR: %08x IDR: %08x\n",
getreg32(GIC_ICCAIAR), getreg32(GIC_ICCAHPIR),
getreg32(GIC_ICCIDR));
irqinfo(" APR1: %08x APR2: %08x APR3: %08x APR4: %08x\n",
getreg32(GIC_ICCAPR1), getreg32(GIC_ICCAPR2),
getreg32(GIC_ICCAPR3), getreg32(GIC_ICCAPR4));
irqinfo(" NSAPR1: %08x NSAPR2: %08x NSAPR3: %08x NSAPR4: %08x\n",
getreg32(GIC_ICCNSAPR1), getreg32(GIC_ICCNSAPR2),
getreg32(GIC_ICCNSAPR3), getreg32(GIC_ICCNSAPR4));
}
/****************************************************************************
@@ -110,9 +110,9 @@ static void arm_gic_dumpregs(uintptr_t regaddr, int nlines, int incr)
incr <<= 2;
for (i = 0; i < nlines; i += incr, regaddr += 16)
{
irqllinfo(" %08x %08x %08x %08x\n",
getreg32(regaddr), getreg32(regaddr + 4),
getreg32(regaddr + 8), getreg32(regaddr + 12));
irqinfo(" %08x %08x %08x %08x\n",
getreg32(regaddr), getreg32(regaddr + 4),
getreg32(regaddr + 8), getreg32(regaddr + 12));
}
}
@@ -135,7 +135,7 @@ static void arm_gic_dumpregs(uintptr_t regaddr, int nlines, int incr)
static inline void arm_gic_dump4(const char *name, uintptr_t regaddr,
int nlines)
{
irqllinfo(" %s[%08lx]\n", name, (unsigned long)regaddr);
irqinfo(" %s[%08lx]\n", name, (unsigned long)regaddr);
arm_gic_dumpregs(regaddr, nlines, 4);
}
@@ -158,7 +158,7 @@ static inline void arm_gic_dump4(const char *name, uintptr_t regaddr,
static inline void arm_gic_dump8(const char *name, uintptr_t regaddr,
int nlines)
{
irqllinfo(" %s[%08lx]\n", name, (unsigned long)regaddr);
irqinfo(" %s[%08lx]\n", name, (unsigned long)regaddr);
arm_gic_dumpregs(regaddr, nlines, 8);
}
@@ -181,7 +181,7 @@ static inline void arm_gic_dump8(const char *name, uintptr_t regaddr,
static inline void arm_gic_dump16(const char *name, uintptr_t regaddr,
int nlines)
{
irqllinfo(" %s[%08lx]\n", name, (unsigned long)regaddr);
irqinfo(" %s[%08lx]\n", name, (unsigned long)regaddr);
arm_gic_dumpregs(regaddr, nlines, 16);
}
@@ -204,7 +204,7 @@ static inline void arm_gic_dump16(const char *name, uintptr_t regaddr,
static inline void arm_gic_dump32(const char *name, uintptr_t regaddr,
int nlines)
{
irqllinfo(" %s[%08lx]\n", name, (unsigned long)regaddr);
irqinfo(" %s[%08lx]\n", name, (unsigned long)regaddr);
arm_gic_dumpregs(regaddr, nlines, 32);
}
@@ -226,10 +226,10 @@ static inline void arm_gic_dump32(const char *name, uintptr_t regaddr,
static inline void arm_gic_dump_distributor(bool all, int irq, int nlines)
{
irqllinfo(" Distributor Registers:\n");
irqllinfo(" DCR: %08x ICTR: %08x IIDR: %08x\n",
getreg32(GIC_ICDDCR), getreg32(GIC_ICDICTR),
getreg32(GIC_ICDIIDR));
irqinfo(" Distributor Registers:\n");
irqinfo(" DCR: %08x ICTR: %08x IIDR: %08x\n",
getreg32(GIC_ICDDCR), getreg32(GIC_ICDICTR),
getreg32(GIC_ICDIIDR));
if (all)
{
@@ -246,27 +246,27 @@ static inline void arm_gic_dump_distributor(bool all, int irq, int nlines)
}
else
{
irqllinfo(" ISR: %08x ISER: %08x ISPR: %08x SAR: %08x\n",
getreg32(GIC_ICDISR(irq)), getreg32(GIC_ICDISER(irq)),
getreg32(GIC_ICDISPR(irq)), getreg32(GIC_ICDSAR(irq)));
irqllinfo(" IPR: %08x IPTR: %08x ICFR: %08x SPISR: %08x\n",
getreg32(GIC_ICDIPR(irq)), getreg32(GIC_ICDIPTR(irq)),
getreg32(GIC_ICDICFR(irq)), getreg32(GIC_ICDSPISR(irq)));
irqllinfo(" NSACR: %08x SCPR: %08x\n",
getreg32(GIC_ICDNSACR(irq)), getreg32(GIC_ICDSCPR(irq)));
irqinfo(" ISR: %08x ISER: %08x ISPR: %08x SAR: %08x\n",
getreg32(GIC_ICDISR(irq)), getreg32(GIC_ICDISER(irq)),
getreg32(GIC_ICDISPR(irq)), getreg32(GIC_ICDSAR(irq)));
irqinfo(" IPR: %08x IPTR: %08x ICFR: %08x SPISR: %08x\n",
getreg32(GIC_ICDIPR(irq)), getreg32(GIC_ICDIPTR(irq)),
getreg32(GIC_ICDICFR(irq)), getreg32(GIC_ICDSPISR(irq)));
irqinfo(" NSACR: %08x SCPR: %08x\n",
getreg32(GIC_ICDNSACR(irq)), getreg32(GIC_ICDSCPR(irq)));
}
irqllinfo(" PIDR[%08lx]:\n", (unsigned long)GIC_ICDPIDR(0));
irqllinfo(" %08x %08x %08x %08x\n",
getreg32(GIC_ICDPIDR(0)), getreg32(GIC_ICDPIDR(1)),
getreg32(GIC_ICDPIDR(2)), getreg32(GIC_ICDPIDR(3)));
irqllinfo(" %08x %08x %08x %08x\n",
getreg32(GIC_ICDPIDR(4)), getreg32(GIC_ICDPIDR(5)),
getreg32(GIC_ICDPIDR(6)));
irqllinfo(" CIDR[%08lx]:\n", (unsigned long)GIC_ICDCIDR(0));
irqllinfo(" %08x %08x %08x %08x\n",
getreg32(GIC_ICDCIDR(0)), getreg32(GIC_ICDCIDR(1)),
getreg32(GIC_ICDCIDR(2)), getreg32(GIC_ICDCIDR(3)));
irqinfo(" PIDR[%08lx]:\n", (unsigned long)GIC_ICDPIDR(0));
irqinfo(" %08x %08x %08x %08x\n",
getreg32(GIC_ICDPIDR(0)), getreg32(GIC_ICDPIDR(1)),
getreg32(GIC_ICDPIDR(2)), getreg32(GIC_ICDPIDR(3)));
irqinfo(" %08x %08x %08x %08x\n",
getreg32(GIC_ICDPIDR(4)), getreg32(GIC_ICDPIDR(5)),
getreg32(GIC_ICDPIDR(6)));
irqinfo(" CIDR[%08lx]:\n", (unsigned long)GIC_ICDCIDR(0));
irqinfo(" %08x %08x %08x %08x\n",
getreg32(GIC_ICDCIDR(0)), getreg32(GIC_ICDCIDR(1)),
getreg32(GIC_ICDCIDR(2)), getreg32(GIC_ICDCIDR(3)));
}
/****************************************************************************
@@ -295,11 +295,11 @@ void arm_gic_dump(const char *msg, bool all, int irq)
if (all)
{
irqllinfo("GIC: %s NLINES=%u\n", msg, nlines);
irqinfo("GIC: %s NLINES=%u\n", msg, nlines);
}
else
{
irqllinfo("GIC: %s IRQ=%d\n", msg, irq);
irqinfo("GIC: %s IRQ=%d\n", msg, irq);
}
arm_gic_dump_cpu(all, irq, nlines);
arch/arm/src/armv7-a/arm_l2cc_pl310.c
+1 -1
View File
@@ -411,7 +411,7 @@ void up_l2ccinitialize(void)
putreg32(L2CC_CR_L2CEN, L2CC_CR);
}
_llerr("(%d ways) * (%d bytes/way) = %d bytes\n",
sinfo("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
}
arch/arm/src/armv7-a/arm_prefetchabort.c
+2 -2
View File
@@ -86,8 +86,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
* virtual addresses.
*/
pgllerr("VADDR: %08x VBASE: %08x VEND: %08x\n",
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
pginfo("VADDR: %08x VBASE: %08x VEND: %08x\n",
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
{
arch/arm/src/armv7-a/arm_releasepending.c
+1 -1
View File
@@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
sllerr("From TCB=%p\n", rtcb);
sinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
arch/arm/src/armv7-a/arm_reprioritizertr.c
+1 -1
View File
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
sllerr("TCB=%p PRI=%d\n", tcb, priority);
sinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
arch/arm/src/armv7-a/arm_schedulesigaction.c
+2 -2
View File
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
arch/arm/src/armv7-a/arm_sigdeliver.c
+2 -2
View File
@@ -83,7 +83,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -114,7 +114,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
arch/arm/src/armv7-a/arm_syscall.c
+17 -17
View File
@@ -156,14 +156,14 @@ uint32_t *arm_syscall(uint32_t *regs)
* and R1..R7 = variable number of arguments depending on the system call.
*/
svcllinfo("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcllinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcllinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcllinfo("CPSR: %08x\n", regs[REG_CPSR]);
svcinfo("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
/* Handle the SVCall according to the command in R0 */
@@ -456,7 +456,7 @@ uint32_t *arm_syscall(uint32_t *regs)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
svcllerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@@ -479,14 +479,14 @@ uint32_t *arm_syscall(uint32_t *regs)
/* Report what happened */
svcllinfo("SYSCALL Exit: regs: %p\n", regs);
svcllinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcllinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcllinfo("CPSR: %08x\n", regs[REG_CPSR]);
svcinfo("SYSCALL Exit: regs: %p\n", regs);
svcinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
/* Return the last value of curent_regs. This supports context switches
* on return from the exception. That capability is only used with the
arch/arm/src/armv7-m/Kconfig
+1
View File
@@ -160,6 +160,7 @@ config ARMV7M_STACKCHECK
config ARMV7M_ITMSYSLOG
bool "ITM SYSLOG support"
default n
select ARCH_SYSLOG
select SYSLOG
---help---
Enable hooks to support ITM syslog output. This requires additional
arch/arm/src/armv7-m/itm_syslog.h
+1 -1
View File
@@ -57,7 +57,7 @@
*
****************************************************************************/
#if defined(CONFIG_SYSLOG) || defined(CONFIG_ARMV7M_ITMSYSLOG)
#ifdef CONFIG_ARMV7M_ITMSYSLOG
void itm_syslog_initialize(void);
#else
# define itm_syslog_initialize()
arch/arm/src/armv7-m/mpu.h
+5 -5
View File
@@ -219,13 +219,13 @@ uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
static inline void mpu_showtype(void)
{
#ifdef CONFIG_DEBUG_ERROR
#ifdef CONFIG_DEBUG_SCHED_INFO
uint32_t regval = getreg32(MPU_TYPE);
_err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);
sinfo("%s MPU Regions: data=%d instr=%d\n",
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);
#endif
}
arch/arm/src/armv7-m/up_assert.c
+2 -2
View File
@@ -198,7 +198,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
/* Let vsyslog do the real work */
va_start(ap, fmt);
ret = lowvsyslog(LOG_INFO, fmt, ap);
ret = vsyslog(LOG_EMERG, fmt, ap);
va_end(ap);
return ret;
}
@@ -375,7 +375,7 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
#if CONFIG_TASK_NAME_SIZE > 0
#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
struct tcb_s *rtcb = this_task();
#endif
arch/arm/src/armv7-m/up_elf.c
+8 -8
View File
@@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -90,7 +90,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -177,7 +177,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr("ERROR: ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -298,7 +298,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
berr("ERROR: ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -308,7 +308,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
berr("ERROR: ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -461,7 +461,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -471,7 +471,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
berr("RELA relocation not supported\n");
berr("ERROR: RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/armv7-m/up_hardfault.c
+29 -41
View File
@@ -60,25 +60,13 @@
*/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hferr(format, ...) _llerr(format, ##__VA_ARGS__)
# define hfalert(format, ...) _alert(format, ##__VA_ARGS__)
#else
# define hferr(x...)
# define hfalert(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -127,7 +115,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
hferr(" PC: %p INSN: %04x\n", pc, insn);
hfalert(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@@ -135,7 +123,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hferr("Forward SVCall\n");
hfalert("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@@ -143,43 +131,43 @@ int up_hardfault(int irq, FAR void *context)
/* Dump some hard fault info */
hferr("Hard Fault:\n");
hferr(" IRQ: %d regs: %p\n", irq, regs);
hferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
hferr(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
hfalert("Hard Fault:\n");
hfalert(" IRQ: %d regs: %p\n", irq, regs);
hfalert(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
hfalert(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
hfalert(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hfalert(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
hferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
hfalert(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
hfalert(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
hferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
hfalert(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
hfalert(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
(void)up_irq_save();
_llerr("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
_alert("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
PANIC();
return OK;
}
arch/arm/src/armv7-m/up_itm_syslog.c
+74 -35
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_itm_syslog.c
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Authors: Pierre-noel Bouteville <pnb990@gmail.com>
* Gregory Nutt <gnutt@nuttx.org>
*
@@ -52,7 +52,7 @@
#include "up_arch.h"
#include "itm_syslog.h"
#if defined(CONFIG_SYSLOG) || defined(CONFIG_ARMV7M_ITMSYSLOG)
#ifdef CONFIG_ARMV7M_ITMSYSLOG
/****************************************************************************
* Pre-processor Definitions
@@ -72,6 +72,73 @@
# define CONFIG_ARMV7M_ITMSYSLOG_PORT 0
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* SYSLOG channel methods */
static int itm_putc(int ch);
static int itm_flush(void);
/****************************************************************************
* Private Data
****************************************************************************/
/* This structure describes the ITM SYSLOG channel */
static const struct syslog_channel_s g_itm_channel =
{
.sc_putc = itm_putc,
.sc_force = itm_putc,
.sc_flush = itm_flush,
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: itm_putc
*
* Description:
* This is the low-level system logging interface.
*
****************************************************************************/
static int itm_putc(int ch)
{
/* ITM enabled */
if ((getreg32(ITM_TCR) & ITM_TCR_ITMENA_Msk) == 0)
{
return EOF;
}
/* ITM Port "CONFIG_ARMV7M_ITMSYSLOG_PORT" enabled */
if (getreg32(ITM_TER) & (1 << CONFIG_ARMV7M_ITMSYSLOG_PORT))
{
while (getreg32(ITM_PORT(CONFIG_ARMV7M_ITMSYSLOG_PORT)) == 0);
putreg8((uint8_t)ch, ITM_PORT(CONFIG_ARMV7M_ITMSYSLOG_PORT));
}
return ch;
}
/****************************************************************************
* Name: itm_flush
*
* Description:
* A dummy FLUSH method
*
****************************************************************************/
static int itm_flush(void)
{
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -116,38 +183,10 @@ void itm_syslog_initialize(void)
putreg32(0x0001000d, ITM_TCR);
putreg32(0x00000100, TPI_FFCR);
putreg32(0xffffffff, ITM_TER); /* Enable 32 Ports */
/* Setup the SYSLOG channel */
(void)syslog_channel(&g_itm_channel);
}
/****************************************************************************
* Name: syslog_putc
*
* Description:
* This is the low-level system logging interface. The debugging/syslogging
* interfaces are syslog() and lowsyslog(). The difference is that
* the syslog() internface writes to fd=1 (stdout) whereas lowsyslog() uses
* a lower level interface that works from interrupt handlers. This
* function is the low-level interface used to implement lowsyslog().
*
****************************************************************************/
int syslog_putc(int ch)
{
/* ITM enabled */
if ((getreg32(ITM_TCR) & ITM_TCR_ITMENA_Msk) == 0)
{
return EOF;
}
/* ITM Port "CONFIG_ARMV7M_ITMSYSLOG_PORT" enabled */
if (getreg32(ITM_TER) & (1 << CONFIG_ARMV7M_ITMSYSLOG_PORT))
{
while (getreg32(ITM_PORT(CONFIG_ARMV7M_ITMSYSLOG_PORT)) == 0);
putreg8((uint8_t)ch, ITM_PORT(CONFIG_ARMV7M_ITMSYSLOG_PORT));
}
return ch;
}
#endif /* CONFIG_SYSLOG && CONFIG_ARMV7M_ITMSYSLOG */
#endif /* CONFIG_ARMV7M_ITMSYSLOG */
arch/arm/src/armv7-m/up_memfault.c
+24 -34
View File
@@ -55,23 +55,13 @@
#undef DEBUG_MEMFAULTS /* Define to debug memory management faults */
#ifdef DEBUG_MEMFAULTS
# define mferr(format, ...) _llerr(format, ##__VA_ARGS__)
# define mferr(format, ...) _alert(format, ##__VA_ARGS__)
# define mfinfo(format, ...) _alert(format, ##__VA_ARGS__)
#else
# define mferr(x...)
# define mfinfo(x...)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -92,36 +82,36 @@ int up_memfault(int irq, FAR void *context)
/* Dump some memory management fault info */
(void)up_irq_save();
_llerr("PANIC!!! Memory Management Fault:\n");
mferr(" IRQ: %d context: %p\n", irq, regs);
_llerr(" CFAULTS: %08x MMFAR: %08x\n",
_alert("PANIC!!! Memory Management Fault:\n");
mfinfo(" IRQ: %d context: %p\n", irq, regs);
_alert(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
mferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
mferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
mferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
mfinfo(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
mfinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
mfinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
mferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
mfinfo(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
mfinfo(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
mferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
mfinfo(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
mfinfo(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
arch/arm/src/armv7-m/up_releasepending.c
+1 -1
View File
@@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
sllerr("From TCB=%p\n", rtcb);
sinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
arch/arm/src/armv7-m/up_reprioritizertr.c
+1 -1
View File
@@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
sllerr("TCB=%p PRI=%d\n", tcb, priority);
sinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just removed the head
arch/arm/src/armv7-m/up_schedulesigaction.c
+2 -2
View File
@@ -95,7 +95,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
DEBUGASSERT(tcb != NULL && sigdeliver != NULL);
/* Make sure that interrupts are disabled */
@@ -110,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
sinfo("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{

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