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Rename STM32_I2C_I2Cn_IRQ_PRIORITY to STM32_IRQ_I2Cn_PRIORITY to
match the naming used by the kernel v9 I2Cv4 driver, mirroring
the same rename already applied to stm32g4_mcuconf.h.
The ChibiOS I2Cv4 LLD (used on STM32G0/G4/C0/U0/U3/H5/L4+) uses a
single DMA channel per I2C peripheral, shared between TX and RX,
configured via STM32_I2C_I2Cx_DMA_CHANNEL. The previous code
emitted the separate STM32_I2C_I2Cx_RX/TX_DMA_STREAM defines used
by I2Cv2/I2Cv3, which no longer satisfy the I2Cv4 driver.
Detect I2Cv4 MCUs from CHIBIOS_PLATFORM_MK, allocate a single DMA
channel per I2C peripheral in dma_resolver.py (no _RX/_TX split),
and generate HAL_I2Cn_CONFIG entries that feed the single channel
into the shared DMA slot with SHARED_DMA_NONE as the partner.
Also replace the unconditional STM32_I2C_USE_I2Cn TRUE lines in
stm32g4_mcuconf.h with #ifndef-guarded defaults to FALSE, so
boards only enable the I2C peripherals their hwdef actually uses.
Without this, the I2Cv4 driver demanded DMA channels for every
I2C peripheral on every G4 board regardless of pin usage.
The ROMFS / ROMFS_WILDCARD / ROMFS_DIRECTORY hwdef keywords were
previously only understood by the ChibiOS hwdef parser, which has
duplicated implementations of romfs_add / romfs_wildcard / romfs_add_dir
and a write_ROMFS step that publishes env_vars['ROMFS_FILES']. Lift
all of that into the base HWDef class so any HAL with a hwdef parser
(SITL, future HALs) gets ROMFS handling for free.
- Base hwdef.py owns self.romfs, the romfs_*() methods, the
ROMFS / ROMFS_WILDCARD / ROMFS_DIRECTORY process_line cases,
the undef ROMFS handler, and write_ROMFS(); base run() calls
write_ROMFS() at the end so subclasses that don't override run()
publish ROMFS automatically.
- ChibiOS keeps a thin romfs_add_dir() override solely for its
bootloader-build no-op guard; everything else is inherited.
No behaviour change for ChibiOS boards.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
when safety is enabled (especially on IOMCU) we would get a last
chopped pulse, leading to servos going to extremes, or for reversible
ESCs we could end up with a propeller running at high speed
there were two bugs:
- we were using the current outputs max pulse width for the delay in
trigger_groups() when it should be the previous max width (as that
is the active one)
- we should not be doing a new trigger for oneshot for zero pulses,
it will naturally happen when the pulse ends
Replace RST :ref: cross-references to ArduPilot parameters with proper
markdown links to https://ardupilot.org/copter/docs/parameters.html.
Anchors verified by downloading the parameters page.
Also fix a SERIAL11_PROTOCOL typo in JHEMCUF405WING (should be
SERIAL1_PROTOCOL) and a bare :ref:common-FPort-receivers ref in
CORVON405V2_1.
Also fix two incorrect parameter names carried over from the original RST:
- BATT1_MONITOR → BATT_MONITOR (BATT1_MONITOR does not exist)
- RSSI_PIN → RSSI_ANA_PIN (RSSI_PIN does not exist; renamed parameter)
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Fix firmare.ardupilot.org → firmware.ardupilot.org (typo) in HWH7 and
MicoAir743-Lite. Fix common-limited_firmware → common-limited-firmware
(underscore vs hyphen) in ATOMRCF405NAVI-Deluxe.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
SkyViper has no IO MCU. Remove the embedded IOMCU firmware from ROMFS
(saves ~29 KB of flash), the USART6 pin definitions that were only
present as the IOMCU UART, and the USART6 DMA_NOSHARE/DMA_PRIORITY
entries that were carried over from fmuv3.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
this doesn't have any effect.
On the assumption that the hardware is tested and working presumably these devices actually use the default 0-is-on semantics
AP_BATTERY_BACKEND_DEFAULT_ENABLED is 0 and only AP_BATTERY_ANALOG_ENABLED
is set, so AP_BATTERY_SMBUS_ENABLED is never true and this override has
no effect.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
AP_COMPASS_BACKEND_DEFAULT_ENABLED is 0 and only BMM150 is enabled,
so IST8310 is never compiled in and this define has no effect.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Remove pins, peripherals, defines, and undefs that were inherited from
fmuv3 but immediately overridden or undefed by skyviper-v2450:
- UART8, USART3, CAN1, CAN2, IOMCU_UART, SDIO, USART6 pins/settings
- HAL_CHIBIOS_ARCH_FMUV3, HAL_WITH_RAMTRON, HAL_OS_FATFS_IO defines
- fmuv3 SERIAL_ORDER (skyviper defines its own)
- AP_NOTIFY_OREOLED_ENABLED undef+redefine collapsed to single define
- DMA_NOSHARE/PRIORITY simplified: USART6 entry removed, ADC1 kept
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
hwdef: skyviper-v2450: clean up PA1 UART4_RX NODMA
Replace the define/undef/redefine dance with a single clean definition.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>