mirror of
https://github.com/rene-dev/stmbl.git
synced 2026-02-06 02:02:34 +08:00
res freq
This commit is contained in:
@@ -2,7 +2,7 @@ load res
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res0.rt_prio = 2
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res0.sin = adc0.sin
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res0.cos = adc0.cos
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adc0.res_en = 1
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adc0.res_mode = res0.res_mode
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res0.quad = adc0.quad
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res0.poles = conf0.mot_fb_polecount
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fb_switch0.mot_pos = res0.pos
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10
inc/hw/hw.h
10
inc/hw/hw.h
@@ -123,11 +123,15 @@
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//sample times for F4: 3,15,28,56,84,112,144,480
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#define RES_SampleTime ADC_SampleTime_3Cycles
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// ADC_TIMER_FREQ / RES_TIMER_FREQ / ADC_TR_COUNT \in \N
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#define ADC_TR_COUNT 6 // ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) == 60
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#define PID_WAVES 4
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#define RT_FREQ 5000
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#define FRT_FREQ 20000
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#define ADC_SAMPLES_IN_RT 240
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#define ADC_TRIGGER_FREQ (RT_FREQ * ADC_SAMPLES_IN_RT) // master freq
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#define FRT_PRESCALER (ADC_TRIGGER_FREQ / FRT_FREQ)
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#define ADC_OVER_FB0 9
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#define ADC_OVER_FB1 1
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#define ADC_GROUPS (ADC_SAMPLES_IN_RT / (ADC_OVER_FB0 + ADC_OVER_FB1))
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#define ADC_TIMER_FREQ 84000000
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#define RES_TIMER_FREQ 20000
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155
src/comps/adc.c
155
src/comps/adc.c
@@ -8,15 +8,14 @@
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#define INPUT_REF (OP_REF * OP_R_OUT_LOW / (OP_R_OUT_HIGH + OP_R_OUT_LOW))
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#define INPUT_GAIN (OP_R_FEEDBACK / OP_R_INPUT * OP_R_OUT_LOW / (OP_R_OUT_HIGH + OP_R_OUT_LOW))
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#define V_DIFF(ADC, OVER) ((((float)ADC) / (float)(OVER) / ADC_RES * ADC_REF - INPUT_REF) / INPUT_GAIN)
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#define V_DIFF2(ADC) (((ADC) / ADC_RES * ADC_REF - INPUT_REF) / INPUT_GAIN)
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#define V_DIFF(ADC, OVER) ((((float)(ADC)) / (float)(OVER) / ADC_RES * ADC_REF - INPUT_REF) / INPUT_GAIN)
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#define TERM_NUM_WAVES 8
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HAL_COMP(adc);
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HAL_PIN(sin); //sin output
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HAL_PIN(cos); //cos output
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HAL_PIN(sin); //sin output
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HAL_PIN(cos); //cos output
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HAL_PIN(sin3); //sin output, last quater only
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HAL_PIN(cos3); //cos output, last quater only
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HAL_PIN(quad); //quadrant of sin/cos
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@@ -24,7 +23,7 @@ HAL_PIN(quad); //quadrant of sin/cos
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HAL_PIN(sin1); //sin output
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HAL_PIN(cos1); //cos output
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HAL_PIN(res_en); //flip polarity for resolvers
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HAL_PIN(res_mode); //polarity flip mode for resolvers
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HAL_PIN(sin_gain);
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HAL_PIN(cos_gain);
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@@ -38,20 +37,21 @@ HAL_PINA(offset, 8);
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HAL_PINA(gain, 8);
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struct adc_ctx_t {
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volatile float txbuf[8][ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1)];
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volatile uint32_t txbuf_raw[ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1)];
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volatile float txbuf[8][ADC_SAMPLES_IN_RT];
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volatile uint32_t txbuf_raw[ADC_SAMPLES_IN_RT];
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uint32_t txpos;
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uint32_t send_counter; //send_step counter
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uint32_t send_counter; //send_step counter
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volatile uint32_t send; //send buffer state 0=filling, 1=sending
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};
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static void nrt_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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struct adc_ctx_t *ctx = (struct adc_ctx_t *)ctx_ptr;
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struct adc_pin_ctx_t *pins = (struct adc_pin_ctx_t *)pin_ptr;
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PINA(gain, 0) = 200;
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PINA(gain, 1) = 200;
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PINA(gain, 2) = 200;
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PINA(gain, 3) = 200;
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PINA(gain, 0) = 150;
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PINA(gain, 1) = 150;
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PINA(gain, 2) = 150;
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PINA(gain, 3) = 150;
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PINA(gain, 4) = 80;
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PIN(sin_gain) = 1.0;
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PIN(cos_gain) = 1.0;
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ctx->txpos = 0;
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@@ -63,13 +63,13 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
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struct adc_ctx_t *ctx = (struct adc_ctx_t *)ctx_ptr;
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struct adc_pin_ctx_t *pins = (struct adc_pin_ctx_t *)pin_ptr;
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float si0[PID_WAVES * ADC_OVER_FB0];
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float co0[PID_WAVES * ADC_OVER_FB0];
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float si0[ADC_GROUPS];
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float co0[ADC_GROUPS];
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uint32_t sii0, coi0;
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#ifdef FB1
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float co1[PID_WAVES * ADC_OVER_FB1];
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float si1[PID_WAVES * ADC_OVER_FB1];
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float co1[ADC_GROUPS];
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float si1[ADC_GROUPS];
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uint32_t sii1, coi1;
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#endif
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@@ -88,52 +88,59 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
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// else{
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ADC_DMA_Buffer = ADC_DMA_Buffer0;
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// }
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for(int i = 0; i < PID_WAVES; i++) {
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sii0 = 0;
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coi0 = 0;
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#ifdef FB1
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sii1 = 0;
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coi1 = 0;
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#endif
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for(int j = 0; j < ADC_TR_COUNT; j++) {
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//ADC dual mode puts both channels in one word, right aligned.
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for(int k = 0; k < ADC_OVER_FB0; k++) {
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sii0 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff;
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coi0 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16;
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}
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#ifdef FB1
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for(int k = ADC_OVER_FB0; k < ADC_OVER_FB0 + ADC_OVER_FB1; k++) {
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sii1 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff;
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coi1 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16;
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}
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#endif
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int flip;
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int n = PIN(res_mode);
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for(int i = 0; i < ADC_GROUPS; i++) {
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if(n > 0 && i % (2 * n) >= n) {
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flip = -1;
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} else {
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flip = 1;
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}
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si0[i] = s_g * V_DIFF(sii0, ADC_TR_COUNT * ADC_OVER_FB0) + s_o;
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co0[i] = c_g * V_DIFF(coi0, ADC_TR_COUNT * ADC_OVER_FB0) + c_o;
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si0[i] = 0;
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co0[i] = 0;
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#ifdef FB1
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si1[i] = s_g * V_DIFF(sii1, ADC_TR_COUNT * ADC_OVER_FB1) + s_o;
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co1[i] = c_g * V_DIFF(coi1, ADC_TR_COUNT * ADC_OVER_FB1) + c_o;
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si1[i] = 0;
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co1[i] = 0;
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#endif
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//ADC dual mode puts both channels in one word, right aligned.
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for(int j = 0; j < ADC_OVER_FB0; j++) {
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sii0 += ADC_DMA_Buffer[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] & 0x0000ffff;
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coi0 += ADC_DMA_Buffer[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] >> 16;
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}
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#ifdef FB1
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for(int j = ADC_OVER_FB0; j < ADC_OVER_FB0 + ADC_OVER_FB1; j++) {
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sii1 += ADC_DMA_Buffer[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] & 0x0000ffff;
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coi1 += ADC_DMA_Buffer[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] >> 16;
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}
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#endif
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si0[i] = s_g * V_DIFF(si0[i], ADC_OVER_FB0) + s_o;
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co0[i] = c_g * V_DIFF(co0[i], ADC_OVER_FB0) + c_o;
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#ifdef FB1
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si1[i] = s_g * V_DIFF(si1[i], ADC_OVER_FB1) + s_o;
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co1[i] = c_g * V_DIFF(co1[i], ADC_OVER_FB1) + c_o;
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#endif
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}
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//copy dma buffer for plotting TODO: use dual mode, for zero copy
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if(ctx->send == 0) {
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memcpy(ctx->txbuf_raw, ADC_DMA_Buffer, ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1) * 4);
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memcpy((void *)(ctx->txbuf_raw), (void *)ADC_DMA_Buffer, ADC_SAMPLES_IN_RT * 4);
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ctx->send = 1;
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}
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PIN(sin3) = si0[3];
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PIN(cos3) = co0[3];
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PIN(sin3) = si0[ADC_GROUPS - 1];
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PIN(cos3) = co0[ADC_GROUPS - 1];
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#ifdef FB1
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PIN(sin1) = si1[3];
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PIN(cos1) = co1[3];
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PIN(sin1) = si1[ADC_GROUPS - 1];
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PIN(cos1) = co1[ADC_GROUPS - 1];
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#endif
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if(PIN(res_en) > 0.0) {
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s = (si0[3] - si0[2] + si0[1] - si0[0]) / 4.0;
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c = (co0[3] - co0[2] + co0[1] - co0[0]) / 4.0;
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} else {
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s = (si0[3] + si0[2] + si0[1] + si0[0]) / 4.0;
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c = (co0[3] + co0[2] + co0[1] + co0[0]) / 4.0;
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}
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// if(PIN(res_en) > 0.0) {
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// s = (si0[3] - si0[2] + si0[1] - si0[0]) / 4.0;
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// c = (co0[3] - co0[2] + co0[1] - co0[0]) / 4.0;
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// } else {
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// s = (si0[3] + si0[2] + si0[1] + si0[0]) / 4.0;
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// c = (co0[3] + co0[2] + co0[1] + co0[0]) / 4.0;
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// }
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if(si0[3] >= 0) {
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if(co0[3] > 0)
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@@ -150,6 +157,7 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
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PIN(cos) = c;
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}
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static void nrt_func(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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struct adc_ctx_t *ctx = (struct adc_ctx_t *)ctx_ptr;
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struct adc_pin_ctx_t *pins = (struct adc_pin_ctx_t *)pin_ptr;
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@@ -157,29 +165,41 @@ static void nrt_func(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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int tmp = 0;
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uint8_t buf[TERM_NUM_WAVES + 3];
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int n = PIN(res_mode); //n gruppen pro halbwelle 1-12
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int flip;
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if(ctx->send == 1 && ctx->send_counter++ >= PIN(send_step) - 1 && PIN(send_step) > 0) {
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ctx->send_counter = 0;
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for(int i = 0; i < PID_WAVES; i++) {
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for(int j = 0; j < ADC_TR_COUNT; j++) {
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for(int k = 0; k < ADC_OVER_FB0; k++) {
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ctx->txbuf[0][ctx->txpos] = (((i == 0 || i == 2) && (PIN(res_en) > 0.0)) ? -1.0 : 1.0) * V_DIFF2(ctx->txbuf_raw[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff);
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ctx->txbuf[1][ctx->txpos] = (((i == 0 || i == 2) && (PIN(res_en) > 0.0)) ? -1.0 : 1.0) * V_DIFF2(ctx->txbuf_raw[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16);
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ctx->txpos++;
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}
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#ifdef FB1
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for(int k = ADC_OVER_FB0; k < ADC_OVER_FB0 + ADC_OVER_FB1; k++) {
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ctx->txbuf[2][ctx->txpos] = V_DIFF2(ctx->txbuf_raw[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff);
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ctx->txbuf[3][ctx->txpos] = V_DIFF2(ctx->txbuf_raw[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16);
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ctx->txpos++;
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}
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#endif
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for(int i = 0; i < ADC_GROUPS; i++) { //each adc sampling group
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if(n > 0 && i % (2 * n) >= n) {
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flip = -1;
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} else {
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flip = 1;
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}
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for(int j = 0; j < ADC_OVER_FB0; j++) { //each adc sample of fb0
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ctx->txbuf[0][ctx->txpos] = flip * V_DIFF(ctx->txbuf_raw[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] & 0x0000ffff, 1);
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ctx->txbuf[1][ctx->txpos] = flip * V_DIFF(ctx->txbuf_raw[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] >> 16, 1);
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ctx->txbuf[2][ctx->txpos] = 0;
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ctx->txbuf[3][ctx->txpos] = 0;
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ctx->txbuf[4][ctx->txpos] = flip;
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ctx->txpos++;
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}
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#ifdef FB1
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for(int j = ADC_OVER_FB0; j < ADC_OVER_FB0 + ADC_OVER_FB1; j++) { //each adc sample of fb1
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ctx->txbuf[0][ctx->txpos] = 0;
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ctx->txbuf[1][ctx->txpos] = 0;
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ctx->txbuf[2][ctx->txpos] = V_DIFF(ctx->txbuf_raw[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] & 0x0000ffff, 1);
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ctx->txbuf[3][ctx->txpos] = V_DIFF(ctx->txbuf_raw[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] >> 16, 1);
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ctx->txbuf[4][ctx->txpos] = flip;
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ctx->txpos++;
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}
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#endif
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}
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ctx->txpos = 0;
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buf[0] = 255;
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for(int k = 0; k < ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1); k++) {
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for(int i = 0; i < TERM_NUM_WAVES; i++) {
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for(int k = 0; k < ADC_SAMPLES_IN_RT; k++) { //each sample
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for(int i = 0; i < TERM_NUM_WAVES; i++) { //each wave
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tmp = (ctx->txbuf[i][k] + PINA(offset, i)) * PINA(gain, i) + 128;
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buf[i + 1] = CLAMP(tmp, 1, 254);
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}
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@@ -190,6 +210,7 @@ static void nrt_func(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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}
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}
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buf[0] = 0xfe; //trigger servoterm
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buf[1] = 0x00;
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if(USB_CDC_is_connected()) {
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@@ -23,11 +23,14 @@ HAL_PIN(enable);
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HAL_PIN(error);
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HAL_PIN(state);
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HAL_PIN(tim_oc);
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HAL_PIN(tim_arr);
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HAL_PIN(res_mode);
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HAL_PIN(res_freq);
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// TODO: in hal stop, reset adc dma
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struct res_ctx_t {
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int lastq; // last quadrant
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int lastq; // last quadrant
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int abspos; // multiturn position
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};
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@@ -37,10 +40,11 @@ static void nrt_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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PIN(poles) = 1.0;
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PIN(tim_oc) = 0.85;
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PIN(min_amp) = 0.15;
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PIN(res_freq) = 10000;
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}
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static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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struct res_ctx_t *ctx = (struct res_ctx_t *)ctx_ptr;
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// struct res_pin_ctx_t *pins = (struct res_pin_ctx_t *)pin_ptr;
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struct res_ctx_t *ctx = (struct res_ctx_t *)ctx_ptr;
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struct res_pin_ctx_t *pins = (struct res_pin_ctx_t *)pin_ptr;
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ctx->abspos = 0;
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ctx->lastq = 0;
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@@ -55,15 +59,29 @@ static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
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TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
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TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseStructure.TIM_Period = ADC_TR_COUNT - 1; // 20kHz
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TIM_TimeBaseStructure.TIM_Period = ADC_TRIGGER_FREQ / FRT_FREQ - 1; // 20kHz
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TIM_TimeBaseStructure.TIM_Prescaler = 0;
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TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
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TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
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TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_External1); // Rising edges of the selected trigger (TRGI) clock the counter
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TIM_ITRxExternalClockConfig(TIM4, TIM_TS_ITR2); // clk = TIM_MASTER(TIM2) trigger out
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TIM_ITRxExternalClockConfig(TIM4, TIM_TS_ITR2); // clk = TIM_MASTER(TIM2) trigger out
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TIM_ARRPreloadConfig(TIM4, ENABLE);
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TIM_Cmd(TIM4, ENABLE);
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#endif
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//12-1 40khz
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//15-1 35khz
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//20-1 30khz 2
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//24-1 25khz
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//30-1 20khz 3
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//40-1 15khz 4
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//60-1 10khz 6 default
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//120-1 5khz 12
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//res_en = ADC_GROUPS/2/(res_freq/rt_freq)
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//arr = ADC_TRIGGER_FREQ/2/res_freq
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PIN(tim_arr) = ADC_TRIGGER_FREQ / FRT_FREQ - 1;
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// resolver reference signal OC
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TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle;
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TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
|
||||
@@ -102,10 +120,12 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
|
||||
struct res_pin_ctx_t *pins = (struct res_pin_ctx_t *)pin_ptr;
|
||||
//TODO: arr can change!
|
||||
FB0_RES_REF_TIM->CCR3 = (int)CLAMP(PIN(tim_oc) * FB0_RES_REF_TIM->ARR, 0, FB0_RES_REF_TIM->ARR - 1);
|
||||
|
||||
float s = 0.0;
|
||||
float c = 0.0;
|
||||
float a = 0.0;
|
||||
FB0_RES_REF_TIM->ARR = ADC_TRIGGER_FREQ / 2 / PIN(res_freq) - 1;
|
||||
PIN(tim_arr) = FB0_RES_REF_TIM->ARR;
|
||||
PIN(res_mode) = ADC_GROUPS / 2 / (PIN(res_freq) / RT_FREQ);
|
||||
float s = 0.0;
|
||||
float c = 0.0;
|
||||
float a = 0.0;
|
||||
|
||||
s = PIN(sin);
|
||||
c = PIN(cos);
|
||||
|
||||
27
src/setup.c
27
src/setup.c
@@ -8,6 +8,7 @@
|
||||
|
||||
#include "setup.h"
|
||||
#include "usbd_cdc_if.h"
|
||||
#include "defines.h"
|
||||
|
||||
void setup() {
|
||||
//Enable clocks
|
||||
@@ -49,7 +50,7 @@ void setup_res() {
|
||||
RCC_APB1PeriphClockCmd(TIM_MASTER_RCC, ENABLE);
|
||||
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
|
||||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
TIM_TimeBaseStructure.TIM_Period = ADC_TIMER_FREQ / RES_TIMER_FREQ / ADC_TR_COUNT - 1; // 240khz
|
||||
TIM_TimeBaseStructure.TIM_Period = ADC_TIMER_FREQ / ADC_TRIGGER_FREQ - 1; //70 1.2MHz
|
||||
TIM_TimeBaseStructure.TIM_Prescaler = 0;
|
||||
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
|
||||
TIM_TimeBaseInit(TIM_MASTER, &TIM_TimeBaseStructure);
|
||||
@@ -68,16 +69,16 @@ void setup_res() {
|
||||
TIM_MASTER_ADC_OC_PRELOAD(TIM_MASTER, TIM_OCPreload_Enable);
|
||||
TIM_CtrlPWMOutputs(TIM_MASTER, ENABLE);
|
||||
|
||||
//slave timer
|
||||
//slave timer triggers frt
|
||||
RCC_APB1PeriphClockCmd(TIM_SLAVE_RCC, ENABLE);
|
||||
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
|
||||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
TIM_TimeBaseStructure.TIM_Period = ADC_TR_COUNT - 1; // 20kHz
|
||||
TIM_TimeBaseStructure.TIM_Period = ADC_TRIGGER_FREQ / FRT_FREQ - 1; //60 20kHz
|
||||
TIM_TimeBaseStructure.TIM_Prescaler = 0;
|
||||
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
|
||||
TIM_TimeBaseInit(TIM_SLAVE, &TIM_TimeBaseStructure);
|
||||
TIM_SelectSlaveMode(TIM_SLAVE, TIM_SlaveMode_External1); //Rising edges of the selected trigger (TRGI) clock the counter
|
||||
TIM_ITRxExternalClockConfig(TIM_SLAVE, TIM_SLAVE_ITR); // clk = TIM_MASTER trigger out
|
||||
TIM_ITRxExternalClockConfig(TIM_SLAVE, TIM_SLAVE_ITR); // clk = TIM_MASTER trigger out
|
||||
TIM_ARRPreloadConfig(TIM_SLAVE, ENABLE);
|
||||
|
||||
TIM_Cmd(TIM_SLAVE, ENABLE);
|
||||
@@ -111,13 +112,13 @@ void setup_res() {
|
||||
ADC_DeInit();
|
||||
ADC_InitTypeDef ADC_InitStructure;
|
||||
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; //data converted will be shifted to right
|
||||
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; //Input voltage is converted into a 12bit number giving a maximum value of 4096
|
||||
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; //the conversion is continuous, the input data is converted more than once
|
||||
ADC_InitStructure.ADC_ExternalTrigConv = TIM_MASTER_ADC; //trigger on rising edge of TIM_MASTER oc
|
||||
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; //Input voltage is converted into a 12bit number giving a maximum value of 4096
|
||||
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; //the conversion is continuous, the input data is converted more than once
|
||||
ADC_InitStructure.ADC_ExternalTrigConv = TIM_MASTER_ADC; //trigger on rising edge of TIM_MASTER oc
|
||||
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising;
|
||||
ADC_InitStructure.ADC_NbrOfConversion = ADC_OVER_FB0 + ADC_OVER_FB1; //I think this one is clear :p
|
||||
ADC_InitStructure.ADC_ScanConvMode = ENABLE; //The scan is configured in one channel
|
||||
ADC_Init(FB0_SIN_ADC, &ADC_InitStructure); //Initialize ADC with the previous configuration
|
||||
ADC_InitStructure.ADC_ScanConvMode = ENABLE; //The scan is configured in one channel
|
||||
ADC_Init(FB0_SIN_ADC, &ADC_InitStructure); //Initialize ADC with the previous configuration
|
||||
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
|
||||
ADC_Init(FB0_COS_ADC, &ADC_InitStructure); //Initialize ADC with the previous configuration
|
||||
|
||||
@@ -140,6 +141,12 @@ void setup_res() {
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
ADC_DiscModeChannelCountConfig(ADC1, 1);
|
||||
ADC_DiscModeChannelCountConfig(ADC2, 1);
|
||||
ADC_DiscModeCmd(ADC1, ENABLE);
|
||||
ADC_DiscModeCmd(ADC2, ENABLE);
|
||||
|
||||
ADC_MultiModeDMARequestAfterLastTransferCmd(ENABLE);
|
||||
|
||||
//Enable ADC conversion
|
||||
@@ -156,7 +163,7 @@ void setup_res() {
|
||||
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC->CDR;
|
||||
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC_DMA_Buffer0;
|
||||
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
|
||||
DMA_InitStructure.DMA_BufferSize = ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1);
|
||||
DMA_InitStructure.DMA_BufferSize = ARRAY_SIZE(ADC_DMA_Buffer0);
|
||||
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
||||
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
|
||||
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
|
||||
|
||||
Reference in New Issue
Block a user