From ddcd1763b20c5e2f96877166c68b34d483b84079 Mon Sep 17 00:00:00 2001 From: Rene Hopf Date: Sat, 3 Feb 2018 07:59:22 +0100 Subject: [PATCH] res freq --- conf/template/res_fb0.txt | 2 +- inc/hw/hw.h | 10 ++- src/comps/adc.c | 155 ++++++++++++++++++++++---------------- src/comps/res.c | 38 +++++++--- src/setup.c | 27 ++++--- 5 files changed, 142 insertions(+), 90 deletions(-) diff --git a/conf/template/res_fb0.txt b/conf/template/res_fb0.txt index 49111b42..39bcc660 100644 --- a/conf/template/res_fb0.txt +++ b/conf/template/res_fb0.txt @@ -2,7 +2,7 @@ load res res0.rt_prio = 2 res0.sin = adc0.sin res0.cos = adc0.cos -adc0.res_en = 1 +adc0.res_mode = res0.res_mode res0.quad = adc0.quad res0.poles = conf0.mot_fb_polecount fb_switch0.mot_pos = res0.pos diff --git a/inc/hw/hw.h b/inc/hw/hw.h index fabe1c40..c4a2d1a1 100644 --- a/inc/hw/hw.h +++ b/inc/hw/hw.h @@ -123,11 +123,15 @@ //sample times for F4: 3,15,28,56,84,112,144,480 #define RES_SampleTime ADC_SampleTime_3Cycles -// ADC_TIMER_FREQ / RES_TIMER_FREQ / ADC_TR_COUNT \in \N -#define ADC_TR_COUNT 6 // ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) == 60 -#define PID_WAVES 4 +#define RT_FREQ 5000 +#define FRT_FREQ 20000 +#define ADC_SAMPLES_IN_RT 240 +#define ADC_TRIGGER_FREQ (RT_FREQ * ADC_SAMPLES_IN_RT) // master freq +#define FRT_PRESCALER (ADC_TRIGGER_FREQ / FRT_FREQ) #define ADC_OVER_FB0 9 #define ADC_OVER_FB1 1 +#define ADC_GROUPS (ADC_SAMPLES_IN_RT / (ADC_OVER_FB0 + ADC_OVER_FB1)) + #define ADC_TIMER_FREQ 84000000 #define RES_TIMER_FREQ 20000 diff --git a/src/comps/adc.c b/src/comps/adc.c index 8daee749..883e90b3 100644 --- a/src/comps/adc.c +++ b/src/comps/adc.c @@ -8,15 +8,14 @@ #define INPUT_REF (OP_REF * OP_R_OUT_LOW / (OP_R_OUT_HIGH + OP_R_OUT_LOW)) #define INPUT_GAIN (OP_R_FEEDBACK / OP_R_INPUT * OP_R_OUT_LOW / (OP_R_OUT_HIGH + OP_R_OUT_LOW)) -#define V_DIFF(ADC, OVER) ((((float)ADC) / (float)(OVER) / ADC_RES * ADC_REF - INPUT_REF) / INPUT_GAIN) -#define V_DIFF2(ADC) (((ADC) / ADC_RES * ADC_REF - INPUT_REF) / INPUT_GAIN) +#define V_DIFF(ADC, OVER) ((((float)(ADC)) / (float)(OVER) / ADC_RES * ADC_REF - INPUT_REF) / INPUT_GAIN) #define TERM_NUM_WAVES 8 HAL_COMP(adc); -HAL_PIN(sin); //sin output -HAL_PIN(cos); //cos output +HAL_PIN(sin); //sin output +HAL_PIN(cos); //cos output HAL_PIN(sin3); //sin output, last quater only HAL_PIN(cos3); //cos output, last quater only HAL_PIN(quad); //quadrant of sin/cos @@ -24,7 +23,7 @@ HAL_PIN(quad); //quadrant of sin/cos HAL_PIN(sin1); //sin output HAL_PIN(cos1); //cos output -HAL_PIN(res_en); //flip polarity for resolvers +HAL_PIN(res_mode); //polarity flip mode for resolvers HAL_PIN(sin_gain); HAL_PIN(cos_gain); @@ -38,20 +37,21 @@ HAL_PINA(offset, 8); HAL_PINA(gain, 8); struct adc_ctx_t { - volatile float txbuf[8][ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1)]; - volatile uint32_t txbuf_raw[ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1)]; + volatile float txbuf[8][ADC_SAMPLES_IN_RT]; + volatile uint32_t txbuf_raw[ADC_SAMPLES_IN_RT]; uint32_t txpos; - uint32_t send_counter; //send_step counter + uint32_t send_counter; //send_step counter volatile uint32_t send; //send buffer state 0=filling, 1=sending }; static void nrt_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) { struct adc_ctx_t *ctx = (struct adc_ctx_t *)ctx_ptr; struct adc_pin_ctx_t *pins = (struct adc_pin_ctx_t *)pin_ptr; - PINA(gain, 0) = 200; - PINA(gain, 1) = 200; - PINA(gain, 2) = 200; - PINA(gain, 3) = 200; + PINA(gain, 0) = 150; + PINA(gain, 1) = 150; + PINA(gain, 2) = 150; + PINA(gain, 3) = 150; + PINA(gain, 4) = 80; PIN(sin_gain) = 1.0; PIN(cos_gain) = 1.0; ctx->txpos = 0; @@ -63,13 +63,13 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_ struct adc_ctx_t *ctx = (struct adc_ctx_t *)ctx_ptr; struct adc_pin_ctx_t *pins = (struct adc_pin_ctx_t *)pin_ptr; - float si0[PID_WAVES * ADC_OVER_FB0]; - float co0[PID_WAVES * ADC_OVER_FB0]; + float si0[ADC_GROUPS]; + float co0[ADC_GROUPS]; uint32_t sii0, coi0; #ifdef FB1 - float co1[PID_WAVES * ADC_OVER_FB1]; - float si1[PID_WAVES * ADC_OVER_FB1]; + float co1[ADC_GROUPS]; + float si1[ADC_GROUPS]; uint32_t sii1, coi1; #endif @@ -88,52 +88,59 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_ // else{ ADC_DMA_Buffer = ADC_DMA_Buffer0; // } - for(int i = 0; i < PID_WAVES; i++) { - sii0 = 0; - coi0 = 0; -#ifdef FB1 - sii1 = 0; - coi1 = 0; -#endif - for(int j = 0; j < ADC_TR_COUNT; j++) { - //ADC dual mode puts both channels in one word, right aligned. - for(int k = 0; k < ADC_OVER_FB0; k++) { - sii0 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff; - coi0 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16; - } -#ifdef FB1 - for(int k = ADC_OVER_FB0; k < ADC_OVER_FB0 + ADC_OVER_FB1; k++) { - sii1 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff; - coi1 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16; - } -#endif + int flip; + int n = PIN(res_mode); + for(int i = 0; i < ADC_GROUPS; i++) { + if(n > 0 && i % (2 * n) >= n) { + flip = -1; + } else { + flip = 1; } - si0[i] = s_g * V_DIFF(sii0, ADC_TR_COUNT * ADC_OVER_FB0) + s_o; - co0[i] = c_g * V_DIFF(coi0, ADC_TR_COUNT * ADC_OVER_FB0) + c_o; + si0[i] = 0; + co0[i] = 0; #ifdef FB1 - si1[i] = s_g * V_DIFF(sii1, ADC_TR_COUNT * ADC_OVER_FB1) + s_o; - co1[i] = c_g * V_DIFF(coi1, ADC_TR_COUNT * ADC_OVER_FB1) + c_o; + si1[i] = 0; + co1[i] = 0; +#endif + //ADC dual mode puts both channels in one word, right aligned. + for(int j = 0; j < ADC_OVER_FB0; j++) { + sii0 += ADC_DMA_Buffer[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] & 0x0000ffff; + coi0 += ADC_DMA_Buffer[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] >> 16; + } +#ifdef FB1 + for(int j = ADC_OVER_FB0; j < ADC_OVER_FB0 + ADC_OVER_FB1; j++) { + sii1 += ADC_DMA_Buffer[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] & 0x0000ffff; + coi1 += ADC_DMA_Buffer[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] >> 16; + } +#endif + + si0[i] = s_g * V_DIFF(si0[i], ADC_OVER_FB0) + s_o; + co0[i] = c_g * V_DIFF(co0[i], ADC_OVER_FB0) + c_o; +#ifdef FB1 + si1[i] = s_g * V_DIFF(si1[i], ADC_OVER_FB1) + s_o; + co1[i] = c_g * V_DIFF(co1[i], ADC_OVER_FB1) + c_o; #endif } + //copy dma buffer for plotting TODO: use dual mode, for zero copy if(ctx->send == 0) { - memcpy(ctx->txbuf_raw, ADC_DMA_Buffer, ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1) * 4); + memcpy((void *)(ctx->txbuf_raw), (void *)ADC_DMA_Buffer, ADC_SAMPLES_IN_RT * 4); ctx->send = 1; } - PIN(sin3) = si0[3]; - PIN(cos3) = co0[3]; + PIN(sin3) = si0[ADC_GROUPS - 1]; + PIN(cos3) = co0[ADC_GROUPS - 1]; #ifdef FB1 - PIN(sin1) = si1[3]; - PIN(cos1) = co1[3]; + PIN(sin1) = si1[ADC_GROUPS - 1]; + PIN(cos1) = co1[ADC_GROUPS - 1]; #endif - if(PIN(res_en) > 0.0) { - s = (si0[3] - si0[2] + si0[1] - si0[0]) / 4.0; - c = (co0[3] - co0[2] + co0[1] - co0[0]) / 4.0; - } else { - s = (si0[3] + si0[2] + si0[1] + si0[0]) / 4.0; - c = (co0[3] + co0[2] + co0[1] + co0[0]) / 4.0; - } + // if(PIN(res_en) > 0.0) { + // s = (si0[3] - si0[2] + si0[1] - si0[0]) / 4.0; + // c = (co0[3] - co0[2] + co0[1] - co0[0]) / 4.0; + // } else { + // s = (si0[3] + si0[2] + si0[1] + si0[0]) / 4.0; + // c = (co0[3] + co0[2] + co0[1] + co0[0]) / 4.0; + // } if(si0[3] >= 0) { if(co0[3] > 0) @@ -150,6 +157,7 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_ PIN(cos) = c; } + static void nrt_func(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) { struct adc_ctx_t *ctx = (struct adc_ctx_t *)ctx_ptr; struct adc_pin_ctx_t *pins = (struct adc_pin_ctx_t *)pin_ptr; @@ -157,29 +165,41 @@ static void nrt_func(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) { int tmp = 0; uint8_t buf[TERM_NUM_WAVES + 3]; + int n = PIN(res_mode); //n gruppen pro halbwelle 1-12 + int flip; if(ctx->send == 1 && ctx->send_counter++ >= PIN(send_step) - 1 && PIN(send_step) > 0) { ctx->send_counter = 0; - for(int i = 0; i < PID_WAVES; i++) { - for(int j = 0; j < ADC_TR_COUNT; j++) { - for(int k = 0; k < ADC_OVER_FB0; k++) { - ctx->txbuf[0][ctx->txpos] = (((i == 0 || i == 2) && (PIN(res_en) > 0.0)) ? -1.0 : 1.0) * V_DIFF2(ctx->txbuf_raw[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff); - ctx->txbuf[1][ctx->txpos] = (((i == 0 || i == 2) && (PIN(res_en) > 0.0)) ? -1.0 : 1.0) * V_DIFF2(ctx->txbuf_raw[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16); - ctx->txpos++; - } -#ifdef FB1 - for(int k = ADC_OVER_FB0; k < ADC_OVER_FB0 + ADC_OVER_FB1; k++) { - ctx->txbuf[2][ctx->txpos] = V_DIFF2(ctx->txbuf_raw[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff); - ctx->txbuf[3][ctx->txpos] = V_DIFF2(ctx->txbuf_raw[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16); - ctx->txpos++; - } -#endif + for(int i = 0; i < ADC_GROUPS; i++) { //each adc sampling group + if(n > 0 && i % (2 * n) >= n) { + flip = -1; + } else { + flip = 1; } + for(int j = 0; j < ADC_OVER_FB0; j++) { //each adc sample of fb0 + ctx->txbuf[0][ctx->txpos] = flip * V_DIFF(ctx->txbuf_raw[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] & 0x0000ffff, 1); + ctx->txbuf[1][ctx->txpos] = flip * V_DIFF(ctx->txbuf_raw[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] >> 16, 1); + ctx->txbuf[2][ctx->txpos] = 0; + ctx->txbuf[3][ctx->txpos] = 0; + ctx->txbuf[4][ctx->txpos] = flip; + ctx->txpos++; + } +#ifdef FB1 + for(int j = ADC_OVER_FB0; j < ADC_OVER_FB0 + ADC_OVER_FB1; j++) { //each adc sample of fb1 + ctx->txbuf[0][ctx->txpos] = 0; + ctx->txbuf[1][ctx->txpos] = 0; + ctx->txbuf[2][ctx->txpos] = V_DIFF(ctx->txbuf_raw[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] & 0x0000ffff, 1); + ctx->txbuf[3][ctx->txpos] = V_DIFF(ctx->txbuf_raw[i * (ADC_OVER_FB0 + ADC_OVER_FB1) + j] >> 16, 1); + ctx->txbuf[4][ctx->txpos] = flip; + ctx->txpos++; + } +#endif } + ctx->txpos = 0; buf[0] = 255; - for(int k = 0; k < ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1); k++) { - for(int i = 0; i < TERM_NUM_WAVES; i++) { + for(int k = 0; k < ADC_SAMPLES_IN_RT; k++) { //each sample + for(int i = 0; i < TERM_NUM_WAVES; i++) { //each wave tmp = (ctx->txbuf[i][k] + PINA(offset, i)) * PINA(gain, i) + 128; buf[i + 1] = CLAMP(tmp, 1, 254); } @@ -190,6 +210,7 @@ static void nrt_func(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) { } } + buf[0] = 0xfe; //trigger servoterm buf[1] = 0x00; if(USB_CDC_is_connected()) { diff --git a/src/comps/res.c b/src/comps/res.c index 7b290d6b..b5f4cc3d 100644 --- a/src/comps/res.c +++ b/src/comps/res.c @@ -23,11 +23,14 @@ HAL_PIN(enable); HAL_PIN(error); HAL_PIN(state); HAL_PIN(tim_oc); +HAL_PIN(tim_arr); +HAL_PIN(res_mode); +HAL_PIN(res_freq); // TODO: in hal stop, reset adc dma struct res_ctx_t { - int lastq; // last quadrant + int lastq; // last quadrant int abspos; // multiturn position }; @@ -37,10 +40,11 @@ static void nrt_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) { PIN(poles) = 1.0; PIN(tim_oc) = 0.85; PIN(min_amp) = 0.15; + PIN(res_freq) = 10000; } static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) { - struct res_ctx_t *ctx = (struct res_ctx_t *)ctx_ptr; - // struct res_pin_ctx_t *pins = (struct res_pin_ctx_t *)pin_ptr; + struct res_ctx_t *ctx = (struct res_ctx_t *)ctx_ptr; + struct res_pin_ctx_t *pins = (struct res_pin_ctx_t *)pin_ptr; ctx->abspos = 0; ctx->lastq = 0; @@ -55,15 +59,29 @@ static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) { RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseStructure.TIM_Period = ADC_TR_COUNT - 1; // 20kHz + TIM_TimeBaseStructure.TIM_Period = ADC_TRIGGER_FREQ / FRT_FREQ - 1; // 20kHz TIM_TimeBaseStructure.TIM_Prescaler = 0; TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_External1); // Rising edges of the selected trigger (TRGI) clock the counter - TIM_ITRxExternalClockConfig(TIM4, TIM_TS_ITR2); // clk = TIM_MASTER(TIM2) trigger out + TIM_ITRxExternalClockConfig(TIM4, TIM_TS_ITR2); // clk = TIM_MASTER(TIM2) trigger out TIM_ARRPreloadConfig(TIM4, ENABLE); TIM_Cmd(TIM4, ENABLE); #endif + + + //12-1 40khz + //15-1 35khz + //20-1 30khz 2 + //24-1 25khz + //30-1 20khz 3 + //40-1 15khz 4 + //60-1 10khz 6 default + //120-1 5khz 12 + //res_en = ADC_GROUPS/2/(res_freq/rt_freq) + //arr = ADC_TRIGGER_FREQ/2/res_freq + + PIN(tim_arr) = ADC_TRIGGER_FREQ / FRT_FREQ - 1; // resolver reference signal OC TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle; TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; @@ -102,10 +120,12 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_ struct res_pin_ctx_t *pins = (struct res_pin_ctx_t *)pin_ptr; //TODO: arr can change! FB0_RES_REF_TIM->CCR3 = (int)CLAMP(PIN(tim_oc) * FB0_RES_REF_TIM->ARR, 0, FB0_RES_REF_TIM->ARR - 1); - - float s = 0.0; - float c = 0.0; - float a = 0.0; + FB0_RES_REF_TIM->ARR = ADC_TRIGGER_FREQ / 2 / PIN(res_freq) - 1; + PIN(tim_arr) = FB0_RES_REF_TIM->ARR; + PIN(res_mode) = ADC_GROUPS / 2 / (PIN(res_freq) / RT_FREQ); + float s = 0.0; + float c = 0.0; + float a = 0.0; s = PIN(sin); c = PIN(cos); diff --git a/src/setup.c b/src/setup.c index 4b43464d..f256d216 100644 --- a/src/setup.c +++ b/src/setup.c @@ -8,6 +8,7 @@ #include "setup.h" #include "usbd_cdc_if.h" +#include "defines.h" void setup() { //Enable clocks @@ -49,7 +50,7 @@ void setup_res() { RCC_APB1PeriphClockCmd(TIM_MASTER_RCC, ENABLE); TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseStructure.TIM_Period = ADC_TIMER_FREQ / RES_TIMER_FREQ / ADC_TR_COUNT - 1; // 240khz + TIM_TimeBaseStructure.TIM_Period = ADC_TIMER_FREQ / ADC_TRIGGER_FREQ - 1; //70 1.2MHz TIM_TimeBaseStructure.TIM_Prescaler = 0; TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; TIM_TimeBaseInit(TIM_MASTER, &TIM_TimeBaseStructure); @@ -68,16 +69,16 @@ void setup_res() { TIM_MASTER_ADC_OC_PRELOAD(TIM_MASTER, TIM_OCPreload_Enable); TIM_CtrlPWMOutputs(TIM_MASTER, ENABLE); - //slave timer + //slave timer triggers frt RCC_APB1PeriphClockCmd(TIM_SLAVE_RCC, ENABLE); TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseStructure.TIM_Period = ADC_TR_COUNT - 1; // 20kHz + TIM_TimeBaseStructure.TIM_Period = ADC_TRIGGER_FREQ / FRT_FREQ - 1; //60 20kHz TIM_TimeBaseStructure.TIM_Prescaler = 0; TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; TIM_TimeBaseInit(TIM_SLAVE, &TIM_TimeBaseStructure); TIM_SelectSlaveMode(TIM_SLAVE, TIM_SlaveMode_External1); //Rising edges of the selected trigger (TRGI) clock the counter - TIM_ITRxExternalClockConfig(TIM_SLAVE, TIM_SLAVE_ITR); // clk = TIM_MASTER trigger out + TIM_ITRxExternalClockConfig(TIM_SLAVE, TIM_SLAVE_ITR); // clk = TIM_MASTER trigger out TIM_ARRPreloadConfig(TIM_SLAVE, ENABLE); TIM_Cmd(TIM_SLAVE, ENABLE); @@ -111,13 +112,13 @@ void setup_res() { ADC_DeInit(); ADC_InitTypeDef ADC_InitStructure; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; //data converted will be shifted to right - ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; //Input voltage is converted into a 12bit number giving a maximum value of 4096 - ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; //the conversion is continuous, the input data is converted more than once - ADC_InitStructure.ADC_ExternalTrigConv = TIM_MASTER_ADC; //trigger on rising edge of TIM_MASTER oc + ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; //Input voltage is converted into a 12bit number giving a maximum value of 4096 + ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; //the conversion is continuous, the input data is converted more than once + ADC_InitStructure.ADC_ExternalTrigConv = TIM_MASTER_ADC; //trigger on rising edge of TIM_MASTER oc ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising; ADC_InitStructure.ADC_NbrOfConversion = ADC_OVER_FB0 + ADC_OVER_FB1; //I think this one is clear :p - ADC_InitStructure.ADC_ScanConvMode = ENABLE; //The scan is configured in one channel - ADC_Init(FB0_SIN_ADC, &ADC_InitStructure); //Initialize ADC with the previous configuration + ADC_InitStructure.ADC_ScanConvMode = ENABLE; //The scan is configured in one channel + ADC_Init(FB0_SIN_ADC, &ADC_InitStructure); //Initialize ADC with the previous configuration ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_Init(FB0_COS_ADC, &ADC_InitStructure); //Initialize ADC with the previous configuration @@ -140,6 +141,12 @@ void setup_res() { } #endif + + ADC_DiscModeChannelCountConfig(ADC1, 1); + ADC_DiscModeChannelCountConfig(ADC2, 1); + ADC_DiscModeCmd(ADC1, ENABLE); + ADC_DiscModeCmd(ADC2, ENABLE); + ADC_MultiModeDMARequestAfterLastTransferCmd(ENABLE); //Enable ADC conversion @@ -156,7 +163,7 @@ void setup_res() { DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC->CDR; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC_DMA_Buffer0; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; - DMA_InitStructure.DMA_BufferSize = ADC_TR_COUNT * PID_WAVES * (ADC_OVER_FB0 + ADC_OVER_FB1); + DMA_InitStructure.DMA_BufferSize = ARRAY_SIZE(ADC_DMA_Buffer0); DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;