Implements the required bsp directives for the 'new' style rtems
interrupt system. Previously, uC5282 only supported interrupts through
the BSP_installVME_isr directive.
BSP_installVME_isr still behaves the same, but is instead implemented
using the new IRQ directives. To ensure compatibility with existing
EPICS related code without causing subtle bugs, BSP_installVME_isr will
also poke at the EPORT interrupt settings to enable IRQ1 when installing
a "fake VME" interrupt (vector >= 192).
This also fixes a regression from e9cb088995 that broke clock interrupt
handlers, leading to the BSP crashing shortly after boot.
Added API header OK test in psxtests/psxhdrs
as a part of my work to GSoC 25
note that functions ppoll(), sem_clockwait() and timespec_get()
don't have a prototype yet so the tests will fail. I won't
add them to the libpsxhdrs.yml file until my PR is approved in newlib.
Add build options for start address, vector base, and BRAM length,
wire them into the microblaze_fpga linker script and BSP group,
and add the dependencies to the kcu105_qemu BSP spec.
- Extend IMFS and libio headers to define default allocator/deallocator ops
and logic for configuring memfile_ops.
- Update imfs_memfile to use custom allocators for memory blocks.
- Fix imfs_statvfs.f_bfree calculation to respect user-defined ops.
- Add psximfs03 test case to validate custom allocator behavior.
- Refactor psximfs01 to share helper functions with psximfs03.
Add AXI timer definitions and a BSP btimer implementation and
install them in the microblaze_fpga BSP.
Co-authored-by: Alex White <alex.white@oarcorp.com>
Added the implementation of timespec_get() with tests.
The implementation used clock_gettime() as a reference.
The tests used psxtimes01 as a reference.
Updates
rtems/programs/gsoc#69
In order for the linker to pick the correct soft-float libraries when
building for a target without an FPU the -msoft-float flag needs to be
present.
This is already the case in the pkg-config file where ABI_FLAGS are
included in Ldflags:
Ldflags: ${ABI_FLAGS} -B${libdir} -qrtems -Wl,--gc-sections
But this is not present in the custom make includes:
LDFLAGS = -B$(exec_prefix)/$(RTEMS_BSP)/lib -qrtems -Wl,--gc-sections
The RTEMS template make rule for linking includes all of CFLAGS:
define bsp-link-c
$(LINK.c) $(CPU_CFLAGS) $(AM_CFLAGS) $(AM_LDFLAGS) \
-o $(basename $@)$(EXEEXT) $(LINK_OBJS) $(LINK_LIBS)
endef
The standard (GNU) built-in make rule for linking does not include
CFLAGS when linking:
$(CC) $(LDFLAGS) $* $(LOADLIBES) $(LDLIBS) -o $@
Add ABI_FLAGS to LDFLAGS in the custom make includes such that building
soft-float applications works with the default built-in make rules as
well.
The sizeof(ino_t) can potentially vary based on the target. This
resulted in -Wformat warnings. Add PRIdino_t in <rtems/inttypes.h>
to have a portable format specifier.
Closes#5393.
This adds a backend for flashdev that simulates a flash device with
adjustable delays to simulate real flash devices and offers
configurable flash parameters. This also migrates the JFFS2
filesystem tests to the flashdev framework and eliminates the
purpose-built simulated flash in the testsuite in favor of a more
generic and widely usable solution.
This adds summary support to the build with a global option to enable
this support and necessary changes to the imported summary support
source to integrate it into the build system and resolve errors.
This makes the number of active chipselects a BSP configuration
parameter. The name of the macro in upstream source is misleading and
suggests that the driver can support up to the selected value when in
actuality it requires that number of chips to be present. If this number
of chips is not present, the driver will hang on initialization waiting
for a chip to respond that does not exist.
Move JFFS2 from the Cygwin implementation of CRC32 to the zlib
implementation which can take advantage of hardware acceleration and
reduces code duplication. Synthetic benchmarks on AArch64 hardware show
approximately a 17x improvement in CRC32 calculation speed and
real-world testing with JFFS2 shows a 1% improvement in mount times, a
5% improvement in data write times, and a 9% improvement in garbage
collection times.
A test was written to compare hash generation between the two algorithms
and a partition was created with one and then remounted with the other
with no errors.
Adds the registers that expose the second microblaze timer interrupt.
Moves the system clock to a shared interrupt so users may add a new
interrupt off the second interrupt.
Uses the CONFIGURE_MAXIMUM_PRIORITY to set the priority range for
EDF and CBS schedulers under the control of applications.
The default priority behavior is now the same as other schedulers.
The user API to get a task's current priority returns 0 for deadline
driven tasks.
Fixes#5390
All but ~50 warnings have been fixed if you account for unmerged
MRs. These settings should give a warning free build given the
current state.
Warnings by Type
=================================
2 -Wshift-negative-value
3 -Wenum-conversion
7 -Wcast-function-type
7 -Wmissing-field-initializers
8 -Wclobbered
32 -Wtype-limits
This adds the Xilinx compatibility layer for use with various Xilinx
libraries. The first consumer of this will be lwIP support for the
Zynq7000 platform.
Added pthread_cond_clockwait(), pthread_mutex_clocklock()
pthread_rwlock_clockrdlock() and pthread_rwlock_clockwrlock()
that are new in POSIX Issue 8. Also added tests.
The implementation used the timed versions of these functions
as a reference.
Updates
rtems/programs/gsoc#69
Newer C versions require that the storage-class specifier like
static or _Thread_Local be the first thing in a declaration. Adding
this warning to the default set to let us eliminate violations.
Now that RTEMS should be entirely warning free thanks largely to the
efforts of Joel, adding this flag should keep the codebase in a good
state for future compiler updates.
Closes#5317
Provide missing GCC atomics helpers as part of BSPs where GCC
does not know how to provide it since the CPU's ISA has no
atomic instructions. The implementation provided in
bsps/shared/atomics/__atomic_test_and_set.c should work
on any single core CPU.
The CLOCK_DRIVER_USE_FAST_IDLE configure option is implemented
in the shared clock driver implementation. Unfortunately, the spec
files scattered the yaml to enable it for a specific BSP. This
change adds the shared file spec/build/bsps/optclkfastidle.yml which
is now the only place the CLOCK_DRIVER_USE_FAST_IDLE is specified.
That file includes a master list of BSPs which are known to be able to
run on simulators that are slow enough to benefit from this option.
As a point of information, the entire riscv BSP family can run on
both spike and qemu. None had the option do use fast idle. With this
option enabled, the time taken for a full test run on spike for
rv32i and rv64imadfc dropped by ~45%.
This resolves a missing prototype by making a file used in the arm/imx
BSP family shared so that it can be used by the arm/imxrt BSP family to
provide the missing prototypes.
This addition is needed to account for utf8proc and uuid moving
from cpukit/include to contrib. Both include directories need
to stay globally available.
This also moves the header from <utf8proc/utf8proc.h> to <utf8proc.h> This
follows what the upstream project uses and keeps us from having to modify
upstream source to put it in a subdirectory.
Joel Sherrill
Remi Debord
Allan Hessenflow
cibi.p
Jeremy Lorelli
Mazen Adel Elmessady
Sam Price
Bhavya Shah
Martin Erik Werner
Kinsey Moore
Sepehr Ganji
Gedare Bloom
Chris Johns
Kinsey Moore
Shaunak Datar
yang.zhang
Amar Takhar