mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
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bsps: add new BSP for Silicon Labs EFM32GG11
includes support for UART/USART, I2C, SPI, TRNG
This commit is contained in:
Allan Hessenflow
committed by
Amar Takhar
Amar Takhar
parent
de3ba6c0b8
commit
9c1340a309
@@ -0,0 +1,7 @@
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# EFM32GG11
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This BSP should be usable for any boards based on the Silicon Labs
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EFM32GG11B family. The default configuration parameters match the
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EFM32GG11 Giant Gecko Starter Kit:
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https://silabs.com/development-tools/mcu/32-bit/efm32gg11-starter-kit
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,111 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsARMEFM32GG11
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*
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* @brief EFM32GG11 LDMA Support
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*/
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/*
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* Copyright (C) 2025 Allan N. Hessenflow
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bsp.h>
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#include <bsp/processor.h>
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#include <bsp/efm32gg11_dma.h>
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#include <rtems/bspIo.h>
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#include <rtems/sysinit.h>
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static struct dma_context_s {
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struct {
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void (*cb)(void *);
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void *arg;
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} ch[DMA_CHAN_COUNT];
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} dma_context;
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static void dma_interrupt(void *arg)
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{
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uint32_t iflags;
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uint32_t mask;
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int i;
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(void) arg;
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iflags = LDMA->IF & LDMA->IEN;
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LDMA->IFC = iflags;
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mask = (iflags & _LDMA_IEN_DONE_MASK) >> _LDMA_IEN_DONE_SHIFT;
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i = 0;
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for (i = 0; mask && i < DMA_CHAN_COUNT; mask >>= 1, i++) {
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if ((mask & 1) && dma_context.ch[i].cb)
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dma_context.ch[i].cb(dma_context.ch[i].arg);
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}
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}
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void efm32gg11_dma_register(unsigned int channel,
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void (*done_int)(void *), void *arg)
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{
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if (channel < DMA_CHAN_COUNT) {
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dma_context.ch[channel].arg = arg;
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dma_context.ch[channel].cb = done_int;
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}
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}
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void efm32gg11_dma_int_enable(unsigned int channel, bool enable)
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{
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rtems_interrupt_level level;
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uint32_t mask;
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if (channel < DMA_CHAN_COUNT) {
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mask = (uint32_t) 1 << (channel + _LDMA_IEN_DONE_SHIFT);
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rtems_interrupt_disable(level);
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if (enable)
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LDMA->IEN |= mask;
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else
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LDMA->IEN &= ~mask;
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__DSB();
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rtems_interrupt_enable(level);
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}
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}
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static void efm32gg11_dma_init(void)
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{
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rtems_interrupt_level level;
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rtems_interrupt_disable(level);
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CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_LDMA;
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rtems_interrupt_enable(level);
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rtems_interrupt_handler_install(LDMA_IRQn, "DMA",
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RTEMS_INTERRUPT_UNIQUE,
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dma_interrupt, NULL);
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}
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RTEMS_SYSINIT_ITEM(
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efm32gg11_dma_init,
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RTEMS_SYSINIT_DEVICE_DRIVERS,
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RTEMS_SYSINIT_ORDER_LAST_BUT_5
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);
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@@ -0,0 +1,242 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsARMEFM32GG11
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*
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* @brief EFM32GG11 GPIO Support
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*/
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/*
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* Copyright (C) 2025 Allan N. Hessenflow
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bsp.h>
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#include <bsp/processor.h>
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#include <bsp/efm32gg11_gpio.h>
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#include <rtems.h>
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#include <rtems/bspIo.h>
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static struct {
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struct {
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void (*cb)(void *);
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void *arg;
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} isr[32];
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} gpio_context;
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static void gpio_interrupt(void *arg)
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{
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bool odd = (bool) arg;
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uint32_t mask;
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int int_number;
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mask = odd ? 0xaaaaaaaa : 0x55555555;
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mask &= GPIO->IF;
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mask &= GPIO->IEN;
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GPIO->IFC = mask;
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__DSB();
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if (odd) {
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int_number = 1;
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mask >>= 1;
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} else {
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int_number = 0;
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}
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while (mask) {
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if ((mask & 1) && gpio_context.isr[int_number].cb)
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gpio_context.isr[int_number].cb(gpio_context.isr[int_number].arg);
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int_number += 2;
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mask >>= 2;
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}
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}
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void efm32gg11_gpio_init_0(void)
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{
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CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_GPIO;
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}
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void efm32gg11_gpio_init(void)
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{
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rtems_interrupt_handler_install(GPIO_EVEN_IRQn, "GPIO_EVEN",
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RTEMS_INTERRUPT_UNIQUE,
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gpio_interrupt, (void *) false);
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rtems_interrupt_handler_install(GPIO_ODD_IRQn, "GPIO_ODD",
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RTEMS_INTERRUPT_UNIQUE,
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gpio_interrupt, (void *) true);
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}
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int efm32gg11_gpio_int_register(uint8_t port, uint8_t pin,
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void (*cb)(void *), void *arg)
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{
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rtems_interrupt_level level;
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uint8_t shift;
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int group;
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uint32_t r;
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int which;
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int i;
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which = -1;
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if (port < sizeof(GPIO->P) / sizeof(GPIO->P[0]) && pin < 16) {
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group = pin / 4;
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for (i = group * 4; i < group * 4 + 4 && which < 0; i++) {
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rtems_interrupt_disable(level);
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if (gpio_context.isr[i].cb == NULL) {
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gpio_context.isr[i].arg = arg;
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gpio_context.isr[i].cb = cb;
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if (i >= 8) {
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shift = (i - 8) * _GPIO_EXTIPSELH_EXTIPSEL9_SHIFT;
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r = GPIO->EXTIPSELH;
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r &= ~(_GPIO_EXTIPSELH_EXTIPSEL8_MASK << shift);
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r |= (uint32_t) port << shift;
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GPIO->EXTIPSELH = r;
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shift = (i - 8) * _GPIO_EXTIPINSELH_EXTIPINSEL9_SHIFT;
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r = GPIO->EXTIPINSELH;
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r &= ~(_GPIO_EXTIPINSELH_EXTIPINSEL8_MASK << shift);
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r |= (uint32_t) (pin & 0x03) << shift;
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GPIO->EXTIPINSELH = r;
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} else {
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shift = i * _GPIO_EXTIPSELL_EXTIPSEL1_SHIFT;
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r = GPIO->EXTIPSELL;
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r &= ~(_GPIO_EXTIPSELL_EXTIPSEL0_MASK << shift);
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r |= (uint32_t) port << shift;
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GPIO->EXTIPSELL = r;
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shift = i * _GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT;
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r = GPIO->EXTIPINSELL;
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r &= ~(_GPIO_EXTIPINSELL_EXTIPINSEL0_MASK << shift);
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r |= (uint32_t) (pin & 0x03) << shift;
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GPIO->EXTIPINSELH = r;
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}
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which = i;
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}
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rtems_interrupt_enable(level);
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}
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}
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return which;
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}
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void efm32gg11_gpio_wake_pin_int_register(unsigned int which,
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void (*cb)(void *), void *arg)
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{
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if (which >= 16 && which < 32) {
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gpio_context.isr[which].arg = arg;
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gpio_context.isr[which].cb = cb;
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}
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}
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void efm32gg11_gpio_int_mode(unsigned int which, bool rising, bool falling)
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{
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rtems_interrupt_level level;
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uint32_t mask;
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if (which < 16) {
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mask = 1 << which;
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rtems_interrupt_disable(level);
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if (rising)
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GPIO->EXTIRISE |= mask;
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else
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GPIO->EXTIRISE &= ~mask;
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if (falling)
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GPIO->EXTIFALL |= mask;
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else
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GPIO->EXTIFALL &= ~mask;
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rtems_interrupt_enable(level);
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}
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}
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void efm32gg11_gpio_wake_pin_level(unsigned int which, bool high)
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{
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rtems_interrupt_level level;
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uint32_t mask;
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if (which >= 16 && which < 32) {
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mask = 1 << which;
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rtems_interrupt_disable(level);
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if (high)
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GPIO->EXTILEVEL |= mask;
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else
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GPIO->EXTILEVEL &= ~mask;
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rtems_interrupt_enable(level);
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}
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}
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void efm32gg11_gpio_int_enable(unsigned int which, bool enable)
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{
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rtems_interrupt_level level;
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uint32_t mask;
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if (which < 32) {
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mask = 1 << which;
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rtems_interrupt_disable(level);
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if (enable)
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GPIO->IEN |= mask;
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else
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GPIO->IEN &= ~mask;
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rtems_interrupt_enable(level);
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}
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}
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void efm32gg11_gpio_mode(uint8_t port, uint8_t pin, uint8_t mode)
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{
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rtems_interrupt_level level;
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uint32_t r;
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bool high;
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uint8_t shift;
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if (port < sizeof(GPIO->P) / sizeof(GPIO->P[0]) &&
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pin < 16 &&
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mode <= _GPIO_P_MODEL_MODE0_MASK) {
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high = pin >= 8;
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shift = (high ? pin - 8 : pin) * _GPIO_P_MODEL_MODE1_SHIFT;
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rtems_interrupt_disable(level);
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r = high ? GPIO->P[port].MODEH : GPIO->P[port].MODEL;
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r &= ~(_GPIO_P_MODEL_MODE0_MASK << shift);
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r |= (uint32_t) mode << shift;
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if (high)
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GPIO->P[port].MODEH = r;
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else
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GPIO->P[port].MODEL = r;
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rtems_interrupt_enable(level);
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}
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}
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void efm32gg11_gpio_clear_set(uint8_t port, uint16_t clear, uint16_t set)
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{
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rtems_interrupt_level level;
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uint16_t r;
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if (port < sizeof(GPIO->P) / sizeof(GPIO->P[0])) {
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rtems_interrupt_disable(level);
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r = GPIO->P[port].DOUT;
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r &= ~(uint32_t) clear;
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r |= set;
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GPIO->P[port].DOUT = r;
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rtems_interrupt_enable(level);
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}
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}
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@@ -0,0 +1,419 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsARMEFM32GG11
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*
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* @brief EFM32GG11 I2C Driver
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*/
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/*
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* Copyright (C) 2025 Allan N. Hessenflow
|
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*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
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#include <bsp.h>
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#include <bsp/processor.h>
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#include <bsp/efm32gg11_clock.h>
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#include <bsp/efm32gg11_gpio.h>
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#include <bsp/i2c.h>
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#include <rtems/bspIo.h>
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#include <rtems/sysinit.h>
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#include <dev/i2c/i2c.h>
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#define PASTE2(a,b) a ## b
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#define PASTE3(a,b,c) a ## b ## c
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#define PASTE4(a,b,c,d) a ## b ## c ## d
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#define REGS(i) PASTE2(I2C, i)
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#define IRQN(i) PASTE3(I2C, i, _IRQn)
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#define SCL_PORT(i, l) PASTE3(AF_I2C, i, _SCL_PORT)(l)
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#define SCL_PIN(i, l) PASTE3(AF_I2C, i, _SCL_PIN)(l)
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#define SDA_PORT(i, l) PASTE3(AF_I2C, i, _SDA_PORT)(l)
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#define SDA_PIN(i, l) PASTE3(AF_I2C, i, _SDA_PIN)(l)
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#define HFPERCLKEN0_MASK(i) PASTE2(CMU_HFPERCLKEN0_I2C, i)
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static struct i2c_context_s {
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i2c_bus bus; /* must be first */
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const char *name;
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i2c_msg *msgs;
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uint32_t msg_count;
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uint8_t *buf_ptr;
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uint16_t buf_remaining;
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bool earlyStop;
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int result;
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rtems_binary_semaphore sem;
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unsigned long clock;
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I2C_TypeDef *regs;
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rtems_vector_number irq;
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int scl_pin_loc;
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int scl_port;
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int scl_pin;
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int sda_pin_loc;
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int sda_port;
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int sda_pin;
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uint32_t hfperclken0_mask;
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} i2c_instances[] = {
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#if defined(EFM32GG11_I2C_0_INDEX) && EFM32GG11_I2C_0_INDEX >= 0
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{
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.name = "/dev/i2c-0",
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.msgs = NULL,
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.earlyStop = false,
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.sem = RTEMS_BINARY_SEMAPHORE_INITIALIZER("i2c0"),
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.clock = I2C_BUS_CLOCK_DEFAULT,
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.regs = REGS(EFM32GG11_I2C_0_INDEX),
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.irq = IRQN(EFM32GG11_I2C_0_INDEX),
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.scl_pin_loc = EFM32GG11_I2C_0_SCL_LOC,
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.scl_port = SCL_PORT(EFM32GG11_I2C_0_INDEX, EFM32GG11_I2C_0_SCL_LOC),
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.scl_pin = SCL_PIN(EFM32GG11_I2C_0_INDEX, EFM32GG11_I2C_0_SCL_LOC),
|
||||
.sda_pin_loc = EFM32GG11_I2C_0_SDA_LOC,
|
||||
.sda_port = SDA_PORT(EFM32GG11_I2C_0_INDEX, EFM32GG11_I2C_0_SDA_LOC),
|
||||
.sda_pin = SDA_PIN(EFM32GG11_I2C_0_INDEX, EFM32GG11_I2C_0_SDA_LOC),
|
||||
.hfperclken0_mask = HFPERCLKEN0_MASK(EFM32GG11_I2C_0_INDEX)
|
||||
},
|
||||
#endif
|
||||
#if defined(EFM32GG11_I2C_1_INDEX) && EFM32GG11_I2C_1_INDEX >= 0
|
||||
{
|
||||
.name = "/dev/i2c-1",
|
||||
.msgs = NULL,
|
||||
.earlyStop = false,
|
||||
.sem = RTEMS_BINARY_SEMAPHORE_INITIALIZER("i2c1"),
|
||||
.clock = I2C_BUS_CLOCK_DEFAULT,
|
||||
.regs = REGS(EFM32GG11_I2C_1_INDEX),
|
||||
.irq = IRQN(EFM32GG11_I2C_1_INDEX),
|
||||
.scl_pin_loc = EFM32GG11_I2C_1_SCL_LOC,
|
||||
.scl_port = SCL_PORT(EFM32GG11_I2C_1_INDEX, EFM32GG11_I2C_1_SCL_LOC),
|
||||
.scl_pin = SCL_PIN(EFM32GG11_I2C_1_INDEX, EFM32GG11_I2C_1_SCL_LOC),
|
||||
.sda_pin_loc = EFM32GG11_I2C_1_SDA_LOC,
|
||||
.sda_port = SDA_PORT(EFM32GG11_I2C_1_INDEX, EFM32GG11_I2C_1_SDA_LOC),
|
||||
.sda_pin = SDA_PIN(EFM32GG11_I2C_1_INDEX, EFM32GG11_I2C_1_SDA_LOC),
|
||||
.hfperclken0_mask = HFPERCLKEN0_MASK(EFM32GG11_I2C_1_INDEX)
|
||||
},
|
||||
#endif
|
||||
#if defined(EFM32GG11_I2C_2_INDEX) && EFM32GG11_I2C_2_INDEX >= 0
|
||||
{
|
||||
.name = "/dev/i2c-2",
|
||||
.msgs = NULL,
|
||||
.earlyStop = false,
|
||||
.sem = RTEMS_BINARY_SEMAPHORE_INITIALIZER("i2c2"),
|
||||
.clock = I2C_BUS_CLOCK_DEFAULT,
|
||||
.regs = REGS(EFM32GG11_I2C_2_INDEX),
|
||||
.irq = IRQN(EFM32GG11_I2C_2_INDEX),
|
||||
.scl_pin_loc = EFM32GG11_I2C_2_SCL_LOC,
|
||||
.scl_port = SCL_PORT(EFM32GG11_I2C_2_INDEX, EFM32GG11_I2C_2_SCL_LOC),
|
||||
.scl_pin = SCL_PIN(EFM32GG11_I2C_2_INDEX, EFM32GG11_I2C_2_SCL_LOC),
|
||||
.sda_pin_loc = EFM32GG11_I2C_2_SDA_LOC,
|
||||
.sda_port = SDA_PORT(EFM32GG11_I2C_2_INDEX, EFM32GG11_I2C_2_SDA_LOC),
|
||||
.sda_pin = SDA_PIN(EFM32GG11_I2C_2_INDEX, EFM32GG11_I2C_2_SDA_LOC),
|
||||
.hfperclken0_mask = HFPERCLKEN0_MASK(EFM32GG11_I2C_2_INDEX)
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
static void start(struct i2c_context_s *ctx, uint32_t extra_commands)
|
||||
{
|
||||
I2C_TypeDef *regs = ctx->regs;
|
||||
rtems_interrupt_level level;
|
||||
uint32_t r;
|
||||
|
||||
r = ctx->msgs->addr << 1;
|
||||
if (ctx->msgs->flags & I2C_M_RD)
|
||||
r |= 0x01;
|
||||
r = (r << _I2C_TXDATA_TXDATA_SHIFT) & _I2C_TXDATA_TXDATA_MASK;
|
||||
rtems_interrupt_disable(level);
|
||||
regs->CMD = I2C_CMD_START | extra_commands;
|
||||
regs->TXDATA = r;
|
||||
rtems_interrupt_enable(level);
|
||||
}
|
||||
|
||||
static void continuation_buffer(struct i2c_context_s *ctx) {
|
||||
|
||||
while (ctx->msg_count > 1 && !(ctx->msgs->flags & I2C_M_STOP) &&
|
||||
(ctx->msgs[1].flags & I2C_M_NOSTART) && ctx->buf_remaining == 0) {
|
||||
ctx->msgs++;
|
||||
ctx->msg_count--;
|
||||
ctx->buf_ptr = ctx->msgs->buf;
|
||||
ctx->buf_remaining = ctx->msgs->len;
|
||||
}
|
||||
}
|
||||
|
||||
static void next_message(struct i2c_context_s *ctx) {
|
||||
|
||||
while (ctx->msg_count) {
|
||||
ctx->msgs++;
|
||||
ctx->msg_count--;
|
||||
if (ctx->msgs->len ||
|
||||
(ctx->msgs->flags & I2C_M_STOP) || !(ctx->msgs->flags & I2C_M_NOSTART))
|
||||
break;
|
||||
}
|
||||
if (ctx->msg_count) {
|
||||
ctx->buf_ptr = ctx->msgs->buf;
|
||||
ctx->buf_remaining = ctx->msgs->len;
|
||||
} else {
|
||||
ctx->buf_remaining = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void i2c_interrupt(void *arg)
|
||||
{
|
||||
i2c_bus *bus = (i2c_bus *) arg;
|
||||
struct i2c_context_s *ctx = (struct i2c_context_s *) bus;
|
||||
I2C_TypeDef *regs = ctx->regs;
|
||||
uint32_t iflags;
|
||||
uint32_t r;
|
||||
uint8_t c;
|
||||
|
||||
iflags = regs->IF;
|
||||
regs->IFC = iflags & (I2C_IF_CLERR | I2C_IF_RXFULL | I2C_IF_BUSERR |
|
||||
I2C_IF_ARBLOST | I2C_IF_MSTOP |
|
||||
I2C_IF_NACK | I2C_IF_ACK);
|
||||
|
||||
if (iflags & (I2C_IF_RXDATAV | I2C_IF_RXFULL))
|
||||
c = regs->RXDATA;
|
||||
|
||||
if (ctx->earlyStop) {
|
||||
if (iflags & I2C_IF_MSTOP) {
|
||||
ctx->result = -EIO;
|
||||
ctx->earlyStop = false;
|
||||
rtems_binary_semaphore_post(&ctx->sem);
|
||||
}
|
||||
} else if (iflags & (I2C_IF_ARBLOST | I2C_IF_CLERR | I2C_IF_BUSERR)) {
|
||||
regs->CMD = I2C_CMD_ABORT;
|
||||
ctx->result = -EIO;
|
||||
rtems_binary_semaphore_post(&ctx->sem);
|
||||
} else {
|
||||
if (iflags & I2C_IF_RXDATAV) {
|
||||
if (ctx->buf_remaining == 0)
|
||||
continuation_buffer(ctx);
|
||||
if (ctx->buf_remaining) {
|
||||
*ctx->buf_ptr++ = c;
|
||||
ctx->buf_remaining--;
|
||||
if (ctx->buf_remaining == 0)
|
||||
continuation_buffer(ctx);
|
||||
} else {
|
||||
/* it should be impossible to get here */
|
||||
}
|
||||
if (ctx->buf_remaining) {
|
||||
regs->CMD = I2C_CMD_ACK;
|
||||
} else {
|
||||
if (ctx->msg_count == 1 || (ctx->msgs->flags & I2C_M_STOP)) {
|
||||
regs->CMD = I2C_CMD_NACK | I2C_CMD_STOP;
|
||||
} else {
|
||||
next_message(ctx);
|
||||
start(ctx, I2C_CMD_NACK);
|
||||
}
|
||||
}
|
||||
}
|
||||
if ((iflags & I2C_IF_NACK) &&
|
||||
!(ctx->msgs->flags & I2C_M_IGNORE_NAK)) {
|
||||
ctx->earlyStop = true;
|
||||
regs->CMD = I2C_CMD_STOP;
|
||||
} else if (iflags & (I2C_IF_ACK | I2C_IF_NACK)) {
|
||||
if (ctx->buf_remaining == 0)
|
||||
continuation_buffer(ctx);
|
||||
if (ctx->buf_remaining == 0) {
|
||||
if ((ctx->msgs->flags & I2C_M_STOP) || ctx->msg_count == 1) {
|
||||
regs->CMD = I2C_CMD_STOP;
|
||||
} else {
|
||||
next_message(ctx);
|
||||
start(ctx, 0);
|
||||
}
|
||||
} else if (!(ctx->msgs->flags & I2C_M_RD)) {
|
||||
r = *ctx->buf_ptr++;
|
||||
ctx->buf_remaining--;
|
||||
r = (r << _I2C_TXDATA_TXDATA_SHIFT) &
|
||||
_I2C_TXDATA_TXDATA_MASK;
|
||||
regs->TXDATA = r;
|
||||
} else {
|
||||
/* address sent, transition to reading */
|
||||
if (iflags & I2C_IF_NACK)
|
||||
regs->CMD = I2C_CMD_CONT;
|
||||
}
|
||||
}
|
||||
if (iflags & I2C_IF_MSTOP) {
|
||||
next_message(ctx);
|
||||
if (ctx->msg_count == 0) {
|
||||
ctx->result = 0;
|
||||
rtems_binary_semaphore_post(&ctx->sem);
|
||||
} else {
|
||||
start(ctx, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#define NHIGH 4
|
||||
#define NLOW 4
|
||||
|
||||
static void clock_set(struct i2c_context_s *ctx)
|
||||
{
|
||||
I2C_TypeDef *regs = ctx->regs;
|
||||
uint32_t div;
|
||||
|
||||
div = (efm32gg11_clock.hfpercclk - 8 * ctx->clock - 1) /
|
||||
((NHIGH + NLOW) * ctx->clock);
|
||||
|
||||
regs->CLKDIV = div;
|
||||
}
|
||||
|
||||
static void i2c_init(struct i2c_context_s *ctx)
|
||||
{
|
||||
I2C_TypeDef *regs = ctx->regs;
|
||||
rtems_interrupt_level level;
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
CMU->HFPERCLKEN0 |= ctx->hfperclken0_mask;
|
||||
rtems_interrupt_enable(level);
|
||||
|
||||
clock_set(ctx);
|
||||
|
||||
regs->IEN = 0;
|
||||
#if NHIGH != 4 || NLOW != 4
|
||||
/* should set CLHR based on these and only error out if they're an
|
||||
unsupported combination */
|
||||
#error
|
||||
#endif
|
||||
regs->CTRL =
|
||||
I2C_CTRL_CLTO_OFF |
|
||||
I2C_CTRL_BITO_OFF |
|
||||
I2C_CTRL_CLHR_STANDARD |
|
||||
I2C_CTRL_TXBIL_EMPTY |
|
||||
I2C_CTRL_EN;
|
||||
regs->CMD = I2C_CMD_ABORT;
|
||||
|
||||
regs->ROUTELOC0 = ((ctx->scl_pin_loc << _I2C_ROUTELOC0_SCLLOC_SHIFT) &
|
||||
_I2C_ROUTELOC0_SCLLOC_MASK) |
|
||||
((ctx->sda_pin_loc << _I2C_ROUTELOC0_SDALOC_SHIFT) &
|
||||
_I2C_ROUTELOC0_SDALOC_MASK);
|
||||
|
||||
efm32gg11_gpio_clear_set(ctx->scl_port, 0, 1 << ctx->scl_pin);
|
||||
efm32gg11_gpio_mode(ctx->scl_port, ctx->scl_pin,
|
||||
GPIO_P_MODEL_MODE0_WIREDAND);
|
||||
efm32gg11_gpio_clear_set(ctx->sda_port, 0, 1 << ctx->sda_pin);
|
||||
efm32gg11_gpio_mode(ctx->sda_port, ctx->sda_pin,
|
||||
GPIO_P_MODEL_MODE0_WIREDAND);
|
||||
regs->ROUTEPEN = I2C_ROUTEPEN_SCLPEN | I2C_ROUTEPEN_SDAPEN;
|
||||
|
||||
regs->IEN = I2C_IEN_CLERR | I2C_IEN_RXFULL | I2C_IEN_BUSERR |
|
||||
I2C_IEN_ARBLOST | I2C_IEN_MSTOP |
|
||||
I2C_IEN_NACK | I2C_IEN_ACK |
|
||||
I2C_IEN_RXDATAV;
|
||||
}
|
||||
|
||||
static int i2c_transfer(i2c_bus *bus, i2c_msg *msgs, uint32_t msg_count)
|
||||
{
|
||||
struct i2c_context_s *ctx = (struct i2c_context_s *) bus;
|
||||
uint16_t prev_flags;
|
||||
uint16_t supported_flags;
|
||||
uint32_t i;
|
||||
int sc;
|
||||
|
||||
/* Several of the additional flags could be supported, but I don't
|
||||
need them and even if I were to write code to support them I wouldn't
|
||||
have a quick and easy way to test. */
|
||||
supported_flags = I2C_M_RD | I2C_M_STOP | I2C_M_IGNORE_NAK;
|
||||
prev_flags = msgs[0].flags; /* silence compiler warning */
|
||||
for (i = 0; i < msg_count; i++) {
|
||||
if (msgs[i].flags & ~supported_flags)
|
||||
return -EINVAL;
|
||||
if (msgs[i].flags & I2C_M_NOSTART) {
|
||||
if ((prev_flags & I2C_M_RD) != (msgs[i].flags & I2C_M_RD) ||
|
||||
(prev_flags & I2C_M_STOP))
|
||||
return -EINVAL;
|
||||
}
|
||||
prev_flags = msgs[i].flags;
|
||||
supported_flags |= I2C_M_NOSTART;
|
||||
}
|
||||
ctx->msgs = msgs;
|
||||
ctx->msg_count = msg_count;
|
||||
ctx->buf_ptr = msgs->buf;
|
||||
ctx->buf_remaining = msgs->len;
|
||||
ctx->result = 0;
|
||||
|
||||
rtems_binary_semaphore_try_wait(&ctx->sem);
|
||||
start(ctx, 0);
|
||||
|
||||
sc = rtems_binary_semaphore_wait_timed_ticks(&ctx->sem, bus->timeout);
|
||||
if (sc) {
|
||||
ctx->regs->CMD = I2C_CMD_ABORT;
|
||||
sc = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
if (sc == 0)
|
||||
sc = ctx->result;
|
||||
|
||||
return sc;
|
||||
}
|
||||
|
||||
static int i2c_set_clock(i2c_bus *bus, unsigned long clock)
|
||||
{
|
||||
struct i2c_context_s *ctx = (struct i2c_context_s *) bus;
|
||||
|
||||
ctx->clock = clock;
|
||||
clock_set(ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void i2c_destroy(i2c_bus *bus)
|
||||
{
|
||||
struct i2c_context_s *ctx = (struct i2c_context_s *) bus;
|
||||
rtems_interrupt_level level;
|
||||
|
||||
ctx->regs->IEN = 0;
|
||||
ctx->regs->CTRL = 0;
|
||||
__DSB();
|
||||
rtems_interrupt_handler_remove(ctx->irq, i2c_interrupt, bus);
|
||||
rtems_binary_semaphore_destroy(&ctx->sem);
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
CMU->HFPERCLKEN0 &= ~ctx->hfperclken0_mask;
|
||||
rtems_interrupt_enable(level);
|
||||
}
|
||||
|
||||
int efm32gg11_i2c_register()
|
||||
{
|
||||
rtems_status_code sc;
|
||||
struct i2c_context_s *ctx;
|
||||
size_t i;
|
||||
|
||||
sc = RTEMS_SUCCESSFUL;
|
||||
for (i = 0; i < RTEMS_ARRAY_SIZE(i2c_instances); i++) {
|
||||
ctx = &i2c_instances[i];
|
||||
i2c_bus_init(&ctx->bus);
|
||||
rtems_interrupt_handler_install(ctx->irq, "I2C", RTEMS_INTERRUPT_UNIQUE,
|
||||
i2c_interrupt, &ctx->bus);
|
||||
i2c_init(ctx);
|
||||
ctx->bus.transfer = i2c_transfer;
|
||||
ctx->bus.set_clock = i2c_set_clock;
|
||||
ctx->bus.destroy = i2c_destroy;
|
||||
|
||||
sc = i2c_bus_register(&ctx->bus, ctx->name);
|
||||
}
|
||||
|
||||
return sc;
|
||||
}
|
||||
@@ -0,0 +1,75 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief Global BSP definitions.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_EFM32GG11_BSP_H
|
||||
#define LIBBSP_ARM_EFM32GG11_BSP_H
|
||||
|
||||
/**
|
||||
* @defgroup RTEMSBSPsARMEFM32GG11 EFM32GG11
|
||||
*
|
||||
* @ingroup RTEMSBSPsARM
|
||||
*
|
||||
* @brief EFM32GG11 Board Support Package.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <bspopts.h>
|
||||
#include <bsp/default-initial-extension.h>
|
||||
|
||||
#include <rtems.h>
|
||||
|
||||
#include "bsp/efm32gg11_clock.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#define BSP_FEATURE_IRQ_EXTENSION
|
||||
|
||||
#define BSP_ARMV7M_IRQ_PRIORITY_DEFAULT (13 << 4)
|
||||
|
||||
#define BSP_ARMV7M_SYSTICK_PRIORITY (14 << 4)
|
||||
|
||||
#define BSP_ARMV7M_SYSTICK_FREQUENCY (efm32gg11_clock.hfcoreclk)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
#endif /* LIBBSP_ARM_EFM32GG11_BSP_H */
|
||||
@@ -0,0 +1,57 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 Clock Configuration
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_EFM32GG11_CLOCK_H
|
||||
#define LIBBSP_ARM_EFM32GG11_CLOCK_H
|
||||
|
||||
#include <bspopts.h>
|
||||
|
||||
extern struct efm32gg11_clock_s {
|
||||
uint32_t hfclk;
|
||||
uint32_t hfcoreclk;
|
||||
uint32_t hfbusclk;
|
||||
uint32_t hfperclk;
|
||||
uint32_t hfperbclk;
|
||||
uint32_t hfpercclk;
|
||||
uint32_t hfexpclk;
|
||||
uint16_t lfaclk;
|
||||
uint16_t lfbclk;
|
||||
uint16_t lfcclk;
|
||||
uint16_t lfeclk;
|
||||
} efm32gg11_clock;
|
||||
|
||||
void efm32gg11_clock_init(void);
|
||||
|
||||
#endif /* LIBBSP_ARM_EFM32GG11_CLOCK_H */
|
||||
@@ -0,0 +1,48 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 LDMA Support
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_EFM32GG11_DMA_H
|
||||
#define LIBBSP_ARM_EFM32GG11_DMA_H
|
||||
|
||||
#include <bspopts.h>
|
||||
|
||||
|
||||
void efm32gg11_dma_register(unsigned int channel,
|
||||
void (*done_int)(void *), void *arg);
|
||||
|
||||
void efm32gg11_dma_int_enable(unsigned int channel, bool enable);
|
||||
|
||||
|
||||
#endif /* LIBBSP_ARM_EFM32GG11_DMA_H */
|
||||
@@ -0,0 +1,66 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 GPIO Support
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_EFM32GG11_GPIO_H
|
||||
#define LIBBSP_ARM_EFM32GG11_GPIO_H
|
||||
|
||||
#include <bspopts.h>
|
||||
|
||||
void efm32gg11_gpio_init_0(void);
|
||||
void efm32gg11_gpio_init(void);
|
||||
|
||||
/* returns a non-negative number on success indicating the interrupt
|
||||
number assigned, or a negative number on failure. */
|
||||
int efm32gg11_gpio_int_register(uint8_t port, uint8_t pin,
|
||||
void (*cb)(void *), void *arg);
|
||||
|
||||
/* which is the bit number from the em4 wakeup pin registers, range 16 - 31 */
|
||||
void efm32gg11_gpio_wake_pin_int_register(unsigned int which,
|
||||
void (*cb)(void *), void *arg);
|
||||
|
||||
/* which is the interrupt number provided by efm32gg11_gpio_int_register() */
|
||||
void efm32gg11_gpio_int_mode(unsigned int which, bool rising, bool falling);
|
||||
|
||||
/* which is the bit number from the em4 wakeup pin registers, range 16 - 31 */
|
||||
void efm32gg11_gpio_wake_pin_level(unsigned int which, bool high);
|
||||
|
||||
/* which is the interrupt number provided by efm32gg11_gpio_int_register() */
|
||||
void efm32gg11_gpio_int_enable(unsigned int which, bool enable);
|
||||
|
||||
void efm32gg11_gpio_mode(uint8_t port, uint8_t pin, uint8_t mode);
|
||||
|
||||
void efm32gg11_gpio_clear_set(uint8_t port, uint16_t clear, uint16_t set);
|
||||
|
||||
#endif /* LIBBSP_ARM_EFM32GG11_GPIO_H */
|
||||
@@ -0,0 +1,43 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 I2C Driver
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_EFM32GG11_I2C_H
|
||||
#define LIBBSP_ARM_EFM32GG11_I2C_H
|
||||
|
||||
#include <bspopts.h>
|
||||
|
||||
int efm32gg11_i2c_register(void);
|
||||
|
||||
#endif /* LIBBSP_ARM_EFM32GG11_I2C_H */
|
||||
@@ -0,0 +1,49 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 Interrupt Config
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_EFM32GG11_IRQ_H
|
||||
#define LIBBSP_ARM_EFM32GG11_IRQ_H
|
||||
|
||||
#include <bspopts.h>
|
||||
|
||||
#ifndef ASM
|
||||
#include <rtems.h>
|
||||
#include <rtems/irq.h>
|
||||
#include <rtems/irq-extension.h>
|
||||
#endif
|
||||
|
||||
#define BSP_INTERRUPT_VECTOR_COUNT 68
|
||||
|
||||
#endif /* LIBBSP_ARM_EFM32GG11_IRQ_H */
|
||||
@@ -0,0 +1,80 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 Processor Definitions
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_EFM32GG11_PROCESSOR_H
|
||||
#define LIBBSP_ARM_EFM32GG11_PROCESSOR_H
|
||||
|
||||
#include <bspopts.h>
|
||||
|
||||
#define EFM32GG11B110 0x11b110
|
||||
#define EFM32GG11B120 0x11b120
|
||||
#define EFM32GG11B310 0x11b310
|
||||
#define EFM32GG11B320 0x11b320
|
||||
#define EFM32GG11B420 0x11b420
|
||||
#define EFM32GG11B510 0x11b510
|
||||
#define EFM32GG11B520 0x11b520
|
||||
#define EFM32GG11B820 0x11b820
|
||||
#define EFM32GG11B840 0x11b840
|
||||
|
||||
|
||||
#if defined(EFM32GG11_DEVICE)
|
||||
|
||||
#if EFM32GG11_DEVICE == EFM32GG11B110
|
||||
#include "efm32gg11b110f2048gm64.h"
|
||||
#elif EFM32GG11_DEVICE == EFM32GG11B120
|
||||
#include "efm32gg11b120f2048gm64.h"
|
||||
#elif EFM32GG11_DEVICE == EFM32GG11B310
|
||||
#include "efm32gg11b310f2048gl112.h"
|
||||
#elif EFM32GG11_DEVICE == EFM32GG11B320
|
||||
#include "efm32gg11b320f2048gl112.h"
|
||||
#elif EFM32GG11_DEVICE == EFM32GG11B420
|
||||
#include "efm32gg11b420f2048gl120.h"
|
||||
#elif EFM32GG11_DEVICE == EFM32GG11B510
|
||||
#include "efm32gg11b510f2048gl120.h"
|
||||
#elif EFM32GG11_DEVICE == EFM32GG11B520
|
||||
#include "efm32gg11b520f2048gl120.h"
|
||||
#elif EFM32GG11_DEVICE == EFM32GG11B820
|
||||
#include "efm32gg11b820f2048gl192.h"
|
||||
#elif EFM32GG11_DEVICE == EFM32GG11B840
|
||||
#include "efm32gg11b840f1024gl192.h"
|
||||
#else
|
||||
#error unknown device
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error EFM32GG11_DEVICE not defined
|
||||
#endif
|
||||
|
||||
#endif /* LIBBSP_ARM_EFM32GG11_PROCESSOR_H */
|
||||
@@ -0,0 +1,43 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 SPI Driver
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_EFM32GG11_SPI_H
|
||||
#define LIBBSP_ARM_EFM32GG11_SPI_H
|
||||
|
||||
#include <bspopts.h>
|
||||
|
||||
int efm32gg11_spi_register(void);
|
||||
|
||||
#endif /* LIBBSP_ARM_EFM32GG11_SPI_H */
|
||||
@@ -0,0 +1,36 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief This header file includes the generic tm27 support implementation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2017 embedded brains GmbH & Co. KG
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <rtems/tm27-default.h>
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,43 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* Copyright (C) 2012 Sebastian Huber
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <rtems.h>
|
||||
|
||||
#include <bsp/bootcard.h>
|
||||
|
||||
void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
|
||||
{
|
||||
rtems_interrupt_level level;
|
||||
|
||||
(void) source;
|
||||
(void) code;
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
(void) level;
|
||||
|
||||
while (1);
|
||||
}
|
||||
@@ -0,0 +1,49 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 BSP Initialization
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/irq.h>
|
||||
#include <bsp/bootcard.h>
|
||||
#include <bsp/irq-generic.h>
|
||||
#include <assert.h>
|
||||
#include <bsp/efm32gg11_gpio.h>
|
||||
|
||||
|
||||
void bsp_start(void)
|
||||
{
|
||||
bsp_interrupt_initialize();
|
||||
|
||||
efm32gg11_gpio_init();
|
||||
}
|
||||
@@ -0,0 +1,41 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* Copyright (C) 2012 Sebastian Huber
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/start.h>
|
||||
#include <bsp/efm32gg11_clock.h>
|
||||
#include <bsp/efm32gg11_gpio.h>
|
||||
|
||||
void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
|
||||
{
|
||||
bsp_start_copy_sections();
|
||||
bsp_start_clear_bss();
|
||||
|
||||
/* At this point we can use objects outside the .start section */
|
||||
efm32gg11_clock_init();
|
||||
efm32gg11_gpio_init_0();
|
||||
}
|
||||
@@ -0,0 +1,241 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 System Clocks Setup
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/processor.h>
|
||||
#include <bsp/efm32gg11_clock.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
|
||||
#define HFRCO_FREQ_DEFAULT 19000000
|
||||
|
||||
#define PASTE2(a,b) a ## b
|
||||
#define PASTE3(a,b,c) a ## b ## c
|
||||
#define PASTE4(a,b,c,d) a ## b ## c ## d
|
||||
|
||||
#define HFXO_MODE(t) PASTE2(CMU_HFXOCTRL_MODE_, t)
|
||||
#define LFXO_MODE(t) PASTE2(CMU_LFXOCTRL_MODE_, t)
|
||||
|
||||
|
||||
struct efm32gg11_clock_s efm32gg11_clock;
|
||||
|
||||
|
||||
#if EFM32GG11_HFRCO_FREQ > 0
|
||||
static struct {
|
||||
int32_t freq;
|
||||
const volatile uint32_t *cal;
|
||||
} hfrco_calib[] = {
|
||||
{4000000, &DEVINFO->HFRCOCAL0},
|
||||
{7000000, &DEVINFO->HFRCOCAL3},
|
||||
{13000000, &DEVINFO->HFRCOCAL6},
|
||||
{16000000, &DEVINFO->HFRCOCAL7},
|
||||
{19000000, &DEVINFO->HFRCOCAL8},
|
||||
{26000000, &DEVINFO->HFRCOCAL10},
|
||||
{32000000, &DEVINFO->HFRCOCAL11},
|
||||
{38000000, &DEVINFO->HFRCOCAL12},
|
||||
{48000000, &DEVINFO->HFRCOCAL13},
|
||||
{56000000, &DEVINFO->HFRCOCAL14},
|
||||
{64000000, &DEVINFO->HFRCOCAL15},
|
||||
{72000000, &DEVINFO->HFRCOCAL16}
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
static void ws_config(void)
|
||||
{
|
||||
uint32_t r;
|
||||
|
||||
MSC->LOCK = MSC_LOCK_LOCKKEY_UNLOCK;
|
||||
|
||||
r = MSC->READCTRL & ~_MSC_READCTRL_MODE_MASK;
|
||||
if (efm32gg11_clock.hfclk > 54000000)
|
||||
r |= MSC_READCTRL_MODE_WS3;
|
||||
else if (efm32gg11_clock.hfclk > 36000000)
|
||||
r |= MSC_READCTRL_MODE_WS2;
|
||||
else if (efm32gg11_clock.hfclk > 18000000)
|
||||
r |= MSC_READCTRL_MODE_WS1;
|
||||
else
|
||||
r |= MSC_READCTRL_MODE_WS0;
|
||||
MSC->READCTRL = r;
|
||||
|
||||
r = MSC->CTRL & ~_MSC_CTRL_WAITMODE_MASK;
|
||||
if (efm32gg11_clock.hfclk > 50000000)
|
||||
r |= MSC_CTRL_WAITMODE_WS1;
|
||||
else
|
||||
r |= MSC_CTRL_WAITMODE_WS0;
|
||||
MSC->CTRL = r;
|
||||
|
||||
r = MSC->RAMCTRL;
|
||||
if (efm32gg11_clock.hfclk > 38000000)
|
||||
r |= MSC_RAMCTRL_RAMWSEN | MSC_RAMCTRL_RAM1WSEN | MSC_RAMCTRL_RAM2WSEN;
|
||||
else
|
||||
r &= ~(MSC_RAMCTRL_RAMWSEN | MSC_RAMCTRL_RAM1WSEN | MSC_RAMCTRL_RAM2WSEN);
|
||||
MSC->RAMCTRL = r;
|
||||
|
||||
r = CMU->CTRL;
|
||||
if (efm32gg11_clock.hfclk > 32000000)
|
||||
r |= CMU_CTRL_WSHFLE;
|
||||
else
|
||||
r &= ~CMU_CTRL_WSHFLE;
|
||||
CMU->CTRL = r;
|
||||
}
|
||||
|
||||
static void divisors_config(void)
|
||||
{
|
||||
uint32_t divisor;
|
||||
|
||||
divisor = 1;
|
||||
CMU->HFCOREPRESC = (divisor - 1) << _CMU_HFCOREPRESC_PRESC_SHIFT;
|
||||
efm32gg11_clock.hfcoreclk = efm32gg11_clock.hfclk / divisor;
|
||||
|
||||
divisor = (efm32gg11_clock.hfclk > 50000000) ? 2 : 1;
|
||||
CMU->HFBUSPRESC = (divisor - 1) << _CMU_HFBUSPRESC_PRESC_SHIFT;
|
||||
efm32gg11_clock.hfbusclk = efm32gg11_clock.hfclk / divisor;
|
||||
|
||||
divisor = (efm32gg11_clock.hfclk > 50000000) ? 2 : 1;
|
||||
CMU->HFPERPRESC = (divisor - 1) << _CMU_HFPERPRESC_PRESC_SHIFT;
|
||||
efm32gg11_clock.hfperclk = efm32gg11_clock.hfclk / divisor;
|
||||
|
||||
divisor = 1;
|
||||
CMU->HFPERPRESCB = (divisor - 1) << _CMU_HFPERPRESCB_PRESC_SHIFT;
|
||||
efm32gg11_clock.hfperbclk = efm32gg11_clock.hfclk / divisor;
|
||||
|
||||
divisor = (efm32gg11_clock.hfclk > 50000000) ? 2 : 1;
|
||||
CMU->HFPERPRESCC = (divisor - 1) << _CMU_HFPERPRESCC_PRESC_SHIFT;
|
||||
efm32gg11_clock.hfpercclk = efm32gg11_clock.hfclk / divisor;
|
||||
|
||||
divisor = 2;
|
||||
CMU->HFEXPPRESC = (divisor - 1) << _CMU_HFEXPPRESC_PRESC_SHIFT;
|
||||
efm32gg11_clock.hfexpclk = efm32gg11_clock.hfclk / divisor;
|
||||
}
|
||||
|
||||
void efm32gg11_clock_init(void)
|
||||
{
|
||||
uint32_t hfrco_ctrl;
|
||||
int i;
|
||||
|
||||
CMU->CTRL = CMU_CTRL_HFPERCLKEN;
|
||||
|
||||
#if EFM32GG11_LFXO_FREQ > 0
|
||||
CMU->FREEZE = 0;
|
||||
if (!(CMU->STATUS & CMU_STATUS_LFXOENS)) {
|
||||
while (CMU->SYNCBUSY & CMU_SYNCBUSY_LFXOBSY)
|
||||
;
|
||||
CMU->LFXOCTRL =
|
||||
(EFM32GG11_LFXO_TUNING << _CMU_LFXOCTRL_TUNING_SHIFT) |
|
||||
LFXO_MODE(EFM32GG11_LFXO_TYPE) |
|
||||
(EFM32GG11_LFXO_GAIN << _CMU_LFXOCTRL_GAIN_SHIFT) |
|
||||
CMU_LFXOCTRL_HIGHAMPL_DEFAULT |
|
||||
CMU_LFXOCTRL_AGC_DEFAULT |
|
||||
CMU_LFXOCTRL_CUR_DEFAULT |
|
||||
CMU_LFXOCTRL_BUFCUR_DEFAULT |
|
||||
CMU_LFXOCTRL_TIMEOUT_DEFAULT;
|
||||
while (CMU->SYNCBUSY & CMU_SYNCBUSY_LFXOBSY)
|
||||
;
|
||||
CMU->OSCENCMD = CMU_OSCENCMD_LFXOEN;
|
||||
}
|
||||
EMU->EM4CTRL |= EMU_EM4CTRL_RETAINLFXO;
|
||||
CMU->LFACLKSEL = CMU_LFACLKSEL_LFA_LFXO;
|
||||
efm32gg11_clock.lfaclk = EFM32GG11_LFXO_FREQ;
|
||||
CMU->LFBCLKSEL = CMU_LFBCLKSEL_LFB_LFXO;
|
||||
efm32gg11_clock.lfbclk = EFM32GG11_LFXO_FREQ;
|
||||
CMU->LFCCLKSEL = CMU_LFCCLKSEL_LFC_LFXO;
|
||||
efm32gg11_clock.lfcclk = EFM32GG11_LFXO_FREQ;
|
||||
#else
|
||||
CMU->OSCENCMD = CMU_OSCENCMD_LFRCOEN;
|
||||
CMU->LFACLKSEL = CMU_LFACLKSEL_LFA_LFRCO;
|
||||
efm32gg11_clock.lfaclk = 32768;
|
||||
CMU->LFBCLKSEL = CMU_LFBCLKSEL_LFB_LFRCO;
|
||||
efm32gg11_clock.lfbclk = 32768;
|
||||
CMU->LFCCLKSEL = CMU_LFCCLKSEL_LFC_LFRCO;
|
||||
efm32gg11_clock.lfcclk = 32768;
|
||||
#endif
|
||||
|
||||
CMU->LFECLKSEL = CMU_LFECLKSEL_LFE_ULFRCO;
|
||||
efm32gg11_clock.lfeclk = 1000;
|
||||
|
||||
efm32gg11_clock.hfclk = HFRCO_FREQ_DEFAULT;
|
||||
|
||||
#if EFM32GG11_HFXO_FREQ > 0
|
||||
efm32gg11_clock.hfclk = EFM32GG11_HFXO_FREQ;
|
||||
CMU->HFXOCTRL = CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT |
|
||||
CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT |
|
||||
CMU_HFXOCTRL_LFTIMEOUT_DEFAULT |
|
||||
CMU_HFXOCTRL_PEAKDETMODE_DEFAULT |
|
||||
#if EFM32GG11_HFXO_FREQ <= 25000000
|
||||
CMU_HFXOCTRL_HFXOX2EN |
|
||||
#endif
|
||||
HFXO_MODE(EFM32GG11_HFXO_TYPE);
|
||||
CMU->HFXOSTARTUPCTRL =
|
||||
EFM32GG11_HFXO_TUNING << _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT |
|
||||
CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT;
|
||||
CMU->HFXOSTEADYSTATECTRL =
|
||||
EFM32GG11_HFXO_TUNING << _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT |
|
||||
CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT;
|
||||
CMU->OSCENCMD = CMU_OSCENCMD_HFXOEN;
|
||||
#endif
|
||||
|
||||
#if EFM32GG11_HFRCO_FREQ > 0
|
||||
for (i = 0; i < sizeof(hfrco_calib) / sizeof(hfrco_calib[0]) - 1; i++) {
|
||||
if (abs(hfrco_calib[i + 1].freq - EFM32GG11_HFRCO_FREQ) >
|
||||
abs(hfrco_calib[i].freq - EFM32GG11_HFRCO_FREQ))
|
||||
break;
|
||||
}
|
||||
efm32gg11_clock.hfclk = hfrco_calib[i].freq;
|
||||
hfrco_ctrl = *hfrco_calib[i].cal;
|
||||
#else
|
||||
(void) i;
|
||||
(void) hfrco_ctrl;
|
||||
#endif
|
||||
|
||||
if (efm32gg11_clock.hfclk > HFRCO_FREQ_DEFAULT) {
|
||||
ws_config();
|
||||
divisors_config();
|
||||
}
|
||||
|
||||
#if EFM32GG11_HFRCO_FREQ > 0
|
||||
CMU->HFRCOCTRL = hfrco_ctrl;
|
||||
#elif EFM32GG11_HFXO_FREQ > 0
|
||||
while (!(CMU->STATUS & CMU_STATUS_HFXORDY))
|
||||
;
|
||||
CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFXO;
|
||||
CMU->OSCENCMD = CMU_OSCENCMD_HFRCODIS;
|
||||
#endif
|
||||
|
||||
if (efm32gg11_clock.hfclk <= HFRCO_FREQ_DEFAULT) {
|
||||
ws_config();
|
||||
divisors_config();
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,21 @@
|
||||
INCLUDE linkcmds.memory
|
||||
|
||||
REGION_ALIAS ("REGION_START", INTFLASH);
|
||||
REGION_ALIAS ("REGION_VECTOR", INTSRAM);
|
||||
REGION_ALIAS ("REGION_TEXT", INTFLASH);
|
||||
REGION_ALIAS ("REGION_TEXT_LOAD", INTFLASH);
|
||||
REGION_ALIAS ("REGION_RODATA", INTFLASH);
|
||||
REGION_ALIAS ("REGION_RODATA_LOAD", INTFLASH);
|
||||
REGION_ALIAS ("REGION_DATA", INTSRAM);
|
||||
REGION_ALIAS ("REGION_DATA_LOAD", INTFLASH);
|
||||
REGION_ALIAS ("REGION_FAST_TEXT", INTSRAM);
|
||||
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", INTFLASH);
|
||||
REGION_ALIAS ("REGION_FAST_DATA", INTSRAM);
|
||||
REGION_ALIAS ("REGION_FAST_DATA_LOAD", INTFLASH);
|
||||
REGION_ALIAS ("REGION_BSS", INTSRAM);
|
||||
REGION_ALIAS ("REGION_WORK", INTSRAM);
|
||||
REGION_ALIAS ("REGION_STACK", INTSRAM);
|
||||
REGION_ALIAS ("REGION_NOCACHE", INTSRAM);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", INTSRAM);
|
||||
|
||||
INCLUDE linkcmds.armv7m
|
||||
@@ -0,0 +1,23 @@
|
||||
INCLUDE linkcmds.memory
|
||||
|
||||
bsp_vector_table_in_start_section = 1;
|
||||
|
||||
REGION_ALIAS ("REGION_START", INTSRAM);
|
||||
REGION_ALIAS ("REGION_VECTOR", INTSRAM);
|
||||
REGION_ALIAS ("REGION_TEXT", INTSRAM);
|
||||
REGION_ALIAS ("REGION_TEXT_LOAD", INTSRAM);
|
||||
REGION_ALIAS ("REGION_RODATA", INTSRAM);
|
||||
REGION_ALIAS ("REGION_RODATA_LOAD", INTSRAM);
|
||||
REGION_ALIAS ("REGION_DATA", INTSRAM);
|
||||
REGION_ALIAS ("REGION_DATA_LOAD", INTSRAM);
|
||||
REGION_ALIAS ("REGION_FAST_TEXT", INTSRAM);
|
||||
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", INTSRAM);
|
||||
REGION_ALIAS ("REGION_FAST_DATA", INTSRAM);
|
||||
REGION_ALIAS ("REGION_FAST_DATA_LOAD", INTSRAM);
|
||||
REGION_ALIAS ("REGION_BSS", INTSRAM);
|
||||
REGION_ALIAS ("REGION_WORK", INTSRAM);
|
||||
REGION_ALIAS ("REGION_STACK", INTSRAM);
|
||||
REGION_ALIAS ("REGION_NOCACHE", INTSRAM);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", INTSRAM);
|
||||
|
||||
INCLUDE linkcmds.armv7m
|
||||
@@ -0,0 +1,91 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsARMEFM32GG11
|
||||
*
|
||||
* @brief EFM32GG11 TRNG getentropy() Implementation
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2025 Allan N. Hessenflow
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/processor.h>
|
||||
#include <unistd.h>
|
||||
#include <stdint.h>
|
||||
#include <rtems/sysinit.h>
|
||||
#include <rtems/bspIo.h>
|
||||
|
||||
static void efm32gg11_trng_enable(void)
|
||||
{
|
||||
rtems_interrupt_level level;
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_TRNG0;
|
||||
rtems_interrupt_enable(level);
|
||||
|
||||
TRNG0->CONTROL = TRNG_CONTROL_ENABLE;
|
||||
|
||||
while (TRNG0->FIFOLEVEL < 4)
|
||||
;
|
||||
TRNG0->KEY0 = TRNG0->FIFO;
|
||||
TRNG0->KEY1 = TRNG0->FIFO;
|
||||
TRNG0->KEY2 = TRNG0->FIFO;
|
||||
TRNG0->KEY3 = TRNG0->FIFO;
|
||||
|
||||
TRNG0->CONTROL = TRNG_CONTROL_SOFTRESET | TRNG_CONTROL_ENABLE;
|
||||
TRNG0->CONTROL = TRNG_CONTROL_ENABLE;
|
||||
}
|
||||
|
||||
int getentropy(void *ptr, size_t n)
|
||||
{
|
||||
union {
|
||||
uint8_t b[4];
|
||||
uint32_t g;
|
||||
} v;
|
||||
int i;
|
||||
|
||||
while (n) {
|
||||
/* How fast is the TRNG? Maybe we should block until the FIFO is
|
||||
full (64 x 32 bits) (the only data available related interrupt
|
||||
for the module is fifo full), or maybe delay for a tick inside
|
||||
the wait loop */
|
||||
while (TRNG0->FIFOLEVEL == 0)
|
||||
;
|
||||
v.g = TRNG0->FIFO;
|
||||
for (i = 0; i < 4 && n; i++, n--)
|
||||
*(uint8_t *)ptr++ = v.b[i];
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
RTEMS_SYSINIT_ITEM(
|
||||
efm32gg11_trng_enable,
|
||||
RTEMS_SYSINIT_DEVICE_DRIVERS,
|
||||
RTEMS_SYSINIT_ORDER_LAST_BUT_5
|
||||
);
|
||||
@@ -0,0 +1,21 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- split: null
|
||||
- env-append: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value:
|
||||
- -mcpu=cortex-m4
|
||||
- -mthumb
|
||||
- -mfloat-abi=hard
|
||||
- -mfpu=auto
|
||||
description: |
|
||||
ABI flags
|
||||
enabled-by: true
|
||||
links: []
|
||||
name: ABI_FLAGS
|
||||
type: build
|
||||
@@ -0,0 +1,23 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
arch: arm
|
||||
bsp: efm32gg11
|
||||
build-type: bsp
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
cppflags: []
|
||||
enabled-by: true
|
||||
family: efm32gg11
|
||||
includes: []
|
||||
install: []
|
||||
links:
|
||||
- role: build-dependency
|
||||
uid: ../../opto2
|
||||
- role: build-dependency
|
||||
uid: ../../tstsmallmem
|
||||
- role: build-dependency
|
||||
uid: tstefm32gg11
|
||||
- role: build-dependency
|
||||
uid: grp
|
||||
source: []
|
||||
type: build
|
||||
@@ -0,0 +1,323 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
build-type: group
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
cppflags: []
|
||||
cxxflags: []
|
||||
enabled-by: true
|
||||
includes: []
|
||||
install: []
|
||||
ldflags: []
|
||||
links:
|
||||
- role: build-dependency
|
||||
uid: ../grp
|
||||
- role: build-dependency
|
||||
uid: ../start
|
||||
- role: build-dependency
|
||||
uid: abi
|
||||
- role: build-dependency
|
||||
uid: obj
|
||||
- role: build-dependency
|
||||
uid: optdevice
|
||||
- role: build-dependency
|
||||
uid: optconcsloc
|
||||
- role: build-dependency
|
||||
uid: optconctrl
|
||||
- role: build-dependency
|
||||
uid: optconidx
|
||||
- role: build-dependency
|
||||
uid: optcontiming
|
||||
- role: build-dependency
|
||||
uid: optcontype
|
||||
- role: build-dependency
|
||||
uid: optcontxloc
|
||||
- role: build-dependency
|
||||
uid: optconrxloc
|
||||
- role: build-dependency
|
||||
uid: optconctsloc
|
||||
- role: build-dependency
|
||||
uid: optconrtsloc
|
||||
- role: build-dependency
|
||||
uid: optconvcom
|
||||
- role: build-dependency
|
||||
uid: opti2c0idx
|
||||
- role: build-dependency
|
||||
uid: opti2c0sclloc
|
||||
- role: build-dependency
|
||||
uid: opti2c0sdaloc
|
||||
- role: build-dependency
|
||||
uid: opti2c1idx
|
||||
- role: build-dependency
|
||||
uid: opti2c1sclloc
|
||||
- role: build-dependency
|
||||
uid: opti2c1sdaloc
|
||||
- role: build-dependency
|
||||
uid: opti2c2idx
|
||||
- role: build-dependency
|
||||
uid: opti2c2sclloc
|
||||
- role: build-dependency
|
||||
uid: opti2c2sdaloc
|
||||
- role: build-dependency
|
||||
uid: optspi0idx
|
||||
- role: build-dependency
|
||||
uid: optspi0cspins
|
||||
- role: build-dependency
|
||||
uid: optspi0clkloc
|
||||
- role: build-dependency
|
||||
uid: optspi0rxloc
|
||||
- role: build-dependency
|
||||
uid: optspi0txloc
|
||||
- role: build-dependency
|
||||
uid: optspi0rxdma
|
||||
- role: build-dependency
|
||||
uid: optspi0txdma
|
||||
- role: build-dependency
|
||||
uid: optspi1idx
|
||||
- role: build-dependency
|
||||
uid: optspi1cspins
|
||||
- role: build-dependency
|
||||
uid: optspi1clkloc
|
||||
- role: build-dependency
|
||||
uid: optspi1rxloc
|
||||
- role: build-dependency
|
||||
uid: optspi1txloc
|
||||
- role: build-dependency
|
||||
uid: optspi1rxdma
|
||||
- role: build-dependency
|
||||
uid: optspi1txdma
|
||||
- role: build-dependency
|
||||
uid: optspi1idx
|
||||
- role: build-dependency
|
||||
uid: optspi1cspins
|
||||
- role: build-dependency
|
||||
uid: optspi1clkloc
|
||||
- role: build-dependency
|
||||
uid: optspi1rxloc
|
||||
- role: build-dependency
|
||||
uid: optspi1txloc
|
||||
- role: build-dependency
|
||||
uid: optspi1rxdma
|
||||
- role: build-dependency
|
||||
uid: optspi1txdma
|
||||
- role: build-dependency
|
||||
uid: optspi2idx
|
||||
- role: build-dependency
|
||||
uid: optspi2cspins
|
||||
- role: build-dependency
|
||||
uid: optspi2clkloc
|
||||
- role: build-dependency
|
||||
uid: optspi2rxloc
|
||||
- role: build-dependency
|
||||
uid: optspi2txloc
|
||||
- role: build-dependency
|
||||
uid: optspi2rxdma
|
||||
- role: build-dependency
|
||||
uid: optspi2txdma
|
||||
- role: build-dependency
|
||||
uid: optspi3idx
|
||||
- role: build-dependency
|
||||
uid: optspi3cspins
|
||||
- role: build-dependency
|
||||
uid: optspi3clkloc
|
||||
- role: build-dependency
|
||||
uid: optspi3rxloc
|
||||
- role: build-dependency
|
||||
uid: optspi3txloc
|
||||
- role: build-dependency
|
||||
uid: optspi3rxdma
|
||||
- role: build-dependency
|
||||
uid: optspi3txdma
|
||||
- role: build-dependency
|
||||
uid: optspi4idx
|
||||
- role: build-dependency
|
||||
uid: optspi4cspins
|
||||
- role: build-dependency
|
||||
uid: optspi4clkloc
|
||||
- role: build-dependency
|
||||
uid: optspi4rxloc
|
||||
- role: build-dependency
|
||||
uid: optspi4txloc
|
||||
- role: build-dependency
|
||||
uid: optspi4rxdma
|
||||
- role: build-dependency
|
||||
uid: optspi4txdma
|
||||
- role: build-dependency
|
||||
uid: optspi5idx
|
||||
- role: build-dependency
|
||||
uid: optspi5cspins
|
||||
- role: build-dependency
|
||||
uid: optspi5clkloc
|
||||
- role: build-dependency
|
||||
uid: optspi5rxloc
|
||||
- role: build-dependency
|
||||
uid: optspi5txloc
|
||||
- role: build-dependency
|
||||
uid: optspi5rxdma
|
||||
- role: build-dependency
|
||||
uid: optspi5txdma
|
||||
- role: build-dependency
|
||||
uid: optttys1csloc
|
||||
- role: build-dependency
|
||||
uid: optttys1ctrl
|
||||
- role: build-dependency
|
||||
uid: optttys1idx
|
||||
- role: build-dependency
|
||||
uid: optttys1timing
|
||||
- role: build-dependency
|
||||
uid: optttys1type
|
||||
- role: build-dependency
|
||||
uid: optttys1txloc
|
||||
- role: build-dependency
|
||||
uid: optttys1rxloc
|
||||
- role: build-dependency
|
||||
uid: optttys1ctsloc
|
||||
- role: build-dependency
|
||||
uid: optttys1rtsloc
|
||||
- role: build-dependency
|
||||
uid: optttys2csloc
|
||||
- role: build-dependency
|
||||
uid: optttys2ctrl
|
||||
- role: build-dependency
|
||||
uid: optttys2idx
|
||||
- role: build-dependency
|
||||
uid: optttys2timing
|
||||
- role: build-dependency
|
||||
uid: optttys2type
|
||||
- role: build-dependency
|
||||
uid: optttys2txloc
|
||||
- role: build-dependency
|
||||
uid: optttys2rxloc
|
||||
- role: build-dependency
|
||||
uid: optttys2ctsloc
|
||||
- role: build-dependency
|
||||
uid: optttys2rtsloc
|
||||
- role: build-dependency
|
||||
uid: optttys3csloc
|
||||
- role: build-dependency
|
||||
uid: optttys3ctrl
|
||||
- role: build-dependency
|
||||
uid: optttys3idx
|
||||
- role: build-dependency
|
||||
uid: optttys3timing
|
||||
- role: build-dependency
|
||||
uid: optttys3type
|
||||
- role: build-dependency
|
||||
uid: optttys3txloc
|
||||
- role: build-dependency
|
||||
uid: optttys3rxloc
|
||||
- role: build-dependency
|
||||
uid: optttys3ctsloc
|
||||
- role: build-dependency
|
||||
uid: optttys3rtsloc
|
||||
- role: build-dependency
|
||||
uid: optttys4csloc
|
||||
- role: build-dependency
|
||||
uid: optttys4ctrl
|
||||
- role: build-dependency
|
||||
uid: optttys4idx
|
||||
- role: build-dependency
|
||||
uid: optttys4timing
|
||||
- role: build-dependency
|
||||
uid: optttys4type
|
||||
- role: build-dependency
|
||||
uid: optttys4txloc
|
||||
- role: build-dependency
|
||||
uid: optttys4rxloc
|
||||
- role: build-dependency
|
||||
uid: optttys4ctsloc
|
||||
- role: build-dependency
|
||||
uid: optttys4rtsloc
|
||||
- role: build-dependency
|
||||
uid: optttys5csloc
|
||||
- role: build-dependency
|
||||
uid: optttys5ctrl
|
||||
- role: build-dependency
|
||||
uid: optttys5idx
|
||||
- role: build-dependency
|
||||
uid: optttys5timing
|
||||
- role: build-dependency
|
||||
uid: optttys5type
|
||||
- role: build-dependency
|
||||
uid: optttys5txloc
|
||||
- role: build-dependency
|
||||
uid: optttys5rxloc
|
||||
- role: build-dependency
|
||||
uid: optttys5ctsloc
|
||||
- role: build-dependency
|
||||
uid: optttys5rtsloc
|
||||
- role: build-dependency
|
||||
uid: optttys6csloc
|
||||
- role: build-dependency
|
||||
uid: optttys6ctrl
|
||||
- role: build-dependency
|
||||
uid: optttys6idx
|
||||
- role: build-dependency
|
||||
uid: optttys6timing
|
||||
- role: build-dependency
|
||||
uid: optttys6type
|
||||
- role: build-dependency
|
||||
uid: optttys6txloc
|
||||
- role: build-dependency
|
||||
uid: optttys6rxloc
|
||||
- role: build-dependency
|
||||
uid: optttys6ctsloc
|
||||
- role: build-dependency
|
||||
uid: optttys6rtsloc
|
||||
- role: build-dependency
|
||||
uid: optttys7csloc
|
||||
- role: build-dependency
|
||||
uid: optttys7ctrl
|
||||
- role: build-dependency
|
||||
uid: optttys7idx
|
||||
- role: build-dependency
|
||||
uid: optttys7timing
|
||||
- role: build-dependency
|
||||
uid: optttys7type
|
||||
- role: build-dependency
|
||||
uid: optttys7txloc
|
||||
- role: build-dependency
|
||||
uid: optttys7rxloc
|
||||
- role: build-dependency
|
||||
uid: optttys7ctsloc
|
||||
- role: build-dependency
|
||||
uid: optttys7rtsloc
|
||||
- role: build-dependency
|
||||
uid: optlfxofreq
|
||||
- role: build-dependency
|
||||
uid: optlfxogain
|
||||
- role: build-dependency
|
||||
uid: optlfxotuning
|
||||
- role: build-dependency
|
||||
uid: optlfxotype
|
||||
- role: build-dependency
|
||||
uid: opthfrcofreq
|
||||
- role: build-dependency
|
||||
uid: opthfxofreq
|
||||
- role: build-dependency
|
||||
uid: opthfxotuning
|
||||
- role: build-dependency
|
||||
uid: opthfxotype
|
||||
- role: build-dependency
|
||||
uid: optlinkcmds
|
||||
- role: build-dependency
|
||||
uid: linkcmds
|
||||
- role: build-dependency
|
||||
uid: linkcmdsmemory
|
||||
- role: build-dependency
|
||||
uid: ../../optconsolebaud
|
||||
- role: build-dependency
|
||||
uid: ../../optconsoleirq
|
||||
- role: build-dependency
|
||||
uid: ../../obj
|
||||
- role: build-dependency
|
||||
uid: ../../objirq
|
||||
- role: build-dependency
|
||||
uid: ../../objmem
|
||||
- role: build-dependency
|
||||
uid: ../../bspopts
|
||||
- role: build-dependency
|
||||
uid: optincludes
|
||||
type: build
|
||||
use-after: []
|
||||
use-before: []
|
||||
@@ -0,0 +1,11 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
build-type: config-file
|
||||
content: |
|
||||
INCLUDE ${EFM32GG11_DEFAULT_LINKCMDS}
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
enabled-by: true
|
||||
install-path: ${BSP_LIBDIR}
|
||||
links: []
|
||||
target: linkcmds
|
||||
type: build
|
||||
@@ -0,0 +1,14 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
build-type: config-file
|
||||
content: |
|
||||
MEMORY {
|
||||
INTFLASH : ORIGIN = 0x00000000, LENGTH = ${EFM32GG11_MEMORY_INTFLASH_SIZE}
|
||||
INTSRAM : ORIGIN = 0x20000000, LENGTH = ${EFM32GG11_MEMORY_INTSRAM_SIZE}
|
||||
}
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
enabled-by: true
|
||||
install-path: ${BSP_LIBDIR}
|
||||
links: []
|
||||
target: linkcmds.memory
|
||||
type: build
|
||||
@@ -0,0 +1,123 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
build-type: objects
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
cppflags: []
|
||||
cxxflags: []
|
||||
enabled-by: true
|
||||
includes: []
|
||||
install:
|
||||
- destination: ${BSP_INCLUDEDIR}
|
||||
source:
|
||||
- bsps/arm/efm32gg11/include/bsp.h
|
||||
- destination: ${BSP_INCLUDEDIR}/bsp
|
||||
source:
|
||||
- bsps/arm/efm32gg11/include/bsp/i2c.h
|
||||
- bsps/arm/efm32gg11/include/bsp/irq.h
|
||||
- bsps/arm/efm32gg11/include/bsp/spi.h
|
||||
- bsps/arm/efm32gg11/include/bsp/efm32gg11_clock.h
|
||||
- bsps/arm/efm32gg11/include/bsp/efm32gg11_dma.h
|
||||
- bsps/arm/efm32gg11/include/bsp/efm32gg11_gpio.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b110f2048gm64.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b120f2048gm64.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b310f2048gl112.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b320f2048gl112.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b420f2048gl120.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b510f2048gl120.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b520f2048gl120.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b820f2048gl192.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b840f1024gl192.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_acmp.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_adc.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_af_pins.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_af_ports.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_can.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_can_mir.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_cmu.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_cryotimer.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_crypto.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_csen.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_devinfo.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_dma_descriptor.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_dmareq.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_ebi.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_emu.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_eth.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_etm.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_fpueh.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_gpcrc.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_gpio.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_gpio_p.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_i2c.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_idac.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_lcd.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_ldma_ch.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_ldma.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_lesense_buf.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_lesense_ch.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_lesense.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_lesense_st.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_letimer.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_leuart.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_msc.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_pcnt.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_prs_ch.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_prs.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_prs_signals.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_qspi.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_rmu.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_romtable.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_rtcc_cc.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_rtcc.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_rtc_comp.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_rtcc_ret.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_rtc.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_sdio.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_smu.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_timer_cc.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_timer.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_trng.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_uart.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_usart.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_usb_diep.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_usb_doep.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_usb.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_usb_hc.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_vdac.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_vdac_opa.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_wdog.h
|
||||
- contrib/bsps/arm/efm32gg11/efm32gg11b_wdog_pch.h
|
||||
- contrib/bsps/arm/efm32gg11/system_efm32gg11b.h
|
||||
- bsps/arm/efm32gg11/include/bsp/processor.h
|
||||
- destination: ${BSP_LIBDIR}
|
||||
source:
|
||||
- bsps/arm/efm32gg11/start/linkcmds.intflash
|
||||
- bsps/arm/efm32gg11/start/linkcmds.intsram
|
||||
links: []
|
||||
source:
|
||||
- bsps/arm/efm32gg11/console/console.c
|
||||
- bsps/arm/efm32gg11/dma/efm32gg11_dma.c
|
||||
- bsps/arm/efm32gg11/gpio/efm32gg11_gpio.c
|
||||
- bsps/arm/efm32gg11/i2c/i2c.c
|
||||
- bsps/arm/efm32gg11/spi/spi.c
|
||||
- bsps/arm/efm32gg11/start/bspreset.c
|
||||
- bsps/arm/efm32gg11/start/bspstart.c
|
||||
- bsps/arm/efm32gg11/start/bspstarthook.c
|
||||
- bsps/arm/efm32gg11/start/efm32gg11_clock.c
|
||||
- bsps/arm/efm32gg11/trng/efm32gg11_trng.c
|
||||
- bsps/arm/shared/clock/clock-armv7m.c
|
||||
- bsps/arm/shared/irq/irq-armv7m.c
|
||||
- bsps/arm/shared/irq/irq-dispatch-armv7m.c
|
||||
- bsps/arm/shared/start/bsp-start-memcpy.S
|
||||
- bsps/arm/shared/start/bspstarthook0-empty.c
|
||||
- bsps/shared/cache/nocache.c
|
||||
- bsps/shared/dev/btimer/btimer-cpucounter.c
|
||||
- bsps/shared/dev/cpucounter/cpucounterfrequency.c
|
||||
- bsps/shared/dev/cpucounter/cpucounterread.c
|
||||
- bsps/shared/dev/serial/console-termios.c
|
||||
- bsps/shared/irq/irq-default-handler.c
|
||||
- bsps/shared/start/gettargethash-default.c
|
||||
- bsps/shared/start/sbrk.c
|
||||
- bsps/shared/start/stackalloc.c
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: -1
|
||||
description: |
|
||||
console cs pin alt function location (disabled -1)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_CS_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- define-unquoted: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 0
|
||||
description: |
|
||||
console usart extra ctl register bits (e.g. USART_CTRL_AUTOCS)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_CTRL
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 4
|
||||
description: |
|
||||
console cts pin alt function location (default 4)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_CTS_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 4
|
||||
description: |
|
||||
device index for /dev/console (default 4, e.g. USART4)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_DEVICE_INDEX
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 4
|
||||
description: |
|
||||
console rts pin alt function location (default 4)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_RTS_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 4
|
||||
description: |
|
||||
console rx pin alt function location (default 4)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_RX_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- define-unquoted: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 0
|
||||
description: |
|
||||
console usart timing register
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_TIMING
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 4
|
||||
description: |
|
||||
console tx pin alt function location (default 4)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_TX_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- define-unquoted: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: USART
|
||||
description: |
|
||||
device type for /dev/console (UART or USART)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_TYPE
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 1
|
||||
description: |
|
||||
connect console port to board controller
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_CONSOLE_VCOM_ENABLE
|
||||
type: build
|
||||
@@ -0,0 +1,37 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- define-unquoted: null
|
||||
- script: |
|
||||
c = (0x00200000, 0x00080000)
|
||||
chips = {
|
||||
"EFM32GG11B110": (0x00200000, 0x00060000),
|
||||
"EFM32GG11B120": (0x00200000, 0x00080000),
|
||||
"EFM32GG11B310": (0x00200000, 0x00060000),
|
||||
"EFM32GG11B320": (0x00200000, 0x00080000),
|
||||
"EFM32GG11B420": (0x00200000, 0x00080000),
|
||||
"EFM32GG11B510": (0x00200000, 0x00060000),
|
||||
"EFM32GG11B520": (0x00200000, 0x00080000),
|
||||
"EFM32GG11B820": c,
|
||||
"EFM32GG11B840": (0x00100000, 0x00080000),
|
||||
}
|
||||
if value:
|
||||
try:
|
||||
c = chips[value]
|
||||
except:
|
||||
conf.fatal("Unknown chip variant '{}'".format(value))
|
||||
conf.env["EFM32GG11_MEMORY_INTFLASH_SIZE"] = c[0]
|
||||
conf.env["EFM32GG11_MEMORY_INTSRAM_SIZE"] = c[1]
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: EFM32GG11B820
|
||||
description: |
|
||||
Device type
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_DEVICE
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 0
|
||||
description: |
|
||||
HFRCO frequency in Hz (uses closest pre-calibrated frequency)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_HFRCO_FREQ
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 50000000
|
||||
description: |
|
||||
HFXO frequency in Hz
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_HFXO_FREQ
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 182
|
||||
description: |
|
||||
HFXO tuning (0 - 511)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_HFXO_TUNING
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- define-unquoted: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: XTAL
|
||||
description: |
|
||||
hfxo type (XTAL, ACBUFEXTCLK, DCBUFEXTCLK, or DIGEXTCLK)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_HFXO_TYPE
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 2
|
||||
description: |
|
||||
device index for /dev/i2c-0 (default 2, e.g. I2C2)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_I2C_0_INDEX
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 7
|
||||
description: |
|
||||
i2c-0 scl pin alt function location (default 7)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_I2C_0_SCL_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: 7
|
||||
description: |
|
||||
i2c-0 sda pin alt function location (default 7)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_I2C_0_SDA_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: -1
|
||||
description: |
|
||||
device index for /dev/i2c-1 (-1 to disable, 0 for I2C0, etc.)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_I2C_1_INDEX
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: -1
|
||||
description: |
|
||||
i2c-1 scl pin alt function location
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_I2C_1_SCL_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: -1
|
||||
description: |
|
||||
i2c-1 sda pin alt function location
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_I2C_1_SDA_LOC
|
||||
type: build
|
||||
@@ -0,0 +1,17 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-integer: null
|
||||
- define: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2025 Allan N. Hessenflow
|
||||
default:
|
||||
- enabled-by: true
|
||||
value: -1
|
||||
description: |
|
||||
device index for /dev/i2c-2 (-1 to disable, 0 for I2C0, etc.)
|
||||
enabled-by: true
|
||||
format: '{}'
|
||||
links: []
|
||||
name: EFM32GG11_I2C_2_INDEX
|
||||
type: build
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user