In SMP systems, the interrupt handler may run concurrently with tasks
trying to transmit. Properly protect the transmit state through the
device lock. Simplify the transmit process.
Close#5552.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
This adds a BSP-level function that returns the calculated PSCI
target_cpu parameter for a given cpu_index. BSPs can override this
function to use the correct affinity level for the calculation.
Also updates _CPU_SMP_Start_processor() to make use of this
function and remove code duplication.
These changes were made to address GCC -Wsign-compare warnings.
In this case, the vendor ID in the management structure was unsigned
and the vendor parameters to various helper functions were signed.
This adds a backend for flashdev that simulates a flash device with
adjustable delays to simulate real flash devices and offers
configurable flash parameters. This also migrates the JFFS2
filesystem tests to the flashdev framework and eliminates the
purpose-built simulated flash in the testsuite in favor of a more
generic and widely usable solution.
This makes the number of active chipselects a BSP configuration
parameter. The name of the macro in upstream source is misleading and
suggests that the driver can support up to the selected value when in
actuality it requires that number of chips to be present. If this number
of chips is not present, the driver will hang on initialization waiting
for a chip to respond that does not exist.
Set BSP_INTERRUPT_VECTOR_COUNT to 1 to avoid type limits and array
bounds warnings.
Make sure all functions using the default interrupt controller
implementation return a status of RTEMS_UNSATISFIED.
Update #5298.
Close#5377.
Add "(void) param;" annotation to address unused parameter warnings.
Found with GCC's warning -Wunused-parameter.
The ACPI change set includes two headers which define debug macros. When
not building for debug, the instantiated inline functions generate
unused parameter warnings from every file they are included in. The
warning was disabled around the macro instantiations.
This is a third party file and the debug macros create unused
parameter warnings when debugging is not enabled. There are
multiple macros with layers. Rather than attempt to unwind all
this, disabled the -Wunused-parameter GCC warning around the
short block of code causing these warnings.
This adds an API call allowing for unregistration to include destruction
of private data that is not managed by the flashdev framework. This also
updates the existing consumers of flashdev to use the new private data
destructor callback.
Previously this RTC was using the file system-based i2c interface in
/dev. Since the RTC is initialized pretty early on during system init,
we call open() before stdin/stdout/stderr have been opened. RTEMS
assumes that stdin == 0, stdout == 1, etc., and fails when that isn't
the case. In particular, when stdin != 0, RTEMS assumes that it wasn't
configured with a console driver and skips opening stdout/stderr,
leading to confusing issues with the standard I/O streams.
The ACPI source has multiple tables where a Name field is defined.
The name field is a character array with a length of 4. All of the
string initializers are four characters plus a NUL. The code is
careful to use strn*() functions and intentionally avoids assuming
there is space for the NUL. With lots of entries in the various
arrays, this was clearly a design decision to save space.
This was caught by GCC's -Wunterminated-string-initialization
warning. The solution used is to use the "nonstring" attribute
recommended by the GCC manual.
Closes#5329
The RTEMS Software Engineering Guide specifies that the SPDX license
annotation shouldbe the first line of the file and not part of the
copyright/license comment block.
The use of an array of zero length at the end of a structure needs to
be careful to use RTEMS_ZERO_LENGTH_ARRAY since the accepted syntax
varies across C language versions.
This BSP supports a custom STM32U5 based board. It uses a similar
structure like the existing STM32H7 BSP and therefore should be well
adaptable to other boards.
Co-authored-by: Christian Mauderer <christian.mauderer@embedded-brains.de>
The GICD_IROUTER register technically starts at offset 0x6000, but the
first 32 IRQ entries are reserved making IRQ 32's entry at 0x6100 the
first usable entry. This register is not currently used, so only a
comment is added to that effect.
Closes#5223
This adds generic JFFS2 interworking code that allows JFFS2 to be used
on top of any flashdev backend. It currently only supports NOR flashdev
backends.
The two RTCs supported by that driver (MCP7940M and EOZ9) use slightly
different register order. Add support for a different order to the
i2c-rtc driver.
This removes the headers imported from the embeddedsw repository in
favor of a much thinner shim. This also removes the complicated build
system configuration necessary to support use of these headers. The
primary reason for removal is that certain external Xilinx libraries
also require use of these headers and this causes version mismatches and
header conflicts that can be avoided.
- Refactor the pl011 driver to be extensible.
- Add IRQ support and baudrate configuration support for pl011 driver.
- Modify related BSP.
- Add doxygen comments for arm-pl011.
Close#5026
Co-authored-by: Ning Yang <yangn0@qq.com>
This adds support for the 6 SPI interfaces on the STM32H7 series chips
with an initial example for the stm32h750b discovery kit development
board. Configuration is similar to existing peripherals. Chip select
lines are software-controlled since the SPI peripheral only supports a
single hardware-controlled chip select line. This implementation does
not use interrupts.
The EOZ9 RTC has a similar register interface like the MCP7940M (and
quite some other I2C RTCs). This commit:
* Extracts the generic parts from MCP7940M and moves it into a generic
i2c-rtc driver.
* Uses the new i2c-rtc for the MCP7940M.
* Uses the new i2c-rtc for the new Abracom EOZ9.
This adds error reporting for ZynqMP including L1 and L2 cache, on-chip
memory (OCM) error correcting code (ECC), and DDR ECC. OCM ECC supports
fault injection from within RTEMS. DDR ECC technically supports fault
injection as well, but requires that the program injecting faults
operate exclusively outside of DDR. The AArch64 port is not currently
capable of operating exclusively in OCM due to size constraints and
would need to be booted via JTAG or via a non-relocating u-boot to
accomplish this.
Sebastian Huber
Gedare Bloom
Vhmed-Mvnsour
Preetam Das
Remi Debord
Joel Sherrill
Kinsey Moore
Jeremy Lorelli
Matt JoyceandChristian Mauderer
Aaron Nyholm
Amar Takhar
Utkarsh VermaandNing Yang
Matheus Pecoraro