bsps/shared: Add Abracom EOZ9 RTC driver

The EOZ9 RTC has a similar register interface like the MCP7940M (and
quite some other I2C RTCs). This commit:

* Extracts the generic parts from MCP7940M and moves it into a generic
  i2c-rtc driver.
* Uses the new i2c-rtc for the MCP7940M.
* Uses the new i2c-rtc for the new Abracom EOZ9.
This commit is contained in:
Christian Mauderer authored and Amar Takhar committed 2024-08-27 21:54:43 +00:00
1 parent acf7c725ca
commit 3b053f6919
7 files changed
+787 -324

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+91
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@@ -0,0 +1,91 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup shared_tod_abeoz9_rtc
*
* @brief This file provides the interfaces of @ref shared_tod_abeoz9_rtc.
*/
/*
* Copyright (C) 2024 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBCHIP_ABEOZ9_RTC_H
#define LIBCHIP_ABEOZ9_RTC_H
#include <libchip/i2c-rtc.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup shared_tod_abeoz9_rtc
*
* @ingroup shared_tod_i2c_rtc
*
* @brief RTC driver for the Abracon EOZ9 series.
*
* To use this driver, use the following initialization:
*
* Define a context for the RTC somewhere:
*
* static struct abeoz9_rtc rtc_ctx =
* ABEOZ9_RTC_INITIALIZER("/dev/i2c-1", 0x56);
*
* Then you can use the following for the RTC_Table:
*
* ABEOZ9_RTC_TBL_ENTRY("/dev/rtc", &rtc_ctx)
*
* @{
*/
struct abeoz9_rtc {
struct i2c_rtc_base base;
};
/** Hardware init. Used internally. */
int abeoz9_rtc_hw_init(struct i2c_rtc_base *base);
#define ABEOZ9_RTC_INITIALIZER(i2c_path, i2c_address) { \
.base = I2C_RTC_INITIALIZER( \
i2c_path, \
i2c_address, \
8, \
"abeoz9", \
abeoz9_rtc_hw_init), \
}
#define ABEOZ9_RTC_TBL_ENTRY(dev_name, abeoz9_rtc_ctx) \
I2C_RTC_TBL_ENTRY(dev_name, abeoz9_rtc_ctx)
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBCHIP_ABEOZ9_RTC_H */
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup shared_tod_i2c_rtc
*
* @brief This file provides the interfaces of @ref shared_tod_i2c_rtc.
*/
/*
* Copyright (C) 2023-2024 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBCHIP_I2C_RTC_H
#define LIBCHIP_I2C_RTC_H
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup shared_tod_i2c_rtc
*
* @ingroup shared_tod
*
* @brief Generic I2C RTC driver
*
* Base functionality for I2C based RTC drivers. An additional, chip specific
* initialization is necessary.
*
* Expects a register block with the following time format:
*
* * <base>+0:
* * Bit 0 to 6: Seconds (BCD encoded)
* * Bit 7: Don't care
* * <base>+1:
* * Bit 0 to 6: Minutes (BCD encoded)
* * Bit 7: Don't care
* * <base>+2:
* * Bit 0 to 5: Hours (BCD encoded); Bit 5 indicates AM (0) and PM (1) in 12
* hour mode
* * Bit 6: 0 for 24 hour mode; 1 for 12 hour mode
* * <base>+3:
* * Bit 0 to 5: Day (BCD encoded)
* * Bit 6 and 7: Don't care
* * <base>+4:
* * Bit 0 to 2: Day of Week
* * Bit 3 to 7: Don't care
* * <base>+5:
* * Bit 0 to 4: Month (BCD encoded)
* * Bit 5 to 7: Don't care
* * <base>+6:
* * Bit 0 to 6: Year (BCD encoded)
* * Bit 7: Don't care
*
* See abeoz9 or mcp7940m for how to use this base driver.
*
* @{
*/
#include <rtems.h>
#include <rtems/thread.h>
#include <libchip/rtc.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
extern const rtc_fns i2c_rtc_fns;
bool i2c_rtc_probe(int minor);
/** Base context for the driver. */
struct i2c_rtc_base {
/** Just initialize with RTEMS_MUTEX_INITIALIZER('mcp7940'). */
rtems_mutex mutex;
/** The path of the I2C bus device. */
const char *i2c_bus_path;
/** I2C address. */
uint8_t i2c_addr;
/** Whether the RTC has already been initialized. Used internally. */
bool initialized;
/**
* Hardware initialization function. Will be called once when the RTC is used
* for the first time. Can return 0 on success or anything else on error. In
* an error case, it will be called again on the next use.
*/
int (*hw_init) (struct i2c_rtc_base *ctx);
/** Offset of the clock register block. */
size_t clock_offset;
};
/**
* Read bytes from the I2C RTC. Can be used in derived drivers.
*
* Returns 0 on success or anything else on error.
*/
int i2c_rtc_read(struct i2c_rtc_base *ctx, uint8_t addr, uint8_t *buf,
size_t len);
/**
* Write bytes to the I2C RTC. Can be used in derived drivers.
*
* Returns 0 on success or anything else on error.
*/
int i2c_rtc_write(struct i2c_rtc_base *ctx, uint8_t addr, const uint8_t *buf,
size_t len);
#define I2C_RTC_INITIALIZER(i2c_path, i2c_address, offset, driver_name, hwinit)\
{ \
.mutex = RTEMS_MUTEX_INITIALIZER(driver_name), \
.i2c_bus_path = i2c_path, \
.i2c_addr = i2c_address, \
.initialized = false, \
.hw_init = hwinit, \
.clock_offset = offset, \
}
#define I2C_RTC_TBL_ENTRY(dev_name, i2c_rtc_ctx) \
{ \
.sDeviceName = dev_name, \
.deviceType = RTC_CUSTOM, \
.pDeviceFns = &i2c_rtc_fns, \
.deviceProbe = i2c_rtc_probe, \
.pDeviceParams = (void *)i2c_rtc_ctx, \
.ulCtrlPort1 = 0, \
.ulDataPort = 0, \
.getRegister = NULL, \
.setRegister = NULL, \
}
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBCHIP_I2C_RTC_H */
+31 -39
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@@ -1,5 +1,13 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup shared_tod_mcp7940m_rtc
*
* @brief This file provides the interfaces of @ref shared_tod_mcp7940m_rtc.
*/
/*
* Copyright (C) 2023 embedded brains GmbH & Co. KG
*
@@ -28,25 +36,20 @@
#ifndef LIBCHIP_MCP7940M_RTC_H
#define LIBCHIP_MCP7940M_RTC_H
#include <rtems.h>
#include <rtems/thread.h>
#include <libchip/rtc.h>
#include <stdint.h>
#include <libchip/i2c-rtc.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
extern const rtc_fns rtc_mcp7940m_fns;
bool rtc_mcp7940m_probe(int minor);
/*
* It is expected, that the RTC can be accessed as a raw file. A pointer to a
* constant string with the name of that device has to be passed to the table
* initializer.
/**
* @defgroup shared_tod_mcp7940m_rtc
*
* The MCP7940M uses an EEPROM-like interface. So you could for example use the
* following initialization:
* @ingroup shared_tod_i2c_rtc
*
* @brief RTC driver for the MCP7940M
*
* To use this driver, use the following initialization:
*
* Define a context for the RTC somewhere:
*
@@ -56,45 +59,34 @@ bool rtc_mcp7940m_probe(int minor);
* Then you can use the following for the RTC_Table:
*
* MCP7940M_RTC_TBL_ENTRY("/dev/rtc", &rtc_ctx)
*
* @{
*/
struct mcp7940m_rtc {
/** Just initialize with RTEMS_MUTEX_INITIALIZER('mcp7940'). */
rtems_mutex mutex;
/** The path of the I2C bus device. */
const char *i2c_bus_path;
/** I2C address. */
uint8_t i2c_addr;
struct i2c_rtc_base base;
/** True if a crystal should be used. False if an oscillator is connected. */
bool crystal;
/** Whether the RTC has already been initialized. Used internally. */
bool initialized;
};
/** Hardware init. Used internally. */
int mcp7940m_hw_init(struct i2c_rtc_base *base);
#define MCP7940M_RTC_INITIALIZER(i2c_path, i2c_address, has_crystal) { \
.mutex = RTEMS_MUTEX_INITIALIZER("mcp7940m"), \
.i2c_bus_path = i2c_path, \
.i2c_addr = i2c_address, \
.base = I2C_RTC_INITIALIZER( \
i2c_path, \
i2c_address, \
0, \
"mcp7940", \
mcp7940m_hw_init), \
.crystal = has_crystal, \
.initialized = false, \
}
#define MCP7940M_RTC_TBL_ENTRY(dev_name, mcp7940m_rtc_ctx) \
{ \
.sDeviceName = dev_name, \
.deviceType = RTC_CUSTOM, \
.pDeviceFns = &rtc_mcp7940m_fns, \
.deviceProbe = rtc_mcp7940m_probe, \
.pDeviceParams = (void *)mcp7940m_rtc_ctx, \
.ulCtrlPort1 = 0, \
.ulDataPort = 0, \
.getRegister = NULL, \
.setRegister = NULL, \
}
I2C_RTC_TBL_ENTRY(dev_name, mcp7940m_rtc_ctx)
/** @} */
#ifdef __cplusplus
}
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup shared_tod_abeoz9_rtc
*
* @brief This file provides the interfaces of @ref shared_tod_abeoz9_rtc.
*/
/*
* Copyright (C) 2024 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <dev/i2c/i2c.h>
#include <libchip/abeoz9-rtc.h>
#include <stdint.h>
#define REG_ABEOZ9_CONTROL_1 0x00u
#define ABEOZ9_CONTROL_1_WE (0x1u << 0)
#define ABEOZ9_CONTROL_1_TE (0x1u << 1)
#define ABEOZ9_CONTROL_1_TAR (0x1u << 2)
#define ABEOZ9_CONTROL_1_EERE (0x1u << 3)
#define ABEOZ9_CONTROL_1_SROn (0x1u << 4)
#define ABEOZ9_CONTROL_1_TD0 (0x1u << 5)
#define ABEOZ9_CONTROL_1_TD1 (0x1u << 6)
#define ABEOZ9_CONTROL_1_ClkInt (0x1u << 7)
#define REG_ABEOZ9_CONTROL_INT 0x01u
#define ABEOZ9_CONTROL_INT_AIE (0x1u << 0)
#define ABEOZ9_CONTROL_INT_TIE (0x1u << 1)
#define ABEOZ9_CONTROL_INT_V1IE (0x1u << 2)
#define ABEOZ9_CONTROL_INT_V2IE (0x1u << 3)
#define ABEOZ9_CONTROL_INT_SRIE (0x1u << 4)
#define REG_ABEOZ9_CONTROL_INT_FLAG 0x02u
#define ABEOZ9_CONTROL_INT_FLAG_AF (0x1u << 0)
#define ABEOZ9_CONTROL_INT_FLAG_TF (0x1u << 1)
#define ABEOZ9_CONTROL_INT_FLAG_V1IF (0x1u << 2)
#define ABEOZ9_CONTROL_INT_FLAG_V2IF (0x1u << 3)
#define ABEOZ9_CONTROL_INT_FLAG_SRF (0x1u << 4)
#define REG_ABEOZ9_CONTROL_STATUS 0x03u
#define ABEOZ9_CONTROL_STATUS_V1F (0x1u << 2)
#define ABEOZ9_CONTROL_STATUS_V2F (0x1u << 3)
#define ABEOZ9_CONTROL_STATUS_SR (0x1u << 4)
#define ABEOZ9_CONTROL_STATUS_PON (0x1u << 5)
#define ABEOZ9_CONTROL_STATUS_EEBusy (0x1u << 7)
#define REG_ABEOZ9_CONTROL_RESET 0x04u
#define ABEOZ9_CONTROL_RESET_SysR (0x1u << 1)
#define REG_ABEOZ9_CLOCK_SEC 0x08u
#define REG_ABEOZ9_CLOCK_MIN 0x09u
#define REG_ABEOZ9_CLOCK_HOUR 0x0au
#define REG_ABEOZ9_CLOCK_WKDAY 0x0bu
#define REG_ABEOZ9_CLOCK_DATE 0x0cu
#define REG_ABEOZ9_CLOCK_MTH 0x0du
#define REG_ABEOZ9_CLOCK_YEAR 0x0eu
#define CLOCK_LEN (REG_ABEOZ9_CLOCK_YEAR + 1 - REG_ABEOZ9_CLOCK_SEC)
#define REG_ABEOZ9_ALARM_SEC 0x10u
#define REG_ABEOZ9_ALARM_MIN 0x11u
#define REG_ABEOZ9_ALARM_HOUR 0x12u
#define REG_ABEOZ9_ALARM_WKDAY 0x13u
#define REG_ABEOZ9_ALARM_DATE 0x14u
#define REG_ABEOZ9_ALARM_MTH 0x15u
#define REG_ABEOZ9_ALARM_YEAR 0x16u
#define ALARM_LEN (REG_ABEOZ9_ALARM_YEAR + 1 - REG_ABEOZ9_ALARM_SEC)
int abeoz9_rtc_hw_init(struct i2c_rtc_base *base)
{
uint8_t reg;
ssize_t rv;
struct abeoz9_rtc *ctx =
RTEMS_CONTAINER_OF(base, struct abeoz9_rtc, base);
/*
* Check PON bit. If that is set, we are starting with an uninitialized chip.
*/
rv = i2c_rtc_read(&ctx->base, REG_ABEOZ9_CONTROL_STATUS, &reg, 1);
if (rv == 0) {
if ((reg & (ABEOZ9_CONTROL_STATUS_PON | ABEOZ9_CONTROL_STATUS_SR)) != 0) {
/*
* First power up after a reset or a self recovery reset. Init state is
* like follows (from the data sheet):
*
* - CLKOUT is selected at CLKOUT pin, default frequency is 32.768 kHz
* defined in register EEPROM Control
* - Timer and Timer Auto-Reload mode are disabled; Timer Source Clock
* frequency is set to 32Hz
* - Self Recovery function is enabled
* - Automatic EEPROM Refresh every hour is enabled
* - 24 hour mode is selected, no Alarm is set
* - All Interrupts are disabled
* - At Power-On Reset, "PON" Flag is set = "1" and has to be cleared by
* writing = "0"
* - At Self-Recovery Reset or System Reset, "SR" Flag is set = "1" and
* has to be cleared by writing = "0".
* - Values in the clock page are undefined.
*
* That's a quite sensible default. Only a well defined value for the time
* and the PON / SR flags have to be set.
*/
uint8_t clock[CLOCK_LEN] = {0, 0, 0, 1, 1, 1, 1};
rv = i2c_rtc_write(&ctx->base, REG_ABEOZ9_CLOCK_SEC, clock, CLOCK_LEN);
if (rv == 0) {
reg &= ~(ABEOZ9_CONTROL_STATUS_PON | ABEOZ9_CONTROL_STATUS_SR);
rv = i2c_rtc_write(&ctx->base, REG_ABEOZ9_CONTROL_STATUS, &reg, 1);
}
} else {
/*
* RTC already active. Disable all alarms and similar functionality.
* Otherwise leave it in default state.
*/
uint8_t alarm[ALARM_LEN] = {0, 0, 0, 0, 0, 0, 0};
reg = 0;
rv = i2c_rtc_write(&ctx->base, REG_ABEOZ9_CONTROL_INT, &reg, 1);
reg = 0;
rv = i2c_rtc_write(&ctx->base, REG_ABEOZ9_ALARM_SEC, alarm, ALARM_LEN);
}
}
return rv;
}
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+4
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@@ -30,12 +30,14 @@ install:
- bsps/include/ofw/ofw_compat.h
- destination: ${BSP_INCLUDEDIR}/libchip
source:
- bsps/include/libchip/abeoz9-rtc.h
- bsps/include/libchip/ata.h
- bsps/include/libchip/ata_internal.h
- bsps/include/libchip/disp_hcms29xx.h
- bsps/include/libchip/ds1375-rtc.h
- bsps/include/libchip/i2c-2b-eeprom.h
- bsps/include/libchip/i2c-ds1621.h
- bsps/include/libchip/i2c-rtc.h
- bsps/include/libchip/i2c-sc620.h
- bsps/include/libchip/icm7170.h
- bsps/include/libchip/ide_ctrl.h
@@ -83,7 +85,9 @@ source:
- bsps/shared/dev/ide/ata.c
- bsps/shared/dev/ide/ata_util.c
- bsps/shared/dev/ide/ide_controller.c
- bsps/shared/dev/rtc/abeoz9.c
- bsps/shared/dev/rtc/ds1375.c
- bsps/shared/dev/rtc/i2c-rtc.c
- bsps/shared/dev/rtc/icm7170.c
- bsps/shared/dev/rtc/icm7170_reg.c
- bsps/shared/dev/rtc/icm7170_reg2.c