Commit Graph
38054 Commits
Author SHA1 Message Date
Gedare Bloom 27fc98a01d spec/build: add fdt01 test to build
Also uses the new dtc command to generate the dtbs at compile time.
Reads dts from elsewhere in the rtems tree.
2026-05-28 18:55:53 -06:00
Gedare Bloom 491bbfa134 libtests/fdt01: add new test for rtems-fdt
The rtems-fdt library was not tested.

Updates #4150
2026-05-28 18:55:53 -06:00
Gedare Bloom 50e801531e wscript: add dtc command to compile dts files
Enables building FDT files during compilation.

Updates #5136
2026-05-28 18:55:53 -06:00
Gedare Bloom 296d3872ff libmisc/rtems-fdt: add rtems-fdtimpl.h
Refactor implementation details to rtems-fdtimpl.h to allow further
refactoring of the main source file and access to internal structures
for testing.
2026-05-28 18:55:53 -06:00
Gedare Bloom 6a586c122e libmisc/rtems-fdt: refactor rtems_fdt_load
Splits functionality so that reading from the dtb file is distinct from
loading it into memory. This allows directly loading a dtb from memory
instead of from a file.
2026-05-28 18:55:53 -06:00
Gedare Bloom ce04a97c11 arm/imxrt: update imxrt1050.dtsi with dtc version
Fixes dtc compilation error.
2026-05-28 18:55:53 -06:00
Gedare Bloom 2f81156210 riscv/irq: read maximum interrupts from FDT
The number of external interrupts can be configured through the FDT.
Read it during PLIC initialization and use that to determine the max
valid vector number.
2026-05-28 14:43:42 -06:00
Gedare Bloom 128106b2f1 riscv: enable using PLIC in S-mode
The previous addition of s-mode support avoided touching the PLIC
registers and only allowed limited use of software interrupts for SMP
IPIs. This enables the PLIC in s-mode mapping the registers with the MMU
and unifying some aspects of the m-mode and s-mode implementations.

Updates #3337
2026-05-28 14:43:42 -06:00
Chris Johns 9e0aeb52e0 spec: Add BSD base and family to Makefile.inc
- A base BSP helps applications support aliased BSPs

- Also add ABI_FLAGS to be consistent with the pkgcfg file.

Closes #5592
2026-05-27 20:52:49 -05:00
Avi Weiss 4b3d5e657c bsp/arm/tms570: Fix typo in ball M17 EMIF macro name
A stray 'l' seems have come in at some point.
2026-05-27 17:14:18 +02:00
Avi Weiss a413333f2f bsp/arm/tms570: explicitly set CS8 and CREAD in printk init
Update to tms570-sci.c (commit af77d28) puts a gate to check
requests for non 8-bit bytes and CREAD not set, we therefore
must expclitily set them now.
2026-05-23 23:17:45 -05:00
Avi Weiss 61a03779d4 bsp/arm/tms570: fix SCI termios ignore framing flags bug
- explicitly reject non-8-bit-character requests and return false
- support 1 and 2 stop bits
- support disabling RX by checking CREAD
2026-05-23 23:17:45 -05:00
Samuel Viegas 58c0c344a2 bsps/sparc/leon3: Reject API raise of IRQs 16-31
- Changed the interrupt attributes so extended vectors
report can_raise as false.

- Changed the bsp_interrupt_raise to return
RTEMS_UNSATISFIED for extended vectors 16-31.

- BSP-specific validation for gr712rc and gr740
were added to exercised the extended vectors, and
check that the right interrupt handler is called.

Updates #4846.
2026-05-23 23:14:11 -05:00
Avi Weiss b49c6d7b30 bsp/arm/tms570: Invalidate I-cache after copying .fast_text to RAM
Adds invalidation of cache (using
rtems_cache_invalidate_multiple_instruction_lines which is
included in the wrapper function
rtems_cache_instruction_sync_after_code_change.

This is to ensure full syncing of the I-cache after copying
instructions (in .fast_text into RAM with
bsp_start_copy_sections_compact in bspstarthooks.c
2026-05-21 18:29:27 +02:00
Gedare Bloom 8e6bf772f9 smptests/smpclock01: slow down the tick rate
The smpclock01 test relies on tight synchronization between cores and it
checks cross-core Watchdog.ticks. On some targets the cores can become
de-synchronized so that the tick counts are not reliable. Slowing the
tick rate down seems to help this problem.
2026-05-20 20:46:45 +00:00
Shivam Deolankar f53aa5c3b5 testsuites/sptests: Add post-2100 validation checks
Add post-2100 validation checks in spclock_err02
without increasing runtime and remove excessive prints.
The test verifies century and leap-year rules via RTEMS
clock APIs and gmtime()/mktime() for  future years.

Fixes #5507
2026-05-19 10:55:32 -05:00
Shivam Deolankar c50ffe653f libdl/sparc: Fix overflow in relocation bitmask
_BM(x) produces 64-bit values which are implicitly converted to int
in reloc_target_bitmask. For x = 32, this causes truncation from
4294967295 to -1 on 32-bit targets, triggering -Woverflow.
Used uint32_t and cast the result to avoid implicit narrowing.

Fixes #5557
2026-05-19 01:08:06 +00:00
Kinsey Moore 1f06311c79 bsps/shared/gpio: Resolve assert build issues
Change assert() to _Assert() to resolve build issues with the change of
header.

Closes #5569
2026-05-18 15:12:04 -05:00
Shivam Deolankar b41f83249a bsps/zynq-uart: fix parity configuration handling
Fix parity handling in zynq_uart_set_attributes() by clearing existing
parity bits before setting a new mode instead of always ORing PAR_NONE,
which caused incorrect or ignored parity; also fix inverted PARODD logic
and add ZYNQ_UART_MODE_PAR_MASK to manage the parity field correctly.

Fixes #5554
2026-05-18 14:13:59 -05:00
Chris Johns 2c39475802 libmisc/shell: Add -a to print all vars in the shell getenv command
Closes #5572
2026-05-16 09:40:59 +10:00
Gedare Bloom ce03478700 testsuites/validation: check exactly for unset priority
The use of less-than-or-equal is wrong when the default priority can be
greater than the PRIORITY_UNSET value.
2026-05-15 13:40:17 -06:00
Gedare Bloom d3a6a6540e testsuites: fix usage of rtems_test_spin_for_ticks
The rtems_test_spin_for_ticks( x ) executes one partial tick and the
remaining x - 1 as complete ticks. Some tests assumed it executed x
complete ticks. Fix those tests.

Fixes #5575.
2026-05-15 12:59:10 -05:00
Mohamed Ayman 8f59e18ea3 riscv: fix FDT length check and FDT pointer type
Fix incorrect comparison between fdt_getprop() length (bytes)
and address cells count.
The check now uses ac * sizeof(uint32_t) to avoid
reading invalid data.

Also change FDT pointer type from const char * to const void *
to match libfdt API.

No functional changes.
2026-05-15 14:46:48 +00:00
Michal Lenc 3cb2e57560 cpukit/dev/can: fail controller init if worker task start doesn't start
CAN controllers need a running worker task to function. Check if
the task is actually started and return NULL (and free already allocated
resources) if it fails.

Also assert if cleanup functions fail.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2026-05-14 15:46:10 +00:00
Samuel Viegas 24eb4ac11a bsps/leon3: Mark interrupt 15 as non-maskable
- leon3 interrupt vector 15 is non-maskable and should
not be reported as disable-capable.

- added leon3_interrupt_is_maskable function, and
used it to set can_disable and maybe_disable in
bsp_interrupt_get_attributes().

- added verification for non-maskable vectors in
bsp_interrupt_vector_disable(), which is rejected
with error RTEMS_UNSATISFIED.

Updates #4830.
2026-05-14 15:42:35 +00:00
Gedare Bloom 2ed6cfbbd5 spec/riscv: fix abspath to riscv-mmu.h
Fixes #5571
2026-05-13 16:08:41 +10:00
Gedare Bloom 18e441c75b riscv: add helper for sfence.vma
Wraps sfence.vma 0, 0 in a function for TLB flushing.
Also disables compiling mmu-setup.c if S-mode is not enabled.

Updates #5540
2026-05-13 16:06:34 +10:00
Gedare Bloom 22673994c3 riscv: add helper functions for inline asm fence/barrier
Adds IO store-release and data barrier helpers.

Closes #5544
2026-05-13 16:06:34 +10:00
Chris Johns a73c6034eb powerpc/beatnik: Support generic IRQ
This effects the MVME6100 and MVME5500.

Closes #5567
2026-05-12 14:46:33 -05:00
Sebastian Huber 9cea931dfc score: Clarify _Thread_Priority_apply()
Add an assertion to help static analyzers.
2026-05-12 13:56:37 -05:00
Gedare Bloom 8bee39f21c riscv: add mstrict-align for mpfs and beaglevfire
The cores of the polarfire do not support misaligned access. Add
-mstrict-align to the ABI flags.

Updates #5286
2026-05-11 11:39:02 -06:00
Gedare Bloom 1b743eb9d7 cpukit/libdebugger: reformat to LLVM style
Closes #5343
2026-05-08 09:19:53 -05:00
Sunil Hegde 02f00a9e3b bsps/shared: Fix formatting in z85c30.c and mc68681.c
Fix formatting as suggested by the pipeline, no functional
changes were made.
2026-05-08 15:04:59 +10:00
Sunil Hegde f8b023df3a bsps/shared: removed uses and prototypes of set_vector()
removed uses of set_vector() accross two shared files,
i.e. mc68681.c and z85c30.c
the shared/start/setvec.c has been deleted too.

Closes #5215
2026-05-08 15:04:59 +10:00
Sunil Hegde 91b3c9136b bsps/powerpc: removed set_vector reference from a README.md file
shared/vme/README.md had references to set_vector() for installing
isr during vme driver setup. They have been replaced by
rtems_interrupt_handler_install().

Updates #5215
2026-05-08 15:04:59 +10:00
Kinsey Moore 15774ab4e0 cpukit/libdl/aarch64: Resolve maybe-unused warning 2026-05-07 11:14:48 -05:00
Kinsey Moore eb30dfcc2d bsps/riscv/esp32: Only provide UART functions when needed 2026-05-07 11:14:48 -05:00
Joel Sherrill ab6d8439ff libfs/src/dosfs/msdos_conv.c: Fix may be used uninitialized warning
Moved variable "c" to scope closer to use and initialized it to 0.
2026-05-07 09:55:43 -05:00
Joel Sherrill c65ea8e86f bsps/shared/.../gpio-support.c: Address maybe uninitialized warning
This code was flagged as maybe-uninitialized when compiling at -Og.
The underlying problem was functional code in an assert(). If
compiled with asserts disabled, there would have been no mutex
lock/unlock. Changed the macros to obtain and release the mutex
independent of assert() being enabled or not and switched to using
the RTEMS assert _Assert() which lets this check follow the
RTEMS_DEBUG setting.
2026-05-06 14:46:12 -05:00
Joel Sherrill e502e80467 bsps/riscv/shared/fdt/riscv-fdt.c: Fix may be uniitialized warning
The variables start and size were used in the return statement
even if none of the if's set them. Defaulted them to zero which
results in returning NULL on error which was expected anyway.
2026-05-05 17:32:26 -05:00
Gedare Bloom 0c7ee5033d contrib/riscv: add zicsr option to csr macros
These were local changes in the riscv-utility.h but got missed
during the refactor. Fixes build error for riscv.
2026-05-03 10:35:13 -06:00
Gedare Bloom 7fa05a688b spec/riscv: add MMU options and enable in build
Fixes #5540
2026-05-01 15:55:50 +00:00
Gedare Bloom 8c4bddaae7 riscv: add initial support for MMU setup
Creates level-2 mappings for the configured RAM region and for the
MMIO device region. Each of these two regions is configured as a
level-1 table with 2 MiB superpages.

Updates #5540.
2026-05-01 15:55:50 +00:00
Gedare Bloom 962dfc8676 riscv: use unsigned comparison for address check
The comparison of a register to see if it holds a number less than
3 needs to be unsigned since the register is otherwise expected to
hold an address that could have the most significant bit set.

Fixes #5561
2026-04-30 17:02:07 -05:00
Gedare Bloom fd53b09378 riscv: refactor riscv-utility.h
Include contrib/riscv-opcodes/encoding.h from riscv-utility.h and
remove outdated contents from riscv-utility.h
This will allow the include guards to work properly for users (or HAL code)
that also use the encoding.h file, while still allowing us to provide
additional customization or extension of encoding.h macros.
2026-04-29 12:47:37 -06:00
Gedare Bloom 18477b284a contrib/cpukit: import riscv-opcodes/encoding.h
Upstream repo: https://github.com/riscv/riscv-opcodes
Upstream hash: 15cc83ee533cc57c92903afb046c2732f92f79b3
URL: https://raw.githubusercontent.com/riscv/riscv-opcodes/15cc83ee533cc57c92903afb046c2732f92f79b3/encoding.h

The upstream does not provide releases.

tag: contrib/cpukit/riscv-opcodes/2026-04-28-15cc83e
contrib/cpukit/riscv-opcodes/2026-04-28-15cc83e
2026-04-29 12:47:37 -06:00
Pavel Pisa 48d8b2bdea cpukit/dev/can/sja1000: fix build failure on i386 with I/O option
Disable PCI/PCIe and other buses I/O mapped access
because rtems/cpukit build is not allowed to access
BSP specific headers during build.

rtems/bsps/i386/include/i386_io.h

Cannot be used.

This is temporal workaround for

rtems/rtos/rtems#5563

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
2026-04-29 02:41:08 +02:00
Avi Weiss a52cdca1c9 tms570: fix typos and clean-up reg_crc.h comments
Noticed TMS570_CRC_REGH1 was mislabeled as a low registers, and
decided to clean up the other out-of-date comments along the way.

No code changes - documentation only.

Issue: no issues opened for minor documentation change
2026-04-28 16:52:30 +00:00
Michal Lenc 558615a28e cpukit/dev/can/ctucanfd/ctucanfd.c: fix typo
folowing -> following in license header

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2026-04-27 21:26:51 -05:00
Michal LencandPavel Pisa df346b439b can: add support for SJA1000 CAN controller
This commit adds support for a stand alone SJA1000 CAN controller. This
is classical CAN only capable controller, so no FD support here. The
driver's implementation is similar to CTU CAN FD, thus interrupt handler
triggers a semaphore in main worker thread that takes care of handling
interrupts and receiving and sending messages.

The controller utilizes its one TX buffer for sending messages with
abort function available if higher priority message is present in
the software queue.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Co-authored-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2026-04-27 21:26:51 -05:00