mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-09-24 00:44:33 +08:00
Joel Sherrill
committed by
Kinsey Moore
Kinsey Moore
parent
46e90be362
commit
b30d88cb87
@@ -1,32 +0,0 @@
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#ifndef FEC_H
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#define FEC_H
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#include <arch/sys_arch.h>
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#include <lwip/netif.h>
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#include <stdbool.h>
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struct if_config {
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u8_t flags;
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u8_t hwaddr_len;
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u16_t mtu;
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u8_t hwaddr[NETIF_MAX_HWADDR_LEN];
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sys_thread_t net_task;
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void(*phy_init)(void);
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u8_t name[2];
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};
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extern err_t mcf5225xif_init(struct netif *);
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extern void handle_rx_frame(struct netif*);
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extern void smi_init(u32_t);
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extern void smi_write(u8_t,u8_t,u16_t);
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extern u16_t smi_read(u8_t,u8_t);
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#define MAX_FRAME_LEN 1518
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#define MTU_SIZE (MAX_FRAME_LEN-18)
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#define MSCR_MII_SPEED(clk) ((clk/5000000+1)<<1)
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#define PHY_ADDR 1
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#define PHY_REG_ID1 2
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#define PHY_REG_ID2 3
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#endif /* FEC_H */
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File diff suppressed because it is too large
Load Diff
@@ -1,162 +0,0 @@
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mcf5225x
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========
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Description: embed-it dpu
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CPU: MCF52259, ??MHz
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SRAM: 64K
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FLASH: 512K
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This is a embed-it board that uses the MCF52258 Coldfire CPU.
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This board is running at ??MHz scaled from the internal relocation 8MHz oscillator.
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OLD-STUFF from MCF52235 EVB ... we have to change it ...
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NOTES:
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Currently this BSP must be configured with most RTEMS features turned
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off as RAM usage is too high.
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Configure as follows:
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```shell
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configure --target=m68k-rtems4.XXX --enable-rtemsbsp=mcf52235 ...
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```
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To get the tests to compile (but not run) change the linkcmds to specify
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a larger sram memory region (256K works). This of course will let you
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compile all tests, but many or most of them wont run.
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See testsuites/samples/minumum for an example of what type of config flags
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you need for this BSP!
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In you project before you include confdefs.h, define some or all of the
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following:
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#define CONFIGURE_INIT_TASK_STACK_SIZE x
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#define CONFIGURE_MINIMUM_TASK_STACK_SIZE x
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#define CONFIGURE_INTERRUPT_STACK_SIZE x
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Note that the default stack size is 1K
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Note that the default number of priorities is 15
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TODO:
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*) Add drivers for I2C, ADC, FEC
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*) Support for LWIP
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*) Recover the 1K stack space reserved in linkcmds used for board startup.
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Interrupt map
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-------------
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```
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+-----+-----------------------------------------------------------------------+
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| | PRIORITY |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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|LEVEL| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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| 7 | | | | | | | | |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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| 6 | | | | | | | | |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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| 5 | | | | | | | | |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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| 4 | | | | | | | | PIT |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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| 3 | UART 0 | UART 1 | UART 2 | | | | | |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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| 2 | | | | | | | | |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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| 1 | | | | | | | | |
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+-----+--------+--------+--------+--------+--------+--------+--------+--------+
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```
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Timing tests
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------------
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```
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*** TIME TEST 1 ***
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rtems_semaphore_create 8
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rtems_semaphore_delete 10
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rtems_semaphore_obtain: available 3
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rtems_semaphore_obtain: not available -- NO_WAIT 3
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rtems_semaphore_release: no waiting tasks 7
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*** END OF TEST 1 ***
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*** TIME TEST OVERHEAD ***
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rtems_shutdown_executive 0
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rtems_task_create 0
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rtems_task_ident 0
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rtems_task_start 0
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rtems_task_restart 0
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rtems_task_delete 0
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rtems_task_suspend 0
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rtems_task_resume 0
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rtems_task_set_priority 0
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rtems_task_mode 0
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rtems_task_wake_when 0
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rtems_task_wake_after 0
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rtems_interrupt_catch 0
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rtems_clock_get 0
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rtems_clock_set 0
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rtems_clock_tick 0
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<pause>
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rtems_timer_create 0
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rtems_timer_delete 0
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rtems_timer_ident 0
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rtems_timer_fire_after 0
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rtems_timer_fire_when 1
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rtems_timer_reset 0
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rtems_timer_cancel 0
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rtems_semaphore_create 0
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rtems_semaphore_delete 0
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rtems_semaphore_ident 0
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rtems_semaphore_obtain 0
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rtems_semaphore_release 0
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rtems_message_queue_create 0
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rtems_message_queue_ident 0
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rtems_message_queue_delete 0
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rtems_message_queue_send 0
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rtems_message_queue_urgent 0
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rtems_message_queue_broadcast 0
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rtems_message_queue_receive 0
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rtems_message_queue_flush 0
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<pause>
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rtems_event_send 0
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rtems_event_receive 0
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rtems_signal_catch 0
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rtems_signal_send 0
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rtems_partition_create 0
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rtems_partition_ident 0
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rtems_partition_delete 0
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rtems_partition_get_buffer 0
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rtems_partition_return_buffer 0
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rtems_region_create 0
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rtems_region_ident 0
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rtems_region_delete 0
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rtems_region_get_segment 0
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rtems_region_return_segment 0
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rtems_port_create 0
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rtems_port_ident 0
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rtems_port_delete 0
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rtems_port_external_to_internal 0
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rtems_port_internal_to_external 0
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<pause>
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rtems_io_initialize 0
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rtems_io_open 0
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rtems_io_close 0
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rtems_io_read 0
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rtems_io_write 0
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rtems_io_control 0
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rtems_fatal_error_occurred 0
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rtems_rate_monotonic_create 0
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rtems_rate_monotonic_ident 0
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rtems_rate_monotonic_delete 0
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rtems_rate_monotonic_cancel 0
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rtems_rate_monotonic_period 0
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rtems_multiprocessing_announce 0
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*** END OF TIME OVERHEAD ***
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```
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@@ -1,41 +0,0 @@
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/*
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* Timer Init
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*
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* Use the last DMA timer (DTIM3) as the diagnostic timer.
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*/
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/*
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* Copyright (c) 2005 Eric Norum <eric@norum.ca>
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*
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* COPYRIGHT (c) 2005-2010.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <rtems.h>
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#include <rtems/btimer.h>
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#include <bsp.h>
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void benchmark_timer_initialize(void)
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{
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uint32_t preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000;
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MCF_DTIM3_DTMR = 0;
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MCF_DTIM3_DTMR = MCF_DTIM_DTMR_PS(preScaleDivisor - 1) |
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MCF_DTIM_DTMR_CLK_DIV1 | MCF_DTIM_DTMR_RST;
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}
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/*
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* Return timer value in microsecond units
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*/
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benchmark_timer_t benchmark_timer_read(void)
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{
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return MCF_DTIM3_DTCN;
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}
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void benchmark_timer_disable_subtracting_average_overhead(bool find_flag)
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{
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}
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@@ -1,98 +0,0 @@
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/*
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* Use the last periodic interval timer (PIT2) as the system clock.
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*/
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#include <rtems.h>
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#include <rtems/timecounter.h>
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#include <bsp.h>
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/*
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* Use INTC0 base
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*/
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#define CLOCK_VECTOR (64+56)
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static rtems_timecounter_simple mcf5225x_tc;
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static uint32_t mcf5225x_tc_get(rtems_timecounter_simple *tc)
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{
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return MCF_PIT1_PCNTR;
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}
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static bool mcf5225x_tc_is_pending(rtems_timecounter_simple *tc)
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{
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return (MCF_PIT1_PCSR & MCF_PIT_PCSR_PIF) != 0;
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}
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static uint32_t mcf5225x_tc_get_timecount(struct timecounter *tc)
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{
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return rtems_timecounter_simple_downcounter_get(
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tc,
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mcf5225x_tc_get,
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mcf5225x_tc_is_pending
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);
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}
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static void mcf5225x_tc_at_tick(rtems_timecounter_simple *tc)
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{
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MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF;
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}
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static void mcf5225x_tc_tick(void)
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{
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rtems_timecounter_simple_downcounter_tick(
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&mcf5225x_tc,
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mcf5225x_tc_get,
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mcf5225x_tc_at_tick
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);
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}
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/*
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* Attach clock interrupt handler
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*/
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#define Clock_driver_support_install_isr( _new ) \
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set_vector(_new, CLOCK_VECTOR, 1)
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/*
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* Set up the clock hardware
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*
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* We need to have 1 interrupt every BSP_rtems_configuration_get_microseconds_per_tick()
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*/
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static void Clock_driver_support_initialize_hardware(void)
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{
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int level;
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uint32_t pmr;
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uint32_t preScaleCode = 0;
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uint32_t clk = bsp_get_CPU_clock_speed() >> 1;
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uint32_t tps = 1000000 / rtems_configuration_get_microseconds_per_tick();
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while (preScaleCode < 15) {
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pmr = (clk >> preScaleCode) / tps;
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if (pmr < (1 << 15))
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break;
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preScaleCode++;
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}
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MCF_INTC0_ICR56 = MCF_INTC_ICR_IL(PIT3_IRQ_LEVEL) |
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MCF_INTC_ICR_IP(PIT3_IRQ_PRIORITY);
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rtems_interrupt_disable(level);
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MCF_INTC0_IMRH &= ~MCF_INTC_IMRH_MASK56;
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MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN;
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rtems_interrupt_enable(level);
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MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) |
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MCF_PIT_PCSR_OVW | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD;
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MCF_PIT1_PMR = pmr;
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MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) |
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MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN;
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rtems_timecounter_simple_install(
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&mcf5225x_tc,
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clk >> preScaleCode,
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pmr,
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mcf5225x_tc_get_timecount
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);
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}
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#define Clock_driver_timecounter_tick(arg) mcf5225x_tc_tick()
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#include "../../../shared/dev/clock/clockimpl.h"
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@@ -1,17 +0,0 @@
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#
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# mcf5225x RTEMS Test Database.
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#
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# Format is one line per test that is _NOT_ built.
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#
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include: testdata/disable-iconv-tests.tcfg
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include: testdata/disable-jffs2-tests.tcfg
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include: testdata/small-memory-testsuite.tcfg
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exclude: cdtest
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exclude: dl05
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exclude: fileio
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exclude: flashdisk01
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exclude: fsdosfsname01
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exclude: iostream
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exclude: linpack
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@@ -1,29 +0,0 @@
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#
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# Config file for the mcf5225x BSP
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#
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RTEMS_CPU=m68k
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include $(RTEMS_ROOT)/make/custom/default.cfg
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# This is the actual bsp directory used during the build process.
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RTEMS_BSP_FAMILY=mcf5225x
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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CPU_CFLAGS = -mcpu=52235 $(PROJECT_FLAGS)
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2 -fomit-frame-pointer
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# The following two lines enable compiling and linking on per element.
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CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
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LDFLAGS = -Wl,--gc-sections
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# This defines the operations performed on the linked executable.
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# is currently required.
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define bsp-post-link
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$(OBJCOPY) -O binary --strip-all \
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$(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
|
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$(SIZE) $(basename $@)$(EXEEXT)
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endef
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File diff suppressed because it is too large
Load Diff
@@ -1,35 +0,0 @@
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/*
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* Multi UART console serial I/O.
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*
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* TO DO: Add DMA input/output
|
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*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
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* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
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|
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#include <stdio.h>
|
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#include <fcntl.h>
|
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#include <rtems/libio.h>
|
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#include <rtems/termiostypes.h>
|
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#include <termios.h>
|
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#include <bsp.h>
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#include <malloc.h>
|
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|
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#include <rtems/bspIo.h>
|
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|
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static void _BSP_null_char(char c)
|
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{
|
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rtems_interrupt_level level=UART0_IRQ_LEVEL;
|
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|
||||
rtems_interrupt_disable(level);
|
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while ((MCF_UART_USR(CONSOLE_PORT) & MCF_UART_USR_TXRDY) == 0)
|
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continue;
|
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MCF_UART_UTB(CONSOLE_PORT) = c;
|
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while ((MCF_UART_USR(CONSOLE_PORT) & MCF_UART_USR_TXRDY) == 0)
|
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continue;
|
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rtems_interrupt_enable(level);
|
||||
}
|
||||
|
||||
BSP_output_char_function_type BSP_output_char = _BSP_null_char;
|
||||
BSP_polling_getchar_function_type BSP_poll_char = NULL;
|
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@@ -1,48 +0,0 @@
|
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#
|
||||
# Show the exception stack frame.
|
||||
#
|
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define show-exception-sframe
|
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set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
|
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set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
|
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set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
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set $frcode = $frfvo >> 12
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set $frvect = ($frfvo & 0xFFF) >> 2
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set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
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printf "EXCEPTION -- SR:0x%X PC:0x%X FRAME:0x%x VECTOR:%d STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
|
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if $frstatus == 4
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printf " Fault Type: Error on instruction fetch"
|
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end
|
||||
if $frstatus == 8
|
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printf " Fault Type: Error on operand write"
|
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end
|
||||
if $frstatus == 12
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printf " Fault Type: Error on operand read"
|
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end
|
||||
if $frstatus == 9
|
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printf " Fault Type: Attempted write to write-protected space"
|
||||
end
|
||||
end
|
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|
||||
# Add -v and -d flags for bdm info
|
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# Add -B flags to utilize hardware breakpoints when they are availiable
|
||||
|
||||
#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
|
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target remote | m68k-bdm-gdbserver pipe /dev/tblcf2 -B
|
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#monitor set remote-debug 1
|
||||
|
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monitor bdm-reset
|
||||
|
||||
# Set VBR to the beginning of what will be SRAM
|
||||
monitor bdm-ctl-set 0x0801 0x20000000
|
||||
|
||||
# Set RAMBAR1
|
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monitor bdm-ctl-set 0x0C05 0x20000021
|
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|
||||
# Set FLASHBAR
|
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monitor bdm-ctl-set 0x0C04 0x00000061
|
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|
||||
# Enable PST[3:0] signals
|
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set *((char*) 0x40100074) = 0x0F
|
||||
|
||||
# Add the load when debugging from ram which won't happen with rtems!
|
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#load
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@@ -1,110 +0,0 @@
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/**
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* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsM68kMCF5225X
|
||||
*
|
||||
* @brief Global BSP definitions.
|
||||
*/
|
||||
|
||||
/*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_M68K_MCF5225X_BSP_H
|
||||
#define LIBBSP_M68K_MCF5225X_BSP_H
|
||||
|
||||
/**
|
||||
* @defgroup RTEMSBSPsM68kMCF5225X MCF5225X
|
||||
*
|
||||
* @ingroup RTEMSBSPsM68k
|
||||
*
|
||||
* @brief MCF5225X Board Support Package.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <bspopts.h>
|
||||
#include <bsp/default-initial-extension.h>
|
||||
#include <rtems.h>
|
||||
#include <rtems/bspIo.h>
|
||||
|
||||
/***************************************************************************/
|
||||
/** Hardware data structure headers **/
|
||||
#include <mcf5225x/mcf5225x.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Declare base address of peripherals area */
|
||||
#define __IPSBAR ((vuint8 *) 0x40000000)
|
||||
|
||||
/***************************************************************************/
|
||||
/** Network driver configuration **/
|
||||
|
||||
/***************************************************************************/
|
||||
/** User Definable configuration **/
|
||||
|
||||
/* define ports for console and DPU specific for BLUETOOTH and STATIONS */
|
||||
#define STATIONS_PORT 0
|
||||
#define CONSOLE_PORT 1
|
||||
#define BLUETOOTH_PORT 2
|
||||
|
||||
/* externals */
|
||||
|
||||
/* constants */
|
||||
|
||||
/* miscellaneous stuff assumed to exist */
|
||||
|
||||
/*
|
||||
* Device Driver Table Entries
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: Use the standard Console driver entry
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: Use the standard Clock driver entry
|
||||
*/
|
||||
|
||||
|
||||
/* functions */
|
||||
|
||||
uint32_t bsp_get_CPU_clock_speed(void);
|
||||
|
||||
rtems_isr_entry set_vector(
|
||||
rtems_isr_entry handler,
|
||||
rtems_vector_number vector,
|
||||
int type
|
||||
);
|
||||
|
||||
/*
|
||||
* Interrupt assignments
|
||||
* Highest-priority listed first
|
||||
*/
|
||||
|
||||
#define PIT3_IRQ_LEVEL 4
|
||||
#define PIT3_IRQ_PRIORITY 0
|
||||
|
||||
#define UART0_IRQ_LEVEL 3
|
||||
#define UART0_IRQ_PRIORITY 7
|
||||
#define UART1_IRQ_LEVEL 3
|
||||
#define UART1_IRQ_PRIORITY 6
|
||||
#define UART2_IRQ_LEVEL 3
|
||||
#define UART2_IRQ_PRIORITY 5
|
||||
|
||||
/*
|
||||
* Prototypes for BSP methods which cross file boundaries
|
||||
*/
|
||||
void Init5225x(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
@@ -1 +0,0 @@
|
||||
#include <bsp/irq-default.h>
|
||||
@@ -1,37 +0,0 @@
|
||||
/*
|
||||
* @file
|
||||
* @ingroup m68k_mcf5225x
|
||||
* @brief Implementations for interrupt mechanisms for Time Test 27
|
||||
*/
|
||||
|
||||
/*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_TMTEST27
|
||||
#error "This is an RTEMS internal file you must not include directly."
|
||||
#endif
|
||||
|
||||
#ifndef __tm27_h
|
||||
#define __tm27_h
|
||||
|
||||
/*
|
||||
* Stuff for Time Test 27
|
||||
* Don't bother with hardware -- just use a software-interrupt
|
||||
*/
|
||||
|
||||
#define MUST_WAIT_FOR_INTERRUPT 0
|
||||
|
||||
#define TM27_USE_VECTOR_HANDLER
|
||||
|
||||
#define Install_tm27_vector( handler ) set_vector( (handler), 35, 1 )
|
||||
|
||||
#define Cause_tm27_intr() asm volatile ("trap #3");
|
||||
|
||||
#define Clear_tm27_intr() /* empty */
|
||||
|
||||
#define Lower_tm27_intr() /* empty */
|
||||
|
||||
#endif
|
||||
@@ -1,279 +0,0 @@
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
|
||||
#include <fec.h>
|
||||
#include <lwip/pbuf.h>
|
||||
#include <netif/etharp.h>
|
||||
|
||||
#include <rtems.h>
|
||||
#include <bsp.h>
|
||||
|
||||
#if LWIP_NETIF_STATUS_CALLBACK
|
||||
static void mcf5225xif_status(struct netif*);
|
||||
#endif
|
||||
|
||||
|
||||
#if LWIP_NETIF_LINK_CALLBACK
|
||||
static void mcf5225xif_link(struct netif*);
|
||||
#endif
|
||||
|
||||
static u8_t __attribute__((aligned (16))) rx_buf[MAX_FRAME_LEN];
|
||||
static u8_t __attribute__((aligned (16))) tx_buf[MAX_FRAME_LEN];
|
||||
|
||||
struct __attribute__((aligned(16))) rx_desc {
|
||||
u16_t ctl;
|
||||
u16_t len;
|
||||
u8_t* ptr;
|
||||
} rx_bd = { MCF_FEC_RXBD_E | MCF_FEC_RXBD_W ,0,rx_buf};
|
||||
|
||||
struct tx_desc {
|
||||
u16_t ctl;
|
||||
u16_t len;
|
||||
u8_t* buf;
|
||||
} tx_bd[2] ={{MCF_FEC_TXBD_R | MCF_FEC_TXBD_L | MCF_FEC_TXBD_TC ,0,tx_buf},{MCF_FEC_TXBD_L | MCF_FEC_TXBD_TC | MCF_FEC_TXBD_W ,0,tx_buf}};
|
||||
|
||||
static rtems_id net_task_id;
|
||||
|
||||
rtems_isr rx_frame_handler(rtems_vector_number vector)
|
||||
{
|
||||
MCF_INTC0_IMRL |= MCF_INTC_IMRL_MASK27; /* disable FEC RX_INTF interrupt */
|
||||
MCF_FEC_EIR |= MCF_FEC_EIR_RXF; /* clear pending interrupt event */
|
||||
|
||||
rtems_event_send(net_task_id,RTEMS_EVENT_0);
|
||||
|
||||
MCF_INTC0_IMRL &= ~MCF_INTC_IMRL_MASK27; /* enable FEC RX_INTF interrupt */
|
||||
}
|
||||
|
||||
void handle_rx_frame(struct netif* netif)
|
||||
{
|
||||
/* Scan the Rx buffer rescriptor ring */
|
||||
if (rx_bd.ctl & (MCF_FEC_RXBD_RO1 | MCF_FEC_RXBD_E | MCF_FEC_RXBD_TR)) rx_bd.ctl = MCF_FEC_RXBD_E | MCF_FEC_RXBD_W; /* 1: receive process pending, pbuf still allocated, 2: Buffer empty, quit, 3: frame too long */
|
||||
else if (rx_bd.ctl & MCF_FEC_RXBD_L) { /* Last buffer in frame, finalize */
|
||||
if (rx_bd.ctl & (MCF_FEC_RXBD_LG | MCF_FEC_RXBD_NO | MCF_FEC_RXBD_CR | MCF_FEC_RXBD_OV)) rx_bd.ctl = MCF_FEC_RXBD_E | MCF_FEC_RXBD_W; /* Reception error */
|
||||
else { //pass_frame_to_upper_layer(&rx_bd);
|
||||
register struct pbuf* lwip_buf=pbuf_alloc(PBUF_RAW,rx_bd.len,PBUF_RAM);
|
||||
|
||||
if (lwip_buf) {
|
||||
memcpy(lwip_buf->payload,rx_bd.ptr,lwip_buf->tot_len);
|
||||
switch (htons(((struct eth_hdr *)lwip_buf->payload)->type)) {
|
||||
/* IP or ARP packet? */
|
||||
case ETHTYPE_IP:
|
||||
/* full packet send to tcpip_thread to process */
|
||||
/* skip Ethernet header */
|
||||
if (netif->input(lwip_buf, netif) != ERR_OK) pbuf_free(lwip_buf);
|
||||
break;
|
||||
case ETHTYPE_ARP:
|
||||
/* pass p to ARP module */
|
||||
etharp_arp_input(netif, (struct eth_addr *)&netif->hwaddr, lwip_buf);
|
||||
break;
|
||||
default:
|
||||
pbuf_free(lwip_buf);
|
||||
break;
|
||||
}
|
||||
lwip_buf = NULL;
|
||||
rx_bd.ctl = MCF_FEC_RXBD_E | MCF_FEC_RXBD_W;
|
||||
}
|
||||
}
|
||||
}
|
||||
MCF_FEC_RDAR=0;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function does the actual transmission of the packet. The packet is
|
||||
* contained in the pbuf that is passed to the function. This pbuf
|
||||
* might be chained.
|
||||
*
|
||||
* @param netif the lwip network interface structure for this ethernetif
|
||||
* @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
|
||||
* @return ERR_OK if the packet could be sent
|
||||
* an err_t value if the packet couldn't be sent
|
||||
*
|
||||
*/
|
||||
static err_t
|
||||
low_level_output(struct netif *netif, struct pbuf *p)
|
||||
{
|
||||
struct pbuf *q;
|
||||
u8_t *ptr;
|
||||
static u8_t txbd_index;
|
||||
|
||||
/* Suppress 'argument not used' warning */
|
||||
netif = netif;
|
||||
|
||||
if (p->tot_len > MAX_FRAME_LEN)
|
||||
/* Frame too long, drop it */
|
||||
return ERR_MEM;
|
||||
|
||||
tx_bd[txbd_index].len = p->tot_len; // < 64 ? p->tot_len+(64-p->tot_len) : p->tot_len;
|
||||
|
||||
/* Walk the pbuf chain, fill the Tx packet buffer */
|
||||
q = p;
|
||||
ptr=tx_bd[txbd_index].buf;
|
||||
while (q != NULL) {
|
||||
memcpy(ptr, q->payload, q->len);
|
||||
ptr += q->len;
|
||||
q = q->next;
|
||||
}
|
||||
tx_bd[txbd_index].ctl |= MCF_FEC_TXBD_R;
|
||||
|
||||
MCF_FEC_TDAR = 0; /* Start transmission */
|
||||
|
||||
while (MCF_FEC_TDAR != 0); /* wait for transmission complete */
|
||||
|
||||
MCF_FEC_EIR |= MCF_FEC_EIR_TXF | MCF_FEC_EIR_TXB;
|
||||
|
||||
/* JUST debugging stuff */
|
||||
//~ unsigned int my_q_len=0;
|
||||
//~ while (my_q_len<tx_bd[txbd_index].len)
|
||||
//~ printf("%02x ",tx_bd[txbd_index].buf[my_q_len++]);
|
||||
|
||||
//~ printf("buf.len: %d, buf.ctl: 0x%x, tx_bd.buf: 0x%x\n",tx_bd[txbd_index].len,tx_bd[txbd_index].ctl,tx_bd[txbd_index].buf);
|
||||
|
||||
txbd_index=!txbd_index;
|
||||
|
||||
return ERR_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* Should be called at the beginning of the program to set up the
|
||||
* network interface. It does the
|
||||
* actual setup of the hardware.
|
||||
*
|
||||
* This function should be passed as a parameter to netif_add().
|
||||
*
|
||||
* @param netif the lwip network interface structure for this ethernetif
|
||||
* @return ERR_OK if the interface is initialized
|
||||
* We always return ERR_OK
|
||||
*/
|
||||
err_t
|
||||
mcf5225xif_init(struct netif *netif)
|
||||
{
|
||||
rtems_isr_entry old_isr_handler;
|
||||
struct if_config* if_config=netif->state;
|
||||
|
||||
net_task_id=if_config->net_task;
|
||||
|
||||
/* We directly use etharp_output() here to save a function call.
|
||||
* You can instead declare your own function an call etharp_output()
|
||||
* from it if you have to do some checks before sending (e.g. if link
|
||||
* is available...) */
|
||||
netif->output = etharp_output;
|
||||
netif->linkoutput = low_level_output;
|
||||
#if LWIP_NETIF_STATUS_CALLBACK
|
||||
netif->status_callback = mcf5225xif_status;
|
||||
#endif
|
||||
#if LWIP_NETIF_LINK_CALLBACK
|
||||
netif->link_callback = mcf5225xif_link;
|
||||
#endif
|
||||
|
||||
netif->name[0]=if_config->name[0];
|
||||
netif->name[1]=if_config->name[1];
|
||||
netif->hwaddr_len = if_config->hwaddr_len;
|
||||
memcpy(netif->hwaddr,if_config->hwaddr,ETHARP_HWADDR_LEN); /* set the mac address configured by the application */
|
||||
netif->mtu = if_config->mtu ; /* maximum transfer unit, configured by application */
|
||||
netif->flags = if_config->flags; /* device capabilities, configured by application */
|
||||
|
||||
|
||||
MCF_FEC_ECR |= MCF_FEC_ECR_RESET;
|
||||
|
||||
while (MCF_FEC_ECR&MCF_FEC_ECR_RESET) __asm__ ("nop");
|
||||
|
||||
if (if_config->phy_init) if_config->phy_init(); /* call application specific optional extern phy initialization function */
|
||||
|
||||
MCF_FEC_EIMR = 0;
|
||||
MCF_FEC_EIR= 0xFFFFFFFF;
|
||||
|
||||
//~ Set MAC hardware address:
|
||||
MCF_FEC_PALR = (u32_t)( (netif->hwaddr[0] << 24)
|
||||
| (netif->hwaddr[1] << 16)
|
||||
| (netif->hwaddr[2] << 8 )
|
||||
| (netif->hwaddr[3] << 0 ) );
|
||||
MCF_FEC_PAUR = (u32_t)( (netif->hwaddr[4] << 24)
|
||||
| (netif->hwaddr[5] << 16) );
|
||||
|
||||
/* Do whatever else is needed to initialize interface. */
|
||||
MCF_FEC_OPD |= MCF_FEC_OPD_PAUSE_DUR(2); /* pause duration: send 2 pause frames */
|
||||
MCF_FEC_IAUR = 0;
|
||||
MCF_FEC_IALR = 0;
|
||||
MCF_FEC_GAUR = 0;
|
||||
MCF_FEC_GALR = 0;
|
||||
MCF_FEC_EMRBR = ((MAX_FRAME_LEN+15)&~15); //<<4; //RX_RING_SIZE*PBUF_POOL_BUFSIZE; //1536;
|
||||
MCF_FEC_ERDSR = (uint32_t)&rx_bd;
|
||||
MCF_FEC_ETDSR = (uint32_t)&tx_bd;
|
||||
MCF_FEC_RCR = (MAX_FRAME_LEN << 16) | MCF_FEC_RCR_MII_MODE;
|
||||
MCF_FEC_FRSR = 0x48<<2; /* avoid address clashing of receive and transmit data in FEC fifo */
|
||||
|
||||
MCF_FEC_TCR = MCF_FEC_TCR_FDEN | MCF_FEC_TCR_HBC;
|
||||
|
||||
MCF_FEC_MIBC = MCF_FEC_MIBC_MIB_DISABLE;
|
||||
/* TODO: clear MIB RAM??? */
|
||||
MCF_FEC_MIBC =~MCF_FEC_MIBC_MIB_DISABLE; /* enable MIBC */
|
||||
|
||||
MCF_FEC_EIMR = 0;
|
||||
|
||||
rtems_interrupt_catch(rx_frame_handler,91,&old_isr_handler); /* register ISR for RX_INTF interrupt*/
|
||||
MCF_INTC0_ICR27=0x10; /* set interrupt level */
|
||||
MCF_FEC_EIR= 0xFFFFFFFF; /* clear all pending interrupts */
|
||||
MCF_FEC_EIMR |= MCF_FEC_EIR_RXF; /* enable RX_INTF interrupt */
|
||||
MCF_INTC0_IMRL &= ~MCF_INTC_IMRL_MASK27; /* enable FEC RX_INTF interrupt */
|
||||
|
||||
/* enable FEC */
|
||||
MCF_FEC_ECR |= MCF_FEC_ECR_ETHER_EN;
|
||||
/* Start reception, if it's not started already */
|
||||
MCF_FEC_RDAR = 0;
|
||||
|
||||
return ERR_OK;
|
||||
}
|
||||
|
||||
void smi_init(u32_t clk_speed)
|
||||
{
|
||||
MCF_FEC_MSCR = MSCR_MII_SPEED(clk_speed);
|
||||
}
|
||||
|
||||
void smi_write(u8_t phy_addr,u8_t reg_addr,u16_t data)
|
||||
{
|
||||
MCF_FEC_MMFR = MCF_FEC_MMFR_ST(0x1) | MCF_FEC_MMFR_OP_WRITE | (MCF_FEC_MMFR_PA(phy_addr)) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10 | data;
|
||||
smi_init(bsp_get_CPU_clock_speed()); /* enable MII clock speed after MMFR is written */
|
||||
while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) { __asm__ ("nop"); }
|
||||
smi_init(0); /* MII frame sent, disable clock until next operation */
|
||||
MCF_FEC_EIR |= MCF_FEC_EIR_MII;
|
||||
}
|
||||
|
||||
u16_t smi_read(u8_t phy_addr,u8_t reg_addr)
|
||||
{
|
||||
MCF_FEC_MMFR = MCF_FEC_MMFR_ST(0x1) | MCF_FEC_MMFR_OP_READ | (MCF_FEC_MMFR_PA(phy_addr)) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10;
|
||||
smi_init(bsp_get_CPU_clock_speed()); /* enable MII clock speed after MMFR is written */
|
||||
while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) { __asm__ ("nop"); }
|
||||
smi_init(0); /* MII frame sent, disable clock until next operation */
|
||||
MCF_FEC_EIR |= MCF_FEC_EIR_MII;
|
||||
|
||||
return MCF_FEC_MMFR&0xFFFF;
|
||||
}
|
||||
|
||||
#if LWIP_NETIF_STATUS_CALLBACK
|
||||
static void
|
||||
mcf5225xif_status(struct netif* netif)
|
||||
{
|
||||
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if LWIP_NETIF_LINK_CALLBACK
|
||||
static void
|
||||
mcf5225xif_link(struct netif* net_if)
|
||||
{
|
||||
u16_t phy_status=smi_read(1,1); /* get phy status */
|
||||
|
||||
printf("received status: 0x%x\n",phy_status);
|
||||
|
||||
if (!(phy_status&0x4))
|
||||
phy_status=smi_read(1,1);
|
||||
|
||||
printf("received status: 0x%x\n",phy_status);
|
||||
|
||||
if (phy_status&0x4)
|
||||
MCF_GPIO_PORTTC |= MCF_GPIO_PORTTC_PORTTC1;
|
||||
else
|
||||
MCF_GPIO_PORTTC &=~MCF_GPIO_PORTTC_PORTTC1;
|
||||
}
|
||||
#endif
|
||||
@@ -1,54 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* This routine does the bulk of the system initialisation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Author:
|
||||
* David Fiddes, D.J@fiddes.surfaid.org
|
||||
* http://www.calm.hw.ac.uk/davidf/coldfire/
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1998.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/bootcard.h>
|
||||
|
||||
void __attribute__((weak)) bsp_start(void)
|
||||
{
|
||||
}
|
||||
|
||||
uint32_t __attribute__((weak)) bsp_get_CPU_clock_speed(void)
|
||||
{
|
||||
#define DEF_CLOCK_SPEED 8000000.0F //8.0 MHz
|
||||
#define MCF_MFD0_2_MASK 0x7000U
|
||||
#define MCF_RFD0_2_MASK 0x0700U
|
||||
#define MCF_MFD0_2_OFFSET 4U
|
||||
|
||||
#define SPEED_BIAS ((((MCF_CLOCK_SYNCR & MCF_MFD0_2_MASK) >> 11) + MCF_MFD0_2_OFFSET) / (float)(((MCF_CLOCK_SYNCR & MCF_RFD0_2_MASK)>>7) ? : 1.0F))
|
||||
|
||||
return MCF_CLOCK_SYNCR & MCF_CLOCK_SYNCR_PLLEN ? SPEED_BIAS * DEF_CLOCK_SPEED : DEF_CLOCK_SPEED;
|
||||
}
|
||||
@@ -1,84 +0,0 @@
|
||||
/*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* This is where the real hardware setup is done. A minimal stack
|
||||
* has been provided by the start.S code. No normal C or RTEMS
|
||||
* functions can be called from here.
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/bootcard.h>
|
||||
|
||||
extern void _wr_vbr(uint32_t);
|
||||
|
||||
extern long _d0_reset,_d1_reset,_M68kSpuriousInterruptCount;
|
||||
|
||||
/*
|
||||
* From linkcmds
|
||||
*/
|
||||
|
||||
extern uint8_t _INTERRUPT_VECTOR[];
|
||||
|
||||
extern uint8_t _clear_start[];
|
||||
extern uint8_t _clear_end[];
|
||||
|
||||
extern uint8_t _data_src_start[];
|
||||
extern uint8_t _data_dest_start[];
|
||||
extern uint8_t _data_dest_end[];
|
||||
|
||||
void Init5225x(void)
|
||||
{
|
||||
register uint32_t i;
|
||||
register uint32_t *dp, *sp;
|
||||
register uint8_t *dbp, *sbp;
|
||||
|
||||
/*
|
||||
* Copy the vector table to RAM
|
||||
*/
|
||||
|
||||
if (&_VBR != (void *)_INTERRUPT_VECTOR) {
|
||||
sp = (uint32_t *) _INTERRUPT_VECTOR;
|
||||
dp = (uint32_t *) &_VBR;
|
||||
for (i = 0; i < 256; i++) {
|
||||
*dp++ = *sp++;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Move initialized data from ROM to RAM.
|
||||
*/
|
||||
if (_data_src_start != _data_dest_start) {
|
||||
dbp = (uint8_t *) _data_dest_start;
|
||||
sbp = (uint8_t *) _data_src_start;
|
||||
i = _data_dest_end - _data_dest_start;
|
||||
while (i--)
|
||||
*dbp++ = *sbp++;
|
||||
}
|
||||
|
||||
asm __volatile__ ("move.l %%d5,%0\n\t":"=r" (_d0_reset));
|
||||
asm __volatile__ ("move.l %%d6,%0\n\t":"=r" (_d1_reset));
|
||||
|
||||
/*
|
||||
* Zero uninitialized data
|
||||
*/
|
||||
|
||||
if (_clear_start != _clear_end) {
|
||||
sbp = _clear_start;
|
||||
dbp = _clear_end;
|
||||
i = dbp - sbp;
|
||||
while (i--)
|
||||
*sbp++ = 0;
|
||||
}
|
||||
|
||||
//_wr_vbr((uint32_t) &_VBR);
|
||||
asm volatile("move.l %0,%%d7;movec %%d7,%%vbr\n\t"::"i"(&_VBR): "cc");
|
||||
|
||||
/*
|
||||
* We have to call some kind of RTEMS function here!
|
||||
*/
|
||||
|
||||
boot_card(0);
|
||||
for (;;) ;
|
||||
}
|
||||
@@ -1,215 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* This file contains directives for the GNU linker which are specific
|
||||
* to the Freescale ColdFire mcf52258
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.e
|
||||
*/
|
||||
|
||||
/*
|
||||
* Declare some sizes.
|
||||
*/
|
||||
RamBase = DEFINED(RamBase) ? RamBase : 0x20000000;
|
||||
RamSize = DEFINED(RamSize) ? RamSize : 64K;
|
||||
RamEnd = RamBase + RamSize;
|
||||
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
|
||||
_FlashBase = DEFINED(_FlashBase) ? _FlashBase : 0x00000000;
|
||||
|
||||
_VBR = 0x20000000;
|
||||
|
||||
ENTRY(start)
|
||||
STARTUP(start.o)
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
sram : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
flash : ORIGIN = 0x00000000, LENGTH = 512K
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/*
|
||||
* Text, data and bss segments
|
||||
*/
|
||||
.text : {
|
||||
|
||||
*(.text*)
|
||||
*(.ram_code)
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*/
|
||||
*(.gnu.linkonce.t.*)
|
||||
|
||||
/*
|
||||
* Initialization and finalization code.
|
||||
*
|
||||
* Various files can provide initialization and finalization
|
||||
* functions. crtbegin.o and crtend.o are two instances. The
|
||||
* body of these functions are in .init and .fini sections. We
|
||||
* accumulate the bodies here, and prepend function prologues
|
||||
* from crti.o and function epilogues from crtn.o. crti.o must
|
||||
* be linked first; crtn.o must be linked last. Because these
|
||||
* are wildcards, it doesn't matter if the user does not
|
||||
* actually link against crti.o and crtn.o; the linker won't
|
||||
* look for a file to match a wildcard. The wildcard also
|
||||
* means that it doesn't matter which directory crti.o and
|
||||
* crtn.o are in.
|
||||
*/
|
||||
PROVIDE (_init = .);
|
||||
*crti.o(.init)
|
||||
*(.init)
|
||||
*crtn.o(.init)
|
||||
PROVIDE (_fini = .);
|
||||
*crti.o(.fini)
|
||||
*(.fini)
|
||||
*crtn.o(.fini)
|
||||
|
||||
/*
|
||||
* Special FreeBSD sysctl sections.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
__start_set_sysctl_set = .;
|
||||
*(set_sysctl_*);
|
||||
__stop_set_sysctl_set = ABSOLUTE(.);
|
||||
*(set_domain_*);
|
||||
*(set_pseudo_*);
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*
|
||||
* gcc uses crtbegin.o to find the start of the constructors
|
||||
* and destructors so we make sure it is first. Because this
|
||||
* is a wildcard, it doesn't matter if the user does not
|
||||
* actually link against crtbegin.o; the linker won't look for
|
||||
* a file to match a wildcard. The wildcard also means that
|
||||
* it doesn't matter which directory crtbegin.o is in. The
|
||||
* constructor and destructor list are terminated in
|
||||
* crtend.o. The same comments apply to it.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*crtbegin.o(.ctors)
|
||||
*(.ctors)
|
||||
*crtend.o(.ctors)
|
||||
*crtbegin.o(.dtors)
|
||||
*(.dtors)
|
||||
*crtend.o(.dtors)
|
||||
|
||||
/*
|
||||
* Exception frame info
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*(.eh_frame)
|
||||
|
||||
/*
|
||||
* Read-only data
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
_rodata_start = . ;
|
||||
*(.rodata*)
|
||||
KEEP (*(SORT(.rtemsroset.*)))
|
||||
*(.gnu.linkonce.r*)
|
||||
|
||||
. = ALIGN (16);
|
||||
|
||||
*(.console_gdb_xfer)
|
||||
*(.bootstrap_data)
|
||||
} >flash
|
||||
|
||||
.tdata : {
|
||||
_TLS_Data_begin = .;
|
||||
*(.tdata .tdata.* .gnu.linkonce.td.*)
|
||||
_TLS_Data_end = .;
|
||||
. = ALIGN(16);
|
||||
_estuff = .;
|
||||
PROVIDE (_etext = .);
|
||||
} >flash
|
||||
|
||||
.tbss : {
|
||||
_TLS_BSS_begin = .;
|
||||
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
|
||||
_TLS_BSS_end = .;
|
||||
} >flash
|
||||
|
||||
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
|
||||
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
|
||||
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
|
||||
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
|
||||
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
|
||||
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
|
||||
|
||||
.data 0x20000400 : AT (_estuff)
|
||||
{
|
||||
PROVIDE( _data_dest_start = . );
|
||||
PROVIDE( _copy_start = .);
|
||||
*(.data*)
|
||||
KEEP (*(SORT(.rtemsrwset.*)))
|
||||
*(.gnu.linkonce.d*)
|
||||
*(.gcc_except_table*)
|
||||
*(.jcr)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_edata = .);
|
||||
PROVIDE (_copy_end = .);
|
||||
PROVIDE (_data_dest_end = . );
|
||||
} >sram
|
||||
|
||||
_data_src_start = _estuff;
|
||||
_data_src_end = _data_dest_start + SIZEOF(.data);
|
||||
|
||||
.bss :
|
||||
{
|
||||
PROVIDE (_clear_start = .);
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_end = .);
|
||||
PROVIDE (_clear_end = .);
|
||||
} >sram
|
||||
|
||||
.noinit (NOLOAD) : {
|
||||
*(SORT_BY_NAME (SORT_BY_ALIGNMENT (.noinit*)))
|
||||
} >sram
|
||||
|
||||
.rtemsstack (NOLOAD) : {
|
||||
*(SORT(.rtemsstack.*))
|
||||
PROVIDE(WorkAreaBase = .);
|
||||
} >sram
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* Addition to let linker know about custom section for GDB pretty-printing support. */
|
||||
.debug_gdb_scripts 0 : { *(.debug_gdb_scripts) }
|
||||
|
||||
PROVIDE (end_of_all = .);
|
||||
}
|
||||
@@ -1,467 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* dpu-mcf52258 startup code
|
||||
*
|
||||
* This file contains the entry point for the application.
|
||||
* The name of this entry point is compiler dependent.
|
||||
* It jumps to the BSP which is responsible for performing
|
||||
* all initialization.
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1998.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <rtems/asm.h>
|
||||
|
||||
BEGIN_CODE
|
||||
|
||||
PUBLIC (_INTERRUPT_VECTOR)
|
||||
SYM(_INTERRUPT_VECTOR):
|
||||
|
||||
.long _ISR_Stack_area_end /* 00 Initial 'SSP' */
|
||||
.long SYM(start) /* 01 Initial PC */
|
||||
.long SYM(_uhoh) /* 02 Access Error */
|
||||
.long SYM(_uhoh) /* 03 Address Error */
|
||||
.long SYM(_uhoh) /* 04 Illegal Instruction */
|
||||
.long SYM(_uhoh) /* 05 Divide by Zero */
|
||||
.long SYM(_uhoh) /* 06 Reserved */
|
||||
.long SYM(_uhoh) /* 07 Reserved */
|
||||
.long SYM(_uhoh) /* 08 Privilege Violation */
|
||||
.long SYM(_uhoh) /* 09 Trace */
|
||||
.long SYM(_uhoh) /* 10 Unimplemented A-Line */
|
||||
.long SYM(_uhoh) /* 11 Unimplemented F-Line */
|
||||
.long SYM(_uhoh) /* 12 Debug Interrupt */
|
||||
.long SYM(_uhoh) /* 13 Reserved */
|
||||
.long SYM(_uhoh) /* 14 Format Error */
|
||||
.long SYM(_uhoh) /* 15 Reserved */
|
||||
.long SYM(_uhoh) /* 16 Reserved */
|
||||
.long SYM(_uhoh) /* 17 Reserved */
|
||||
.long SYM(_uhoh) /* 18 Reserved */
|
||||
.long SYM(_uhoh) /* 19 Reserved */
|
||||
.long SYM(_uhoh) /* 20 Reserved */
|
||||
.long SYM(_uhoh) /* 21 Reserved */
|
||||
.long SYM(_uhoh) /* 22 Reserved */
|
||||
.long SYM(_uhoh) /* 23 Reserved */
|
||||
.long SYM(_spuriousInterrupt) /* 24 Spurious Interrupt */
|
||||
.long SYM(_uhoh) /* 25 Reserved */
|
||||
.long SYM(_uhoh) /* 26 Reserved */
|
||||
.long SYM(_uhoh) /* 27 Reserved */
|
||||
.long SYM(_uhoh) /* 28 Reserved */
|
||||
.long SYM(_uhoh) /* 29 Reserved */
|
||||
.long SYM(_uhoh) /* 30 Reserved */
|
||||
.long SYM(_uhoh) /* 31 Reserved */
|
||||
.long SYM(_uhoh) /* 32 TRAP #0 */
|
||||
.long SYM(_uhoh) /* 33 TRAP #1 */
|
||||
.long SYM(_uhoh) /* 34 TRAP #2 */
|
||||
.long SYM(_uhoh) /* 35 TRAP #3 */
|
||||
.long SYM(_uhoh) /* 36 TRAP #4 */
|
||||
.long SYM(_uhoh) /* 37 TRAP #5 */
|
||||
.long SYM(_uhoh) /* 38 TRAP #6 */
|
||||
.long SYM(_uhoh) /* 39 TRAP #7 */
|
||||
.long SYM(_uhoh) /* 40 TRAP #8 */
|
||||
.long SYM(_uhoh) /* 41 TRAP #9 */
|
||||
.long SYM(_uhoh) /* 42 TRAP #10 */
|
||||
.long SYM(_uhoh) /* 43 TRAP #11 */
|
||||
.long SYM(_uhoh) /* 44 TRAP #12 */
|
||||
.long SYM(_uhoh) /* 45 TRAP #13 */
|
||||
.long SYM(_uhoh) /* 46 TRAP #14 */
|
||||
.long SYM(_uhoh) /* 47 TRAP #15 */
|
||||
.long SYM(_uhoh) /* 48 Reserved */
|
||||
.long SYM(_uhoh) /* 49 Reserved */
|
||||
.long SYM(_uhoh) /* 50 Reserved */
|
||||
.long SYM(_uhoh) /* 51 Reserved */
|
||||
.long SYM(_uhoh) /* 52 Reserved */
|
||||
.long SYM(_uhoh) /* 53 Reserved */
|
||||
.long SYM(_uhoh) /* 54 Reserved */
|
||||
.long SYM(_uhoh) /* 55 Reserved */
|
||||
.long SYM(_uhoh) /* 56 Reserved */
|
||||
.long SYM(_uhoh) /* 57 Reserved */
|
||||
.long SYM(_uhoh) /* 58 Reserved */
|
||||
.long SYM(_uhoh) /* 59 Reserved */
|
||||
.long SYM(_uhoh) /* 60 Reserved */
|
||||
.long SYM(_uhoh) /* 61 Reserved */
|
||||
.long SYM(_uhoh) /* 62 Reserved */
|
||||
.long SYM(_uhoh) /* 63 Reserved */
|
||||
|
||||
/* INTC0 */
|
||||
|
||||
.long SYM(_uhoh) /* 64*/
|
||||
.long SYM(_uhoh) /* 65*/
|
||||
.long SYM(_uhoh) /* 66*/
|
||||
.long SYM(_uhoh) /* 67*/
|
||||
.long SYM(_uhoh) /* 68*/
|
||||
.long SYM(_uhoh) /* 69*/
|
||||
.long SYM(_uhoh) /* 70*/
|
||||
.long SYM(_uhoh) /* 71*/
|
||||
.long SYM(_uhoh) /* 72*/
|
||||
.long SYM(_uhoh) /* 73*/
|
||||
.long SYM(_uhoh) /* 74*/
|
||||
.long SYM(_uhoh) /* 75*/
|
||||
.long SYM(_uhoh) /* 76*/
|
||||
.long SYM(_uhoh) /* 77*/
|
||||
.long SYM(_uhoh) /* 78*/
|
||||
.long SYM(_uhoh) /* 79*/
|
||||
.long SYM(_uhoh) /* 80*/
|
||||
.long SYM(_uhoh) /* 81*/
|
||||
.long SYM(_uhoh) /* 82*/
|
||||
.long SYM(_uhoh) /* 83*/
|
||||
.long SYM(_uhoh) /* 84*/
|
||||
.long SYM(_uhoh) /* 85*/
|
||||
.long SYM(_uhoh) /* 86*/
|
||||
.long SYM(_uhoh) /* 87*/
|
||||
.long SYM(_uhoh) /* 88*/
|
||||
.long SYM(_uhoh) /* 89*/
|
||||
.long SYM(_uhoh) /* 90*/
|
||||
.long SYM(_uhoh) /* 91*/
|
||||
.long SYM(_uhoh) /* 92*/
|
||||
.long SYM(_uhoh) /* 93*/
|
||||
.long SYM(_uhoh) /* 94*/
|
||||
.long SYM(_uhoh) /* 95*/
|
||||
.long SYM(_uhoh) /* 96*/
|
||||
.long SYM(_uhoh) /* 97*/
|
||||
.long SYM(_uhoh) /* 98*/
|
||||
.long SYM(_uhoh) /* 99*/
|
||||
.long SYM(_uhoh) /* 100*/
|
||||
.long SYM(_uhoh) /* 101*/
|
||||
.long SYM(_uhoh) /* 102*/
|
||||
.long SYM(_uhoh) /* 103*/
|
||||
.long SYM(_uhoh) /* 104*/
|
||||
.long SYM(_uhoh) /* 105*/
|
||||
.long SYM(_uhoh) /* 106*/
|
||||
.long SYM(_uhoh) /* 107*/
|
||||
.long SYM(_uhoh) /* 108*/
|
||||
.long SYM(_uhoh) /* 109*/
|
||||
.long SYM(_uhoh) /* 110*/
|
||||
.long SYM(_uhoh) /* 111*/
|
||||
.long SYM(_uhoh) /* 112*/
|
||||
.long SYM(_uhoh) /* 113*/
|
||||
.long SYM(_uhoh) /* 114*/
|
||||
.long SYM(_uhoh) /* 115*/
|
||||
.long SYM(_uhoh) /* 116*/
|
||||
.long SYM(_uhoh) /* 117*/
|
||||
.long SYM(_uhoh) /* 118*/
|
||||
.long SYM(_uhoh) /* 119*/
|
||||
.long SYM(_uhoh) /* 120*/
|
||||
.long SYM(_uhoh) /* 121*/
|
||||
.long SYM(_uhoh) /* 122*/
|
||||
.long SYM(_uhoh) /* 123*/
|
||||
.long SYM(_uhoh) /* 124*/
|
||||
.long SYM(_uhoh) /* 125*/
|
||||
.long SYM(_uhoh) /* 126*/
|
||||
.long SYM(_uhoh) /* 127*/
|
||||
|
||||
/* INTC1 */
|
||||
|
||||
.long SYM(_uhoh) /* 128*/
|
||||
.long SYM(_uhoh) /* 129*/
|
||||
.long SYM(_uhoh) /* 130*/
|
||||
.long SYM(_uhoh) /* 131*/
|
||||
.long SYM(_uhoh) /* 132*/
|
||||
.long SYM(_uhoh) /* 133*/
|
||||
.long SYM(_uhoh) /* 134*/
|
||||
.long SYM(_uhoh) /* 135*/
|
||||
.long SYM(_uhoh) /* 136*/
|
||||
.long SYM(_uhoh) /* 137*/
|
||||
.long SYM(_uhoh) /* 138*/
|
||||
.long SYM(_uhoh) /* 139*/
|
||||
.long SYM(_uhoh) /* 140*/
|
||||
.long SYM(_uhoh) /* 141*/
|
||||
.long SYM(_uhoh) /* 142*/
|
||||
.long SYM(_uhoh) /* 143*/
|
||||
.long SYM(_uhoh) /* 144*/
|
||||
.long SYM(_uhoh) /* 145*/
|
||||
.long SYM(_uhoh) /* 146*/
|
||||
.long SYM(_uhoh) /* 147*/
|
||||
.long SYM(_uhoh) /* 148*/
|
||||
.long SYM(_uhoh) /* 149*/
|
||||
.long SYM(_uhoh) /* 150*/
|
||||
.long SYM(_uhoh) /* 151*/
|
||||
.long SYM(_uhoh) /* 152*/
|
||||
.long SYM(_uhoh) /* 153*/
|
||||
.long SYM(_uhoh) /* 154*/
|
||||
.long SYM(_uhoh) /* 155*/
|
||||
.long SYM(_uhoh) /* 156*/
|
||||
.long SYM(_uhoh) /* 157*/
|
||||
.long SYM(_uhoh) /* 158*/
|
||||
.long SYM(_uhoh) /* 159*/
|
||||
.long SYM(_uhoh) /* 160*/
|
||||
.long SYM(_uhoh) /* 161*/
|
||||
.long SYM(_uhoh) /* 162*/
|
||||
.long SYM(_uhoh) /* 163*/
|
||||
.long SYM(_uhoh) /* 164*/
|
||||
.long SYM(_uhoh) /* 165*/
|
||||
.long SYM(_uhoh) /* 166*/
|
||||
.long SYM(_uhoh) /* 167*/
|
||||
.long SYM(_uhoh) /* 168*/
|
||||
.long SYM(_uhoh) /* 169*/
|
||||
.long SYM(_uhoh) /* 170*/
|
||||
.long SYM(_uhoh) /* 171*/
|
||||
.long SYM(_uhoh) /* 172*/
|
||||
.long SYM(_uhoh) /* 173*/
|
||||
.long SYM(_uhoh) /* 174*/
|
||||
.long SYM(_uhoh) /* 175*/
|
||||
.long SYM(_uhoh) /* 176*/
|
||||
.long SYM(_uhoh) /* 177*/
|
||||
.long SYM(_uhoh) /* 178*/
|
||||
.long SYM(_uhoh) /* 179*/
|
||||
.long SYM(_uhoh) /* 180*/
|
||||
.long SYM(_uhoh) /* 181*/
|
||||
.long SYM(_uhoh) /* 182*/
|
||||
.long SYM(_uhoh) /* 183*/
|
||||
.long SYM(_uhoh) /* 184*/
|
||||
.long SYM(_uhoh) /* 185*/
|
||||
.long SYM(_uhoh) /* 186*/
|
||||
.long SYM(_uhoh) /* 187*/
|
||||
.long SYM(_uhoh) /* 188*/
|
||||
.long SYM(_uhoh) /* 189*/
|
||||
.long SYM(_uhoh) /* 190*/
|
||||
.long SYM(_uhoh) /* 191*/
|
||||
.long SYM(_uhoh) /* 192*/
|
||||
|
||||
/* */
|
||||
|
||||
.long SYM(_uhoh) /* 193*/
|
||||
.long SYM(_uhoh) /* 194*/
|
||||
.long SYM(_uhoh) /* 195*/
|
||||
.long SYM(_uhoh) /* 196*/
|
||||
.long SYM(_uhoh) /* 197*/
|
||||
.long SYM(_uhoh) /* 198*/
|
||||
.long SYM(_uhoh) /* 199*/
|
||||
.long SYM(_uhoh) /* 200*/
|
||||
.long SYM(_uhoh) /* 201*/
|
||||
.long SYM(_uhoh) /* 202*/
|
||||
.long SYM(_uhoh) /* 203*/
|
||||
.long SYM(_uhoh) /* 204*/
|
||||
.long SYM(_uhoh) /* 205*/
|
||||
.long SYM(_uhoh) /* 206*/
|
||||
.long SYM(_uhoh) /* 207*/
|
||||
.long SYM(_uhoh) /* 208*/
|
||||
.long SYM(_uhoh) /* 209*/
|
||||
.long SYM(_uhoh) /* 210*/
|
||||
.long SYM(_uhoh) /* 211*/
|
||||
.long SYM(_uhoh) /* 212*/
|
||||
.long SYM(_uhoh) /* 213*/
|
||||
.long SYM(_uhoh) /* 214*/
|
||||
.long SYM(_uhoh) /* 215*/
|
||||
.long SYM(_uhoh) /* 216*/
|
||||
.long SYM(_uhoh) /* 217*/
|
||||
.long SYM(_uhoh) /* 218*/
|
||||
.long SYM(_uhoh) /* 219*/
|
||||
.long SYM(_uhoh) /* 220*/
|
||||
.long SYM(_uhoh) /* 221*/
|
||||
.long SYM(_uhoh) /* 222*/
|
||||
.long SYM(_uhoh) /* 223*/
|
||||
.long SYM(_uhoh) /* 224*/
|
||||
.long SYM(_uhoh) /* 225*/
|
||||
.long SYM(_uhoh) /* 226*/
|
||||
.long SYM(_uhoh) /* 227*/
|
||||
.long SYM(_uhoh) /* 228*/
|
||||
.long SYM(_uhoh) /* 229*/
|
||||
.long SYM(_uhoh) /* 230*/
|
||||
.long SYM(_uhoh) /* 231*/
|
||||
.long SYM(_uhoh) /* 232*/
|
||||
.long SYM(_uhoh) /* 233*/
|
||||
.long SYM(_uhoh) /* 234*/
|
||||
.long SYM(_uhoh) /* 235*/
|
||||
.long SYM(_uhoh) /* 236*/
|
||||
.long SYM(_uhoh) /* 237*/
|
||||
.long SYM(_uhoh) /* 238*/
|
||||
.long SYM(_uhoh) /* 239*/
|
||||
.long SYM(_uhoh) /* 240*/
|
||||
.long SYM(_uhoh) /* 241*/
|
||||
.long SYM(_uhoh) /* 242*/
|
||||
.long SYM(_uhoh) /* 243*/
|
||||
.long SYM(_uhoh) /* 244*/
|
||||
.long SYM(_uhoh) /* 245*/
|
||||
.long SYM(_uhoh) /* 246*/
|
||||
.long SYM(_uhoh) /* 247*/
|
||||
.long SYM(_uhoh) /* 248*/
|
||||
.long SYM(_uhoh) /* 249*/
|
||||
.long SYM(_uhoh) /* 250*/
|
||||
.long SYM(_uhoh) /* 251*/
|
||||
.long SYM(_uhoh) /* 252*/
|
||||
.long SYM(_uhoh) /* 253*/
|
||||
.long SYM(_uhoh) /* 254*/
|
||||
.long SYM(_uhoh) /* 255*/
|
||||
|
||||
/*
|
||||
* We must write the flash configuration here.
|
||||
This portion of RAM is shadowed
|
||||
* by some flash registers, so we can't put code here!
|
||||
*/
|
||||
|
||||
PUBLIC (_FLASH_CONFIGURATION_FIELD)
|
||||
SYM(_FLASH_CONFIGURATION_FIELD):
|
||||
|
||||
_key_upper: .long 0x5a5a5a5a
|
||||
_key_lower: .long 0x5a5a5a5a
|
||||
_cfm_prot: .long 0x00000000
|
||||
_cfm_sacc: .long 0x00000000
|
||||
_cfm_dacc: .long 0x00000000
|
||||
_cfm_msec: .long 0x80000000 //enable the KEYEN bit to bypass security in backdoor mode
|
||||
|
||||
/*
|
||||
* Default trap handler
|
||||
* With an oscilloscope you can see AS* stop
|
||||
*/
|
||||
.align 4
|
||||
PUBLIC (_uhoh)
|
||||
SYM(_uhoh):
|
||||
nop | Leave spot for breakpoint
|
||||
stop #0x2700 | Stop with interrupts disabled
|
||||
bra.w SYM(_uhoh) | Stuck forever
|
||||
|
||||
/*
|
||||
* Spurious Interrupt Handler
|
||||
*/
|
||||
.align 4
|
||||
PUBLIC (_spuriousInterrupt)
|
||||
SYM(_spuriousInterrupt):
|
||||
addql #1, SYM(_M68kSpuriousInterruptCount)
|
||||
rte
|
||||
|
||||
/*
|
||||
* Write VBR Register
|
||||
*/
|
||||
|
||||
/*
|
||||
.align 4
|
||||
PUBLIC (_wr_vbr)
|
||||
SYM(_wr_vbr):
|
||||
move.l 4(sp), d0
|
||||
movec d0, vbr
|
||||
nop
|
||||
rts
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board startup
|
||||
* Disable watchdog, interrupts
|
||||
* Enable sram
|
||||
*/
|
||||
.align 4
|
||||
PUBLIC (start)
|
||||
SYM(start):
|
||||
|
||||
/* Mask off interupts */
|
||||
move.w #0x2700, sr
|
||||
|
||||
/* Save off intial D0 and D1 to NOT scratched registers conforming to ABI C calling convention */
|
||||
move.l d0,d5;
|
||||
move.l d1,d6;
|
||||
|
||||
/* Initialize RAMBAR: locate SRAM and validate it */
|
||||
move.l #RamBase, d7
|
||||
add.l #0x21, d7
|
||||
movec d7, %rambar
|
||||
|
||||
/* Locate Stack Pointer */
|
||||
move.l #_ISR_Stack_area_end, sp
|
||||
|
||||
/* Initialize FLASHBAR */
|
||||
move.l #_FlashBase, d7
|
||||
cmp.l #0x00000000, d7
|
||||
bne _change_flashbar
|
||||
add.l #0x61, d7
|
||||
movec d7, %flashbar
|
||||
|
||||
_continue_startup:
|
||||
|
||||
/* Locate Stack Pointer */
|
||||
// move.l #_ISR_Stack_area_end, sp //is done automatically by the CPU
|
||||
|
||||
/*
|
||||
* Remainder of the startup code is handled by C code
|
||||
* This never returns
|
||||
*/
|
||||
|
||||
jmp SYM(Init5225x)
|
||||
|
||||
_change_flashbar:
|
||||
/*
|
||||
* The following sequence is used to set FLASHBAR. Since we may
|
||||
* be executing from Flash, we must put the routine into SRAM for
|
||||
* execution and then jump back to Flash using the new address.
|
||||
*
|
||||
* The following instructions are coded into the SRAM:
|
||||
*
|
||||
* move.l #(__FLASH + 0x61),d0
|
||||
* movec d0, FLASHBAR
|
||||
* jmp _continue_startup
|
||||
*
|
||||
* An arbitrary SRAM address is chosen until the real address
|
||||
* can be loaded.
|
||||
*
|
||||
* This routine is not necessary if the default Flash address
|
||||
* (0x00000000) is used.
|
||||
*
|
||||
* If running in SRAM, change_flashbar should not be executed
|
||||
*/
|
||||
|
||||
move.l #RamBase, a0
|
||||
|
||||
/* Code "move.l #(__FLASH + 0x61),d0" into SRAM */
|
||||
move.w #0x203C, d0
|
||||
move.w d0, (a0)+
|
||||
move.l #_FlashBase, d0
|
||||
add.l #0x61, d0
|
||||
move.l d0, (a0)+
|
||||
|
||||
/* Code "movec d0,FLASHBAR" into SRAM */
|
||||
move.l #0x4e7b0C04, d0
|
||||
move.l d0, (a0)+
|
||||
|
||||
/* Code "jmp _continue_startup" into SRAM */
|
||||
move.w #0x4EF9, d0
|
||||
move.w d0, (a0)+
|
||||
move.l #_continue_startup, d0
|
||||
move.l d0, (a0)+
|
||||
|
||||
/* Jump to code segment in internal SRAM */
|
||||
jmp RamBase
|
||||
|
||||
END_CODE
|
||||
|
||||
|
||||
BEGIN_DATA_DCL
|
||||
|
||||
.align 4
|
||||
|
||||
PUBLIC (_M68kSpuriousInterruptCount)
|
||||
SYM (_M68kSpuriousInterruptCount):
|
||||
.long 0
|
||||
|
||||
PUBLIC (_d0_reset)
|
||||
SYM (_d0_reset):
|
||||
.long 0
|
||||
|
||||
PUBLIC (_d1_reset)
|
||||
SYM (_d1_reset):
|
||||
.long 0
|
||||
|
||||
END_DATA_DCL
|
||||
|
||||
END
|
||||
|
||||
@@ -1,18 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- split: null
|
||||
- env-append: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
default:
|
||||
- enabled-by: true
|
||||
value:
|
||||
- -mcpu=52235
|
||||
description: |
|
||||
ABI flags
|
||||
enabled-by: true
|
||||
links: []
|
||||
name: ABI_FLAGS
|
||||
type: build
|
||||
@@ -1,56 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
arch: m68k
|
||||
bsp: mcf5225x
|
||||
build-type: bsp
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
cppflags: []
|
||||
enabled-by: true
|
||||
family: mcf5225x
|
||||
includes: []
|
||||
install:
|
||||
- destination: ${BSP_INCLUDEDIR}
|
||||
source:
|
||||
- bsps/m68k/mcf5225x/include/bsp.h
|
||||
- destination: ${BSP_INCLUDEDIR}/bsp
|
||||
source:
|
||||
- bsps/m68k/mcf5225x/include/bsp/irq.h
|
||||
- destination: ${BSP_LIBDIR}
|
||||
source:
|
||||
- bsps/m68k/mcf5225x/start/linkcmds
|
||||
links:
|
||||
- role: build-dependency
|
||||
uid: ../grp
|
||||
- role: build-dependency
|
||||
uid: abi
|
||||
- role: build-dependency
|
||||
uid: start
|
||||
- role: build-dependency
|
||||
uid: tstmcf5225x
|
||||
- role: build-dependency
|
||||
uid: ../../obj
|
||||
- role: build-dependency
|
||||
uid: ../../objirqdflt
|
||||
- role: build-dependency
|
||||
uid: ../../objmem
|
||||
- role: build-dependency
|
||||
uid: ../../opto2
|
||||
- role: build-dependency
|
||||
uid: ../../bspopts
|
||||
source:
|
||||
- bsps/m68k/mcf5225x/btimer/btimer.c
|
||||
- bsps/m68k/mcf5225x/clock/clock.c
|
||||
- bsps/m68k/mcf5225x/console/console.c
|
||||
- bsps/m68k/mcf5225x/console/debugio.c
|
||||
- bsps/m68k/mcf5225x/start/bspstart.c
|
||||
- bsps/m68k/mcf5225x/start/init5225x.c
|
||||
- bsps/m68k/shared/cache/cache-mcf5225x.c
|
||||
- bsps/m68k/shared/m68kidle.c
|
||||
- bsps/m68k/shared/memProbe.c
|
||||
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
|
||||
- bsps/shared/start/bspreset-loop.c
|
||||
- bsps/shared/start/gettargethash-default.c
|
||||
- bsps/shared/start/sbrk.c
|
||||
- bsps/shared/start/setvec.c
|
||||
type: build
|
||||
@@ -1,14 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
asflags: []
|
||||
build-type: start-file
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
cppflags: []
|
||||
enabled-by: true
|
||||
includes: []
|
||||
install-path: ${BSP_LIBDIR}
|
||||
links: []
|
||||
source:
|
||||
- bsps/m68k/mcf5225x/start/start.S
|
||||
target: start.o
|
||||
type: build
|
||||
@@ -1,19 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- set-test-state:
|
||||
reason: null
|
||||
state: exclude
|
||||
tests:
|
||||
- cdtest
|
||||
- fileio
|
||||
- iostream
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
default: []
|
||||
description: ''
|
||||
enabled-by: true
|
||||
links:
|
||||
- role: build-dependency
|
||||
uid: ../../tstsmallmem
|
||||
type: build
|
||||
Reference in New Issue
Block a user