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cpukit/score/cpu/or1k: Fix _CPU_ISR_Is_enabled()

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The level is a supervision register value and the predicate masked it
with CPU_OR1K_SPR_SR.  That is the number of the supervision register
and not a bit in it, so the test looked at the supervisor mode and
instruction cache bits instead of the interrupt enable bit and returned
true for a level with the interrupts disabled.

Update #5684.

Assisted-by: Claude:claude-opus-5 claude-code
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
This commit is contained in:
Sebastian Huber
2026-09-01 20:08:57 +00:00
committed by Gedare Bloom
parent 537705134b
commit a8d3868bad
1 changed files with 6 additions and 1 deletions
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cpukit/score/cpu/or1k/include/rtems/score/cpu.h
+6 -1
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@@ -319,7 +319,12 @@ static inline void or1k_interrupt_enable(uint32_t level)
static inline bool _CPU_ISR_Is_enabled( uint32_t level )
{
return ( level & CPU_OR1K_SPR_SR ) != 0;
/*
* The level is a supervision register value. CPU_OR1K_SPR_SR is the
* number of that register and not a bit in it, so it must not be used as
* a mask here.
*/
return ( level & CPU_OR1K_SPR_SR_IEE ) != 0;
}
/*