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2011-07-18 Till Straumann <strauman@slac.stanford.edu>

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* shared/startup/ppc_idle.c: Need to enable HID0[NAP] on
	a 7400/7455/7457 for MSR[POW] to have an effect.
This commit is contained in:
Till Straumann
2011-07-18 16:33:39 +00:00
parent 894a2c910a
commit 9515b955fe
2 changed files with 35 additions and 9 deletions
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c/src/lib/libbsp/powerpc/ChangeLog
+5
View File
@@ -1,3 +1,8 @@
2011-07-18 Till Straumann <strauman@slac.stanford.edu>
* shared/startup/ppc_idle.c: Need to enable HID0[NAP] on
a 7400/7455/7457 for MSR[POW] to have an effect.
2011-07-15 Till Straumann <strauman@slac.stanford.edu>
* shared/bootloader/mm.c, shared/bootloader/pci.c,
c/src/lib/libbsp/powerpc/shared/startup/ppc_idle.c
+30 -9
View File
@@ -67,20 +67,41 @@
*/
#include <rtems/powerpc/registers.h>
#include <libcpu/cpuIdent.h>
#include <libcpu/spr.h>
SPR_RW(HID0)
void *
bsp_ppc_idle_task_body(uintptr_t ignored)
{
uint32_t msr;
_CPU_MSR_GET(msr);
msr |= MSR_POW;
asm volatile(
"1: sync \n"
" mtmsr %0 \n"
" isync \n"
" b 1b \n"
::"r"(msr)
);
switch ( current_ppc_cpu ) {
case PPC_7400:
case PPC_7455:
case PPC_7457:
/* Must enable NAP mode in HID0 for MSR_POW to work */
_write_HID0( _read_HID0() | HID0_NAP );
break;
default:
break;
}
for ( ;; ) {
_CPU_MSR_GET(msr);
msr |= MSR_POW;
asm volatile(
"1: sync \n"
" mtmsr %0 \n"
" isync \n"
" b 1b \n"
::"r"(msr)
);
}
return 0;
}