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Obsolete and remove m68k/ods68302 BSP

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closes #2544.
This commit is contained in:
Joel Sherrill
2016-01-23 16:47:35 -06:00
parent 77990ec714
commit 482d4974b8
31 changed files with 0 additions and 4521 deletions
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c/ACKNOWLEDGEMENTS
-5
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@@ -81,11 +81,6 @@ The following persons/organizations have made contributions:
performance issues and licensing concerns, Eric followed this up
by replacing the KA9Q TCP/IP stack with a port of the FreeBSD stack.
+ Chris Johns (cjohns@plessey.com.au) submitted the ods68302 BSP which
offers easier configuration than its counterpart gen68302. Chris
also submitted the RTEMS++ C++ class library and test code for
that library.
+ Katsutoshi Shibuya (shibuya@mxb.meshnet.or.jp) of BU-Denken Co., Ltd.
(Sapporo, Japan) submitted the extended console driver for the
MVME162LX BSP and the POSIX tcsetattr() and tcgetattr() routines.
c/src/lib/libbsp/m68k/acinclude.m4
-2
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@@ -34,8 +34,6 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
AC_CONFIG_SUBDIRS([mvme162]);;
mvme167 )
AC_CONFIG_SUBDIRS([mvme167]);;
ods68302 )
AC_CONFIG_SUBDIRS([ods68302]);;
uC5282 )
AC_CONFIG_SUBDIRS([uC5282]);;
*)
c/src/lib/libbsp/m68k/ods68302/Makefile.am
-65
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@@ -1,65 +0,0 @@
ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am
include $(top_srcdir)/../../bsp.am
include_bspdir = $(includedir)/bsp
dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h
include_HEADERS += ../../shared/include/tm27.h
nodist_include_HEADERS = include/bspopts.h
nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
DISTCLEANFILES = include/bspopts.h
noinst_PROGRAMS =
EXTRA_DIST =
include_HEADERS += include/bare.h
include_HEADERS += include/crc.h
include_HEADERS += include/debugport.h
include_HEADERS += include/m68302scc.h
include_HEADERS += include/coverhd.h
# FIXME: Better merge both files into one and use #ifdef GDB_MONITOR_ACTIVE
if ODS68302_DEBUG
EXTRA_DIST += start/debugreset.S
start.$(OBJEXT): start/debugreset.S
$(CPPASCOMPILE) -o $@ -c $<
else
EXTRA_DIST += start/reset.S
start.$(OBJEXT): start/reset.S
$(CPPASCOMPILE) -o $@ -c $<
endif
project_lib_DATA = start.$(OBJEXT)
dist_project_lib_DATA += startup/linkcmds startup/rom startup/debugger
noinst_LIBRARIES = libbsp.a
libbsp_a_SOURCES =
# startup
libbsp_a_SOURCES += startup/cpuboot.c startup/crc.c startup/debugport.c \
startup/gdb-hooks.c ../../shared/bootcard.c \
startup/m68302scc.c startup/m68k-stub.c \
../../shared/bspgetworkarea.c \
startup/trace.c ../../shared/gnatinstallhandler.c ../../shared/bsplibc.c \
../../shared/bsppredriverhook.c ../../shared/bsppost.c \
../../shared/bspstart.c ../../shared/bspclean.c ../../shared/sbrk.c \
../../shared/setvec.c
# clock
libbsp_a_SOURCES += clock/ckinit.c
# console
libbsp_a_SOURCES += console/console.c ../../shared/dummy_printk_support.c
# timer
libbsp_a_SOURCES += timer/timer.c timer/timerisr.S
libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/misc.rel
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am
c/src/lib/libbsp/m68k/ods68302/README
-77
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@@ -1,77 +0,0 @@
BSP NAME: ods68302
BOARD: proprietary (see below for relevant information)
BUS: none
CPU FAMILY: MC68000
COPROCESSORS: 68302 communications co-processor
MODE: not applicable
DEBUG MONITOR: gdb
PERIPHERALS
===========
TIMERS: two 68302 timers, one 68302 watchdog timer
RESOLUTION: ?
SERIAL PORTS: three 68302 SCCs
REAL-TIME CLOCK:
DMA: built-in 68302, not used
VIDEO: none
SCSI: none
NETWORKING: none
DRIVER INFORMATION
==================
CLOCK DRIVER: 68302 (TIMER1)
IOSUPP DRIVER: 68302 SCC2
SHMSUPP: none
TIMER DRIVER: 68302 TIMER2
STDIO
=====
PORT: SCC3 for ROM build, SCC1 for DEGUB build
ELECTRICAL: EIA-232
BAUD: 9600
BITS PER CHARACTER: 8
PARITY: None
STOP BITS: 1
DEBUG MONITOR
=============
PORT: SCC3
ELECTRICAL: EIA-232
BAUD: 57600
BITS PER CHARACTER: 8
PARITY: None
STOP BITS: 1
NOTES
=====
This BSP is based on the gen68302. The main differences are C code for
boot parameters, the gdb monitor, and variant support.
The boot code which changes is written in C and the parameters used to
control the configuration of the chip select registers and parallel
ports are held in variant specific header files. These file also
control the other hardware specific definitions such the processor
freqency.
The gdb monitor currently uses two serial ports. One for the debugger
and one for stdio. This is costly in terms of the 68302 processor.
The build configuration contains the memory map. The bsp code does not
contain any memory map parameters. That is the ods68302.cfg contains
the link addresses.
To build a version to download via gdb use the command line parameters
to make or "RTEMS_DEBUGGER=yes". This will change the memory map to
place the code, and data above the RAM used by the gdb stub.
TODO
====
1) Lower the set size of the gdb monitor. This can be made to be about
10K or RAM. The code is about 14K.
2) Add the production memory test code. This will be C and asm
code. The asm will be a faster version of the C.
c/src/lib/libbsp/m68k/ods68302/bsp_specs
-13
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@@ -1,13 +0,0 @@
%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*startfile:
%{!qrtems: %(old_startfile)} \
%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e start}}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
*endfile:
%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
c/src/lib/libbsp/m68k/ods68302/clock/ckinit.c
-102
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@@ -1,102 +0,0 @@
/*
* This routine initializes Timer 1 for an MC68302.
* The tick frequency is 1 millisecond.
*/
/*
* COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <stdlib.h> /* for atexit() */
#include <bsp.h>
#include <rtems/m68k/m68302.h>
#define CLOCK_VECTOR 137
#define TMR1_VAL ( RBIT_TMR_RST /* software reset the timer */\
| RBIT_TMR_ICLK_MASTER16 /* master clock divided by 16 */\
| RBIT_TMR_FRR /* restart timer after ref reached */\
| RBIT_TMR_ORI) /* enable interrupt when ref reached */
#define TRR1_VAL 1000 /* 1000 ticks @ 16MHz/16
* = 1 millisecond tick.
*/
/*
* Clock_driver_ticks is a monotonically increasing counter of the
* number of clock ticks since the driver was initialized.
*/
volatile uint32_t Clock_driver_ticks;
/*
* Clock_isrs is the number of clock ISRs until the next invocation of
* the RTEMS clock tick routine. The clock tick device driver
* gets an interrupt once a millisecond and counts down until the
* length of time between the user configured microseconds per tick
* has passed.
*/
uint32_t Clock_isrs;
void Clock_exit( void );
/*
* ISR Handler
*/
static rtems_isr Clock_isr(
rtems_vector_number vector
)
{
Clock_driver_ticks += 1;
m302.reg.isr = RBIT_ISR_TIMER1; /* clear in-service bit */
m302.reg.ter1 = (RBIT_TER_REF | RBIT_TER_CAP); /* clear timer intr request */
if ( Clock_isrs == 1 ) {
rtems_clock_tick();
Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
}
else
Clock_isrs -= 1;
}
static void Install_clock(
rtems_isr_entry clock_isr
)
{
Clock_driver_ticks = 0;
Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
set_vector( clock_isr, CLOCK_VECTOR, 1 );
m302.reg.trr1 = TRR1_VAL; /* set timer reference register */
m302.reg.tmr1 = TMR1_VAL; /* set timer mode register & enable */
/*
* Enable TIMER1 interrupts only.
*/
m302.reg.imr |= RBIT_IMR_TIMER1; /* set 68302 int-mask to allow ints */
atexit( Clock_exit );
}
void Clock_exit( void )
{
/* TODO: figure out what to do here */
/* do not restore old vector */
}
rtems_device_driver Clock_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp
)
{
Install_clock( Clock_isr );
return RTEMS_SUCCESSFUL;
}
c/src/lib/libbsp/m68k/ods68302/configure.ac
-36
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@@ -1,36 +0,0 @@
## Process this file with autoconf to produce a configure script.
AC_PREREQ([2.69])
AC_INIT([rtems-c-src-lib-libbsp-m68k-ods68302],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
RTEMS_BSP_CONFIGURE
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
AC_ARG_ENABLE(ods68302-debug,
[AS_HELP_STRING(--enable-ods68302-debug,whether to support bsp debugging)],
[case $enable_ods68302_debug in
yes ) ODS68302_DEBUG=yes;;
* ) ODS68302_DEBUG=no;;
esac],
[ODS68302_DEBUG=no])
AM_CONDITIONAL(ODS68302_DEBUG,[test "$ODS68302_DEBUG" = "yes"])
# FIXME: Something seem to be very broken inside of this BSP
# It plays tricks with VARIANT
# For now, deactivate it.
# BSP_VARIANT=${BSP_VARIANT-bare}
# AC_DEFINE_UNQUOTED([VARIANT],[${BSP_VARIANT}],[missing explanation])
RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
AC_OUTPUT
c/src/lib/libbsp/m68k/ods68302/console/console.c
-183
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@@ -1,183 +0,0 @@
/*
* Initialize the MC68302 SCC2 for console IO board support package.
*/
/*
* COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#define GEN68302_INIT
#include <debugport.h>
#include <bsp.h>
#include <rtems/libio.h>
/* console_initialize
*
* This routine initializes the console IO driver.
*/
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
/* debug_port_initialise(); */
status = rtems_io_register_name(
"/dev/console",
major,
(rtems_device_minor_number) 0
);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
return RTEMS_SUCCESSFUL;
}
/* is_character_ready
*
* Check to see if a character is available on the MC68302's SCC2. If so,
* then return a TRUE (along with the character). Otherwise return FALSE.
*/
static bool is_character_ready(
char *ch /* -> character */
)
{
if (debug_port_status(0))
{
*ch = debug_port_in();
return true;
}
return false;
}
/* inbyte
*
* Receive a character from the MC68302's SCC2.
*/
static char inbyte( void )
{
char ch;
while (!is_character_ready(&ch));
return ch;
}
/* outbyte
*
* Transmit a character out on the MC68302's SCC2.
* It may support XON/XOFF flow control.
*/
static void outbyte(
char ch
)
{
debug_port_out(ch);
}
/*
* Open entry point
*/
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* Close entry point
*/
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* read bytes from the serial port. We only have stdin.
*/
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_libio_rw_args_t *rw_args;
char *buffer;
int maximum;
int count = 0;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
for (count = 0; count < maximum; count++) {
buffer[ count ] = inbyte();
if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
buffer[ count++ ] = '\n';
break;
}
}
rw_args->bytes_moved = count;
return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
}
/*
* write bytes to the serial port. Stdout and stderr are the same.
*/
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
int count;
int maximum;
rtems_libio_rw_args_t *rw_args;
char *buffer;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
for (count = 0; count < maximum; count++) {
if ( buffer[ count ] == '\n') {
outbyte('\r');
}
outbyte( buffer[ count ] );
}
rw_args->bytes_moved = maximum;
return 0;
}
/*
* IO Control entry point
*/
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
c/src/lib/libbsp/m68k/ods68302/include/bare.h
-244
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@@ -1,244 +0,0 @@
/*****************************************************************************/
/*
Card Definition for a bare board.
This is an example file which actually builds a BSP for a 68302 card
called an MVF (Multi-Voice-Frequency). The card is one of a range
which run in a 100Mbit voice/video/data switch used for high end
applications such as Air Traffic Control. The transport is
FDDI-2. Yes it alive and well and working in real systems.
Chip selects are programmed as required. Three are controlled in the
boot code. They are RAM, ROM, and peripherals. You can optionally
configure the other two chip selects.
SYSTEM_CLOCK - You must defined this. It is used for setting the
baud rate.
CSEL_ROM, CSEL_RAM - Must be defined, and made to be a single number
with brackets.
ROM_WAIT_STATES, RAM_WAIT_STATES - Must be defined. This sets the
speed for the ROM and RAM.
ROM and RAM size is passed on the command line. The makefile holds
them. This allows a single place to defined it. The makefile allows
them to be passed to the linker.
CSEL_1, CSEL_2 - If defined the other macros needed to define the
chip select must be defined. If not defined they are not programmed
and registers are left in the reset state.
Card Specific Devices - The MVF card uses a chip select to address a
range of peripherials (CSEL_2). These include front panel leds, and
4 digit diagnostic display device. Put what ever you need.
LED_CONTROL - If defined the boot code will set leds as it goes.
UPDATE_DISPLAY - A four digit display device will also be updated to
show the boot state.
CARD_PA, CARD_PB - The default configuration, data direction and
data must be specified.
This file allows a range of common parameters which vary from one
variant of card to another to placed in a central file.
*/
/*****************************************************************************/
#ifndef _BARE_H_
#define _BARE_H_
#if __cplusplus
extern "C"
{
#endif
/* name of the card */
#define CARD_ID "m68302-odsbare"
/* speed of the processor */
#define SYSTEM_CLOCK (15360000)
#define SCR_DEFAULT (RBIT_SCR_IPA | RBIT_SCR_HWT | RBIT_SCR_WPV | RBIT_SCR_ADC | \
RBIT_SCR_HWDEN | RBIT_SCR_HWDCN1 | RBIT_SCR_EMWS)
/* define the chip selects */
#define CSEL_ROM 0 /* token pasted so no brackets */
#define ROM_WAIT_STATES (OR_DTACK_1) /* 100nsec at 16MHz */
#define CSEL_RAM 3
#define RAM_WAIT_STATES (OR_DTACK_0) /* 70nsec at 16MHz */
/* The remaining chip selects are called 1 and 2 */
/*
#define CSEL_1 1
#define CSEL_1_BASE (0x00?00000)
#define CSEL_1_SIZE (0x00?00000)
#define CSEL_1_WAIT_STATES (OR_DTACK_1)
*/
#define CSEL_2 2
#define CSEL_2_BASE (0x00800000)
#define CSEL_2_SIZE (0x00040000)
#define CSEL_2_WAIT_STATES (OR_DTACK_EXT)
/*
* Need to define a watchdog period
*/
#define WATCHDOG_TIMEOUT_PERIOD (3000 * 2)
/*
* Console and debug port allocation, 0=SCC1, 2=SCC3
*/
#define CONSOLE_PORT 1
#define CONSOLE_BAUD SCC_9600
#define DEBUG_PORT 2
#define DEBUG_BAUD SCC_57600
/* ----
Parallel Port Configuration, and default data directions
PORT BITS - NAME , WHO , DEFAULT WHAT
------------------------------------------------------------
PPA:: 1: 0 - Serial , PERIPHERAL, -
PPA:: 7: 2 - MVF_PPA:7:2 , IO , INPUTS
PPA:: 9: 8 - Serial , PERIPHERAL, -
PPA::15:10 - MVF_PPB:15:10 , IO , INPUTS
PPB:: 1: 0 - Setup , IO , INPUTS
PPB:: 3: 2 - SYNC_HIGHWAY_1:2 , IO , INPUTS
- SYNC_HIGHWAY_2:3 , IO , INPUTS
PPB:: 4: 4 - HARDWARE_RESET:4 , IO , OUTPUT
PPB:: 6: 5 - SOFTWARE_OVERRIDE_1:6, IO , OUTPUT
- SOFTWARE_OVERRIDE_2:5, IO , OUTPUT
PPB:: 7: 7 - Watchdog , PERIPHERAL, -
PPB::11: 8 - Interrupt , PERIPHERAL, -
PPB::15:12 - Not implemented on the 68302
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
------------------------------------------------------
PACNT 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 = 0x0303
PBCNT - - - - - - - - 1 0 0 0 0 0 0 0 = 0x0080
PADDR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 = 0x0000
PBDDR 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 = 0x0070
PADAT 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 = 0x0000
*/
#define CARD_PA_CONFIGURATION 0x0303
#define CARD_PB_CONFIGURATION 0x0080
#define CARD_PA_DEFAULT_DIRECTIONS 0x0000
#define CARD_PB_DEFAULT_DIRECTIONS 0x0070
#define CARD_PA_DEFAULT_DATA 0x0000
#define CARD_PB_DEFAULT_DATA (HARDWARE_RESET_DISABLE | \
SOFTWARE_OVERRIDE_1_DISABLE | \
SOFTWARE_OVERRIDE_2_DISABLE)
/* these are specific to the card and are not required */
#define HARDWARE_RESET_ENABLE 0x0000
#define HARDWARE_RESET_DISABLE 0x0010
#define SOFTWARE_OVERRIDE_1_ENABLE 0x0000
#define SOFTWARE_OVERRIDE_1_DISABLE 0x0040
#define SOFTWARE_OVERRIDE_2_ENABLE 0x0000
#define SOFTWARE_OVERRIDE_2_DISABLE 0x0020
/*
* Card Specific Devices, these are not required. Add what ever you
* like here.
*/
/* Write */
#define WRITE_REGISTER_8(address, data) \
*((uint8_t*) (address)) = ((uint8_t) (data))
#define WRITE_REGISTER_16(address, data) \
*((uint16_t*) (address)) = ((uint16_t) (data))
#define WRITE_REGISTER_32(address, data) \
*((uint32_t*) (address)) = ((uint32_t) (data))
/* Read */
#define READ_REGISTER_8(address, data) data = *((uint8_t*) (address))
#define READ_REGISTER_16(address, data) data = *((uint16_t*) (address))
#define READ_REGISTER_32(address, data) data = *((uint32_t*) (address))
/* CS2 : Peripherials */
#define PERIPHERIALS_BASE (CSEL_2_BASE)
#define STATUS_REGISTER_BASE (PERIPHERIALS_BASE + 0x00000000)
#define PERIPHERIALS_SIZE (0x00040000)
#define LEDS_BASE (PERIPHERIALS_BASE + 0x00004000)
#define MSC_BASE (PERIPHERIALS_BASE + 0x00008000)
#define SPARE_1_BASE (PERIPHERIALS_BASE + 0x0000C000)
#define DISPLAY_BASE (PERIPHERIALS_BASE + 0x00010000)
#define PIO_INT_BASE (PERIPHERIALS_BASE + 0x00014000)
#define UART_BASE (PERIPHERIALS_BASE + 0x00018000)
#define PIA_BASE (PERIPHERIALS_BASE + 0x0001C000)
#define LED_1 0x0002
#define LED_1_GREEN 0xFFFD
#define LED_1_RED 0xFFFF
#define LED_1_OFF 0xFFFC
#define LED_2 0x0001
#define LED_2_GREEN 0xFFFE
#define LED_2_RED 0xFFFF
#define LED_2_OFF 0xFFFC
#define LED_3 0x0000
#define LED_3_GREEN 0xFFFC
#define LED_3_RED 0xFFFC
#define LED_3_OFF 0xFFFC
#define LED_4 0x0000
#define LED_4_GREEN 0xFFFC
#define LED_4_RED 0xFFFC
#define LED_4_OFF 0xFFFC
#define LED_5 0x0000
#define LED_5_GREEN 0xFFFC
#define LED_5_RED 0xFFFC
#define LED_5_OFF 0xFFFC
#define LED_6 0x0000
#define LED_6_GREEN 0xFFFC
#define LED_6_RED 0xFFFC
#define LED_6_OFF 0xFFFC
#define LED_7 0x0000
#define LED_7_GREEN 0xFFFC
#define LED_7_RED 0xFFFC
#define LED_7_OFF 0xFFFC
#define LED_8 0x0000
#define LED_8_GREEN 0xFFFC
#define LED_8_RED 0xFFFC
#define LED_8_OFF 0xFFFC
#define MAKE_LED(L1, L2, L3, L4) ((L1 & LED_1) | (L2 & LED_2) | (L3 & LED_3) | (L4 & LED_4))
#define LED_CONTROL(L1, L2, L3, L4, L5, L6, L7, L8) \
WRITE_REGISTER_16(LEDS_BASE, MAKE_LED(L1, L2, L3, L4))
/* update the display, needs a long word */
#define UPDATE_DISPLAY(LongWordPtr) \
( WRITE_REGISTER_16(DISPLAY_BASE, *(((uint8_t*) LongWordPtr) + 3)), \
WRITE_REGISTER_16(DISPLAY_BASE + 2, *(((uint8_t*) LongWordPtr) + 2)), \
WRITE_REGISTER_16(DISPLAY_BASE + 4, *(((uint8_t*) LongWordPtr) + 1)), \
WRITE_REGISTER_16(DISPLAY_BASE + 6, *((uint8_t*) LongWordPtr)) )
/* make a better test, say switches */
#if defined(GDB_MONITOR_ACTIVE)
#define GDB_RUN_MONITOR() (1 == 1)
#else
#define GDB_RUN_MONITOR() (1 == 0)
#endif
#if __cplusplus
}
#endif
#endif
c/src/lib/libbsp/m68k/ods68302/include/bsp.h
-100
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@@ -1,100 +0,0 @@
/* bsp.h
*
* This include file contains all board IO definitions.
*/
/*
* COPYRIGHT (c) 1989-2010.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef LIBBSP_M68K_ODS68302_BSP_H
#define LIBBSP_M68K_ODS68302_BSP_H
#ifndef ASM
#include <bspopts.h>
#include <bsp/default-initial-extension.h>
#include <rtems.h>
#include <rtems/console.h>
#include <rtems/iosupp.h>
#include <rtems/clockdrv.h>
#include <rtems/m68k/m68302.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifndef VARIANT
#define VARIANT bare
#endif
#if defined(VARIANT)
#define HQUOTE(a) <a.h>
#include HQUOTE(VARIANT)
#undef HQUOTE
#endif
/* Constants */
#define RAM_START RAM_BASE
#define RAM_END (RAM_BASE + RAM_SIZE)
/* Structures */
#ifdef GEN68302_INIT
#undef EXTERN
#define EXTERN
#else
#undef EXTERN
#define EXTERN extern
#endif
extern rtems_isr_entry M68Kvec[]; /* vector table address */
/* functions */
rtems_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
int type
);
/*
* Prototypes for methods called only from .S files
*/
void boot_phase_1(void);
void boot_phase_2(void);
void boot_phase_3(void);
void trace_exception(
unsigned long d0,
unsigned long d1,
unsigned long d2,
unsigned long d3,
unsigned long d4,
unsigned long d5,
unsigned long d6,
unsigned long d7,
unsigned long a0,
unsigned long a1,
unsigned long a2,
unsigned long a3,
unsigned long a4,
unsigned long a5,
unsigned long a6,
unsigned long a7,
unsigned long sr_pch,
unsigned long pcl_format
);
#ifdef __cplusplus
}
#endif
#endif
#endif
c/src/lib/libbsp/m68k/ods68302/include/coverhd.h
-117
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@@ -1,117 +0,0 @@
/**
* @file
* @ingroup m68k_ods68302
* @brief C Overhead definitions
*/
/*
*
* This include file has defines to represent the overhead associated
* with calling a particular directive from C. These are used in the
* Timing Test Suite to ignore the overhead required to pass arguments
* to directives. On some CPUs and/or target boards, this overhead
* is significant and makes it difficult to distinguish internal
* RTEMS execution time from that used to call the directive.
* This file should be updated after running the C overhead timing
* test. Once this update has been performed, the RTEMS Time Test
* Suite should be rebuilt to account for these overhead times in the
* timing results.
*
* NOTE: If these are all zero, then the times reported include all
* all calling overhead including passing of arguments.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef __COVERHD_h
#define __COVERHD_h
#ifdef __cplusplus
extern "C" {
#endif
#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 14
#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 11
#define CALLING_OVERHEAD_TASK_CREATE 22
#define CALLING_OVERHEAD_TASK_IDENT 17
#define CALLING_OVERHEAD_TASK_START 18
#define CALLING_OVERHEAD_TASK_RESTART 15
#define CALLING_OVERHEAD_TASK_DELETE 12
#define CALLING_OVERHEAD_TASK_SUSPEND 12
#define CALLING_OVERHEAD_TASK_RESUME 12
#define CALLING_OVERHEAD_TASK_SET_PRIORITY 16
#define CALLING_OVERHEAD_TASK_MODE 15
#define CALLING_OVERHEAD_TASK_GET_NOTE 16
#define CALLING_OVERHEAD_TASK_SET_NOTE 16
#define CALLING_OVERHEAD_TASK_WAKE_WHEN 31
#define CALLING_OVERHEAD_TASK_WAKE_AFTER 11
#define CALLING_OVERHEAD_INTERRUPT_CATCH 17
#define CALLING_OVERHEAD_CLOCK_GET 32
#define CALLING_OVERHEAD_CLOCK_SET 31
#define CALLING_OVERHEAD_CLOCK_TICK 8
#define CALLING_OVERHEAD_TIMER_CREATE 13
#define CALLING_OVERHEAD_TIMER_IDENT 12
#define CALLING_OVERHEAD_TIMER_DELETE 14
#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 19
#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 39
#define CALLING_OVERHEAD_TIMER_RESET 12
#define CALLING_OVERHEAD_TIMER_CANCEL 12
#define CALLING_OVERHEAD_SEMAPHORE_CREATE 18
#define CALLING_OVERHEAD_SEMAPHORE_IDENT 12
#define CALLING_OVERHEAD_SEMAPHORE_DELETE 17
#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 17
#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 12
#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 18
#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 17
#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 12
#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 14
#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 14
#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 17
#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 19
#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 14
#define CALLING_OVERHEAD_EVENT_SEND 15
#define CALLING_OVERHEAD_EVENT_RECEIVE 18
#define CALLING_OVERHEAD_SIGNAL_CATCH 14
#define CALLING_OVERHEAD_SIGNAL_SEND 14
#define CALLING_OVERHEAD_PARTITION_CREATE 23
#define CALLING_OVERHEAD_PARTITION_IDENT 17
#define CALLING_OVERHEAD_PARTITION_DELETE 12
#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 15
#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 15
#define CALLING_OVERHEAD_REGION_CREATE 23
#define CALLING_OVERHEAD_REGION_IDENT 14
#define CALLING_OVERHEAD_REGION_DELETE 12
#define CALLING_OVERHEAD_REGION_GET_SEGMENT 21
#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 15
#define CALLING_OVERHEAD_PORT_CREATE 20
#define CALLING_OVERHEAD_PORT_IDENT 14
#define CALLING_OVERHEAD_PORT_DELETE 12
#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 18
#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 18
#define CALLING_OVERHEAD_IO_INITIALIZE 18
#define CALLING_OVERHEAD_IO_OPEN 18
#define CALLING_OVERHEAD_IO_CLOSE 18
#define CALLING_OVERHEAD_IO_READ 18
#define CALLING_OVERHEAD_IO_WRITE 18
#define CALLING_OVERHEAD_IO_CONTROL 18
#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 11
#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 13
#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 14
#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 12
#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 12
#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 14
#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 8
#ifdef __cplusplus
}
#endif
#endif
c/src/lib/libbsp/m68k/ods68302/include/crc.h
-24
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@@ -1,24 +0,0 @@
/*****************************************************************************/
/*
CRC 16 Calculate Interface
*/
/*****************************************************************************/
#ifndef _CRC_H_
#define _CRC_H_
/* ----
F U N C T I O N S
*/
#if __cplusplus
extern "C"
{
#endif
uint16_t calc_crc(void *data, uint32_t count);
#if __cplusplus
}
#endif
#endif
c/src/lib/libbsp/m68k/ods68302/include/debugport.h
-40
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@@ -1,40 +0,0 @@
/*****************************************************************************/
/*
Debug Port Support
*/
/*****************************************************************************/
#if !defined(_DEBUGPORT_H_)
#define _DEBUGPORT_H_
#if __cplusplus
extern "C"
{
#endif
/* normall automatic, only need when re-initialising */
void debug_port_initialise(void);
unsigned char debug_port_status(const unsigned char status);
unsigned char debug_port_in(void);
void debug_port_out(const unsigned char character);
void debug_port_write(const char *buffer);
void debug_port_write_buffer(const char *buffer, unsigned int size);
void debug_port_write_hex_uint(const unsigned int value);
void debug_port_write_hex_ulong(const unsigned long value);
/*
* special banner message for CPU specific boot code,
* initialises the debug port
*/
void debug_port_banner(void);
void debug_port_printf(const char *format, ...);
#if __cplusplus
}
#endif
#endif
c/src/lib/libbsp/m68k/ods68302/include/m68302scc.h
-32
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@@ -1,32 +0,0 @@
/*****************************************************************************/
/*
M68302 Scc Polled Uart Support
*/
/*****************************************************************************/
#if !defined(_M68302SCC_H_)
#define _M68302SCC_H_
#if __cplusplus
extern "C"
{
#endif
#define SCC_4800 (0)
#define SCC_9600 (1)
#define SCC_19200 (2)
#define SCC_38400 (3)
#define SCC_57600 (4)
#define SCC_115700 (5)
void scc_initialise(int channel, int baud_rate, int lf_translate);
unsigned char scc_status(int channel, const unsigned char status);
unsigned char scc_in(int channel);
void scc_out(int channel, const unsigned char character);
#if __cplusplus
}
#endif
#endif
c/src/lib/libbsp/m68k/ods68302/make/custom/ods68302-testsuite.tcfg
-10
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@@ -1,10 +0,0 @@
#
# ods68302 RTEMS Test Database.
#
# Format is one line per test that is _NOT_ built.
#
fileio
fsdosfsname01
iostream
utf8proc01
c/src/lib/libbsp/m68k/ods68302/make/custom/ods68302.cfg
-31
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@@ -1,31 +0,0 @@
#
# Config file for a "ODS 68302" BSP
#
# Differs from the gen68302 by providing most of the boot code as C
# code. This allows separate board definitions to be based on C
# header files. The file is based on the VARIANT defined.
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=m68k
RTEMS_CPU_MODEL=m68302
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
# 68000+softfloat results in gcc 2.95.2 giving default libraries.
# CPU_CFLAGS = -m68302 -msoft-float
CPU_CFLAGS = -mcpu=68302
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
ifeq ($(RTEMS_DEBUGGER),yes)
LINKCMDS=$(PROJECT_RELEASE)/lib/debugrom
else
LINKCMDS=$(PROJECT_RELEASE)/lib/rom
endif
c/src/lib/libbsp/m68k/ods68302/preinstall.am
-91
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@@ -1,91 +0,0 @@
## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES += $(PREINSTALL_DIRS)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES = $(PREINSTALL_FILES)
all-local: $(TMPINSTALL_FILES)
TMPINSTALL_FILES =
CLEANFILES += $(TMPINSTALL_FILES)
$(PROJECT_LIB)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_LIB)
@: > $(PROJECT_LIB)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
$(PROJECT_INCLUDE)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
$(PROJECT_INCLUDE)/bare.h: include/bare.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bare.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bare.h
$(PROJECT_INCLUDE)/crc.h: include/crc.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/crc.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/crc.h
$(PROJECT_INCLUDE)/debugport.h: include/debugport.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/debugport.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/debugport.h
$(PROJECT_INCLUDE)/m68302scc.h: include/m68302scc.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/m68302scc.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/m68302scc.h
$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
$(PROJECT_LIB)/rom: startup/rom $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/rom
PREINSTALL_FILES += $(PROJECT_LIB)/rom
$(PROJECT_LIB)/debugger: startup/debugger $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/debugger
PREINSTALL_FILES += $(PROJECT_LIB)/debugger
c/src/lib/libbsp/m68k/ods68302/start/debugreset.S
-88
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@@ -1,88 +0,0 @@
/*
* Re-written the gen68302 start-up code.
*
* Uses gas syntax only, removed the OAR asm.h.
*
* Supplies a complete vector table in ROM.
*
* Manages all vectors with seperate handlers to trap unhandled
* execptions.
*
* Uses the target specific header file to get the runtime
* configuration
*
* COPYRIGHT (c) 1996
* Objective Design Systems Pty Ltd (ODS)
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
*
*/
|
| Entry from debugger
|
.sect .text
|
| Start
|
| Entered from a hardware reset.
|
.global start | Default entry point for GNU
start:
move.w #0x2700,%sr | Disable all interrupts
|
| zero out uninitialized data area
|
zerobss:
moveal #_clear_end,%a0 | find end of .bss
moveal #_clear_start,%a1 | find beginning of .bss
moveq #0,%d0
zerobss_loop:
movel %d0,%a1@+ | to zero out uninitialized
cmpal %a0,%a1
jlt zerobss_loop | loop until end reached
movel %d0,_stack_init | load stack top
movw #0x3700,%sr | SUPV MODE,INTERRUPTS OFF!!!
movel %d0,%a7 | set master stack pointer
movel %d0,%a6 | set base pointer
jsr boot_phase_3
|
| Initialised data
|
.sect .data
.global start_frame
start_frame:
.space 4,0
|
| Uninitialised data
|
.sect .bss
.global environ
.align 2
environ:
.long 0
.global heap_size
.set heap_size,0x2000
.global stack_size
.set stack_size,0x1000
c/src/lib/libbsp/m68k/ods68302/start/reset.S
-882
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File diff suppressed because it is too large Load Diff
c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c
-140
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@@ -1,140 +0,0 @@
/*****************************************************************************/
/*
Boot the CPU.
Occurs in 3 phases for a 68302.
Phase 1.
Called as soon as able after reset. The BAR has been programed, and
a small stack exists in the DPRAM. All interrupts are masked, and
the processor is running in supervisor mode. No other hardware or
chip selects are active.
This phase programs the chip select registers, the parallel ports
are set into default configurations, and basic registers cleared or
reset. The leds are programmed to show the end of phase 1.
Phase 2.
This is a piece of code which is copied to DPRAM and executed. It
should not do any more thann is currently present. The return to ROM
is managed by modifing the return address. Again leds show the status.
Phase 3.
This code executes with a valid C environment. That is the data
section has been intialised and the bss section set to 0. This phase
performs any special card initialisation and then calls boot card.
*/
/*****************************************************************************/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <rtems/m68k/m68302.h>
#include <debugport.h>
#include <crc.h>
/*
Open the address, reset all registers
*/
extern int ROM_SIZE, ROM_BASE;
extern int RAM_SIZE, RAM_BASE;
#define _ROM_SIZE ((unsigned int)&ROM_SIZE)
#define _ROM_BASE ((unsigned int)&ROM_BASE)
#define _RAM_SIZE ((unsigned int)&RAM_SIZE)
#define _RAM_BASE ((unsigned int)&RAM_BASE)
void boot_phase_1(void)
{
M302_SCR = SCR_DEFAULT;
WRITE_OR(CSEL_ROM, _ROM_SIZE, ROM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
WRITE_BR(CSEL_ROM, _RAM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
WRITE_OR(CSEL_RAM, _RAM_SIZE, RAM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
WRITE_BR(CSEL_RAM, _ROM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
#if defined(CSEL_1)
WRITE_OR(CSEL_1, CSEL_1_SIZE, CSEL_1_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
WRITE_BR(CSEL_1, CSEL_1_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
#endif
#if defined(CSEL_2)
WRITE_OR(CSEL_2, CSEL_2_SIZE, CSEL_2_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
WRITE_BR(CSEL_2, CSEL_2_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
#endif
m302.reg.ipr = m302.reg.imr = m302.reg.isr = 0;
m302.reg.gimr = 0x0080;
m302.reg.simode = 0;
m302.reg.pacnt = CARD_PA_CONFIGURATION;
m302.reg.paddr = CARD_PA_DEFAULT_DIRECTIONS;
m302.reg.padat = CARD_PA_DEFAULT_DATA;
m302.reg.pbcnt = CARD_PB_CONFIGURATION;
m302.reg.pbddr = CARD_PB_DEFAULT_DIRECTIONS;
m302.reg.pbdat = CARD_PB_DEFAULT_DATA;
m302.reg.wrr = WATCHDOG_TIMEOUT_PERIOD | WATCHDOG_ENABLE;
#if defined(LED_CONTROL)
LED_CONTROL(LED_1_RED, LED_2_OFF, LED_3_OFF, LED_4_OFF,
LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF);
#endif
}
/*
Swap the chip select mapping for ROM and RAM
*/
void boot_phase_2(void)
{
uint32_t stack;
#if defined(LED_CONTROL)
LED_CONTROL(LED_1_RED, LED_2_RED, LED_3_OFF, LED_4_OFF,
LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF);
#endif
WRITE_BR(CSEL_ROM, _ROM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
WRITE_BR(CSEL_RAM, _RAM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
#if defined(LED_CONTROL)
LED_CONTROL(LED_1_GREEN, LED_2_RED, LED_3_OFF, LED_4_OFF,
LED_5_OFF, LED_6_OFF, LED_7_OFF, LED_8_OFF);
#endif
/* seems to want 2, looked at assember code output */
*((volatile uint32_t*) (&stack + 2)) |= ROM_BASE;
}
/*
Any pre-main initialisation, the C environment is setup, how-ever C++
static constructors have not been called, and RTEMS is not initialised.
*/
void set_debug_traps(void);
void breakpoint(void);
void boot_phase_3(void)
{
if (GDB_RUN_MONITOR())
{
set_debug_traps();
breakpoint();
}
debug_port_banner();
/* FIXME : add RAM and ROM checks */
/* boot the bsp, what ever this means */
boot_card((void*)0);
WATCHDOG_TRIGGER();
}
c/src/lib/libbsp/m68k/ods68302/startup/crc.c
-86
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@@ -1,86 +0,0 @@
/*****************************************************************************/
/*
CRC 16 Calculation
This module calculates the CRC-16.
*/
/*****************************************************************************/
#include "bsp.h"
#include <rtems/m68k/m68302.h>
#include "crc.h"
/* ----
C O N S T A N T S
*/
static const uint16_t factor[] =
{
0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441,
0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41,
0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840,
0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41,
0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40,
0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640,
0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041,
0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240,
0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441,
0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41,
0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840,
0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41,
0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40,
0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640,
0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041,
0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241,
0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440,
0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40,
0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841,
0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40,
0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41,
0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641,
0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040
};
/*
MACRO : calculates a CRC byte wise
*/
#define NEW_CRC(byte, crc) factor[(byte) ^ ((crc) & 0xFF)] ^ (((crc) >> 8) & 0xFF)
/* ----
CalcCRC
Calculates the CRC value of a block of memory
*/
uint16_t calc_crc(void* vdata, /* pointer to memory block */
uint32_t count) /* length of block in bytes */
{
register uint8_t *data = vdata;
register uint16_t crc;
register uint32_t byte;
/* initialise to either 0x0 or 0xffff depending on the
CRC implementation */
crc = 0;
for (byte = count; byte > 0; byte--)
{
WATCHDOG_TOGGLE();
crc = NEW_CRC(*data++, crc);
}
return crc;
}
c/src/lib/libbsp/m68k/ods68302/startup/debugger
-76
View File
@@ -1,76 +0,0 @@
/*
* MC68302 Linker command file
*/
SECTIONS
{
.text . :
{
text_start = .;
*(.text)
etext = .;
. = ALIGN(4);
__CTOR_LIST__ = .;
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
*(.ctors)
LONG(0)
__CTOR_END__ = .;
. = ALIGN(4);
__DTOR_LIST__ = .;
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
*(.dtors)
LONG(0)
__DTOR_END__ = .;
}
.tdata : {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
}
.tbss : {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
}
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.vtable (ADDR(.text) + SIZEOF(.text)) :
{
vtable_start = .;
*(.vtable)
evtable = .;
}
.data (ADDR(.vtable) + SIZEOF(.vtable)) :
{
data_start = .;
*(.data)
KEEP (*(SORT(.rtemsroset.*)))
KEEP (*(SORT(.rtemsrwset.*)))
edata = .;
}
.bss (ADDR(.data) + SIZEOF(.data)) :
{
bss_start = .;
*(.bss)
*(COMMON)
end = . ;
_end = . ;
}
}
RAM_BASE = DEFINED(RAM_BASE) ? RAM_BASE : 0x00000000;
RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x00100000;
ROM_BASE = DEFINED(ROM_BASE) ? ROM_BASE : 0x00010000;
ROM_SIZE = DEFINED(ROM_SIZE) ? ROM_SIZE : 0x00100000;
MC68302_BASE = DEFINED(MC68302_BASE) ? MC68302_BASE : 0x00700000;
m302 = MC68302_BASE;
_VBR = 0; /* location of the VBR table (in RAM) */
ENTRY(start);
c/src/lib/libbsp/m68k/ods68302/startup/debugport.c
-160
View File
@@ -1,160 +0,0 @@
/*****************************************************************************/
/*
High Level Debug Port Functions
*/
/*****************************************************************************/
#include <stdio.h>
#include <stdarg.h>
#include "debugport.h"
#include "m68302scc.h"
#include "bsp.h"
static int initialised;
void debug_port_initialise(void)
{
scc_initialise(CONSOLE_PORT, CONSOLE_BAUD, FALSE);
#if defined(DEBUG_PORT)
scc_initialise(DEBUG_PORT, DEBUG_BAUD, FALSE);
#endif
}
unsigned char debug_port_status(const unsigned char status)
{
if (!initialised)
{
initialised = 1;
debug_port_initialise();
}
return scc_status(CONSOLE_PORT, status);
}
unsigned char debug_port_in(void)
{
if (!initialised)
{
initialised = 1;
debug_port_initialise();
}
return scc_in(CONSOLE_PORT);
}
void debug_port_out(const unsigned char character)
{
if (!initialised)
{
initialised = 1;
debug_port_initialise();
}
scc_out(CONSOLE_PORT, character);
}
void debug_port_write(const char *buffer)
{
while (*buffer != '\0')
{
debug_port_out(*buffer++);
}
}
void debug_port_write_buffer(const char *buffer, unsigned int size)
{
unsigned int count;
for (count = 0; count < size; count++)
{
debug_port_out(buffer[count]);
}
}
void debug_port_write_hex_uint(const unsigned int value)
{
unsigned int bits = sizeof(value) * 8;
unsigned char c;
do
{
bits -= 4;
c = (unsigned char) ((value >> bits) & 0x0F);
if (c < 10)
{
c += '0';
}
else
{
c += 'a' - 10;
}
debug_port_out((char) c);
}
while (bits);
}
void debug_port_write_hex_ulong(const unsigned long value)
{
unsigned int bits = sizeof(value) * 8;
unsigned char c;
do
{
bits -= 4;
c = (unsigned char) ((value >> bits) & 0x0F);
if (c < 10)
{
c += '0';
}
else
{
c += 'a' - 10;
}
debug_port_out((char) c);
}
while (bits);
}
#define BUFFER_SIZE (256)
static char buffer[BUFFER_SIZE];
void debug_port_printf(const char *format, ...)
{
va_list args;
int written;
/* gain access to the argument list */
va_start(args, format);
/* set the trap */
buffer[BUFFER_SIZE - 2] = '\xAA';
buffer[BUFFER_SIZE - 1] = '\x55';
/* format the string and send to stdout */
written = vsprintf(buffer, format, args);
/* try an trap format buffer overflows */
if ((buffer[BUFFER_SIZE - 2] != '\xAA') ||
(buffer[BUFFER_SIZE - 1] != '\x55'))
{
debug_port_write("debug port buffer overflow, halting...");
DISABLE_WATCHDOG();
while (1 == 1);
}
/* see if an error occurred, if not flush the output buffer */
if (written != -1)
{
debug_port_write_buffer(buffer, written);
}
}
void debug_port_banner(void)
{
#define CARD_LABEL "ods68302-" #VARIANT
debug_port_write("\n\n\r");
debug_port_write(_Copyright_Notice);
debug_port_write("\n\r " CARD_ID "\n\r");
}
c/src/lib/libbsp/m68k/ods68302/startup/gdb-hooks.c
-79
View File
@@ -1,79 +0,0 @@
/*
* Hooks for GDB
*
*/
#include <bsp.h>
#include <rtems/m68k/m68302.h>
#include <m68302scc.h>
static int initialised = 0;
/*
* This file does not intend to make things part of the public interface.
* Methods here are only available to the GDB stub. So prototypes are
* needed to avoid warnings.
*/
void putDebugChar(char ch);
char getDebugChar(void);
void exceptionHandler(unsigned int vector, void *handler);
void putDebugChar(char ch)
{
if (!initialised)
{
scc_initialise(DEBUG_PORT, DEBUG_BAUD, 0);
initialised = 1;
}
scc_out(DEBUG_PORT, ch);
}
char getDebugChar(void)
{
if (!initialised)
{
scc_initialise(DEBUG_PORT, DEBUG_BAUD, 0);
initialised = 1;
}
while (!scc_status(DEBUG_PORT, 0));
return scc_in(DEBUG_PORT);
}
/*
* Need to create yet another jump table for gdb this time
*/
void (*exceptionHook)(unsigned int) = 0;
typedef struct {
uint16_t move_a7; /* move #FORMAT_ID,%a7@- */
uint16_t format_id;
uint16_t jmp; /* jmp _ISR_Handlers */
uint32_t isr_handler;
} GDB_HANDLER_ENTRY;
#if !defined(M68K_MOVE_A7)
#define M68K_MOVE_A7 0x3F3C
#endif
#if !defined(M68K_JMP)
#define M68K_JMP 0x4EF9
#endif
/* points to jsr-exception-table in targets wo/ VBR register */
static GDB_HANDLER_ENTRY gdb_jump_table[256];
void exceptionHandler(unsigned int vector, void *handler)
{
uint32_t *interrupt_table = 0;
gdb_jump_table[vector].move_a7 = M68K_MOVE_A7;
gdb_jump_table[vector].format_id = vector;
gdb_jump_table[vector].jmp = M68K_JMP;
gdb_jump_table[vector].isr_handler = (uint32_t) handler;
interrupt_table[vector] = (uint32_t) &gdb_jump_table[vector];
}
c/src/lib/libbsp/m68k/ods68302/startup/linkcmds
-223
View File
@@ -1,223 +0,0 @@
/*
* MC68302 Linker command file
*
*/
/*
* Declare some sizes.
*/
RamBase = DEFINED(RamBase) ? RamBase : 0x0;
RamSize = DEFINED(RamSize) ? RamSize : 1M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
/*
* Memory map.
*/
RAM_BASE = DEFINED(RAM_BASE) ? RAM_BASE : 0x00000000;
RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x00100000;
ROM_BASE = DEFINED(ROM_BASE) ? ROM_BASE : 0x00C00000;
ROM_SIZE = DEFINED(ROM_SIZE) ? ROM_SIZE : 0x00100000;
MC68302_BASE = DEFINED(MC68302_BASE) ? MC68302_BASE : 0x00700000;
/*
* Declare on-board memory.
*/
MEMORY {
ram : ORIGIN = 0x00000000, LENGTH = 1M
rom : ORIGIN = 0x00C00000, LENGTH = 512K
}
SECTIONS
{
.vtable RAM_BASE :
{
vtable_start = .;
*(.vtable*)
evtable = .;
} >ram
/*
* Text, data and bss segments
*/
.text ROM_BASE : {
/*
* Needs to be first. 8K limit on CS0 at reset.
*/
*(.resettext);
*cpuboot.o(.text*)
/*
* The reset of the text is entered once CS0 is remapped.
*/
*(.text*)
/*
* C++ constructors/destructors
*/
*(.gnu.linkonce.t.*)
/*
* Initialization and finalization code.
*
* Various files can provide initialization and finalization
* functions. crtbegin.o and crtend.o are two instances. The
* body of these functions are in .init and .fini sections. We
* accumulate the bodies here, and prepend function prologues
* from crti.o and function epilogues from crtn.o. crti.o must
* be linked first; crtn.o must be linked last. Because these
* are wildcards, it doesn't matter if the user does not
* actually link against crti.o and crtn.o; the linker won't
* look for a file to match a wildcard. The wildcard also
* means that it doesn't matter which directory crti.o and
* crtn.o are in.
*/
PROVIDE (_init = .);
*crti.o(.init)
*(.init)
*crtn.o(.init)
PROVIDE (_fini = .);
*crti.o(.fini)
*(.fini)
*crtn.o(.fini)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/*
* C++ constructors/destructors
*
* gcc uses crtbegin.o to find the start of the constructors
* and destructors so we make sure it is first. Because this
* is a wildcard, it doesn't matter if the user does not
* actually link against crtbegin.o; the linker won't look for
* a file to match a wildcard. The wildcard also means that
* it doesn't matter which directory crtbegin.o is in. The
* constructor and destructor list are terminated in
* crtend.o. The same comments apply to it.
*/
. = ALIGN (16);
*crtbegin.o(.ctors)
*(.ctors)
*crtend.o(.ctors)
*crtbegin.o(.dtors)
*(.dtors)
*crtend.o(.dtors)
/*
* Exception frame info
*/
. = ALIGN (16);
*(.eh_frame)
/*
* Read-only data
*/
. = ALIGN (16);
_rodata_start = .;
*(.rodata*)
KEEP (*(SORT(.rtemsroset.*)))
*(.gnu.linkonce.r*)
. = ALIGN (16);
PROVIDE (_etext = .);
} >rom
.tdata : {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
} >rom
.tbss : {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
} >rom
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.data (ADDR(.vtable) + SIZEOF(.vtable)) :
AT (ADDR(.tdata) + SIZEOF(.tdata)) {
PROVIDE (_copy_start = .);
*(.data*)
KEEP (*(SORT(.rtemsrwset.*)))
*(.gnu.linkonce.d*)
*(.gcc_except_table*)
*(.jcr)
. = ALIGN (16);
PROVIDE (_edata = .);
PROVIDE (_copy_end = .);
} >ram
.bss (ADDR(.data) + SIZEOF(.data)) : {
_clear_start = .;
*(.dynbss)
*(.bss* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (16);
PROVIDE (end = .);
. += _StackSize;
. = ALIGN (16);
_stack_init = .;
_clear_end = .;
WorkAreaBase = .;
} >ram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* These must appear regardless of . */
}
m302 = MC68302_BASE;
_VBR = ADDR(.vtable); /* location of the VBR table (in RAM) */
c/src/lib/libbsp/m68k/ods68302/startup/m68302scc.c
-146
View File
@@ -1,146 +0,0 @@
/*****************************************************************************/
/*
M68302 SCC Polled Driver
*/
/*****************************************************************************/
#include <bsp.h>
#include <rtems/m68k/m68302.h>
#include <m68302scc.h>
#define M68302_SCC_COUNT (3)
static volatile m302_SCC_t *scc[M68302_SCC_COUNT] = { 0, 0, 0 };
static volatile m302_SCC_Registers_t *scc_reg[M68302_SCC_COUNT] = { 0, 0, 0 };
static int scc_translate[M68302_SCC_COUNT] = { 0, 0, 0 };
static const uint16_t baud_clocks[] =
{
(SYSTEM_CLOCK / ( 4800 * 16)),
(SYSTEM_CLOCK / ( 9600 * 16)),
(SYSTEM_CLOCK / ( 19200 * 16)),
(SYSTEM_CLOCK / ( 38400 * 16)),
(SYSTEM_CLOCK / ( 57600 * 16)),
(SYSTEM_CLOCK / (115700 * 16))
};
void scc_initialise(int channel, int baud, int translate)
{
uint16_t scon;
if (channel < M68302_SCC_COUNT)
{
scc[channel] = &m302.scc1 + channel;
scc_reg[channel] = &m302.reg.scc[channel];
scc_translate[channel] = translate;
scon = (baud_clocks[baud] & 0xF800) == 0 ? 0 : 1;
scon |= (((baud_clocks[baud] / (1 + scon * 3)) - 1) << 1) & 0x0FFE;
scc_reg[channel]->scon = scon;
scc_reg[channel]->scm = 0x0171;
scc[channel]->bd.tx[0].status = 0x2000;
scc[channel]->bd.tx[0].length = 0;
scc[channel]->bd.tx[0].buffer =
(uint8_t*) &(scc[channel]->bd.tx[1].buffer);
scc[channel]->bd.rx[0].status = 0x2000;
scc[channel]->bd.rx[0].length = 0;
scc[channel]->bd.rx[0].buffer =
(uint8_t*) &(scc[channel]->bd.rx[1].buffer);
scc[channel]->parm.rfcr = 0x50;
scc[channel]->parm.tfcr = 0x50;
scc[channel]->parm.mrblr = 0x0001;
scc[channel]->prot.uart.max_idl = 0x0004;
scc[channel]->prot.uart.brkcr = 1;
scc[channel]->prot.uart.parec = 0;
scc[channel]->prot.uart.frmec = 0;
scc[channel]->prot.uart.nosec = 0;
scc[channel]->prot.uart.brkec = 0;
scc[channel]->prot.uart.uaddr1 = 0;
scc[channel]->prot.uart.uaddr2 = 0;
scc[channel]->prot.uart.character[0] = 0x0003;
scc[channel]->prot.uart.character[1] = 0x8000;
scc_reg[channel]->scce = 0xFF;
scc_reg[channel]->sccm = 0x15;
scc_reg[channel]->scm = 0x17d;
}
}
unsigned char scc_status(int channel, unsigned char status)
{
uint16_t rx_status;
m302.reg.wcn = 0;
if ((channel < M68302_SCC_COUNT) && scc[channel])
{
rx_status = scc[channel]->bd.rx[0].status;
if ((rx_status & 0x8000) == 0)
{
if (rx_status & 0x003B)
{
return 2;
}
if (status == 0)
{
return 1;
}
}
}
return 0;
}
unsigned char scc_in(int channel)
{
m302.reg.wcn = 0;
if ((channel < M68302_SCC_COUNT) && scc[channel])
{
if ((scc[channel]->bd.rx[0].status & 0x8000) == 0)
{
unsigned char c;
c = *(scc[channel]->bd.rx[0].buffer);
scc[channel]->bd.rx[0].status = 0xa000;
return c;
}
}
return 0;
}
void scc_out(int channel, unsigned char character)
{
if ((channel < M68302_SCC_COUNT) && scc[channel])
{
do
{
m302.reg.wcn = 0;
}
while (scc[channel]->bd.tx[0].status & 0x8000);
*(scc[channel]->bd.tx[0].buffer) = character;
scc[channel]->bd.tx[0].length = 1;
scc[channel]->bd.tx[0].status = 0xa000;
if (scc_translate[channel])
{
if (character == '\n')
{
scc_out(channel, '\r');
}
}
}
}
c/src/lib/libbsp/m68k/ods68302/startup/m68k-stub.c
-1087
View File
File diff suppressed because it is too large Load Diff
c/src/lib/libbsp/m68k/ods68302/startup/rom
-77
View File
@@ -1,77 +0,0 @@
/*
* MC68302 Linker command file
*/
SECTIONS
{
.text . :
{
text_start = .;
*(.text)
etext = .;
. = ALIGN(4);
__CTOR_LIST__ = .;
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
*(.ctors)
LONG(0)
__CTOR_END__ = .;
. = ALIGN(4);
__DTOR_LIST__ = .;
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
*(.dtors)
LONG(0)
__DTOR_END__ = .;
}
.tdata : {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
}
.tbss : {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
}
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.vtable 0 :
{
vtable_start = .;
*(.vtable)
evtable = .;
}
.data (ADDR(.vtable) + SIZEOF(.vtable)) :
AT (ADDR(.text) + SIZEOF(.text))
{
data_start = .;
*(.data)
KEEP (*(SORT(.rtemsroset.*)))
KEEP (*(SORT(.rtemsrwset.*)))
edata = .;
}
.bss (ADDR(.data) + SIZEOF(.data)) :
{
bss_start = .;
*(.bss)
*(COMMON)
end = . ;
_end = . ;
}
}
RAM_BASE = DEFINED(RAM_BASE) ? RAM_BASE : 0x00000000;
RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x00100000;
ROM_BASE = DEFINED(ROM_BASE) ? ROM_BASE : 0x00C00000;
ROM_SIZE = DEFINED(ROM_SIZE) ? ROM_SIZE : 0x00100000;
MC68302_BASE = DEFINED(MC68302_BASE) ? MC68302_BASE : 0x00700000;
m302 = MC68302_BASE;
_VBR = 0; /* location of the VBR table (in RAM) */
c/src/lib/libbsp/m68k/ods68302/startup/trace.c
-171
View File
@@ -1,171 +0,0 @@
/*
* Trace Exception dumps a back trace to the debug serial port
*
*/
#include <bsp.h>
#include <debugport.h>
#if 0
/* FIXME : could get the string to print when in the BSP */
static const char *exception_names[] =
{
"RESET STACK TOP",
"RESET",
"BUS ERROR",
"ADDRESS ERROR",
"ILLEGAL OPCODE",
"ZERO DIVIDE",
"CHK",
"OVERFLOW",
"PRIVILEGE",
"TRACE",
"LINE 1010 EMULATOR",
"LINE 1111 EMULATOR",
"UNASSIGNED 12",
"UNASSIGNED 13",
"FORMAT ERROR",
"UNINITIALISED INTERRUPT",
"UNASSIGNED 16",
"NODE ANCHOR",
"SYSTEM ANCHOR",
"UNASSIGNED 19",
"UNASSIGNED 20",
"UNASSIGNED 21",
"UNASSIGNED 22",
"UNASSIGNED 23",
"SPURIOUS HANDLER",
"LEVEL 1",
"LEVEL 2",
"LEVEL 3",
"LEVEL 4",
"LEVEL 5",
"LEVEL 6",
"LEVEL 7",
"TRAP 0",
"TRAP 1",
"TRAP 2",
"TRAP 3",
"TRAP 4",
"TRAP 5",
"TRAP 6",
"TRAP 7",
"TRAP 8",
"TRAP 9",
"TRAP 10",
"TRAP 11",
"TRAP 12",
"TRAP 13",
"TRAP 14",
"TRAP 15"
};
#endif
void trace_exception(unsigned long d0,
unsigned long d1,
unsigned long d2,
unsigned long d3,
unsigned long d4,
unsigned long d5,
unsigned long d6,
unsigned long d7,
unsigned long a0,
unsigned long a1,
unsigned long a2,
unsigned long a3,
unsigned long a4,
unsigned long a5,
unsigned long a6,
unsigned long a7,
unsigned long sr_pch,
unsigned long pcl_format)
{
unsigned int sr = sr_pch >> 16;
unsigned long pc = (sr_pch << 16) | (pcl_format >> 16);
unsigned int format = pcl_format & 0xFFFF;
unsigned int index;
unsigned char ch;
__asm__ volatile(" orw #0x0700,%sr");
debug_port_banner();
debug_port_write("unhandled exception=");
debug_port_write_hex_uint(format >> 2);
debug_port_write("\n");
debug_port_write("sr=");
debug_port_write_hex_uint(sr);
debug_port_write(", pc=");
debug_port_write_hex_ulong(pc);
debug_port_write("\n");
for (index = 0; index < 16; index++)
{
if (index == 8)
{
debug_port_write("\n\r");
}
if (index < 8)
{
debug_port_out('d');
debug_port_out('0' + index);
}
else
{
debug_port_out('a');
debug_port_out('0' + index - 8);
}
debug_port_out('=');
debug_port_write_hex_ulong(*(((unsigned long*) &d0) + index));
debug_port_out(' ');
}
for (index = 0; index < (16 * 10); index++)
{
if ((index % 16) == 0)
{
debug_port_write("\n");
debug_port_write_hex_ulong((unsigned long) (((char*) &index) + index));
debug_port_write(" : ");
}
else
{
debug_port_out(' ');
}
ch = (*(((char*) &index) + index) >> 4) & 0x0F;
if (ch < 10)
{
ch += '0';
}
else
{
ch += 'a' - 10;
}
debug_port_out((char) ch);
ch = *(((char*) &index) + index) & 0x0F;
if (ch < 10)
{
ch += '0';
}
else
{
ch += 'a' - 10;
}
debug_port_out((char) ch);
}
debug_port_write("\nhalting cpu...");
#if defined(UPDATE_DISPLAY)
UPDATE_DISPLAY("HALT");
#endif
WATCHDOG_TRIGGER();
while (1 == 1);
}
c/src/lib/libbsp/m68k/ods68302/timer/timer.c
-108
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@@ -1,108 +0,0 @@
/*
*
* This routine initializes TIMER 2 for an MC68302.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <rtems.h>
#include <bsp.h>
#include <rtems/btimer.h>
#include <rtems/m68k/m68302.h>
#define TMR2_VAL 0x071b /* Timer mode register
* (section 3.5.2.1 in 68302 manual)
* 15-8: "7" prescaler divide by 8 (x+1)
* 7-6: 00 dis. intr. on capture event
* 5: 0 active-low pulse
* 4: 1 intr. on reaching reference
* 3: 1 restart counter on reference
* 2-1: 01 master clock input source
* 0: 1 enable timer
*/
#define TRR2_VAL 2000 /* Timer reference register
* (section 3.5.2.2 in 68302 manual)
* 2000 ticks @ (16MHz/1)/8 = 1-ms count
*/
uint32_t Timer_interrupts;
bool benchmark_timer_find_average_overhead;
rtems_isr timerisr(void);
void benchmark_timer_initialize( void )
{
m302.reg.tmr2 = 0; /* disable timer */
Timer_interrupts = 0; /* clear timer ISR count */
m302.reg.trr2 = TRR2_VAL; /* set timer reference register */
m302.reg.tmr2 = TMR2_VAL; /* set timer mode register */
m302.reg.imr |= RBIT_IMR_TIMER2; /* set 68302 int-mask to allow ints */
}
/*
* The following controls the behavior of benchmark_timer_read().
*
* FIND_AVG_OVERHEAD * instructs the routine to return the "raw" count.
*
* AVG_OVEREHAD is the overhead for starting and stopping the timer. It
* is usually deducted from the number returned.
*
* LEAST_VALID is the lowest number this routine should trust. Numbers
* below this are "noise" and zero is returned.
*/
#define AVG_OVERHEAD 0 /* It typically takes X.X microseconds */
/* (Y countdowns) to start/stop the timer. */
/* This value is in microseconds. */
#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */
/*
* Return timer value in 1/2-microsecond units
*/
benchmark_timer_t benchmark_timer_read( void )
{
uint16_t clicks;
uint32_t total;
/*
* Read the timer and see how many clicks it has been since counter
* rolled over.
*/
clicks = m302.reg.tcn2;
/*
* Total is calculated by taking into account the number of timer overflow
* interrupts since the timer was initialized and clicks since the last
* interrupts.
*/
total = (Timer_interrupts * TRR2_VAL) + clicks;
if ( benchmark_timer_find_average_overhead == true )
return total; /* in XXX microsecond units */
if ( total < LEAST_VALID )
return 0; /* below timer resolution */
/*
* Convert 1/2-microsecond count into microseconds
*/
return (total - AVG_OVERHEAD) >> 1;
}
void benchmark_timer_disable_subtracting_average_overhead(
bool find_flag
)
{
benchmark_timer_find_average_overhead = find_flag;
}
c/src/lib/libbsp/m68k/ods68302/timer/timerisr.S
-26
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@@ -1,26 +0,0 @@
/*
* Handle 68302 TIMER2 interrupts.
*
* All code in this routine is pure overhead which can perturb the
* accuracy of RTEMS' timing test suite.
*
* See also: benchmark_timer_read()
*
* To reduce overhead this is best to be the "rawest" hardware interupt
* handler you can write. This should be the only interrupt which can
* occur during the measured time period.
*
* An external counter, Timer_interrupts, is incremented.
*/
#include <rtems/asm.h>
BEGIN_CODE
PUBLIC(timerisr)
SYM(timerisr):
move.w #0x0040,SYM(m302)+2072 | clear interrupt in-service bit
move.b #3,SYM(m302)+2137 | clear timer interrupt event register
addq.l #1,SYM(Timer_interrupts) | increment timer value
rte
END_CODE
END