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copilot/create-ai-agent-rules
27
Commits
| Author | SHA1 | Message | Date | |
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33f8aff9cf |
fix[libcpu][risc-v]:
- Implement _noncache() and _cache() function features; - Correct rt_hw_mmu_setup function for NORMAL_NOCACHE_MEM type property configuration; - Update C908/C906 PTE macro definition configuration; |
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743b614875 |
[components][clock_time] Refactor time subsystem around clock_time (#11111)
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* [components][clock_time] Refactor time subsystem around clock_time Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals. Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional. Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer. * [components][clock_time] Use BSP-provided clock timer frequency on riscv64 * [risc-v] Use runtime clock timer frequency for tick and delays * [bsp] Add clock timer frequency hooks for riscv64 boards * [bsp] Update Renesas RA driver doc clock_timer link * [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh * [bsp][rk3500] Update rk3500 clock configuration * [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays * [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci * [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings. * [bsp][raspi3] select clock time for systimer * [bsp][hpm5300evk] Trim trailing blank line * [bsp][hpm5301evklite] Trim trailing blank line * [bsp][hpm5e00evk] Trim trailing blank line * [bsp][hpm6200evk] Trim trailing blank line * [bsp][hpm6300evk] Trim trailing blank line * [bsp][hpm6750evk] Trim trailing blank line * [bsp][hpm6750evk2] Trim trailing blank line * [bsp][hpm6750evkmini] Trim trailing blank line * [bsp][hpm6800evk] Trim trailing blank line * [bsp][hpm6e00evk] Trim trailing blank line * [bsp][nxp] switch lpc178x to gcc and remove mcx timer source * [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue. * [docs][clock_time] add clock time documentation * [docs][clock_time] Update clock time subsystem documentation - Update device driver index to use correct page reference - Clarify upper layer responsibilities in architecture overview - Update README to describe POSIX/libc, Soft RTC, and device driver usage - Refine architecture diagram with improved layout and color scheme - Remove obsolete clock_timer.md file * [kernel][utest] Trim trailing space * [clock_time] Fix hrtimer wrap handling * [clock_time] fix the static rt_inline issue * [clock_time] fix the rt_clock_hrtimer_control result issue |
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570cc03579 |
[risc-v][common64] Make rt_hw_cpu_shutdown weak to resolve multiple definition with RT_USING_DM (#11100)
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* Initial plan * [risc-v][common64] Make rt_hw_cpu_shutdown weak to fix multiple definition error Co-authored-by: BernardXiong <1241087+BernardXiong@users.noreply.github.com> --------- Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com> Co-authored-by: BernardXiong <1241087+BernardXiong@users.noreply.github.com> |
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acef64ed2a |
[libcpu-riscv]: [surpport SMP]: Add SMP support for qemu-virt64-riscv
1.Add the necessary function declarations for SMP enablement and implement the corresponding functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable, rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock, rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority, rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler. 2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S, add a call to rt_cpus_lock_status_restore to update the scheduler information. 3.If the MMU is enabled, use the .percpu section and record different hartids by configuring special page tables; if the MMU is not enabled, record them directly in the satp register. Additionally, add dynamic startup based on core configuration.The .percpu section is only used when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space waste since no macro guard is added for it in the link script currently. 4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the original +256MB to +128MB. Modify the SConscript file under the common64 directory to include common/atomic_riscv.c in the compilation process. Signed-off-by: Mengchen Teng <teng_mengchen@163.com> |
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30e1e5e9dc |
Reorganize Group names in build system for clarity and IDE integration #10923
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db4fb4c243 |
fix(risc-v, mmu): fix type mismatch of _query
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b27e405faa |
fix(riscv, cpp): remove rt_hw_cpu_id in cpuport.h to fix error
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e7a40ae6ec | [lwp][rv64] restore tp register in arch_thread_signal_enter to fix user-mode memory access | ||
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e3d7bbb47c |
[libcpu][risc-v]:add comment for the round down of symb_pc
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3922ec7e99 | [libcpu][risc-v] fix:only map the 1GB space where the original code segment is located | ||
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312f9dbc08 |
libcpu: riscv: declare external symbols inside
libcpu/risc-v/common64/mmu.c uses the external symbol "__bss_end" (this symbol generally is defined in the link script file) and depends on the extern declaration of this symbol in the bsp's "board.h". This is not a problem in implementation, but it is not a good habit. If this extern symbol is used locally, just declare it locally should be better. In this way, there will be no dependency of the kernel core on the bsp header file. And there will be no special requirements for the bsp board code, such as the need to make extern declarations for these "__bss_end" symbols in "board.h". This patch currently only explicitly externly declares "__bss_end" inside libcpu itself. The code of "#include <board.h>" is kept, because the modification involved is too large, it is necessary to clean up the bsp involved before cleaning this include code line uniformly. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> |
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5c9f61879c |
libcpu: cleanup undefined rt_hw_mmu_kernel_map_init (#10177)
* libcpu: cleanup undefined rt_hw_mmu_kernel_map_init rt_hw_mmu_kernel_map_init() is declared in header files but no definition found, cleanup the code. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> * bsp: allwinner: d1: remove calling of rt_hw_mmu_kernel_map_init rt_hw_mmu_kernel_map_init is an undefined function, calling it is meaningless. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> --------- Signed-off-by: Chen Wang <unicorn_wang@outlook.com> |
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9da813b151 |
[libcpu][risc-v]add code for handling exception scenarios in _unmap_area.
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b04aacbd94 |
[libcpu][risc-v]remove unused parameter 'size' for func _unmap_area.
Signed-off-by: ligr <liguorui1213@163.com> |
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5a09694f05 | [libcpu][risc-v]add comments for rt_hw_mem_setup_early. (#10102) | ||
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7f05592592 |
[libcpu][risc-v]add comments for rv64 sv39 mmu APIs. (#10053)
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8adae0725d |
[bugfix][risc-v]fix the PPN length error in GET_PPN(pte). (#10020)
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2be83d5cad |
libcpu: riscv: fixed ARCH_RISCV_VECTOR issue
description: Using the vector instruction set to trigger an illegal instruction exception when ARCH_SISCV_VECTOR=y. analysis: When initializing the thread stack, the rt_cw_stack_init function did not enable VS for SSTATUS. Solution: When ARCH_SISCV_VECTOR=y, increment the initial value of sstatus by 0x600(SSTATUS_VS). Signed-off-by: Liu Gui <kenneth.liu@sophgo.com> |
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123ed1be1b |
bsp: qemu-virt64-riscv: remove config RISCV_S_MODE
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RISCV_S_MODE configuration only affects the code in libcpu/risc-v/virt64, and the only bsp using this libcpu is qemu-virt64-riscv. Considering s-mode is the default mode RT-Thread running on virt64 machine, it seems unnecessary to make RISCV_S_MODE a Kconfig option. Solution: Remove RISCV_S_MODE from Kconfig and define it as a macro in the code in libcpu/risc-v/virt64. Plus, due to this macro is only related to virt64, rename RISCV_S_MODE to RISCV_VIRT64_S_MODE. Update the .config/rtconfig.h in this patch. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> |
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03a9729eb8 | [libcpu/riscv]解决smp下cpuport.h中的编译问题 (#9714) | ||
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2a684126c0 | [libcpu][riscv]纠正pv_offset的对齐检查 | ||
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2b21b095f9 | [libcpu]riscv使用call指令解决长跳转问题 | ||
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49b6614763 |
[libcpu]添加对riscv vector的支持 (#9531)
[libcpu]添加对riscv vector的支持 |
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523b123995 |
[libcpu][risc-v] fix the bug when using ASID in the RV64 MMU
* (fix) mmu: satp value should be 64-bit Corrected the SATP register to ensure it uses the correct 64-bit format as required by the system architecture. * use __asm__ instead of asm for the GNU C compiler Co-authored-by: Shell <smokewood@qq.com> --------- Co-authored-by: Shell <smokewood@qq.com> |
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65234401f3 |
[libcpu][risc-v]remove the redundant "0x" from the printed information when cpu is in exception (#9516)
Remove redundant '0x' from printed output |
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bf8f7b04b5 | [libcpu][risc-v]add README for RV64 | ||
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57d002b25e |
feat: remove redundant codes under virt64, c906
Changes: - create new folder name `common64` and save all common codes of rv64 inside Signed-off-by: Shell <smokewood@qq.com> |