本次PR涉及①BSP驱动新增②F103库更新③GCC、IAR适配及MDK更新④README文件及由更新驱动引起的脚本改动。 (#5638)

* 本次提交包括①BSP驱动新增②F103库更新③GCC、IAR适配及MDK更新④README文件及由更新驱动引起的脚本改动。详情如下：一、BSP驱动新增这是本次PR的主要目的，现新增了如下BSP驱动： ADC、DAC、RTC、PWM、HWTIMER、I2C、SPI和WDT等八个驱动文件。二、F103库更新：本次提交使用2022年3月初极海官网发布的最新F103库，主要增加了版权声明、USB驱动及其他代码调整。三、编译器适配： 1、新增GCC编译支持，在ENV工具下编译能成功且输出的bin文件能够使开发板闪灯。 2、新增IAR工程支持。 3、由F103的SDK更新，MDK的工程也进行了相应更新。四、其他 1、README文件做了修改，加入了scons编译后的jlink下载说明和官网链接。 2、Kconfig、SConscript脚本根据驱动更新做了修改。 * 格式化代码（AStyle + Formatting） * 增加BSP APM版权声明 * 在ci添加当前bsp的路径，以能够验证gcc能否正常编译 * 路径的“\”改为“/”
2026-05-30 02:57:51 +08:00 · 2022-03-08 12:03:06 +08:00
parent ffae7a2612
commit fb61c7960b
126 changed files with 23083 additions and 4624 deletions
@@ -31,6 +31,7 @@ jobs:
       legs:
         - {RTT_BSP: "acm32f0x0-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "CME_M7", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "apm32/apm32f103xe-minibroard", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "apollo2", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "asm9260t", RTT_TOOL_CHAIN: "sourcery-arm"}
         - {RTT_BSP: "at91sam9260", RTT_TOOL_CHAIN: "sourcery-arm"}
@@ -20,6 +20,33 @@ Path:

 - bsp/acm32f0x0-nucleo/libraries

+### apm32
+
+bsp 列表：
+- apm32f103xe-minibroard
+
+------
+
+License: GEEHY SOFTWARE PACKAGE LICENSE
+
+Copyright: Copyright (C) 2020-2022 Geehy Semiconductor
+
+Path:
+
+- bsp\apm32\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver
+- bsp\apm32\libraries\APM32F10x_Library\Device
+- bsp\apm32\libraries\APM32F10x_Library\USB_Device_Lib
+
+------
+
+License: bsd-new
+
+Copyright (c) 2009-2018 Arm Limited
+
+Path:
+
+- bsp\apm32\libraries\APM32F10x_Library\CMSIS\Include
+
 ### apollo2

 License:  bsd-new
@@ -17,17 +17,18 @@ APM32F103ZE MINI BOARD，采用标准JTAG/SWD调试接口，引出了全部的IO

 ![board](figures/APM32F103ZE.png)

+- 有关开发板和芯片的详情可至极海官网查阅。[官网开发板链接 ](https://www.geehy.com/support/apm32?id=192)


 该开发板常用 **板载资源** 如下：

- MCU：APM32F103C8T6，主频 96MHz，512KB FLASH ，128KB RAM
+- MCU：APM32F103ZET6，主频 96MHz，512KB FLASH ，128KB RAM
 - 外部 RAM：无
 - 外部 FLASH：无
 - 常用外设
  - LED：2个，（黄色，PE5/PE6）
  - 按键：2个，K1（兼具唤醒功能，PA0），K2（PC13）
- 常用接口：RS232转串口、、USB SLAVE
+- 常用接口：RS232转串口、USB SLAVE
 - 调试接口：标准 JTAG/SWD


@@ -42,6 +43,14 @@ APM32F103ZE MINI BOARD，采用标准JTAG/SWD调试接口，引出了全部的IO
 | **片上外设** | **支持情况** | **备注**                              |
 | GPIO         |     支持     | PA0, PA1... PG15 ---> PIN: 0, 1...143 |
 | UART         |     支持     | UART1/2                               |
+| ADC          |     支持     | ADC1/2/3                              |
+| DAC          |     支持     | DAC1                                  |
+| RTC          |     支持     |                                   |
+| TMR          |     支持     | TMR1/2/3/4/5/6/7/8                |
+| PWM          |     支持     | TMR3 ->CH1/2                      |
+| I2C          |     支持     | 软件I2C                           |
+| SPI          |     支持     | SPI1/2/3                          |
+| WDT          |     支持     | IWDT                              |

 ## 使用说明

@@ -57,11 +66,28 @@ APM32F103ZE MINI BOARD，采用标准JTAG/SWD调试接口，引出了全部的IO
 使用数据线连接开发板到 PC，打开电源开关。

 #### 编译下载
+- 方式一：MDK

   双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。

 > 工程默认配置使用 J-Link 仿真器下载程序，在通过 J-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板

+- 方式二：J-Flash下载
+
+  通过ENV工具的scons指令或MDK编译出bin文件后，再使用J-Flash工具将bin文件下载至开发板即可，大致步骤如下：
+
+##### 1、建立J-Flash工程
+
+![board](figures/JFlash_leader_01.png)
+
+##### 2、连接开发板
+
+![board](figures/JFlash_leader_02.png)
+##### 3、将bin文件拖至工程，起始地址设为0x8000000
+![board](figures/JFlash_leader_03.png)
+##### 4、点击下载
+![board](figures/JFlash_leader_04.png)
+
 #### 运行结果

 下载程序成功之后，系统会自动运行，LED 闪烁
@@ -71,7 +97,7 @@ APM32F103ZE MINI BOARD，采用标准JTAG/SWD调试接口，引出了全部的IO
 ```bash
 \ | /
 - RT -     Thread Operating System
- / | \     4.0.4 build Aug 20 2021
+ / | \     4.1.0 build Aug 20 2021
 2006 - 2021 Copyright by rt-thread team
 msh >
 ```
@@ -82,3 +108,5 @@ msh >
 ## 联系人信息

 -[abbbcc ](https://gitee.com/abbbcc)
+
+-[stevetong459 ](https://github.com/stevetong459)
@@ -24,6 +24,155 @@ menu "On-chip Peripheral Drivers"
                default y

        endif
+
+    menuconfig BSP_USING_ADC
+        bool "Enable ADC"
+        default n
+        select RT_USING_ADC
+        if BSP_USING_ADC
+            config BSP_USING_ADC1
+                bool "Enable ADC1"
+                default n
+            config BSP_USING_ADC2
+                bool "Enable ADC2"
+                default n
+            config BSP_USING_ADC3
+                bool "Enable ADC3"
+                default n
+        endif
+
+    menuconfig BSP_USING_DAC
+        bool "Enable DAC"
+        default n
+        select RT_USING_DAC
+        if BSP_USING_DAC
+            config BSP_USING_DAC1
+                bool "Enable DAC1"
+                default n
+        endif
+
+    menuconfig BSP_USING_ONCHIP_RTC
+        bool "Enable RTC"
+        select RT_USING_RTC
+        default n
+        if BSP_USING_ONCHIP_RTC
+            choice
+                prompt "Select clock source"
+                default BSP_RTC_USING_LSE
+
+                config BSP_RTC_USING_LSE
+                    bool "RTC USING LSE"
+
+                config BSP_RTC_USING_LSI
+                    bool "RTC USING LSI"
+            endchoice
+        endif
+
+    menuconfig BSP_USING_I2C1
+        bool "Enable I2C1 BUS (software simulation)"
+        default n
+        select RT_USING_I2C
+        select RT_USING_I2C_BITOPS
+        select RT_USING_PIN
+        if BSP_USING_I2C1
+            config BSP_I2C1_SCL_PIN
+                int "i2c1 scl pin number"
+                range 0 63
+                default 22
+            config BSP_I2C1_SDA_PIN
+                int "I2C1 sda pin number"
+                range 0 63
+                default 23
+        endif
+
+    menuconfig BSP_USING_SPI
+        bool "Enable SPI"
+        default n
+        select RT_USING_SPI
+        if BSP_USING_SPI
+            config BSP_USING_SPI1
+                bool "Enable SPI1"
+                default n
+
+            config BSP_USING_SPI2
+                bool "Enable SPI2"
+                default n
+
+            config BSP_USING_SPI3
+                bool "Enable SPI3"
+                default n
+        endif
+
+    menuconfig BSP_USING_TMR
+        bool "Enable Timer"
+        default n
+        select RT_USING_HWTIMER
+        if BSP_USING_TMR
+            config BSP_USING_TMR1
+                bool "Enable TMR1"
+                default n
+
+            config BSP_USING_TMR2
+                bool "Enable TMR2"
+                default n
+
+            config BSP_USING_TMR3
+                bool "Enable TMR3"
+                default n
+
+            config BSP_USING_TMR4
+                bool "Enable TMR4"
+                default n
+
+            config BSP_USING_TMR5
+                bool "Enable TMR5"
+                default n
+
+            config BSP_USING_TMR6
+                bool "Enable TMR6"
+                default n
+
+            config BSP_USING_TMR7
+                bool "Enable TMR7"
+                default n
+
+            config BSP_USING_TMR8
+                bool "Enable TMR8"
+                default n
+        endif
+
+    menuconfig BSP_USING_PWM
+        bool "Enable PWM"
+        default n
+        select RT_USING_PWM
+        if BSP_USING_PWM
+        menuconfig BSP_USING_PWM3
+            bool "Enable timer3 output pwm"
+            default n
+            if BSP_USING_PWM3
+                config BSP_USING_PWM3_CH1
+                    bool "Enable PWM3 channel1"
+                    default n
+
+                config BSP_USING_PWM3_CH2
+                    bool "Enable PWM3 channel2"
+                    default n
+
+                config BSP_USING_PWM3_CH3
+                    bool "Enable PWM3 channel3"
+                    default n
+
+                config BSP_USING_PWM3_CH4
+                    bool "Enable PWM3 channel4"
+                    default n
+            endif
+        endif
+
+    config BSP_USING_WDT
+        bool "Enable Watchdog Timer"
+        select RT_USING_WDT
+        default n
+
 endmenu

 endmenu
@@ -16,9 +16,15 @@ path =  [cwd]
 startup_path_prefix = SDK_LIB

 if rtconfig.CROSS_TOOL == 'keil':
-    src += [startup_path_prefix + '/APM32F10x_Library/Device/Geehy/APM32F10x/Source/ARM/startup_apm32f10x_hd.s']
+    src += [startup_path_prefix + '/APM32F10x_Library/Device/Geehy/APM32F10x/Source/arm/startup_apm32f10x_hd.s']
+
+if rtconfig.CROSS_TOOL == 'iar':
+    src += [startup_path_prefix + '/APM32F10x_Library/Device/Geehy/APM32F10x/Source/iar/startup_apm32f10x_hd.s']
+
+if rtconfig.CROSS_TOOL == 'gcc':
+    src += [startup_path_prefix + '/APM32F10x_Library/Device/Geehy/APM32F10x/Source/gcc/startup_apm32f10x_hd.s']

 # You can select chips from the list above
-CPPDEFINES = ['APM32F103xE']
+CPPDEFINES = ['APM32F10X_HD']
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
 Return('group')
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
@@ -1,11 +1,12 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2022, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author         Notes
 * 2020-08-20     Abbcc          first version
+ * 2022-03-04     stevetong459   Add head file of new driver
 */

 #ifndef __BOARD_H__
@@ -21,6 +22,27 @@
 #include "apm32f10x_eint.h"
 #include "apm32f10x_usart.h"

+#if defined(RT_USING_ADC)
+    #include "apm32f10x_adc.h"
+#endif
+#if defined(RT_USING_DAC)
+    #include "apm32f10x_dac.h"
+#endif
+#if defined(RT_USING_RTC)
+    #include "apm32f10x_rtc.h"
+    #include "apm32f10x_pmu.h"
+#endif
+#if defined(RT_USING_SPI)
+    #include "apm32f10x_spi.h"
+#endif
+#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM)
+    #include "apm32f10x_tmr.h"
+#endif
+#if defined(RT_USING_WDT)
+    #include "apm32f10x_iwdt.h"
+    #include "apm32f10x_wwdt.h"
+#endif
+
 #include "drv_common.h"
 #include "drv_gpio.h"

@@ -0,0 +1,28 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x2001FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x0400;
+define symbol __ICFEDIT_size_heap__   = 0x0000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite, last block CSTACK};
@@ -0,0 +1,141 @@
+/*
+ * linker script for APM32F10x with GNU ld
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+    CODE (rx) : ORIGIN = 0x08000000, LENGTH = 512k /* 512KB flash */
+    DATA (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128KB sram */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x200;
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(4);
+
+        . = ALIGN(4);
+        _etext = .;
+    } > CODE = 0
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > CODE
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >DATA
+
+    .stack : 
+    {
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >DATA
+
+    __bss_start = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+        
+        *(.bss.init)
+    } > DATA
+    __bss_end = .;
+
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\project.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+
@@ -13,7 +13,7 @@
        <TargetCommonOption>
          <Device>APM32F103ZE</Device>
          <Vendor>Geehy</Vendor>
-          <PackID>Geehy.APM32F1xx_DFP.1.0.7</PackID>
+          <PackID>Geehy.APM32F1xx_DFP.1.0.8</PackID>
          <PackURL>https://www.geehy.com/uploads/tool/</PackURL>
          <Cpu>IRAM(0x20000000,0x00020000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
          <FlashUtilSpec />
@@ -182,7 +182,6 @@
            <uocXRam>0</uocXRam>
            <RvdsVP>0</RvdsVP>
            <RvdsMve>0</RvdsMve>
-            <RvdsCdeCp>0</RvdsCdeCp>
            <hadIRAM2>0</hadIRAM2>
            <hadIROM2>0</hadIROM2>
            <StupSel>8</StupSel>
@@ -334,9 +333,9 @@
            <v6Rtti>0</v6Rtti>
            <VariousControls>
              <MiscControls />
-              <Define>USE_STDPERIPH_DRIVER, __RTTHREAD__, APM32F103xE, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND</Define>
+              <Define>USE_STDPERIPH_DRIVER, APM32F10X_HD, __RTTHREAD__, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND</Define>
              <Undefine />
-              <IncludePath>applications;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\Drivers;..\libraries\Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include;..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc;..\libraries\APM32F10x_Library\CMSIS\Include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel</IncludePath>
+              <IncludePath>applications;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\nogcc;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\Drivers;..\libraries\Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Include;..\libraries\APM32F10x_Library\APM32F10x_StdPeriphDriver\inc;..\libraries\APM32F10x_Library\CMSIS\Include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel</IncludePath>
            </VariousControls>
          </Cads>
          <Aads>
@@ -349,7 +348,7 @@
            <NoWarn>0</NoWarn>
            <uSurpInc>0</uSurpInc>
            <useXO>0</useXO>
-            <ClangAsOpt>4</ClangAsOpt>
+            <uClangAs>0</uClangAs>
            <VariousControls>
              <MiscControls />
              <Define />
@@ -391,9 +390,9 @@
          <GroupName>Compiler</GroupName>
          <Files>
            <File>
-              <FileName>syscalls.c</FileName>
+              <FileName>libc_syms.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
+              <FilePath>..\..\..\components\libc\compilers\armlibc\libc_syms.c</FilePath>
            </File>
          </Files>
          <Files>
@@ -405,9 +404,9 @@
          </Files>
          <Files>
            <File>
-              <FileName>stdlib.c</FileName>
+              <FileName>syscalls.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\components\libc\compilers\common\stdlib.c</FilePath>
+              <FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
            </File>
          </Files>
          <Files>
@@ -417,6 +416,13 @@
              <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath>
            </File>
          </Files>
+          <Files>
+            <File>
+              <FileName>stdlib.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\libc\compilers\common\stdlib.c</FilePath>
+            </File>
+          </Files>
        </Group>
        <Group>
          <GroupName>CPU</GroupName>
@@ -429,16 +435,16 @@
          </Files>
          <Files>
            <File>
-              <FileName>div0.c</FileName>
+              <FileName>backtrace.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
+              <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
            </File>
          </Files>
          <Files>
            <File>
-              <FileName>backtrace.c</FileName>
+              <FileName>div0.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
            </File>
          </Files>
          <Files>
@@ -458,55 +464,6 @@
        </Group>
        <Group>
          <GroupName>DeviceDrivers</GroupName>
-          <Files>
-            <File>
-              <FileName>completion.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>ringbuffer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>waitqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>dataqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>pipe.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>workqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\workqueue.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>ringblk_buf.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
-            </File>
-          </Files>
          <Files>
            <File>
              <FileName>pin.c</FileName>
@@ -521,21 +478,70 @@
              <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
            </File>
          </Files>
+          <Files>
+            <File>
+              <FileName>ringbuffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pipe.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ringblk_buf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>workqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dataqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>waitqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>completion.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
+            </File>
+          </Files>
        </Group>
        <Group>
          <GroupName>Drivers</GroupName>
          <Files>
            <File>
-              <FileName>startup_apm32f10x_hd.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Source\ARM\startup_apm32f10x_hd.s</FilePath>
+              <FileName>board.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\board.c</FilePath>
            </File>
          </Files>
          <Files>
            <File>
-              <FileName>board.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>board\board.c</FilePath>
+              <FileName>startup_apm32f10x_hd.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\libraries\APM32F10x_Library\Device\Geehy\APM32F10x\Source\arm\startup_apm32f10x_hd.s</FilePath>
            </File>
          </Files>
          <Files>
@@ -588,16 +594,37 @@
          <GroupName>Kernel</GroupName>
          <Files>
            <File>
-              <FileName>clock.c</FileName>
+              <FileName>thread.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\src\clock.c</FilePath>
+              <FilePath>..\..\..\src\thread.c</FilePath>
            </File>
          </Files>
          <Files>
            <File>
-              <FileName>kservice.c</FileName>
+              <FileName>mempool.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\src\kservice.c</FilePath>
+              <FilePath>..\..\..\src\mempool.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\timer.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\object.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\clock.c</FilePath>
            </File>
          </Files>
          <Files>
@@ -630,9 +657,16 @@
          </Files>
          <Files>
            <File>
-              <FileName>mempool.c</FileName>
+              <FileName>kservice.c</FileName>
              <FileType>1</FileType>
-              <FilePath>..\..\..\src\mempool.c</FilePath>
+              <FilePath>..\..\..\src\kservice.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\irq.c</FilePath>
            </File>
          </Files>
          <Files>
@@ -642,20 +676,6 @@
              <FilePath>..\..\..\src\components.c</FilePath>
            </File>
          </Files>
-          <Files>
-            <File>
-              <FileName>thread.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\thread.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>object.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\object.c</FilePath>
-            </File>
-          </Files>
          <Files>
            <File>
              <FileName>idle.c</FileName>
@@ -663,20 +683,6 @@
              <FilePath>..\..\..\src\idle.c</FilePath>
            </File>
          </Files>
-          <Files>
-            <File>
-              <FileName>timer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\timer.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>irq.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\irq.c</FilePath>
-            </File>
-          </Files>
        </Group>
        <Group>
          <GroupName>Libraries</GroupName>
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\template.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rt-thread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\keil\List\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>4</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U59701291 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0APM32F10x_512.FLM -FS08000000 -FL080000 -FP0($$Device:APM32F103ZE$Flash\APM32F10x_512.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0APM32F10x_512 -FS08000000 -FL080000 -FP0($$Device:APM32F103ZE$Flash\APM32F10x_512.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Source Group 1</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+  </Group>
+
+</ProjectOpt>
@@ -16,7 +16,7 @@
        <TargetCommonOption>
          <Device>APM32F103ZE</Device>
          <Vendor>Geehy</Vendor>
-          <PackID>Geehy.APM32F1xx_DFP.1.0.7</PackID>
+          <PackID>Geehy.APM32F1xx_DFP.1.0.8</PackID>
          <PackURL>https://www.geehy.com/uploads/tool/</PackURL>
          <Cpu>IRAM(0x20000000,0x00020000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
          <FlashUtilSpec></FlashUtilSpec>
@@ -185,7 +185,6 @@
            <uocXRam>0</uocXRam>
            <RvdsVP>0</RvdsVP>
            <RvdsMve>0</RvdsMve>
-            <RvdsCdeCp>0</RvdsCdeCp>
            <hadIRAM2>0</hadIRAM2>
            <hadIROM2>0</hadIROM2>
            <StupSel>8</StupSel>
@@ -352,7 +351,7 @@
            <NoWarn>0</NoWarn>
            <uSurpInc>0</uSurpInc>
            <useXO>0</useXO>
-            <ClangAsOpt>4</ClangAsOpt>
+            <uClangAs>0</uClangAs>
            <VariousControls>
              <MiscControls></MiscControls>
              <Define></Define>
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the ADC firmware library
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_ADC_H
 #define __APM32F10X_ADC_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -62,7 +76,7 @@ typedef enum
    ADC_EXT_TRIG_CONV_None            = ((uint32_t)0x000E0000),

    ADC_EXT_TRIG_CONV_TMR3_CC1        = ((uint32_t)0x00000000),
-    ADC_EXT_TRIG_CONV_TMR2_CC3        = ((uint32_t)0x00030000),
+    ADC_EXT_TRIG_CONV_TMR2_CC3        = ((uint32_t)0x00020000),
    ADC_EXT_TRIG_CONV_TMR8_CC1        = ((uint32_t)0x00060000),
    ADC_EXT_TRIG_CONV_TMR8_TRGO       = ((uint32_t)0x00080000),
    ADC_EXT_TRIG_CONV_TMR5_CC1        = ((uint32_t)0x000A0000),
@@ -110,15 +124,15 @@ typedef enum
 */
 typedef enum
 {
-    ADC_SAMPLE_TIME_1_5   = ((uint8_t)0x00),
-    ADC_SAMPLE_TIME_7_5   = ((uint8_t)0x01),
-    ADC_SAMPLE_TIME_13_5  = ((uint8_t)0x02),
-    ADC_SAMPLE_TIME_28_5  = ((uint8_t)0x03),
-    ADC_SAMPLE_TIME_41_5  = ((uint8_t)0x04),
-    ADC_SAMPLE_TIME_55_5  = ((uint8_t)0x05),
-    ADC_SAMPLE_TIME_71_5  = ((uint8_t)0x06),
-    ADC_SAMPLE_TIME_239_5 = ((uint8_t)0x07)
-} ADC_SAMPLE_TIME_T;
+    ADC_SAMPLETIME_1CYCLES5   = ((uint8_t)0x00),
+    ADC_SAMPLETIME_7CYCLES5   = ((uint8_t)0x01),
+    ADC_SAMPLETIME_13CYCLES5  = ((uint8_t)0x02),
+    ADC_SAMPLETIME_28CYCLES5  = ((uint8_t)0x03),
+    ADC_SAMPLETIME_41CYCLES5  = ((uint8_t)0x04),
+    ADC_SAMPLETIME_55CYCLES5  = ((uint8_t)0x05),
+    ADC_SAMPLETIME_71CYCLES5  = ((uint8_t)0x06),
+    ADC_SAMPLETIME_239CYCLES5 = ((uint8_t)0x07)
+} ADC_SAMPLETIME_T;

 /**
 * @brief    ADC external trigger sources for injected channels conversion
@@ -269,7 +283,7 @@ void ADC_DisableSoftwareStartConv(ADC_T* adc);
 uint8_t ADC_ReadSoftwareStartConvStatus(ADC_T *adc);

 /** ADC Discontinuous mode */
-void ADC_ConfigDiscModeChannel(ADC_T* adc, uint8_t number);
+void ADC_ConfigDiscMode(ADC_T *adc, uint8_t number);
 void ADC_EnableDiscMode(ADC_T *adc);
 void ADC_DisableDiscMode(ADC_T *adc);

@@ -282,8 +296,8 @@ uint16_t ADC_ReadConversionValue(ADC_T* adc);
 uint32_t ADC_ReadDualModeConversionValue(ADC_T *adc);

 /** ADC Automatic injected group */
-void ADC_EnableInjectedConv(ADC_T* adc);
-void ADC_DisableInjectedConv(ADC_T* adc);
+void ADC_EnableAutoInjectedConv(ADC_T *adc);
+void ADC_DisableAutoInjectedConv(ADC_T *adc);
 void ADC_EnableInjectedDiscMode(ADC_T *adc);
 void ADC_DisableInjectedDiscMode(ADC_T *adc);

@@ -318,8 +332,8 @@ void ADC_EnableInterrupt(ADC_T* adc, uint16_t interrupt);
 void ADC_DisableInterrupt(ADC_T *adc, uint16_t interrupt);
 uint8_t ADC_ReadStatusFlag(ADC_T *adc, ADC_FLAG_T flag);
 void ADC_ClearStatusFlag(ADC_T *adc, uint8_t flag);
-uint8_t ADC_ReadIntFlag(ADC_T* adc, ADC_INT_T interrupt);
-void ADC_ClearIntFlag(ADC_T* adc, uint16_t interrupt);
+uint8_t ADC_ReadIntFlag(ADC_T *adc, ADC_INT_T flag);
+void ADC_ClearIntFlag(ADC_T *adc, uint16_t flag);

 /**@} end of group ADC_Fuctions*/
 /**@} end of group ADC_Driver*/
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the BAKPR firmware library.
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_BAKPR_H
 #define __APM32F10X_BAKPR_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the CAN firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_CAN_H
 #define __APM32F10X_CAN_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -35,10 +49,10 @@ extern "C" {
 */
 typedef enum
 {
-    CAN_MODE_NORMAL          = ((uint8_t)00),  //!< normal mode
-    CAN_MODE_LOOPBACK        = ((uint8_t)01),  //!< loopback mode
-    CAN_MODE_SILENT          = ((uint8_t)02),  //!< silent mode
-    CAN_MODE_SILENT_LOOPBACK = ((uint8_t)03),  //!< loopback combined with silent mode
+    CAN_MODE_NORMAL          = ((uint8_t)0x00),  //!< normal mode
+    CAN_MODE_LOOPBACK        = ((uint8_t)0x01),  //!< loopback mode
+    CAN_MODE_SILENT          = ((uint8_t)0x02),  //!< silent mode
+    CAN_MODE_SILENT_LOOPBACK = ((uint8_t)0x03)   //!< loopback combined with silent mode
 } CAN_MODE_T;

 /**
@@ -46,10 +60,10 @@ typedef enum
 */
 typedef enum
 {
-    CAN_SJW_1 = ((uint8_t)00),  //!< 1 time quantum
-    CAN_SJW_2 = ((uint8_t)01),  //!< 2 time quantum
-    CAN_SJW_3 = ((uint8_t)02),  //!< 3 time quantum
-    CAN_SJW_4 = ((uint8_t)03)   //!< 4 time quantum
+    CAN_SJW_1 = ((uint8_t)0x00),  //!< 1 time quantum
+    CAN_SJW_2 = ((uint8_t)0x01),  //!< 2 time quantum
+    CAN_SJW_3 = ((uint8_t)0x02),  //!< 3 time quantum
+    CAN_SJW_4 = ((uint8_t)0x03)   //!< 4 time quantum
 } CAN_SJW_T;

 /**
@@ -87,7 +101,7 @@ typedef enum
    CAN_TIME_SEGMENT2_5 = (uint8_t)0x04,     //!< 5  time quanta
    CAN_TIME_SEGMENT2_6 = (uint8_t)0x05,     //!< 6  time quanta
    CAN_TIME_SEGMENT2_7 = (uint8_t)0x06,     //!< 7  time quanta
-    CAN_TIME_SEGMENT2_8 = (uint8_t)0x07,     //!< 8  time quanta
+    CAN_TIME_SEGMENT2_8 = (uint8_t)0x07      //!< 8  time quanta
 } CAN_TIME_SEGMENT2_T;

 /**
@@ -96,7 +110,7 @@ typedef enum
 typedef enum
 {
    CAN_FILTER_FIFO_0 = ((uint8_t)0x00),     //!< filter FIFO 0
-    CAN_FILTER_FIFO_1 = ((uint8_t)0x01),     //!< filter FIFO 1
+    CAN_FILTER_FIFO_1 = ((uint8_t)0x01)      //!< filter FIFO 1
 } CAN_FILTER_FIFO_T;

 /**
@@ -104,8 +118,8 @@ typedef enum
 */
 typedef enum
 {
-    CAN_FILTER_MODE_IDMASK = ((uint8_t)00),  //!< identifier/mask mode
-    CAN_FILTER_MODE_IDLIST = ((uint8_t)01)   //!< identifier list mode
+    CAN_FILTER_MODE_IDMASK = ((uint8_t)0x00),//!< identifier/mask mode
+    CAN_FILTER_MODE_IDLIST = ((uint8_t)0x01) //!< identifier list mode
 } CAN_FILTER_MODE_T;

 /**
@@ -114,7 +128,7 @@ typedef enum
 typedef enum
 {
    CAN_FILTER_SCALE_16BIT = ((uint8_t)0x00), //!< Two 16-bit filters
-    CAN_FILTER_SCALE_32BIT = ((uint8_t)0x01), //!< One 32-bit filter
+    CAN_FILTER_SCALE_32BIT = ((uint8_t)0x01)  //!< One 32-bit filter
 } CAN_FILTER_SCALE_T;

 /**
@@ -142,7 +156,7 @@ typedef enum
 {
    CAN_TX_MAILBIX_0 = ((uint8_t)0x00), //!< Tx mailbox0
    CAN_TX_MAILBIX_1 = ((uint8_t)0x01), //!< Tx mailbox1
-    CAN_TX_MAILBIX_2 = ((uint8_t)0x02), //!< Tx mailbox2
+    CAN_TX_MAILBIX_2 = ((uint8_t)0x02)  //!< Tx mailbox2
 } CAN_TX_MAILBIX_T;

 /**
@@ -151,7 +165,7 @@ typedef enum
 typedef enum
 {
    CAN_RX_FIFO_0 = ((uint8_t)0x00), //!< receive FIFO 0
-    CAN_RX_FIFO_1 = ((uint8_t)0x01), //!< receive FIFO 1
+    CAN_RX_FIFO_1 = ((uint8_t)0x01)  //!< receive FIFO 1
 } CAN_RX_FIFO_T;

 /**
@@ -159,9 +173,9 @@ typedef enum
 */
 typedef enum
 {
-    CAN_OPERATING_MODE_INIT   = ((uint8_t)00), //!< Initialization mode
-    CAN_OPERATING_MODE_NORMAL = ((uint8_t)01), //!< Normal mode
-    CAN_OPERATING_MODE_SLEEP  = ((uint8_t)02), //!< sleep mode
+    CAN_OPERATING_MODE_INIT   = ((uint8_t)0x00), //!< Initialization mode
+    CAN_OPERATING_MODE_NORMAL = ((uint8_t)0x01), //!< Normal mode
+    CAN_OPERATING_MODE_SLEEP  = ((uint8_t)0x02)  //!< sleep mode
 } CAN_OPERATING_MODE_T;

 /**
@@ -223,7 +237,6 @@ typedef enum
 */
 typedef struct
 {
-    uint8_t      timeTrigComMode;     //!< Enable or disable the time triggered communication mode.
    uint8_t      autoBusOffManage;    //!< Enable or disable the automatic bus-off management.
    uint8_t      autoWakeUpMode;      //!< Enable or disable the automatic wake-up mode.
    uint8_t      nonAutoRetran;       //!< Enable or disable the non-automatic retransmission mode.
@@ -249,7 +262,7 @@ typedef struct
    CAN_RTXR_T          remoteTxReq;
    uint8_t             dataLengthCode;//!< Specifies the data length code.       It can be 0 to 8.
    uint8_t             data[8];       //!< Specifies the data to be transmitted. It can be 0 to 0xFF.
-} CAN_TX_MESSAGE_T;
+} CAN_TxMessage_T;

 /**
 * @brief  CAN Rx message structure definition
@@ -263,7 +276,7 @@ typedef struct
    uint8_t             dataLengthCode;  //!< Specifies the data length code.       It can be 0 to 8.
    uint8_t             data[8];         //!< Specifies the data to be transmitted. It can be 0 to 0xFF.
    uint8_t             filterMatchIndex;//!< Specifies the filter match index.     It can be 0 to 0xFF.
-} CAN_RX_MESSAGE_T;
+} CAN_RxMessage_T;

 /**
 * @brief     CAN filter config structure definition
@@ -279,7 +292,7 @@ typedef struct
    CAN_FILTER_FIFO_T   filterFIFO;
    CAN_FILTER_MODE_T   filterMode;
    CAN_FILTER_SCALE_T  filterScale;
-} CAN_FILTER_CONFIG_T;
+} CAN_FilterConfig_T;

 /**@} end of group CAN_Structure*/

@@ -291,20 +304,19 @@ typedef struct
 /** CAN reset and configuration */
 void CAN_Reset(CAN_T *can);
 uint8_t CAN_Config(CAN_T *can, CAN_Config_T *canConfig);
-void CAN_ConfigFilter(CAN_T* can, CAN_FILTER_CONFIG_T* filterConfig);
+void CAN_ConfigFilter(CAN_T *can, CAN_FilterConfig_T *filterConfig);
 void CAN_ConfigStructInit(CAN_Config_T *canConfig);
 void CAN_EnableDBGFreeze(CAN_T *can);
 void CAN_DisableDBGFreeze(CAN_T *can);
-void CAN_EnableTTCComMode(CAN_T* can);
-void CAN_DisableTTCComMode(CAN_T* can);
+void CAN_SlaveStartBank(CAN_T *can, uint8_t bankNum);

 /** CAN frames transmit */
-uint8_t CAN_TxMessage(CAN_T* can, CAN_TX_MESSAGE_T* TxMessage);
+uint8_t CAN_TxMessage(CAN_T *can, CAN_TxMessage_T *TxMessage);
 uint8_t CAN_TxMessageStatus(CAN_T *can, CAN_TX_MAILBIX_T TxMailbox);
 void CAN_CancelTxMailbox(CAN_T *can, CAN_TX_MAILBIX_T TxMailbox);

 /** CAN frames receive */
-void CAN_RxMessage(CAN_T* can, CAN_RX_FIFO_T FIFONumber, CAN_RX_MESSAGE_T* RxMessage);
+void CAN_RxMessage(CAN_T *can, CAN_RX_FIFO_T FIFONumber, CAN_RxMessage_T *RxMessage);
 void CAN_ReleaseFIFO(CAN_T *can, CAN_RX_FIFO_T FIFONumber);
 uint8_t CAN_PendingMessage(CAN_T *can, CAN_RX_FIFO_T FIFONumber);

@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the CRC firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_CRC_H
 #define __APM32F10X_CRC_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the DAC firmware library
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_DAC_H
 #define __APM32F10X_DAC_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -71,30 +85,30 @@ typedef enum
 typedef enum
 {
    DAC_LFSR_MASK_BIT11_1  = 0x00000000, //!< Mask bit[11:1] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_2  = 0x00001000, //!< Mask bit[11:2] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_3  = 0x00002000, //!< Mask bit[11:3] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_4  = 0x00003000, //!< Mask bit[11:4] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_5  = 0x00004000, //!< Mask bit[11:5] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_6  = 0x00005000, //!< Mask bit[11:6] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_7  = 0x00006000, //!< Mask bit[11:7] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_8  = 0x00007000, //!< Mask bit[11:8] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_9  = 0x00008000, //!< Mask bit[11:9] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11_10 = 0x00009000, //!< Mask bit[11:10] of LFSR for noise wave generation
-    DAC_LFSR_MASK_BIT11    = 0x0000A000, //!< Mask bit11 of LFSR for noise wave generation
-    DAC_LFSR_MASK_NONE     = 0x0000B000, //!< Mask none bit of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_2  = 0x00000100, //!< Mask bit[11:2] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_3  = 0x00000200, //!< Mask bit[11:3] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_4  = 0x00000300, //!< Mask bit[11:4] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_5  = 0x00000400, //!< Mask bit[11:5] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_6  = 0x00000500, //!< Mask bit[11:6] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_7  = 0x00000600, //!< Mask bit[11:7] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_8  = 0x00000700, //!< Mask bit[11:8] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_9  = 0x00000800, //!< Mask bit[11:9] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11_10 = 0x00000900, //!< Mask bit[11:10] of LFSR for noise wave generation
+    DAC_LFSR_MASK_BIT11    = 0x00000A00, //!< Mask bit11 of LFSR for noise wave generation
+    DAC_LFSR_MASK_NONE     = 0x00000B00, //!< Mask none bit of LFSR for noise wave generation

    DAC_TRIANGLE_AMPLITUDE_1    = 0x00000000, //!< Triangle amplitude equal to 1
-    DAC_TRIANGLE_AMPLITUDE_3    = 0x00001000, //!< Triangle amplitude equal to 3
-    DAC_TRIANGLE_AMPLITUDE_7    = 0x00002000, //!< Triangle amplitude equal to 7
-    DAC_TRIANGLE_AMPLITUDE_15   = 0x00003000, //!< Triangle amplitude equal to 15
-    DAC_TRIANGLE_AMPLITUDE_31   = 0x00004000, //!< Triangle amplitude equal to 31
-    DAC_TRIANGLE_AMPLITUDE_63   = 0x00005000, //!< Triangle amplitude equal to 63
-    DAC_TRIANGLE_AMPLITUDE_127  = 0x00006000, //!< Triangle amplitude equal to 127
-    DAC_TRIANGLE_AMPLITUDE_255  = 0x00007000, //!< Triangle amplitude equal to 255
-    DAC_TRIANGLE_AMPLITUDE_511  = 0x00008000, //!< Triangle amplitude equal to 511
-    DAC_TRIANGLE_AMPLITUDE_1023 = 0x00009000, //!< Triangle amplitude equal to 1023
-    DAC_TRIANGLE_AMPLITUDE_2047 = 0x0000A000, //!< Triangle amplitude equal to 2047
-    DAC_TRIANGLE_AMPLITUDE_4095 = 0x0000B000  //!< Triangle amplitude equal to 4095
+    DAC_TRIANGLE_AMPLITUDE_3    = 0x00000100, //!< Triangle amplitude equal to 3
+    DAC_TRIANGLE_AMPLITUDE_7    = 0x00000200, //!< Triangle amplitude equal to 7
+    DAC_TRIANGLE_AMPLITUDE_15   = 0x00000300, //!< Triangle amplitude equal to 15
+    DAC_TRIANGLE_AMPLITUDE_31   = 0x00000400, //!< Triangle amplitude equal to 31
+    DAC_TRIANGLE_AMPLITUDE_63   = 0x00000500, //!< Triangle amplitude equal to 63
+    DAC_TRIANGLE_AMPLITUDE_127  = 0x00000600, //!< Triangle amplitude equal to 127
+    DAC_TRIANGLE_AMPLITUDE_255  = 0x00000700, //!< Triangle amplitude equal to 255
+    DAC_TRIANGLE_AMPLITUDE_511  = 0x00000800, //!< Triangle amplitude equal to 511
+    DAC_TRIANGLE_AMPLITUDE_1023 = 0x00000900, //!< Triangle amplitude equal to 1023
+    DAC_TRIANGLE_AMPLITUDE_2047 = 0x00000A00, //!< Triangle amplitude equal to 2047
+    DAC_TRIANGLE_AMPLITUDE_4095 = 0x00000B00  //!< Triangle amplitude equal to 4095
 } DAC_MASK_AMPLITUDE_SEL_T;

 /**
@@ -132,7 +146,7 @@ typedef struct
    DAC_OUTPUT_BUFFER_T         outputBuffer;
    DAC_WAVE_GENERATION_T       waveGeneration;
    DAC_MASK_AMPLITUDE_SEL_T    maskAmplitudeSelect;
-}DAC_ConfigStruct_T;
+} DAC_Config_T;

 /**@} end of group DAC_Structure*/

@@ -143,8 +157,8 @@ typedef struct

 /** DAC Reset and Configuration */
 void DAC_Reset(void);
-void DAC_Config(uint32_t channel, DAC_ConfigStruct_T* configStruct);
-void DAC_ConfigStructInit(DAC_ConfigStruct_T* configStruct);
+void DAC_Config(uint32_t channel, DAC_Config_T *dacConfig);
+void DAC_ConfigStructInit(DAC_Config_T *dacConfig);
 void DAC_Enable(DAC_CHANNEL_T channel);
 void DAC_Disable(DAC_CHANNEL_T channel);

@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the DBUGMCU firmware library
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_DBGMCU_H
 #define __APM32F10X_DBGMCU_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the DMA firmware library
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_DMA_H
 #define __APM32F10X_DMA_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -173,7 +187,7 @@ typedef enum
 } DMA_FLAG_T;

 /**
- * @brief   DMA Flag
+ * @brief DMA Interrupt Flag
 */
 typedef enum
 {
@@ -3,20 +3,35 @@
 *
 * @brief       This file contains all the prototypes,enumeration and macros for the DMC peripheral
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */
+
 #ifndef __APM32F10X_DMC_H
 #define __APM32F10X_DMC_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -259,6 +274,14 @@ typedef enum
    DMC_PRECHARGE_DELAY,     //!< Delayed precharge
 } DMC_PRECHARE_T;

+/**
+ * @brief WRAP Burst Type
+ */
+typedef enum
+{
+    DMC_WRAPB_4,
+    DMC_WRAPB_8,
+} DMC_WRPB_T;

 /**@} end of group DMC_Enumerations*/

@@ -327,6 +350,10 @@ void DMC_ConfigRefreshPeriod(uint16_t period);
 void DMC_EixtSlefRefreshMode(void);
 void DMC_EnterSlefRefreshMode(void);

+/** Accelerate Module */
+void DMC_EnableAccelerateModule(void);
+void DMC_DisableAccelerateModule(void);
+
 /** Config */
 void DMC_ConfigOpenBank(DMC_BANK_NUMBER_T num);
 void DMC_EnableUpdateMode(void);
@@ -336,6 +363,7 @@ void DMC_ConfigFullRefreshAfterSR(DMC_REFRESH_T refresh);
 void DMC_ConfigPrechargeType(DMC_PRECHARE_T precharge);
 void DMC_ConfigMemorySize(DMC_MEMORY_SIZE_T memorySize);
 void DMC_ConfigClockPhase(DMC_CLK_PHASE_T clkPhase);
+void DMC_ConfigWRAPB(DMC_WRPB_T burst);

 /** read flag */
 uint8_t DMC_ReadSelfRefreshStatus(void);
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the EINT firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_EINT_H
 #define __APM32F10X_EINT_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -51,6 +65,7 @@ typedef enum

 typedef enum
 {
+    EINT_LINENONE = 0x00000,  //!<No interrupt selected >
    EINT_LINE_0   = 0x00001,  //!< External interrupt line 0
    EINT_LINE_1   = 0x00002,  //!< External interrupt line 1
    EINT_LINE_2   = 0x00004,  //!< External interrupt line 2
@@ -100,6 +115,7 @@ typedef struct
 /** Reset and configuration */
 void EINT_Reset(void);
 void EINT_Config(EINT_Config_T *eintConfig);
+void EINT_ConfigStructInit(EINT_Config_T *eintConfig);

 /** Interrupt and flag */
 void EINT_SelectSWInterrupt(uint32_t line);
@@ -112,8 +128,8 @@ void EINT_ClearIntFlag(uint32_t line);
 /**@} end of group EINT_Driver*/
 /**@} end of group Peripherals_Library*/

-#ifdef __APM32F10X_cplusplus
+#ifdef __cplusplus
 }
 #endif

-#endif /* __EINT_H */
+#endif /* __APM32F10XEINT_H */
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the EMMC firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_EMMC_H
 #define __APM32F10X_EMMC_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -66,7 +80,7 @@ typedef enum
 typedef enum
 {
    EMMC_MEMORY_TYPE_SRAM  = 0x00000000,
-    EMMC_MEMORY_TYPE_PARAM = 0x00000004,
+    EMMC_MEMORY_TYPE_PSRAM = 0x00000004,
    EMMC_MEMORY_TYPE_NOR   = 0x00000008
 } EMMC_MEMORY_TYPE_T;

@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the FMC firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_FMC_H
 #define __APM32F10X_FMC_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -234,7 +248,7 @@ uint8_t FMC_ReadPrefetchBufferStatus(void);
 void FMC_EnableInterrupt(FMC_INT_T interrupt);
 void FMC_DisableInterrupt(FMC_INT_T interrupt);
 uint8_t FMC_ReadStatusFlag(FMC_FLAG_T flag);
-void FMC_ClearStatusFlag(FMC_FLAG_T flag);
+void FMC_ClearStatusFlag(uint32_t flag);

 /** Status management */
 FMC_STATUS_T FMC_ReadStatus(void);
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the GPIO firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_GPIO_H
 #define __APM32F10X_GPIO_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -36,7 +50,7 @@
 typedef enum
 {
    GPIO_SPEED_10MHz = 1,
-   GPIO_SPEED_2MHz,
+    GPIO_SPEED_20MHz,
    GPIO_SPEED_50MHz
 } GPIO_SPEED_T;

@@ -214,7 +228,7 @@ typedef struct
 void GPIO_Reset(GPIO_T *port);
 void GPIO_AFIOReset(void);
 void GPIO_Config(GPIO_T *port, GPIO_Config_T *gpioConfig);
-void GPIO_StructInit(GPIO_Config_T* gpioConfig);
+void GPIO_ConfigStructInit(GPIO_Config_T *gpioConfig);

 /** Read */
 uint8_t GPIO_ReadInputBit(GPIO_T *port, uint16_t pin);
@@ -223,8 +237,8 @@ uint8_t GPIO_ReadOutputBit(GPIO_T* port, uint16_t pin);
 uint16_t GPIO_ReadOutputPort(GPIO_T *port);

 /** Write */
-void GPIO_SetBits(GPIO_T* port, uint16_t pin);
-void GPIO_ResetBits(GPIO_T* port, uint16_t pin);
+void GPIO_SetBit(GPIO_T *port, uint16_t pin);
+void GPIO_ResetBit(GPIO_T *port, uint16_t pin);
 void GPIO_WriteOutputPort(GPIO_T *port, uint16_t portValue);
 void GPIO_WriteBitValue(GPIO_T *port, uint16_t pin, uint8_t bitVal);

@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the I2C firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_I2C_H
 #define __APM32F10X_I2C_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -321,7 +335,7 @@ uint32_t I2C_ReadLastEvent(I2C_T* i2c);
 uint8_t I2C_ReadStatusFlag(I2C_T *i2c, I2C_FLAG_T flag);
 void I2C_ClearStatusFlag(I2C_T *i2c, I2C_FLAG_T flag);
 uint8_t I2C_ReadIntFlag(I2C_T *i2c, I2C_INT_FLAG_T flag);
-void I2C_ClearIntFlag(I2C_T* i2c, I2C_INT_FLAG_T flag);
+void I2C_ClearIntFlag(I2C_T *i2c, uint32_t flag);

 /**@} end of group I2C_Fuctions*/
 /**@} end of group I2C_Driver*/
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the IWDT firmware library
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_IWDT_H
 #define __APM32F10X_IWDT_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -4,21 +4,35 @@
 * @brief       This file provides all the miscellaneous firmware functions.
 *             Include NVIC,SystemTick and Power management.
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_MISC_H
 #define __APM32F10X_MISC_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -93,6 +107,10 @@ void NVIC_ResetystemLowPower(NVIC_LOWPOWER_T lowPowerMode);
 /** Systick */
 void SysTick_ConfigCLKSource(SYSTICK_CLK_SOURCE_T clkSource);

+/**@} end of group MISC_Fuctions*/
+/**@} end of group MISC_Driver*/
+/**@} end of group Peripherals_Library*/
+
 #ifdef __cplusplus
 }
 #endif
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the PMU firmware library.
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_PMU_H
 #define __APM32F10X_PMU_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -30,6 +44,9 @@ extern "C" {
  @{
 */

+/**
+ * @brief PMU PVD detection level
+ */
 typedef enum
 {
    PMU_PVD_LEVEL_2V2    = 0x00,    //!< PVD detection level set to 2.2V
@@ -42,18 +59,27 @@ typedef enum
    PMU_PVD_LEVEL_2V9    = 0x07,    //!< PVD detection level set to 2.9V
 } PMU_PVD_LEVEL_T;

+/**
+ * @brief PMU Regulator state in STOP mode
+ */
 typedef enum
 {
    PMU_REGULATOR_ON       = 0x00,
    PMU_REGULATOR_LOWPOWER = 0x01
 } PMU_REGULATOR_T;

+/**
+ * @brief PMU STOP mode entry
+ */
 typedef enum
 {
    PMU_STOP_ENTRY_WFI     = 0x01,
    PMU_STOP_ENTRY_WFE     = 0x02
 } PMU_STOP_ENTRY_T;

+/**
+ * @brief PMU Flag
+ */
 typedef enum
 {
    PMU_FLAG_WUE,
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the prototypes,enumeration and macros for the QSPI peripheral
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_QSPI_H
 #define __APM32F10X_QSPI_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -48,7 +62,7 @@ typedef enum
    QSPI_TRANS_MODE_TX_RX,          //!< TX and RX mode
    QSPI_TRANS_MODE_TX,             //!< TX mode only
    QSPI_TRANS_MODE_RX,             //!< RX mode only
-    QSPI_TRANS_MODE_EEPROM_READ,    //!< EEPROM read mode
+    QSPI_TRANS_MODE_EEPROM_READ     //!< EEPROM read mode
 } QSPI_TRANS_MODE_T;

 /**
@@ -57,7 +71,7 @@ typedef enum
 typedef enum
 {
    QSPI_CLKPOL_LOW,
-    QSPI_CLKPOL_HIGH,
+    QSPI_CLKPOL_HIGH
 } QSPI_CLKPOL_T;

 /**
@@ -102,7 +116,7 @@ typedef enum
    QSPI_DFS_29BIT,
    QSPI_DFS_30BIT,
    QSPI_DFS_31BIT,
-    QSPI_DFS_32BIT,
+    QSPI_DFS_32BIT
 } QSPI_DFS_T;

 /**
@@ -128,7 +142,7 @@ typedef enum
    QSPI_INT_RFU        = BIT2,     //!< RX FIFO underflow interrupt
    QSPI_INT_RFO        = BIT3,     //!< RX FIFO overflow interrupt
    QSPI_INT_RFF        = BIT4,     //!< RX FIFO full interrupt
-    QSPI_INT_MST        = BIT5,     //!< Master interrupt
+    QSPI_INT_MST        = BIT5      //!< Master interrupt
 } QSPI_INT_T;

 /**
@@ -141,7 +155,7 @@ typedef enum
    QSPI_INT_FLAG_RFU   = BIT2,     //!< RX FIFO underflow interrupt flag
    QSPI_INT_FLAG_RFO   = BIT3,     //!< RX FIFO overflow interrupt flag
    QSPI_INT_FLAG_RFF   = BIT4,     //!< RX FIFO full interrupt flag
-    QSPI_INT_FLAG_MST   = BIT5,     //!< Master interrupt flag
+    QSPI_INT_FLAG_MST   = BIT5      //!< Master interrupt flag
 } QSPI_INT_FLAG_T;

 /**
@@ -161,7 +175,7 @@ typedef enum
    QSPI_INST_LEN_0,
    QSPI_INST_LEN_4BIT,
    QSPI_INST_LEN_8BIT,
-    QSPI_INST_LEN_16BIT,
+    QSPI_INST_LEN_16BIT
 } QSPI_INST_LEN_T;

 /**
@@ -184,7 +198,7 @@ typedef enum
    QSPI_ADDR_LEN_48BIT,
    QSPI_ADDR_LEN_52BIT,
    QSPI_ADDR_LEN_56BIT,
-    QSPI_ADDR_LEN_60BIT,
+    QSPI_ADDR_LEN_60BIT
 } QSPI_ADDR_LEN_T;

 /**
@@ -194,7 +208,7 @@ typedef enum
 {
    QSPI_INST_ADDR_TYPE_STANDARD,
    QSPI_INST_TYPE_STANDARD,
-    QSPI_INST_ADDR_TYPE_FRF,
+    QSPI_INST_ADDR_TYPE_FRF
 } QSPI_INST_ADDR_TYPE_T;

 /**
@@ -203,7 +217,7 @@ typedef enum
 typedef enum
 {
    QSPI_SST_DISABLE,
-    QSPI_SST_ENABLE,
+    QSPI_SST_ENABLE
 } QSPI_SST_T;

 /**@} end of group QSPI_Enumerations*/
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the RCM firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_RCM_H
 #define __APM32F10X_RCM_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -35,9 +49,9 @@ extern "C" {
 */
 typedef enum
 {
-    RCM_HSE_CLOSE,    //!< CLOSE HSE
-    RCM_HSE_OPEN,     //!< OPEN HSE
-    RCM_HSE_BYPASS,   //!< HSE BYPASS
+    RCM_HSE_CLOSE,
+    RCM_HSE_OPEN,
+    RCM_HSE_BYPASS
 } RCM_HSE_T;

 /**
@@ -59,7 +73,7 @@ typedef enum
    RCM_PLLMF_13,
    RCM_PLLMF_14,
    RCM_PLLMF_15,
-    RCM_PLLMF_16,
+    RCM_PLLMF_16
 } RCM_PLLMF_T;

 /**
@@ -85,7 +99,7 @@ typedef enum
    RCM_AHB_DIV_64,
    RCM_AHB_DIV_128,
    RCM_AHB_DIV_256,
-    RCM_AHB_DIV_512,
+    RCM_AHB_DIV_512
 } RCM_AHB_DIV_T;

 /**
@@ -117,7 +131,7 @@ typedef enum
 typedef enum
 {
    RCM_FPU_DIV_1,
-    RCM_FPU_DIV_2,
+    RCM_FPU_DIV_2
 } RCM_FPU_DIV_T;

 /**
@@ -128,7 +142,7 @@ typedef enum
    RCM_PCLK2_DIV_2,
    RCM_PCLK2_DIV_4,
    RCM_PCLK2_DIV_6,
-    RCM_PCLK2_DIV_8,
+    RCM_PCLK2_DIV_8
 } RCM_PCLK2_DIV_T;

 /**
@@ -160,7 +174,7 @@ typedef enum
    RCM_MCOCLK_SYSCLK,
    RCM_MCOCLK_HSI,
    RCM_MCOCLK_HSE,
-    RCM_MCOCLK_PLLCLK_DIV_2,
+    RCM_MCOCLK_PLLCLK_DIV_2
 } RCM_MCOCLK_T;

 /**
@@ -199,7 +213,7 @@ typedef enum
    RCM_AHB_PERIPH_QSPI = BIT5,
    RCM_AHB_PERIPH_CRC  = BIT6,
    RCM_AHB_PERIPH_EMMC = BIT8,
-    RCM_AHB_PERIPH_SDIO = BIT10,
+    RCM_AHB_PERIPH_SDIO = BIT10
 } RCM_AHB_PERIPH_T;

 /**
@@ -221,7 +235,7 @@ typedef enum
    RCM_APB2_PERIPH_SPI1    = BIT12,
    RCM_APB2_PERIPH_TMR8    = BIT13,
    RCM_APB2_PERIPH_USART1  = BIT14,
-    RCM_APB2_PERIPH_ADC3    = BIT15,
+    RCM_APB2_PERIPH_ADC3    = BIT15
 } RCM_APB2_PERIPH_T;

 /**
@@ -249,7 +263,7 @@ typedef enum
    RCM_APB1_PERIPH_CAN2   = BIT26,
    RCM_APB1_PERIPH_BAKR   = BIT27,
    RCM_APB1_PERIPH_PMU    = BIT28,
-    RCM_APB1_PERIPH_DAC    = BIT29,
+    RCM_APB1_PERIPH_DAC    = BIT29
 } RCM_APB1_PERIPH_T;

 /**
@@ -267,7 +281,7 @@ typedef enum
    RCM_FLAG_SWRST   = 0x21C,   //!< Software reset flag
    RCM_FLAG_IWDTRST = 0x21D,   //!< Independent watchdog reset flag
    RCM_FLAG_WWDTRST = 0x21E,   //!< Window watchdog reset flag
-    RCM_FLAG_LPRRST  = 0x21F,   //!< Low-power reset flag
+    RCM_FLAG_LPRRST  = 0x21F    //!< Low-power reset flag
 } RCM_FLAG_T;

 /**@} end of group RCM_Enumerations*/
@@ -287,7 +301,7 @@ void RCM_ConfigHSE(RCM_HSE_T state);
 uint8_t RCM_WaitHSEReady(void);

 /** HSI clock */
-void RCM_SetHSITrim(uint8_t HSITrim);
+void RCM_ConfigHSITrim(uint8_t HSITrim);
 void RCM_EnableHSI(void);
 void RCM_DisableHSI(void);

@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the RTC firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_RTC_H
 #define __APM32F10X_RTC_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the prototypes,enumeration and macros for the SCI2C(I2C3, I2C4) peripheral
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_SCI2C_H
 #define __APM32F10X_SCI2C_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the SDIO firmware library
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_SDIO_H
 #define __APM32F10X_SDIO_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -62,10 +76,10 @@ typedef enum
 */
 typedef enum
 {
-    SDIO_BUSWIDE_1B = 0x00000000,
-    SDIO_BUSWIDE_4B = 0x00000800,
-    SDIO_BUSWIDE_8B = 0x00001000
-}SDIO_BUSWIDE_T;
+    SDIO_BUS_WIDE_1B = 0x00000000,
+    SDIO_BUS_WIDE_4B = 0x00000800,
+    SDIO_BUS_WIDE_8B = 0x00001000
+} SDIO_BUS_WIDE_T;

 /**
 * @brief    SDIO hardware flow control
@@ -183,8 +197,8 @@ typedef enum
 */
 typedef enum
 {
-    SDIO_TRANSFER_DIR_TOCARD   = 0x00000000,
-    SDIO_TRANSFER_DIR_TOSDIO   = 0x00000002
+    SDIO_TRANSFER_DIR_TO_CARD   = 0x00000000,
+    SDIO_TRANSFER_DIR_TO_SDIO   = 0x00000002
 } SDIO_TRANSFER_DIR_T;

 /**
@@ -255,52 +269,52 @@ typedef enum
 /** ------------ SDIO registers bit address in the alias region ----------- */
 #define SDIO_OFFSET                (SDIO_BASE - PERIPH_BASE)

-/* --- CLKCTRL Register ---*/
+/** --- CLKCTRL Register ---*/

-/* Alias word address of CLKEN bit */
+/** Alias word address of CLKEN bit */
 #define CLKCTRL_OFFSET            (SDIO_OFFSET + 0x04)
 #define CLKEN_BitNumber            0x08
 #define CLKCTRL_CLKEN_BB          (PERIPH_BB_BASE + (CLKCTRL_OFFSET * 32) + (CLKEN_BitNumber * 4))

-/* --- CMD Register ---*/
+/** --- CMD Register ---*/

-/* Alias word address of SDIOSC bit */
+/** Alias word address of SDIOSC bit */
 #define CMD_OFFSET                (SDIO_OFFSET + 0x0C)
 #define SDIOSC_BitNumber           0x0B
 #define CMD_SDIOSC_BB             (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSC_BitNumber * 4))

-/* Alias word address of CMDCPEN bit */
+/** Alias word address of CMDCPEN bit */
 #define CMDCPEN_BitNumber          0x0C
 #define CMD_CMDCPEN_BB            (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (CMDCPEN_BitNumber * 4))

-/* Alias word address of INTEN bit */
+/** Alias word address of INTEN bit */
 #define INTEN_BitNumber            0x0D
 #define CMD_INTEN_BB              (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (INTEN_BitNumber * 4))

-/* Alias word address of ATACMD bit */
+/** Alias word address of ATACMD bit */
 #define ATACMD_BitNumber           0x0E
 #define CMD_ATACMD_BB             (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4))

-/* --- DCTRL Register ---*/
+/** --- DCTRL Register ---*/

-/* Alias word address of DMAEN bit */
+/** Alias word address of DMAEN bit */
 #define DCTRL_OFFSET              (SDIO_OFFSET + 0x2C)
 #define DMAEN_BitNumber            0x03
 #define DCTRL_DMAEN_BB            (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4))

-/* Alias word address of RWSTR bit */
+/** Alias word address of RWSTR bit */
 #define RWSTR_BitNumber            0x08
 #define DCTRL_RWSTR_BB            (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTR_BitNumber * 4))

-/* Alias word address of RWSTOP bit */
+/** Alias word address of RWSTOP bit */
 #define RWSTOP_BitNumber           0x09
 #define DCTRL_RWSTOP_BB           (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4))

-/* Alias word address of RDWAIT bit */
+/** Alias word address of RDWAIT bit */
 #define RDWAIT_BitNumber           0x0A
 #define DCTRL_RDWAIT_BB           (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RDWAIT_BitNumber * 4))

-/* Alias word address of SDIOF bit */
+/** Alias word address of SDIOF bit */
 #define SDIOF_BitNumber            0x0B
 #define DCTRL_SDIOF_BB            (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOF_BitNumber * 4))

@@ -318,7 +332,7 @@ typedef struct
    SDIO_CLOCK_EDGE_T            clockEdge;
    SDIO_CLOCK_BYPASS_T          clockBypass;
    SDIO_CLOCK_POWER_SAVE_T      clockPowerSave;
-    SDIO_BUSWIDE_T               busWide;
+    SDIO_BUS_WIDE_T              busWide;
    SDIO_HARDWARE_FLOW_CONTROL_T hardwareFlowControl;
    uint8_t                      clockDiv;
 } SDIO_Config_T;
@@ -333,7 +347,7 @@ typedef struct
    SDIO_RESPONSE_T              response;
    SDIO_WAIT_T                  wait;
    SDIO_CPSM_T                  CPSM;
-}SDIO_CMDConfig_T;
+} SDIO_CmdConfig_T;

 /**
 * @brief    SDIO Data Config structure definition
@@ -369,8 +383,8 @@ void SDIO_EnableDMA(void);
 void SDIO_DisableDMA(void);

 /** Command */
-void SDIO_TxCommand(SDIO_CMDConfig_T *cmdConfig);
-void SDIO_TxCommandStructInit(SDIO_CMDConfig_T* cmdconfig);
+void SDIO_TxCommand(SDIO_CmdConfig_T *cmdConfig);
+void SDIO_TxCommandStructInit(SDIO_CmdConfig_T *cmdconfig);
 uint8_t SDIO_ReadCommandResponse(void);
 uint32_t SDIO_ReadResponse(SDIO_RES_T res);

@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the SPI firmware library
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_SPI_H
 #define __APM32F10X_SPI_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -285,7 +299,7 @@ void SPI_SetSoftwareNSS(SPI_T* spi);
 void SPI_ResetSoftwareNSS(SPI_T *spi);
 void SPI_EnableSSOutput(SPI_T *spi);
 void SPI_DisableSSOutput(SPI_T *spi);
-void SPI_ConfigDataSize(SPI_T* spi, uint16_t dataSize);
+void SPI_ConfigDataSize(SPI_T *spi, SPI_DATA_LENGTH_T length);

 /** DMA */
 void SPI_I2S_EnableDMA(SPI_T *spi, SPI_I2S_DMA_REQ_T dmaReq);
@@ -3,20 +3,34 @@
 *
 * @brief       This file contains all the functions prototypes for the TMR firmware library.
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */
 #ifndef __APM32F10X_TMR_H
 #define __APM32F10X_TMR_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -63,7 +77,7 @@ typedef enum
    TMR_OC_MODE_LOWLEVEL   = 0x04,
    TMR_OC_MODE_HIGHLEVEL  = 0x05,
    TMR_OC_MODE_PWM1       = 0x06,
-    TMR_OC_MODE_PWM2       = 0x07,
+    TMR_OC_MODE_PWM2       = 0x07
 } TMR_OC_MODE_T;

 /**
@@ -353,9 +367,9 @@ typedef enum
 */
 typedef enum
 {
-    TMR_PRESCALER_RELOAD_UPDATA,
-    TMR_PRESCALER_RELOAD_IMMEDIATE
-} TMR_PRESCALER_RELOAD_T;
+    TMR_PSC_RELOAD_UPDATE,
+    TMR_PSC_RELOAD_IMMEDIATE
+} TMR_PSC_RELOAD_T;

 /**
 * @brief    TMR Encoder Mode
@@ -444,7 +458,7 @@ typedef enum
    TMR_SLAVE_MODE_RESET     = 0x04,
    TMR_SLAVE_MODE_GATED     = 0x05,
    TMR_SLAVE_MODE_TRIGGER   = 0x06,
-    TMR_SLAVE_MODE_EXTERNALL = 0x07
+    TMR_SLAVE_MODE_EXTERNAL1 = 0x07
 } TMR_SLAVE_MODE_T;

 /**
@@ -534,20 +548,22 @@ typedef struct
 /** Reset and Configuration */
 void TMR_Reset(TMR_T *tmr);
 void TMR_ConfigTimeBase(TMR_T *tmr, TMR_BaseConfig_T *baseConfig);
-void TMR_ConfigOC1(TMR_T* tmr, TMR_OCConfig_T *OC1Config);
-void TMR_ConfigOC2(TMR_T* tmr, TMR_OCConfig_T *OC2Config);
-void TMR_ConfigOC3(TMR_T* tmr, TMR_OCConfig_T *OC3Config);
-void TMR_ConfigOC4(TMR_T* tmr, TMR_OCConfig_T *OC4Config);
+void TMR_ConfigOC1(TMR_T *tmr, TMR_OCConfig_T *OCConfig);
+void TMR_ConfigOC2(TMR_T *tmr, TMR_OCConfig_T *OCConfig);
+void TMR_ConfigOC3(TMR_T *tmr, TMR_OCConfig_T *OCConfig);
+void TMR_ConfigOC4(TMR_T *tmr, TMR_OCConfig_T *OCConfig);
 void TMR_ConfigIC(TMR_T *tmr, TMR_ICConfig_T *ICConfig);
 void TMR_ConfigBDT(TMR_T *tmr, TMR_BDTConfig_T *BDTConfig);
 void TMR_ConfigTimeBaseStructInit(TMR_BaseConfig_T *baseConfig);
 void TMR_ConfigOCStructInit(TMR_OCConfig_T *OCConfig);
 void TMR_ConfigICStructInit(TMR_ICConfig_T *ICConfig);
 void TMR_ConfigBDTStructInit(TMR_BDTConfig_T *BDTConfig);
+void TMR_ConfigSinglePulseMode(TMR_T *tmr, TMR_SPM_T singlePulseMode);
+void TMR_ConfigClockDivision(TMR_T *tmr, TMR_CLOCK_DIV_T clockDivision);
 void TMR_Enable(TMR_T *tmr);
 void TMR_Disable(TMR_T *tmr);

-/* PWM Configuration */
+/** PWM Configuration */
 void TMR_ConfigPWM(TMR_T *tmr, TMR_ICConfig_T *PWMConfig);
 void TMR_EnablePWMOutputs(TMR_T *tmr);
 void TMR_DisablePWMOutputs(TMR_T *tmr);
@@ -568,7 +584,7 @@ void TMR_ConfigETRClockMode2(TMR_T* tmr, TMR_EXTTRG_PSC_T prescaler,
                             TMR_EXTTRG_POL_T polarity, uint16_t filter);
 void TMR_ConfigETR(TMR_T *tmr, TMR_EXTTRG_PSC_T prescaler,
                   TMR_EXTTRG_POL_T polarity, uint16_t filter);
-void TMR_ConfigPrescaler(TMR_T* tmr, uint16_t prescaler, TMR_PRESCALER_RELOAD_T pscReloadMode);
+void TMR_ConfigPrescaler(TMR_T *tmr, uint16_t prescaler, TMR_PSC_RELOAD_T pscReloadMode);
 void TMR_ConfigCounterMode(TMR_T *tmr, TMR_COUNTER_MODE_T countMode);
 void TMR_SelectInputTrigger(TMR_T *tmr, TMR_TRIGGER_SOURCE_T triggerSouce);
 void TMR_ConfigEncodeInterface(TMR_T *tmr, TMR_ENCODER_MODE_T encodeMode, TMR_IC_POLARITY_T IC1Polarity,
@@ -577,8 +593,8 @@ void TMR_ConfigForcedOC1(TMR_T* tmr,TMR_FORCED_ACTION_T forcesAction);
 void TMR_ConfigForcedOC2(TMR_T *tmr, TMR_FORCED_ACTION_T forcesAction);
 void TMR_ConfigForcedOC3(TMR_T *tmr, TMR_FORCED_ACTION_T forcesAction);
 void TMR_ConfigForcedOC4(TMR_T *tmr, TMR_FORCED_ACTION_T forcesAction);
-void TMR_EnableAUTOReload(TMR_T* tmr);
-void TMR_DisableAUTOReload(TMR_T* tmr);
+void TMR_EnableAutoReload(TMR_T *tmr);
+void TMR_DisableAutoReload(TMR_T *tmr);
 void TMR_EnableSelectCOM(TMR_T *tmr);
 void TMR_DisableSelectCOM(TMR_T *tmr);
 void TMR_EnableCCDMA(TMR_T *tmr);
@@ -609,12 +625,11 @@ void TMR_DisableCCxChannel(TMR_T* tmr,TMR_CHANNEL_T channel);
 void TMR_EnableCCxNChannel(TMR_T *tmr, TMR_CHANNEL_T channel);
 void TMR_DisableCCxNChannel(TMR_T *tmr, TMR_CHANNEL_T channel);
 void TMR_SelectOCxMode(TMR_T *tmr, TMR_CHANNEL_T channel, TMR_OC_MODE_T OCMode);
-void TMR_EnableNoUpdate(TMR_T* tmr);
-void TMR_DisableNoUpdate(TMR_T* tmr);
-void TMR_ConfigUPdateRequest(TMR_T* tmr, TMR_UPDATE_SOURCE_T updateSource);
+void TMR_EnableUpdate(TMR_T *tmr);
+void TMR_DisableUpdate(TMR_T *tmr);
+void TMR_ConfigUpdateRequest(TMR_T *tmr, TMR_UPDATE_SOURCE_T updateSource);
 void TMR_EnableHallSensor(TMR_T *tmr);
 void TMR_DisableHallSensor(TMR_T *tmr);
-void TMR_SelectSinglePulseMode(TMR_T* tmr, TMR_SPM_T singlePulseMode);
 void TMR_SelectOutputTrigger(TMR_T *tmr, TMR_TRGO_SOURCE_T TRGOSource);
 void TMR_SelectSlaveMode(TMR_T *tmr, TMR_SLAVE_MODE_T slaveMode);
 void TMR_EnableMasterSlaveMode(TMR_T *tmr);
@@ -629,7 +644,6 @@ void TMR_ConfigIC1Prescal(TMR_T* tmr, TMR_IC_PSC_T prescaler);
 void TMR_ConfigIC2Prescal(TMR_T *tmr, TMR_IC_PSC_T prescaler);
 void TMR_ConfigIC3Prescal(TMR_T *tmr, TMR_IC_PSC_T prescaler);
 void TMR_ConfigIC4Prescal(TMR_T *tmr, TMR_IC_PSC_T prescaler);
-void TMR_ConfigClockDivision(TMR_T* tmr, TMR_CLOCK_DIV_T clockDivision);
 uint16_t TMR_ReadCaputer1(TMR_T *tmr);
 uint16_t TMR_ReadCaputer2(TMR_T *tmr);
 uint16_t TMR_ReadCaputer3(TMR_T *tmr);
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the USART firmware library
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_USART_H
 #define __APM32F10X_USART_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -3,21 +3,35 @@
 *
 * @brief       This file contains all the functions prototypes for the WWDT firmware library
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #ifndef __APM32F10X_WWDT_H
 #define __APM32F10X_WWDT_H

-#include "apm32f10x.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

+#include "apm32f10x.h"
+
 /** @addtogroup Peripherals_Library Standard Peripheral Library
  @{
 */
@@ -3,10 +3,24 @@
 *
 * @brief       This file provides all the ADC firmware functions
 *
- * @version     V1.0.1
+ * @version     V1.0.2
 *
- * @date        2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #include "apm32f10x_adc.h"
@@ -74,8 +88,10 @@ void ADC_Config(ADC_T* adc, ADC_Config_T* adcConfig)

    reg = adc->CTRL2;
    reg &= 0xFFF1F7FD;
-    reg |= (uint32_t)(adcConfig->dataAlign | adcConfig->externalTrigConv |
-                    ((uint32_t)adcConfig->continuosConvMode << 1));
+    reg |= (uint32_t)adcConfig->dataAlign | \
+           (uint32_t)adcConfig->externalTrigConv | \
+           ((uint32_t)adcConfig->continuosConvMode << 1);
+
    adc->CTRL2 = reg;

    reg = adc->REGSEQ1;
@@ -273,7 +289,7 @@ uint8_t ADC_ReadSoftwareStartConvStatus(ADC_T* adc)
 *
 * @note         adc can be ADC1, ADC2 or ADC3.
 */
-void ADC_ConfigDiscModeChannel(ADC_T* adc, uint8_t number)
+void ADC_ConfigDiscMode(ADC_T *adc, uint8_t number)
 {
    adc->CTRL1_B.DISCNUMCFG |= number - 1;
 }
@@ -337,14 +353,14 @@ void ADC_DisableDiscMode(ADC_T* adc)
 *
 * @param        sampleTime: the specified ADC channel SampleTime
 *                           The parameter can be one of following values:
- *                           @arg ADC_SAMPLE_TIME_1_5:   ADC 1.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_7_5:   ADC 7.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_13_5:  ADC 13.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_28_5:  ADC 28.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_41_5:  ADC 41.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_55_5:  ADC 55.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_71_5:  ADC 71.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_239_5: ADC 239.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_1CYCLES5:   ADC 1.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_7CYCLES5:   ADC 7.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_13CYCLES5:  ADC 13.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_28CYCLES5:  ADC 28.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_41CYCLES5:  ADC 41.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_55CYCLES5:  ADC 55.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_71CYCLES5:  ADC 71.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_239CYCLES5: ADC 239.5 clock cycles
 *
 * @retval       None
 *
@@ -467,7 +483,7 @@ uint32_t ADC_ReadDualModeConversionValue(ADC_T* adc)
 *
 * @note         adc can be ADC1, ADC2 or ADC3.
 */
-void ADC_EnableInjectedConv(ADC_T* adc)
+void ADC_EnableAutoInjectedConv(ADC_T *adc)
 {
    adc->CTRL1_B.INJGACEN = BIT_SET;
 }
@@ -481,7 +497,7 @@ void ADC_EnableInjectedConv(ADC_T* adc)
 *
 * @note         adc can be ADC1, ADC2 or ADC3.
 */
-void ADC_DisableInjectedConv(ADC_T* adc)
+void ADC_DisableAutoInjectedConv(ADC_T *adc)
 {
    adc->CTRL1_B.INJGACEN = BIT_RESET;
 }
@@ -653,14 +669,14 @@ uint8_t ADC_ReadSoftwareStartInjectedConvStatus(ADC_T* adc)
 *
 * @param        sampleTime: the specified ADC channel SampleTime
 *                           The parameter can be one of following values:
- *                           @arg ADC_SAMPLE_TIME_1_5:   ADC 1.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_7_5:   ADC 7.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_13_5:  ADC 13.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_28_5:  ADC 28.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_41_5:  ADC 41.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_55_5:  ADC 55.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_71_5:  ADC 71.5 clock cycles
- *                           @arg ADC_SAMPLE_TIME_239_5: ADC 239.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_1CYCLES5:   ADC 1.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_7CYCLES5:   ADC 7.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_13CYCLES5:  ADC 13.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_28CYCLES5:  ADC 28.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_41CYCLES5:  ADC 41.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_55CYCLES5:  ADC 55.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_71CYCLES5:  ADC 71.5 clock cycles
+ *                           @arg ADC_SAMPLETIME_239CYCLES5: ADC 239.5 clock cycles
 *
 * @retval       None
 *
@@ -960,17 +976,7 @@ void ADC_DisableInterrupt(ADC_T* adc, uint16_t interrupt)
 */
 uint8_t ADC_ReadStatusFlag(ADC_T *adc, ADC_FLAG_T flag)
 {
-    uint8_t status = RESET;
-
-    if ((adc->STS & flag) != (uint8_t)RESET)
-    {
-        status = SET;
-    }
-    else
-    {
-    status = RESET;
-    }
-    return  status;
+    return (adc->STS & flag) ? SET : RESET;
 }

 /*!
@@ -1010,14 +1016,14 @@ void ADC_ClearStatusFlag(ADC_T* adc, uint8_t flag)
 *
 * @note         adc can be ADC1, ADC2 or ADC3.
 */
-uint8_t ADC_ReadIntFlag(ADC_T* adc, ADC_INT_T interrupt)
+uint8_t ADC_ReadIntFlag(ADC_T *adc, ADC_INT_T flag)
 {
    uint8_t bitStatus = RESET;
    uint32_t itmask = 0;
    uint32_t enableStatus = 0;

-    itmask = interrupt >> 8;
-    enableStatus = (adc->CTRL1 & (uint8_t)interrupt);
+    itmask = flag >> 8;
+    enableStatus = (adc->CTRL1 & (uint8_t)flag);

    if (((adc->STS & itmask) != (uint32_t)RESET) && enableStatus)
    {
@@ -1045,11 +1051,11 @@ uint8_t ADC_ReadIntFlag(ADC_T* adc, ADC_INT_T interrupt)
 *
 * @note         adc can be ADC1, ADC2 or ADC3.
 */
-void ADC_ClearIntFlag(ADC_T* adc, uint16_t interrupt)
+void ADC_ClearIntFlag(ADC_T *adc, uint16_t flag)
 {
    uint8_t mask = 0;

-  mask = (uint8_t)(interrupt >> 8);
+    mask = (uint8_t)(flag >> 8);
    adc->STS = ~(uint32_t)mask;
 }

@@ -3,10 +3,24 @@
 *
 * @brief       This file provides all the BAKPR firmware functions.
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #include "apm32f10x_bakpr.h"
@@ -117,13 +131,16 @@ void BAKPR_ConfigRTCOutput(BAKPR_RTC_OUTPUT_SOURCE_T soure)
    if (soure == BAKPR_RTC_OUTPUT_SOURCE_NONE)
    {
        BAKPR->CLKCAL = RESET;
-    } else if(soure == BAKPR_RTC_OUTPUT_SOURCE_CALIBRATION_CLOCK)
+    }
+    else if (soure == BAKPR_RTC_OUTPUT_SOURCE_CALIBRATION_CLOCK)
    {
        BAKPR->CLKCAL_B.CALCOEN = BIT_SET;
-    } else if(soure == BAKPR_RTC_OUTPUT_SOURCE_ALARM)
+    }
+    else if (soure == BAKPR_RTC_OUTPUT_SOURCE_ALARM)
    {
        BAKPR->CLKCAL_B.ASPOEN = BIT_SET;
-    } else if(soure == BAKPR_RTC_OUTPUT_SOURCE_SECOND)
+    }
+    else if (soure == BAKPR_RTC_OUTPUT_SOURCE_SECOND)
    {
        BAKPR->CLKCAL_B.ASPOSEL = BIT_SET;
    }
@@ -3,10 +3,24 @@
 *
 * @brief       This file provides all the CAN firmware functions
 *
- * @version    V1.0.1
+ * @version     V1.0.2
 *
- * @date       2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #include "apm32f10x_can.h"
@@ -80,15 +94,6 @@ uint8_t CAN_Config(CAN_T* can, CAN_Config_T* canConfig)
    }
    else
    {
-        if(canConfig->timeTrigComMode == ENABLE)
-        {
-            can->MCTRL_B.TTCM = BIT_SET;
-        }
-        else
-        {
-            can->MCTRL_B.TTCM = BIT_RESET;
-        }
-
        if (canConfig->autoBusOffManage == ENABLE)
        {
            can->MCTRL_B.ALBOFFM = BIT_SET;
@@ -169,13 +174,13 @@ uint8_t CAN_Config(CAN_T* can, CAN_Config_T* canConfig)
 *
 * @param     can: Select the CAN peripheral which can be CAN1 or CAN2.
 *
- * @param     filterConfig :Point to a CAN_FILTER_CONFIG_T structure.
+ * @param     filterConfig :Point to a CAN_FilterConfig_T structure.
 *
 * @retval    None
 *
 * @note      CAN2 applies only to APM32F103xC device.
 */
-void CAN_ConfigFilter(CAN_T* can, CAN_FILTER_CONFIG_T* filterConfig)
+void CAN_ConfigFilter(CAN_T *can, CAN_FilterConfig_T *filterConfig)
 {
    can->FCTRL_B.FINITEN = BIT_SET;

@@ -248,7 +253,6 @@ void CAN_ConfigFilter(CAN_T* can, CAN_FILTER_CONFIG_T* filterConfig)
 */
 void CAN_ConfigStructInit(CAN_Config_T *canConfig)
 {
-    canConfig->timeTrigComMode  = DISABLE;
    canConfig->autoBusOffManage = DISABLE;
    canConfig->autoWakeUpMode   = DISABLE;
    canConfig->nonAutoRetran    = DISABLE;
@@ -290,39 +294,17 @@ void CAN_DisableDBGFreeze(CAN_T* can)
 }

 /*!
- * @brief     Enables the CAN Time TriggerOperation communication mode.
+ * @brief     Select the start bank filter for slave CAN.
 *
- * @param     can: Select the CAN peripheral.
+ * @param     bankNum: the start slave bank filter from 1..27.
 *
 * @retval    None
- *
- * @note      CAN2 applies only to APM32F103xC device.
 */
-void CAN_EnableTTCComMode(CAN_T* can)
+void CAN_SlaveStartBank(CAN_T *can, uint8_t bankNum)
 {
-    can->MCTRL_B.TTCM = ENABLE;
-
-    can->sTxMailBox[0].TXDLEN_B.TXTS = BIT_SET;
-    can->sTxMailBox[1].TXDLEN_B.TXTS = BIT_SET;
-    can->sTxMailBox[2].TXDLEN_B.TXTS = BIT_SET;
-}
-
-/*!
- * @brief     Disable the CAN Time TriggerOperation communication mode.
- *
- * @param     can: Select the CAN peripheral.
- *
- * @retval    None
- *
- * @note      CAN2 applies only to APM32F103xC device.
- */
-void CAN_DisableTTCComMode(CAN_T* can)
-{
-    can->MCTRL_B.TTCM = DISABLE;
-
-    can->sTxMailBox[0].TXDLEN_B.TXTS = BIT_RESET;
-    can->sTxMailBox[1].TXDLEN_B.TXTS = BIT_RESET;
-    can->sTxMailBox[2].TXDLEN_B.TXTS = BIT_RESET;
+    can->FCTRL_B.FINITEN = SET;
+    can->FCTRL_B.CAN2BN  = bankNum;
+    can->FCTRL_B.FINITEN = RESET;
 }

 /*!
@@ -330,13 +312,13 @@ void CAN_DisableTTCComMode(CAN_T* can)
 *
 * @param     can: Select the CAN peripheral.
 *
- * @param     TxMessage: pointer to a CAN_TX_MESSAGE_T structure.
+ * @param     TxMessage: pointer to a CAN_TxMessage_T structure.
 *
 * @retval    The number of the mailbox which is used for transmission or 3 if No mailbox is empty.
 *
 * @note      CAN2 applies only to APM32F103xC device.
 */
-uint8_t CAN_TxMessage(CAN_T* can, CAN_TX_MESSAGE_T* TxMessage)
+uint8_t CAN_TxMessage(CAN_T *can, CAN_TxMessage_T *TxMessage)
 {
    uint8_t transmit_milbox = 0;

@@ -352,7 +334,8 @@ uint8_t CAN_TxMessage(CAN_T* can, CAN_TX_MESSAGE_T* TxMessage)
    else if ((can->TXSTS & 0x10000000) == 0x10000000)
    {
        transmit_milbox = 2;
-    } else
+    }
+    else
    {
        return 3;  //!< No mailbox is empty
    }
@@ -362,7 +345,8 @@ uint8_t CAN_TxMessage(CAN_T* can, CAN_TX_MESSAGE_T* TxMessage)
    if (TxMessage->typeID == CAN_TYPEID_STD)
    {
        can->sTxMailBox[transmit_milbox].TXMID |= (TxMessage->stdID << 21) | (TxMessage->remoteTxReq);
-    } else
+    }
+    else
    {
        can->sTxMailBox[transmit_milbox].TXMID |= (TxMessage->extID << 3) | (TxMessage->typeID) | (TxMessage->remoteTxReq);
    }
@@ -417,24 +401,32 @@ uint8_t CAN_TxMessageStatus(CAN_T* can, CAN_TX_MAILBIX_T TxMailbox)
    }
    switch (state)
    {
-        /** transmit pending  */
-        case (0x0): state = 2;
+    /** Transmit pending  */
+    case (0x0):
+        state = 2;
        break;
-        /* transmit failed  */
-        case (0x00000001 | 0x04000000): state = 0;
+    /** Transmit failed  */
+    case (0x00000001 | 0x04000000):
+        state = 0;
        break;
-        case (0x00000100 | 0x08000000): state = 0;
+    case (0x00000100 | 0x08000000):
+        state = 0;
        break;
-        case (0x00010000 | 0x10000000): state = 0;
+    case (0x00010000 | 0x10000000):
+        state = 0;
        break;
-        /* transmit succeeded  */
-        case (0x00000001 | 0x00000002 | 0x04000000):state = 1;
+    /** Transmit succeeded  */
+    case (0x00000001 | 0x00000002 | 0x04000000):
+        state = 1;
        break;
-        case (0x00000100 | 0x00000200 | 0x08000000):state = 1;
+    case (0x00000100 | 0x00000200 | 0x08000000):
+        state = 1;
        break;
-        case (0x00010000 | 0x00020000 | 0x10000000):state = 1;
+    case (0x00010000 | 0x00020000 | 0x10000000):
+        state = 1;
        break;
-        default: state = 0;
+    default:
+        state = 0;
        break;
    }
    return (uint8_t) state;
@@ -474,7 +466,7 @@ void CAN_CancelTxMailbox(CAN_T* can, CAN_TX_MAILBIX_T TxMailbox)
 }

 /*!
- * @brief     Receives a message and save to a CAN_RX_MESSAGE_T structure.
+ * @brief     Receives a message and save to a CAN_RxMessage_T structure.
 *
 * @param     can: Select the CAN peripheral.
 *
@@ -489,9 +481,9 @@ void CAN_CancelTxMailbox(CAN_T* can, CAN_TX_MAILBIX_T TxMailbox)
 *
 * @note      CAN2 applies only to APM32F103xC device.
 */
-void CAN_RxMessage(CAN_T* can, CAN_RX_FIFO_T FIFONumber, CAN_RX_MESSAGE_T* RxMessage)
+void CAN_RxMessage(CAN_T *can, CAN_RX_FIFO_T FIFONumber, CAN_RxMessage_T *RxMessage)
 {
-    /* Get the Id */
+    /** Get the Id */
    RxMessage->typeID = ((uint8_t)0x04 & (can->sRxMailBox[FIFONumber].RXMID));
    if (RxMessage->typeID == CAN_TYPEID_STD)
    {
@@ -506,14 +498,14 @@ void CAN_RxMessage(CAN_T* can, CAN_RX_FIFO_T FIFONumber, CAN_RX_MESSAGE_T* RxMes
    RxMessage->dataLengthCode = can->sRxMailBox[FIFONumber].RXDLEN_B.DLCODE;
    RxMessage->filterMatchIndex = can->sRxMailBox[FIFONumber].RXDLEN_B.FMIDX;
    /** Get the data field */
-    RxMessage->data[0] = can->sRxMailBox[FIFONumber].RXMDL_B.DATABYTE1;
-    RxMessage->data[1] = can->sRxMailBox[FIFONumber].RXMDL_B.DATABYTE2;
-    RxMessage->data[2] = can->sRxMailBox[FIFONumber].RXMDL_B.DATABYTE3;
-    RxMessage->data[3] = can->sRxMailBox[FIFONumber].RXMDL_B.DATABYTE4;
-    RxMessage->data[4] = can->sRxMailBox[FIFONumber].RXMDH_B.DATABYTE5;
-    RxMessage->data[5] = can->sRxMailBox[FIFONumber].RXMDH_B.DATABYTE6;
-    RxMessage->data[6] = can->sRxMailBox[FIFONumber].RXMDH_B.DATABYTE7;
-    RxMessage->data[7] = can->sRxMailBox[FIFONumber].RXMDH_B.DATABYTE8;
+    RxMessage->data[0] = can->sRxMailBox[FIFONumber].RXMDL_B.DATABYTE0;
+    RxMessage->data[1] = can->sRxMailBox[FIFONumber].RXMDL_B.DATABYTE1;
+    RxMessage->data[2] = can->sRxMailBox[FIFONumber].RXMDL_B.DATABYTE2;
+    RxMessage->data[3] = can->sRxMailBox[FIFONumber].RXMDL_B.DATABYTE3;
+    RxMessage->data[4] = can->sRxMailBox[FIFONumber].RXMDH_B.DATABYTE4;
+    RxMessage->data[5] = can->sRxMailBox[FIFONumber].RXMDH_B.DATABYTE5;
+    RxMessage->data[6] = can->sRxMailBox[FIFONumber].RXMDH_B.DATABYTE6;
+    RxMessage->data[7] = can->sRxMailBox[FIFONumber].RXMDH_B.DATABYTE7;

    if (FIFONumber == CAN_RX_FIFO_0)
    {
@@ -979,7 +971,9 @@ uint8_t CAN_ReadIntFlag(CAN_T* can, CAN_INT_T flag)
        switch (flag)
        {
        case CAN_INT_TXME:
-            status = can->TXSTS_B.REQCFLG0 | can->TXSTS_B.REQCFLG1 | can->TXSTS_B.REQCFLG2;
+            status = can->TXSTS_B.REQCFLG0;
+            status |= can->TXSTS_B.REQCFLG1;
+            status |= can->TXSTS_B.REQCFLG2;
            break;
        case CAN_INT_F0MP:
            status = can->RXF0_B.FMNUM0;
@@ -3,10 +3,24 @@
 *
 * @brief       This file provides all the CRC firmware functions
 *
- * @version   V1.0.1
+ * @version     V1.0.2
 *
- * @date      2021-03-23
+ * @date        2022-01-05
 *
+ * @attention
+ *
+ *  Copyright (C) 2020-2022 Geehy Semiconductor
+ *
+ *  You may not use this file except in compliance with the
+ *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
+ *
+ *  The program is only for reference, which is distributed in the hope
+ *  that it will be usefull and instructional for customers to develop
+ *  their software. Unless required by applicable law or agreed to in
+ *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
+ *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
+ *  and limitations under the License.
 */

 #include "apm32f10x_crc.h"
@@ -29,8 +43,6 @@
 * @param     None
 *
 * @retval    None
- *
- * @note
 */
 void CRC_ResetDATA(void)
 {
--- a/Show More
+++ b/Show More