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style: format code with clang-format [skip ci]

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2026-09-14 09:59:27 +08:00
committed by Rbb666
parent ca73422bd6
commit dc3da6d87f
2 changed files with 34 additions and 46 deletions
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bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.c
+2 -2
View File
@@ -33,8 +33,8 @@
*/
static const char *stm32_dma_type_name(const struct stm32_dma_config *dma_config)
{
return (dma_config->common.type == STM32_DMA_TYPE_GPDMA) ? "gpdma" :
(dma_config->common.type == STM32_DMA_TYPE_BDMA) ? "bdma" : "dma";
return (dma_config->common.type == STM32_DMA_TYPE_GPDMA) ? "gpdma" : (dma_config->common.type == STM32_DMA_TYPE_BDMA) ? "bdma"
: "dma";
}
#if defined(STM32_DMA_USES_REQUEST)
bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.h
+32 -44
View File
@@ -242,53 +242,41 @@ struct stm32_dma_config
/**
* @brief Generic descriptor initializer with explicit DMA direction and data layout.
*/
#define STM32_DMA_CONFIG_INIT_EX(_instance, _dma_rcc, _dma_irq, _channel, _request, _priority, _preempt_priority, _sub_priority, _direction, _periph_inc, _mem_inc, _periph_data_alignment, _mem_data_alignment, _mode) \
{ \
.common = { \
.Instance = (_instance), \
.type = STM32_DMA_TYPE_DMA, \
.dma_rcc = (_dma_rcc), \
.dma_irq = (_dma_irq), \
.priority = (_priority), \
.preempt_priority = (_preempt_priority), \
.sub_priority = (_sub_priority), \
STM32_DMA_REQUEST_FIELD(_request) \
.direction = (_direction), \
.mode = (_mode), \
}, \
.config.classic = { \
.periph_inc = (_periph_inc), \
.mem_inc = (_mem_inc), \
.periph_data_alignment = (_periph_data_alignment), \
.mem_data_alignment = (_mem_data_alignment), \
STM32_DMA_CHANNEL_FIELD(_channel) STM32_DMA_FIFO_FIELD_DEFAULTS \
}, \
#define STM32_DMA_CONFIG_INIT_EX(_instance, _dma_rcc, _dma_irq, _channel, _request, _priority, _preempt_priority, _sub_priority, _direction, _periph_inc, _mem_inc, _periph_data_alignment, _mem_data_alignment, _mode) \
{ \
.common = { \
.Instance = (_instance), \
.type = STM32_DMA_TYPE_DMA, \
.dma_rcc = (_dma_rcc), \
.dma_irq = (_dma_irq), \
.priority = (_priority), \
.preempt_priority = (_preempt_priority), \
.sub_priority = (_sub_priority), \
STM32_DMA_REQUEST_FIELD(_request) \
.direction = (_direction), \
.mode = (_mode), \
}, \
.config.classic = { .periph_inc = (_periph_inc), .mem_inc = (_mem_inc), .periph_data_alignment = (_periph_data_alignment), .mem_data_alignment = (_mem_data_alignment), STM32_DMA_CHANNEL_FIELD(_channel) STM32_DMA_FIFO_FIELD_DEFAULTS }, \
}
/**
* @brief Generic descriptor initializer for controllers that expose FIFO and burst fields.
*/
#define STM32_DMA_CONFIG_INIT_FIFO_EX(_instance, _dma_rcc, _dma_irq, _channel, _request, _priority, _preempt_priority, _sub_priority, _direction, _periph_inc, _mem_inc, _periph_data_alignment, _mem_data_alignment, _mode, _fifo_mode, _fifo_threshold, _mem_burst, _periph_burst) \
{ \
.common = { \
.Instance = (_instance), \
.type = STM32_DMA_TYPE_DMA, \
.dma_rcc = (_dma_rcc), \
.dma_irq = (_dma_irq), \
.priority = (_priority), \
.preempt_priority = (_preempt_priority), \
.sub_priority = (_sub_priority), \
STM32_DMA_REQUEST_FIELD(_request) \
.direction = (_direction), \
.mode = (_mode), \
}, \
.config.classic = { \
.periph_inc = (_periph_inc), \
.mem_inc = (_mem_inc), \
.periph_data_alignment = (_periph_data_alignment), \
.mem_data_alignment = (_mem_data_alignment), \
STM32_DMA_CHANNEL_FIELD(_channel) STM32_DMA_FIFO_FIELD_VALUES(_fifo_mode, _fifo_threshold, _mem_burst, _periph_burst) \
}, \
#define STM32_DMA_CONFIG_INIT_FIFO_EX(_instance, _dma_rcc, _dma_irq, _channel, _request, _priority, _preempt_priority, _sub_priority, _direction, _periph_inc, _mem_inc, _periph_data_alignment, _mem_data_alignment, _mode, _fifo_mode, _fifo_threshold, _mem_burst, _periph_burst) \
{ \
.common = { \
.Instance = (_instance), \
.type = STM32_DMA_TYPE_DMA, \
.dma_rcc = (_dma_rcc), \
.dma_irq = (_dma_irq), \
.priority = (_priority), \
.preempt_priority = (_preempt_priority), \
.sub_priority = (_sub_priority), \
STM32_DMA_REQUEST_FIELD(_request) \
.direction = (_direction), \
.mode = (_mode), \
}, \
.config.classic = { .periph_inc = (_periph_inc), .mem_inc = (_mem_inc), .periph_data_alignment = (_periph_data_alignment), .mem_data_alignment = (_mem_data_alignment), STM32_DMA_CHANNEL_FIELD(_channel) STM32_DMA_FIFO_FIELD_VALUES(_fifo_mode, _fifo_threshold, _mem_burst, _periph_burst) }, \
}
/**
@@ -336,8 +324,8 @@ struct stm32_dma_config
.dest_inc = (_dest_inc), \
.src_data_width = (_src_data_width), \
.dest_data_width = (_dest_data_width), \
.src_burst_length = STM32_GPDMA_DEFAULT_SRC_BURST_LENGTH, \
.dest_burst_length = STM32_GPDMA_DEFAULT_DEST_BURST_LENGTH, \
.src_burst_length = STM32_GPDMA_DEFAULT_SRC_BURST_LENGTH, \
.dest_burst_length = STM32_GPDMA_DEFAULT_DEST_BURST_LENGTH, \
.transfer_allocated_port = STM32_GPDMA_DEFAULT_TRANSFER_ALLOCATED_PORT, \
.transfer_event_mode = STM32_GPDMA_DEFAULT_TRANSFER_EVENT_MODE, \
}, \