From dc3da6d87fa980b5e4fe2f73a828708e69182b90 Mon Sep 17 00:00:00 2001 From: moment-NEW Date: Fri, 11 Sep 2026 06:01:46 +0000 Subject: [PATCH] style: format code with clang-format [skip ci] --- .../libraries/HAL_Drivers/drivers/drv_dma.c | 4 +- .../libraries/HAL_Drivers/drivers/drv_dma.h | 76 ++++++++----------- 2 files changed, 34 insertions(+), 46 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.c b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.c index 9c586c5ea7..4559ca9397 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.c +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.c @@ -33,8 +33,8 @@ */ static const char *stm32_dma_type_name(const struct stm32_dma_config *dma_config) { - return (dma_config->common.type == STM32_DMA_TYPE_GPDMA) ? "gpdma" : - (dma_config->common.type == STM32_DMA_TYPE_BDMA) ? "bdma" : "dma"; + return (dma_config->common.type == STM32_DMA_TYPE_GPDMA) ? "gpdma" : (dma_config->common.type == STM32_DMA_TYPE_BDMA) ? "bdma" + : "dma"; } #if defined(STM32_DMA_USES_REQUEST) diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.h b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.h index 53d5fb3274..27e0501efe 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_dma.h @@ -242,53 +242,41 @@ struct stm32_dma_config /** * @brief Generic descriptor initializer with explicit DMA direction and data layout. */ -#define STM32_DMA_CONFIG_INIT_EX(_instance, _dma_rcc, _dma_irq, _channel, _request, _priority, _preempt_priority, _sub_priority, _direction, _periph_inc, _mem_inc, _periph_data_alignment, _mem_data_alignment, _mode) \ - { \ - .common = { \ - .Instance = (_instance), \ - .type = STM32_DMA_TYPE_DMA, \ - .dma_rcc = (_dma_rcc), \ - .dma_irq = (_dma_irq), \ - .priority = (_priority), \ - .preempt_priority = (_preempt_priority), \ - .sub_priority = (_sub_priority), \ - STM32_DMA_REQUEST_FIELD(_request) \ - .direction = (_direction), \ - .mode = (_mode), \ - }, \ - .config.classic = { \ - .periph_inc = (_periph_inc), \ - .mem_inc = (_mem_inc), \ - .periph_data_alignment = (_periph_data_alignment), \ - .mem_data_alignment = (_mem_data_alignment), \ - STM32_DMA_CHANNEL_FIELD(_channel) STM32_DMA_FIFO_FIELD_DEFAULTS \ - }, \ +#define STM32_DMA_CONFIG_INIT_EX(_instance, _dma_rcc, _dma_irq, _channel, _request, _priority, _preempt_priority, _sub_priority, _direction, _periph_inc, _mem_inc, _periph_data_alignment, _mem_data_alignment, _mode) \ + { \ + .common = { \ + .Instance = (_instance), \ + .type = STM32_DMA_TYPE_DMA, \ + .dma_rcc = (_dma_rcc), \ + .dma_irq = (_dma_irq), \ + .priority = (_priority), \ + .preempt_priority = (_preempt_priority), \ + .sub_priority = (_sub_priority), \ + STM32_DMA_REQUEST_FIELD(_request) \ + .direction = (_direction), \ + .mode = (_mode), \ + }, \ + .config.classic = { .periph_inc = (_periph_inc), .mem_inc = (_mem_inc), .periph_data_alignment = (_periph_data_alignment), .mem_data_alignment = (_mem_data_alignment), STM32_DMA_CHANNEL_FIELD(_channel) STM32_DMA_FIFO_FIELD_DEFAULTS }, \ } /** * @brief Generic descriptor initializer for controllers that expose FIFO and burst fields. */ -#define STM32_DMA_CONFIG_INIT_FIFO_EX(_instance, _dma_rcc, _dma_irq, _channel, _request, _priority, _preempt_priority, _sub_priority, _direction, _periph_inc, _mem_inc, _periph_data_alignment, _mem_data_alignment, _mode, _fifo_mode, _fifo_threshold, _mem_burst, _periph_burst) \ - { \ - .common = { \ - .Instance = (_instance), \ - .type = STM32_DMA_TYPE_DMA, \ - .dma_rcc = (_dma_rcc), \ - .dma_irq = (_dma_irq), \ - .priority = (_priority), \ - .preempt_priority = (_preempt_priority), \ - .sub_priority = (_sub_priority), \ - STM32_DMA_REQUEST_FIELD(_request) \ - .direction = (_direction), \ - .mode = (_mode), \ - }, \ - .config.classic = { \ - .periph_inc = (_periph_inc), \ - .mem_inc = (_mem_inc), \ - .periph_data_alignment = (_periph_data_alignment), \ - .mem_data_alignment = (_mem_data_alignment), \ - STM32_DMA_CHANNEL_FIELD(_channel) STM32_DMA_FIFO_FIELD_VALUES(_fifo_mode, _fifo_threshold, _mem_burst, _periph_burst) \ - }, \ +#define STM32_DMA_CONFIG_INIT_FIFO_EX(_instance, _dma_rcc, _dma_irq, _channel, _request, _priority, _preempt_priority, _sub_priority, _direction, _periph_inc, _mem_inc, _periph_data_alignment, _mem_data_alignment, _mode, _fifo_mode, _fifo_threshold, _mem_burst, _periph_burst) \ + { \ + .common = { \ + .Instance = (_instance), \ + .type = STM32_DMA_TYPE_DMA, \ + .dma_rcc = (_dma_rcc), \ + .dma_irq = (_dma_irq), \ + .priority = (_priority), \ + .preempt_priority = (_preempt_priority), \ + .sub_priority = (_sub_priority), \ + STM32_DMA_REQUEST_FIELD(_request) \ + .direction = (_direction), \ + .mode = (_mode), \ + }, \ + .config.classic = { .periph_inc = (_periph_inc), .mem_inc = (_mem_inc), .periph_data_alignment = (_periph_data_alignment), .mem_data_alignment = (_mem_data_alignment), STM32_DMA_CHANNEL_FIELD(_channel) STM32_DMA_FIFO_FIELD_VALUES(_fifo_mode, _fifo_threshold, _mem_burst, _periph_burst) }, \ } /** @@ -336,8 +324,8 @@ struct stm32_dma_config .dest_inc = (_dest_inc), \ .src_data_width = (_src_data_width), \ .dest_data_width = (_dest_data_width), \ - .src_burst_length = STM32_GPDMA_DEFAULT_SRC_BURST_LENGTH, \ - .dest_burst_length = STM32_GPDMA_DEFAULT_DEST_BURST_LENGTH, \ + .src_burst_length = STM32_GPDMA_DEFAULT_SRC_BURST_LENGTH, \ + .dest_burst_length = STM32_GPDMA_DEFAULT_DEST_BURST_LENGTH, \ .transfer_allocated_port = STM32_GPDMA_DEFAULT_TRANSFER_ALLOCATED_PORT, \ .transfer_event_mode = STM32_GPDMA_DEFAULT_TRANSFER_EVENT_MODE, \ }, \