[nxp][mcx] add frdm-mcxa366 support (#11243)

* add frdm-mcxa366 support

* add frdm-mcxa366 bsp driver support

* add ALL_BSP_COMPILE.json

* fix co-pliot issue

---------

Co-authored-by: nxp-alexyang <alex.yang@nxp.com>

.github/ALL_BSP_COMPILE.json

@@ -250,6 +250,7 @@
         "nxp/mcx/mcxa/frdm-mcxa153",
         "nxp/mcx/mcxa/frdm-mcxa156",
         "nxp/mcx/mcxa/frdm-mcxa346",
+        "nxp/mcx/mcxa/frdm-mcxa366",
         "nxp/mcx/mcxe/frdm-mcxe247",
         "renesas/ebf_qi_min_6m5",
         "renesas/ra6m4-cpk",

bsp/nxp/mcx/mcxa/Libraries/drivers/drv_i2c.c

@@ -20,6 +20,11 @@
 #define DBG_LVL    DBG_INFO
 #include <rtdbg.h>
 
+#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN) || \
+     defined(CPU_MCXA366VLH) || defined(CPU_MCXA366VLL) || defined(CPU_MCXA366VLQ) || defined(CPU_MCXA366VPN))
+#define MCXA_I2C_USE_FRO_LF_DIV
+#endif
+
 enum
 {
 #ifdef BSP_USING_I2C0
@@ -55,7 +60,7 @@ struct lpc_i2c_bus lpc_obj[] =
         {
             .I2C = LPI2C0,
             .baud = 100000U,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_I2C_USE_FRO_LF_DIV)
             .clock_attach_id = kFRO_LF_DIV_to_LPI2C0,
 #else
             .clock_attach_id = kFRO12M_to_LPI2C0,
@@ -69,7 +74,7 @@ struct lpc_i2c_bus lpc_obj[] =
         {
             .I2C = LPI2C1,
             .baud = 100000U,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_I2C_USE_FRO_LF_DIV)
             .clock_attach_id = kFRO_LF_DIV_to_LPI2C1,
 #else
             .clock_attach_id = kFRO12M_to_LPI2C1,
@@ -83,7 +88,7 @@ struct lpc_i2c_bus lpc_obj[] =
         {
             .I2C = LPI2C2,
             .baud = 100000U,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_I2C_USE_FRO_LF_DIV)
             .clock_attach_id = kFRO_LF_DIV_to_LPI2C2,
 #else
             .clock_attach_id = kFRO12M_to_LPI2C2,
@@ -97,7 +102,7 @@ struct lpc_i2c_bus lpc_obj[] =
         {
             .I2C = LPI2C3,
             .baud = 100000U,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_I2C_USE_FRO_LF_DIV)
             .clock_attach_id = kFRO_LF_DIV_to_LPI2C3,
 #else
             .clock_attach_id = kFRO12M_to_LPI2C3,

bsp/nxp/mcx/mcxa/Libraries/drivers/drv_spi.c

@@ -18,6 +18,11 @@
 #define DBG_LVL    DBG_INFO
 #include <rtdbg.h>
 
+#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN) || \
+     defined(CPU_MCXA366VLH) || defined(CPU_MCXA366VLL) || defined(CPU_MCXA366VLQ) || defined(CPU_MCXA366VPN))
+#define MCXA_SPI_USE_FRO_LF_DIV
+#endif
+
 enum
 {
 #ifdef BSP_USING_SPI0
@@ -46,7 +51,7 @@ static struct lpc_spi lpc_obj[] =
 #ifdef BSP_USING_SPI0
     {
         .LPSPIx = LPSPI0,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_SPI_USE_FRO_LF_DIV)
         kFRO_LF_DIV_to_LPSPI0,
 #else
         .clock_attach_id = kFRO12M_to_LPSPI0,
@@ -59,7 +64,7 @@ static struct lpc_spi lpc_obj[] =
 #ifdef BSP_USING_SPI1
     {
         .LPSPIx = LPSPI1,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_SPI_USE_FRO_LF_DIV)
         kFRO_LF_DIV_to_LPSPI1,
 #else
         .clock_attach_id = kFRO12M_to_LPSPI1,
@@ -74,12 +79,20 @@ static struct lpc_spi lpc_obj[] =
 rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t pin)
 {
     struct rt_spi_device *spi_device = rt_malloc(sizeof(struct rt_spi_device));
+    rt_err_t ret;
+
     if (!spi_device)
     {
         return -RT_ENOMEM;
     }
 
-    return rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, pin, NULL);
+    ret = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, pin, NULL);
+    if (ret != RT_EOK)
+    {
+        rt_free(spi_device);
+    }
+
+    return ret;
 }
 
 static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)

bsp/nxp/mcx/mcxa/Libraries/drivers/drv_uart.c

@@ -18,6 +18,11 @@
 #define DBG_LVL    DBG_INFO
 #include <rtdbg.h>
 
+#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN) || \
+     defined(CPU_MCXA366VLH) || defined(CPU_MCXA366VLL) || defined(CPU_MCXA366VLQ) || defined(CPU_MCXA366VPN))
+#define MCXA_UART_USE_FRO_LF_DIV
+#endif
+
 struct mcx_uart
 {
     struct rt_serial_device     *serial;
@@ -65,7 +70,7 @@ static const struct mcx_uart uarts[] =
         LPUART0,
         LPUART0_IRQn,
         kCLOCK_Fro12M,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_UART_USE_FRO_LF_DIV)
         kFRO_LF_DIV_to_LPUART0,
 #else
         kFRO12M_to_LPUART0,
@@ -81,7 +86,7 @@ static const struct mcx_uart uarts[] =
         LPUART1,
         LPUART1_IRQn,
         kCLOCK_Fro12M,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_UART_USE_FRO_LF_DIV)
         kFRO_LF_DIV_to_LPUART1,
 #else
         kFRO12M_to_LPUART1,
@@ -97,7 +102,7 @@ static const struct mcx_uart uarts[] =
         LPUART2,
         LPUART2_IRQn,
         kCLOCK_Fro12M,
-#if (defined(CPU_MCXA346VLH) || defined(CPU_MCXA346VLL) || defined(CPU_MCXA346VLQ) || defined(CPU_MCXA346VPN))
+#if defined(MCXA_UART_USE_FRO_LF_DIV)
         kFRO_LF_DIV_to_LPUART2,
 #else
         kFRO12M_to_LPUART2,

bsp/nxp/mcx/mcxa/frdm-mcxa366/.ci/attachconfig/ci.attachconfig.yml

@@ -0,0 +1,15 @@
+scons.args: &scons
+    scons_arg:
+      - '--strict'
+
+# ------ component CI ------
+component.can:
+    kconfig:
+      - CONFIG_BSP_USING_CAN=y
+      - CONFIG_BSP_USING_CAN0=y
+
+# ------ Peripheral CI ------
+Peripheral.arduino:
+    kconfig:
+      - CONFIG_BSP_USING_ARDUINO=y
+

bsp/nxp/mcx/mcxa/frdm-mcxa366/Kconfig

@@ -0,0 +1,17 @@
+mainmenu "RT-Thread Configuration"
+
+BSP_DIR := .
+
+RTT_DIR := ../../../../..
+
+PKGS_DIR := packages
+
+config SOC_MCX
+    bool
+    select ARCH_ARM_CORTEX_M33
+    default y
+
+source "$(RTT_DIR)/Kconfig"
+osource "$PKGS_DIR/Kconfig"
+rsource "../Libraries/Kconfig"
+rsource "board/Kconfig"

bsp/nxp/mcx/mcxa/frdm-mcxa366/SConscript

@@ -0,0 +1,14 @@
+# for module compiling
+import os
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/nxp/mcx/mcxa/frdm-mcxa366/SConstruct

@@ -0,0 +1,83 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+def bsp_pkg_check():
+    import subprocess
+
+    check_paths = [
+        os.path.join("packages", "nxp-mcx-cmsis-latest"),
+        os.path.join("packages", "nxp-mcx-series-latest"),
+    ]
+
+    need_update = not all(os.path.exists(p) for p in check_paths)
+
+    if need_update:
+        print("\n===============================================================================")
+        print("Dependency packages missing, please running 'pkgs --update'...")
+        print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...")
+        print("===============================================================================")
+        exit(1)
+
+RegisterPreBuildingAction(bsp_pkg_check)
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+if rtconfig.PLATFORM == 'armcc':
+    env = Environment(tools = ['mingw'],
+        AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+        CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
+        CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+        AR = rtconfig.AR, ARFLAGS = '-rc',
+        LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
+        # overwrite cflags, because cflags has '--C99'
+        CXXCOM = '$CXX -o $TARGET --cpp -c $CXXFLAGS $_CCCOMCOM $SOURCES')
+else:
+    env = Environment(tools = ['mingw'],
+        AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+        CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
+        CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+        AR = rtconfig.AR, ARFLAGS = '-rc',
+        LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
+        CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES')
+
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM in ['iccarm']:
+    env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/Libraries'):
+    libraries_path_prefix = SDK_ROOT + '/Libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/Libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/nxp/mcx/mcxa/frdm-mcxa366/applications/SConscript

@@ -0,0 +1,18 @@
+from building import *
+import os
+
+cwd     = GetCurrentDir()
+CPPPATH = [cwd]
+src     = Glob('*.c')
+
+if GetDepend(['PKG_USING_RTDUINO']) and not GetDepend(['RTDUINO_NO_SETUP_LOOP']):
+    src += ['arduino_main.cpp']
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+list = os.listdir(cwd)
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        group = group + SConscript(os.path.join(item, 'SConscript'))
+
+Return('group')

bsp/nxp/mcx/mcxa/frdm-mcxa366/applications/arduino_main.cpp

@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-12-08     westcity-yolo  first version
+ * 
+ */
+
+#include <Arduino.h>
+
+void setup(void)
+{
+    /* put your setup code here, to run once: */
+    Serial.begin();
+    Serial.println("Hello RTduino!");
+}
+
+void loop(void)
+{
+    /* put your main code here, to run repeatedly: */
+    delay(1000);
+}

bsp/nxp/mcx/mcxa/frdm-mcxa366/applications/arduino_pinout/SConscript

@@ -0,0 +1,9 @@
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c') + Glob('*.cpp')
+inc = [cwd]
+
+group = DefineGroup('RTduino-pinout', src, depend = ['PKG_USING_RTDUINO'], CPPPATH = inc)
+
+Return('group')

bsp/nxp/mcx/mcxa/frdm-mcxa366/applications/arduino_pinout/pins_arduino.c

@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-12-08     westcity-yolo  first version
+ *
+ */
+
+#include <Arduino.h>
+#include <board.h>
+#include <drv_pin.h>
+#include "pins_arduino.h"
+
+/*
+ * {Arduino Pin, RT-Thread Pin [, Device Name, Channel]}
+ * [] means optional
+ * Digital pins must NOT give the device name and channel.
+ * Analog pins MUST give the device name and channel(ADC, PWM or DAC).
+ * Arduino Pin must keep in sequence.
+ */
+const pin_map_t pin_map_table[]=
+{
+    {D0, GET_PINS(2,3), "uart2"},      /* Serial2-RX */
+    {D1, GET_PINS(2,2), "uart2"},      /* Serial2-TX */
+    {D2, GET_PINS(3,31)},
+    {D3, GET_PINS(3,14), "pwm1", 1},    /* PWM */
+    {D4, GET_PINS(4,7)},
+    {D5, GET_PINS(3,1), "pwm0", 0},     /* PWM */
+    {D6, GET_PINS(3,17), "pwm1", 0},    /* PWM */
+    {D7, GET_PINS(3,22)},
+    {D8, GET_PINS(4,3)},
+    {D9, GET_PINS(3,13), "pwm1", 2},     /* PWM */
+    {D10, GET_PINS(3,11),"spi1"},     /* SPI-SS */
+    {D11, GET_PINS(3,8), "spi1"},     /* SPI-SDO */
+    {D12, GET_PINS(3,9), "spi1"},     /* SPI-SDI */
+    {D13, GET_PINS(3,10),"spi1"},    /* SPI-SCK */
+    {D18, GET_PINS(1,8),"i2c2"},      /* I2C-SDA (Wire) */
+    {D19, GET_PINS(1,9),"i2c2"},      /* I2C-SCL (Wire) */
+    {A0, GET_PINS(1,14),"adc1", 12},    /* ADC */
+    {A1, GET_PINS(2,5), "adc1", 1},     /* ADC */
+    {A2, GET_PINS(2,7),"adc0", 7},      /* ADC */
+    {A3, GET_PINS(3,30),"adc1", 21},
+    {A4, GET_PINS(1,0),"i2c1"},       /* I2C-SDA (Wire) */
+    {A5, GET_PINS(1,1),"i2c1"},       /* I2C-SCL (Wire) */
+
+};

bsp/nxp/mcx/mcxa/frdm-mcxa366/applications/arduino_pinout/pins_arduino.h

@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-12-08     westcity-yolo  first version
+ *
+ */
+
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+
+
+/* pins alias. Must keep in sequence */
+#define D0        (0)
+#define D1        (1)
+#define D2        (2)
+#define D3        (3)
+#define D4        (4)
+#define D5        (5)
+#define D6        (6)
+#define D7        (7)
+#define D8        (8)
+#define D9        (9)
+#define D10       (10)
+#define D11       (11)
+#define D12       (12)
+#define D13       (13)
+#define D18       (14)
+#define D19       (15)
+
+#define A0        (16)
+#define A1        (17)
+#define A2        (18)
+#define A3        (19)
+#define A4        (20)
+#define A5        (21)
+#define A6        (22)
+#define A7        (23)
+
+#define RTDUINO_PIN_MAX_LIMIT A7 /* pin number max limit check */
+
+#define F_CPU          180000000L  /* CPU:180MHz */
+
+/* i2c2 : P(,1_8-SDA P(,1_9-SCL */
+#define RTDUINO_DEFAULT_IIC_BUS_NAME    "i2c2"
+
+/* Serial2 : P(,2_2-TX  P(,2_3-RX */
+#define RTDUINO_SERIAL2_DEVICE_NAME      "uart2"
+
+/* spi1 : P(,3_8-SDO P(,3_9-SDI  P(,3_10-SCK P(,3_11-SS */
+
+#define RTDUINO_DEFAULT_SPI_BUS_NAME    "spi1"
+
+#endif /* Pins_Arduino_h */

bsp/nxp/mcx/mcxa/frdm-mcxa366/applications/drv_spi_sample_rw007.c

@@ -0,0 +1,73 @@
+#include <rtthread.h>
+
+#ifdef BSP_USING_RW007
+#include <rtdbg.h>
+#include <rtdevice.h>
+#include <board.h>
+#include <spi_wifi_rw007.h>
+
+#define BOARD_RW007_DEVICE_NAME "rw007"
+
+extern void spi_wifi_isr(int vector);
+
+static void rw007_gpio_init(void)
+{
+    /* Configure IO */
+    rt_pin_mode(BOARD_RW007_RST_PIN, PIN_MODE_OUTPUT);
+    rt_pin_mode(BOARD_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN);
+
+    /* Reset rw007 and config mode */
+    rt_pin_write(BOARD_RW007_RST_PIN, PIN_LOW);
+
+    rt_thread_delay(rt_tick_from_millisecond(100));
+    rt_pin_write(BOARD_RW007_RST_PIN, PIN_HIGH);
+
+    /* Wait rw007 ready(exit busy stat) */
+    while (!rt_pin_read(BOARD_RW007_INT_BUSY_PIN))
+    {
+        rt_thread_delay(5);
+    }
+
+    rt_thread_delay(rt_tick_from_millisecond(200));
+    rt_pin_mode(BOARD_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP);
+}
+
+int wifi_spi_device_init(void)
+{
+    int ret = 0;
+    char sn_version[32];
+
+    struct rt_spi_device *spi_device = rt_malloc(sizeof(struct rt_spi_device));
+    if (!spi_device) return -1;
+
+    rw007_gpio_init();
+    ret = rt_spi_bus_attach_device_cspin(spi_device, BOARD_RW007_DEVICE_NAME, BOARD_RW007_SPI_BUS_NAME, BOARD_RW007_CS_PIN, RT_NULL);
+    if (ret != RT_EOK) return -2;
+
+    rt_hw_wifi_init("rw007");
+
+    rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION);
+    rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP);
+
+    rw007_sn_get(sn_version);
+    rt_kprintf("\nrw007  sn: [%s]\n", sn_version);
+    rw007_version_get(sn_version);
+    rt_kprintf("rw007 ver: [%s]\n\n", sn_version);
+
+    return 0;
+}
+INIT_APP_EXPORT(wifi_spi_device_init);
+
+static void int_wifi_irq(void *p)
+{
+    ((void)p);
+    spi_wifi_isr(0);
+}
+
+void spi_wifi_hw_init(void)
+{
+    rt_pin_attach_irq(BOARD_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0);
+    rt_pin_irq_enable(BOARD_RW007_INT_BUSY_PIN, RT_TRUE);
+}
+
+#endif

bsp/nxp/mcx/mcxa/frdm-mcxa366/applications/main.c

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2006-2025, RT-Thread Development Team
+ * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-10-24     Magicoe      first version
+ * 2020-01-10     Kevin/Karl   Add PS demo
+ * 2020-09-21     supperthomas fix the main.c
+ * 2025-08-18     Alex Yang    Add P1_7 button with LED blink control
+ *
+ */
+
+#include <rtdevice.h>
+#include "drv_pin.h"
+
+#define LED_PIN        ((3*32)+18)  /* Original LED pin */
+#define BUTTON_PIN     ((1*32)+7)   /* P1_7 button pin */
+
+static rt_bool_t led_state = RT_FALSE;        /* Current LED state */
+
+
+/* Button interrupt callback function */
+void button_irq_callback(void *args)
+{
+    rt_kprintf("SW2 pressed\n");
+}
+
+int main(void)
+{
+#if defined(__CC_ARM)
+    rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
+#elif defined(__clang__)
+    rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION);
+#elif defined(__ICCARM__)
+    rt_kprintf("using iccarm, version: %d\n", __VER__);
+#elif defined(__GNUC__)
+    rt_kprintf("using gcc, version: %d.%d\n", __GNUC__, __GNUC_MINOR__);
+#endif
+
+    rt_kprintf("FRDM-MCXA366\r\n");
+
+    /* Configure LED pin as output */
+    rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
+    rt_pin_write(LED_PIN, PIN_LOW);
+
+    /* Configure button pin as input with pull-up */
+    rt_pin_mode(BUTTON_PIN, PIN_MODE_INPUT_PULLUP);
+
+    /* Attach interrupt to button pin */
+    rt_pin_attach_irq(BUTTON_PIN, PIN_IRQ_MODE_FALLING, button_irq_callback, RT_NULL);
+    rt_pin_irq_enable(BUTTON_PIN, PIN_IRQ_ENABLE);
+
+    while (1)
+    {
+        /* Toggle LED state */
+        led_state = !led_state;
+
+        rt_pin_write(LED_PIN, led_state ? PIN_HIGH : PIN_LOW);
+
+        rt_thread_mdelay(500);
+    }
+}

bsp/nxp/mcx/mcxa/frdm-mcxa366/board/Kconfig

@@ -0,0 +1,183 @@
+menu "Hardware Drivers Config"
+
+config SOC_MCXA366
+    bool
+    select SOC_MCXA366_SERIES
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
+menu "On-chip Peripheral Drivers"
+
+    config BSP_USING_DMA
+        bool "Enable DMA"
+        select RT_USING_DMA
+        default n
+
+    config BSP_USING_PIN
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+
+    menuconfig BSP_USING_UART
+        bool "Enable UART"
+        select RT_USING_UART
+        default y
+
+        if BSP_USING_UART
+            config BSP_USING_UART2
+                bool "Enable LPUART2 as default UART"
+                default y
+
+        endif
+
+
+    menuconfig BSP_USING_I2C
+        bool "Enable I2C"
+        select RT_USING_I2C
+        default y
+
+        if BSP_USING_I2C
+            config BSP_USING_I2C3
+                bool "Enable Flexcomm3 I2C"
+                default y
+        endif
+
+    menuconfig BSP_USING_SPI
+        bool "Enable SPI"
+        select RT_USING_SPI
+        default y
+
+        if BSP_USING_SPI
+            config BSP_USING_SPI1
+                bool "Enable LPSPI1"
+                default n
+        endif
+
+    menuconfig BSP_USING_ADC
+        bool "Enable ADC Channel"
+        select RT_USING_ADC
+        default y
+
+        if BSP_USING_ADC
+            config BSP_USING_ADC0_CH22
+                bool "Enable ADC0 Channel22"
+                default n
+
+        endif
+
+    config BSP_USING_RTC
+        bool "Enable RTC"
+        select RT_USING_RTC
+        default y
+
+    config BSP_USING_WDT
+        bool "Enable WatchDog"
+        select RT_USING_WDT
+        default n
+
+    menuconfig BSP_USING_CLOCK_TIMER
+        bool "Enable Timer"
+        select RT_USING_CLOCK_TIME
+        default y
+
+        if BSP_USING_CLOCK_TIMER
+            config BSP_USING_CTIMER0
+                bool "Enable CIMER0"
+                default y
+
+            config BSP_USING_CTIMER1
+                bool "Enable CIMER1"
+                default n
+
+            config BSP_USING_CTIMER3
+                bool "Enable CIMER3"
+                default n
+
+            config BSP_USING_CTIMER4
+                bool "Enable CIMER4"
+                default n
+        endif
+
+    menuconfig BSP_USING_PWM
+        bool "Enable PWM"
+        select RT_USING_PWM
+        default n
+
+        if BSP_USING_PWM
+            config BSP_USING_PWM0
+                bool "Enable eFlex PWM0"
+                default n
+            config BSP_USING_PWM1
+                bool "Enable eFlex PWM1"
+                default n
+            config BSP_USING_PWM2
+                bool "Enable eFlex PWM2"
+                default n
+        endif
+
+    menuconfig BSP_USING_CAN
+        bool "Enable CAN"
+        select RT_USING_CAN
+        default n
+        if BSP_USING_CAN
+            config BSP_USING_CAN0
+                bool "Enable CAN0"
+                default n
+            
+            config BSP_USING_CAN1
+                bool "Enable CAN1"
+                default n
+        endif
+
+endmenu
+
+menu "Onboard Peripheral Drivers"
+    config BSP_USING_ARDUINO
+        bool "Compatible with Arduino Ecosystem (RTduino)"  
+        select PKG_USING_RTDUINO
+        select BSP_USING_PIN
+        select BSP_USING_UART
+        select BSP_USING_UART2
+        select BSP_USING_I2C
+        select BSP_USING_SPI
+        select BSP_USING_SPI1
+        select BSP_USING_ADC
+        select BSP_USING_PWM
+        select BSP_USING_PWM0
+        select BSP_USING_PWM1
+ endmenu
+
+
+menu "Board extended module Drivers"
+    menuconfig BSP_USING_RW007
+        bool "Enable RW007"
+        default n
+        select BSP_USING_SPI
+        select BSP_USING_SPI1
+        select PKG_USING_RW007
+        select RT_USING_MEMPOOL
+        select RW007_NOT_USE_EXAMPLE_DRIVERS
+
+    if BSP_USING_RW007
+        config BOARD_RW007_SPI_BUS_NAME
+            string "RW007 BUS NAME"
+            default "spi1"
+
+        config BOARD_RW007_CS_PIN
+            hex "CS pin index"
+            default 107
+
+        config BOARD_RW007_INT_BUSY_PIN
+            hex "INT/BUSY pin index"
+            default 109
+
+        config BOARD_RW007_RST_PIN
+            hex "RESET pin index"
+            default 131
+    endif
+
+        
+endmenu
+
+endmenu

bsp/nxp/mcx/mcxa/frdm-mcxa366/board/MCUX_Config/board/pin_mux.h

@@ -0,0 +1,91 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 18U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_RED_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_PIN 18U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 18U)      /*!<@brief PORT pin mask */
+                                                             /* @} */
+
+/*! @name PORT3_19 (number 85), LED_GREEN
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 19U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_GREEN_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PORT3_21 (number 82), LED_BLUE
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 21U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 21U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_BLUE_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                              /* @} */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/

bsp/nxp/mcx/mcxa/frdm-mcxa366/board/SConscript

@@ -0,0 +1,25 @@
+from building import *
+
+cwd = GetCurrentDir()
+
+# add the general drivers.
+src = Split("""
+board.c
+MCUX_Config/board/clock_config.c
+MCUX_Config/board/pin_mux.c
+""")
+
+if GetDepend(['BSP_USING_RW007']):
+    src += Glob('ports/drv_spi_sample_rw007.c')
+
+CPPPATH = [cwd, cwd + '/MCUX_Config/board']
+CPPDEFINES = ['DEBUG', 'CPU_MCXA366VLQ']
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
+
+list = os.listdir(cwd)
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        group = group + SConscript(os.path.join(item, 'SConscript'))
+
+Return('group')

bsp/nxp/mcx/mcxa/frdm-mcxa366/board/board.c

@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2006-2025, RT-Thread Development Team
+ * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-02-06     yandld       first implementation
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+#include "clock_config.h"
+#include "drv_uart.h"
+
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+/**
+ * This function will initial board.
+ */
+void rt_hw_board_init()
+{
+    BOARD_InitBootPins();
+
+    /* This init has finished in secure side of TF-M  */
+    BOARD_InitBootClocks();
+
+    SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
+    /* set pend exception priority */
+    NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+
+    /*init uart device*/
+    rt_hw_uart_init();
+
+#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+
+#ifdef RT_USING_COMPONENTS_INIT
+    /* initialization board with RT-Thread Components */
+    rt_components_board_init();
+#endif
+
+#ifdef RT_USING_HEAP
+    rt_kprintf("sram heap, begin: 0x%p, end: 0x%p\n", HEAP_BEGIN, HEAP_END);
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)(HEAP_END));
+#endif
+}
+
+
+
+void rt_hw_us_delay(rt_uint32_t us)
+{
+    rt_uint32_t ticks;
+    rt_uint32_t told, tnow, tcnt = 0;
+    rt_uint32_t reload = SysTick->LOAD;
+
+    ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
+    told = SysTick->VAL;
+    while (1)
+    {
+        tnow = SysTick->VAL;
+        if (tnow != told)
+        {
+            if (tnow < told)
+            {
+                tcnt += told - tnow;
+            }
+            else
+            {
+                tcnt += reload - tnow + told;
+            }
+            told = tnow;
+            if (tcnt >= ticks)
+            {
+                break;
+            }
+        }
+    }
+}
+
+/**
+ * This function will called when memory fault.
+ */
+void MemManage_Handler(void)
+{
+    extern void HardFault_Handler(void);
+
+    rt_kprintf("Memory Fault!\n");
+    HardFault_Handler();
+}

bsp/nxp/mcx/mcxa/frdm-mcxa366/board/board.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2006-2025, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-09-22     Bernard      add board.h to this bsp
+ * 2010-02-04     Magicoe      add board.h to LPC176x bsp
+ * 2013-12-18     Bernard      porting to LPC4088 bsp
+ * 2017-08-02     XiaoYang     porting to LPC54608 bsp
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+
+#include <stdint.h>
+
+#include <rtthread.h>
+
+#include "clock_config.h"
+#include "fsl_common.h"
+#include "fsl_reset.h"
+#include "fsl_gpio.h"
+#include "pin_mux.h"
+#include "fsl_edma.h"
+
+// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
+
+// </RDTConfigurator>
+#if defined(__ARMCC_VERSION)
+extern int Image$$ARM_LIB_HEAP$$ZI$$Base;
+extern int Image$$ARM_LIB_STACK$$ZI$$Base;
+#define HEAP_BEGIN  ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base)
+#define HEAP_END    ((void*)&Image$$ARM_LIB_STACK$$ZI$$Base)
+#elif defined(__ICCARM__)
+#pragma section="HEAP"
+#define HEAP_BEGIN          (__segment_end("HEAP"))
+extern void __RTT_HEAP_END;
+#define HEAP_END            (&__RTT_HEAP_END)
+#elif defined(__GNUC__)
+extern int __HeapBase;
+extern int __HeapLimit;
+#define HEAP_BEGIN  ((void *)&__HeapBase)
+#define HEAP_END  ((void *)&__HeapLimit)
+#endif
+
+void rt_hw_board_init(void);
+
+
+#endif
+
+

bsp/nxp/mcx/mcxa/frdm-mcxa366/board/linker_scripts/MCXA366_flash.scf

@@ -0,0 +1,72 @@
+#!armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -x c
+/*
+** ###################################################################
+**     Processors:          MCXA366VLH
+**                          MCXA366VLL
+**                          MCXA366VLQ
+**                          MCXA366VPN
+**
+**     Compiler:            Keil ARM C/C++ Compiler
+**     Reference manual:    MCXAP144M180FS6_RM_Rev.1
+**     Version:             rev. 1.0, 2024-03-26
+**     Build:               b250417
+**
+**     Abstract:
+**         Linker file for the Keil ARM C/C++ Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2025 NXP
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+
+/* Sizes */
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #define Stack_Size                   0x0400
+#endif
+
+#if (defined(__heap_size__))
+  #define Heap_Size                    __heap_size__
+#else
+  #define Heap_Size                    0x0400
+#endif
+
+#define  m_interrupts_start            0x00000000
+#define  m_interrupts_size             0x00000400
+
+#define  m_text_start                  0x00000400
+#define  m_text_size                   0x000FDC00
+
+#define  m_data_start                  0x20000000
+#define  m_data_size                   0x0003C000
+
+#define  m_sramx0_start                0x04000000
+#define  m_sramx0_size                 0x00002000
+
+LR_m_text m_interrupts_start m_interrupts_size+m_text_size {   ; load region size_region
+
+  VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
+    * (.isr_vector,+FIRST)
+  }
+
+  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
+    * (InRoot$$Sections)
+    .ANY (+RO)
+  }
+
+  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
+    .ANY (+RW +ZI)
+  }
+  ARM_LIB_HEAP +0 EMPTY Heap_Size {    ; Heap region growing up
+  }
+  ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
+  }
+
+}

bsp/nxp/mcx/mcxa/frdm-mcxa366/rtconfig.py

@@ -0,0 +1,198 @@
+import os
+import sys
+
+# toolchains options
+ARCH='arm'
+CPU='cortex-m33'
+CROSS_TOOL='gcc'
+BOARD_NAME = 'frdm-mcxa366'
+BSP_LIBRARY_TYPE = 'MCXA366'
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'C:\Users\XXYYZZ'
+elif CROSS_TOOL == 'keil':
+    PLATFORM    = 'armclang'
+    EXEC_PATH   = r'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+    PLATFORM    = 'iccarm'
+    EXEC_PATH   = r'C:\Program Files\IAR Systems\Embedded Workbench 9.1'
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+#BUILD = 'release'
+
+if PLATFORM == 'gcc':
+    PREFIX = 'arm-none-eabi-'
+    CC  = PREFIX + 'gcc'
+    CXX = PREFIX + 'g++'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+    STRIP = PREFIX + 'strip'
+
+    DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+    CFLAGS = DEVICE + ' -Wall -D__FPU_PRESENT'
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__START=entry -D__STARTUP_CLEAR_BSS'
+    LFLAGS = DEVICE + ' -specs=nano.specs -specs=nosys.specs -Wl,--defsym=__heap_size__=0x8000,--gc-sections,-Map=rtthread.map,--print-memory-usage -Tboard/linker_scripts/MCXA366_flash.ld'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -gdwarf-2'
+        AFLAGS += ' -gdwarf-2'
+        CFLAGS += ' -O0'
+    else:
+        CFLAGS += ' -O2 -Os'
+
+    POST_ACTION = OBJCPY + ' -O binary --remove-section=.boot_data --remove-section=.image_vertor_table --remove-section=.ncache $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+    # module setting 
+    CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti'
+    CXXFLAGS += CFLAGS
+
+    M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
+    M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
+    M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\
+                                    ' -shared -fPIC -nostartfiles -static-libgcc'
+    M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    CXX = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu ' + CPU + '.fp.sp'
+    CFLAGS = DEVICE + ' --apcs=interwork'
+    AFLAGS = DEVICE
+    LFLAGS = DEVICE + ' --libpath "' + EXEC_PATH + '/ARM/ARMCC/lib" --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter "./board/linker_scripts/MCXA366_flash.scf" '
+
+    LFLAGS += ' --keep *.o(.rti_fn.*)   --keep *.o(FSymTab) --keep *.o(VSymTab)' 
+
+    CFLAGS += ' --diag_suppress=66,1296,186,6134'
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
+    LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
+
+    EXEC_PATH += '/arm/bin40/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    CXXFLAGS = CFLAGS
+    CFLAGS += ' --c99'
+
+    POST_ACTION = 'fromelf -z $TARGET'
+    # POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'armclang':
+    # toolchains
+    CC = 'armclang'
+    CXX = 'armclang'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu Cortex-M33 '
+    CFLAGS = ' --target=arm-arm-none-eabi'
+    CFLAGS += ' -mcpu=' + CPU
+    CFLAGS += ' -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar '
+    CFLAGS += ' -gdwarf-3 -ffunction-sections '
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers '
+    LFLAGS += ' --list rt-thread.map '
+    LFLAGS += r' --strict --scatter "packages\nxp-mcx-series-latest\MCXA366\arm\MCXA366_flash.scf" '
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib'
+
+    EXEC_PATH += '/ARM/ARMCLANG/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O1' # armclang recommend
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+        
+    CXXFLAGS = CFLAGS
+    CFLAGS += ' -std=c99'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'iccarm':
+    CC = 'iccarm'
+    CXX = 'iccarm'
+    AS = 'iasmarm'
+    AR = 'iarchive'
+    LINK = 'ilinkarm'
+    TARGET_EXT = 'out'
+
+    DEVICE = ' -D__FPU_PRESENT'
+
+    CFLAGS = DEVICE
+    CFLAGS += ' --diag_suppress Pa050'
+    CFLAGS += ' --no_cse'
+    CFLAGS += ' --no_unroll'
+    CFLAGS += ' --no_inline'
+    CFLAGS += ' --no_code_motion'
+    CFLAGS += ' --no_tbaa'
+    CFLAGS += ' --no_clustering'
+    CFLAGS += ' --no_scheduling'
+    CFLAGS += ' --debug'
+    CFLAGS += ' --endian=little'
+    CFLAGS += ' --cpu=' + CPU
+    CFLAGS += ' -e'
+    CFLAGS += ' --fpu=None'
+    CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+    CFLAGS += ' -Ol'
+    CFLAGS += ' --use_c++_inline'
+
+    AFLAGS = ''
+    AFLAGS += ' -s+'
+    AFLAGS += ' -w+'
+    AFLAGS += ' -r'
+    AFLAGS += ' --cpu ' + CPU
+    AFLAGS += ' --fpu None'
+
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
+
+    LFLAGS = ' --config "packages/nxp-mcx-series-latest/MCXA366/iar/MCXA366_flash.icf"'
+    LFLAGS += ' --redirect _Printf=_PrintfTiny'
+    LFLAGS += ' --redirect _Scanf=_ScanfSmall'
+    LFLAGS += ' --entry __iar_program_start'
+
+    CXXFLAGS = CFLAGS
+
+    EXEC_PATH = EXEC_PATH + '/arm/bin/'
+    POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
+
+def dist_handle(BSP_ROOT, dist_dir):
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), '..', 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)
+    

bsp/nxp/mcx/mcxa/frdm-mcxa366/template.uvoptx

@@ -0,0 +1,184 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rtthread-frdm-mcxa366</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>8</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>14</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\CMSIS_AGDI_V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI_V8M</Key>
+          <Name>-X"Any" -UAny -O206 -S9 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0MCXA_1024.FLM -FS00 -FL0FE000 -FP0($$Device:MCXA366VLQ$devices\MCXA366\arm\MCXA_1024.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0MCXA_1024 -FL0FE000 -FS00 -FP0($$Device:MCXA366VLQ$devices\MCXA366\arm\MCXA_1024.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>1</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>5000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+</ProjectOpt>