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audio_kconfig

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WBI\nxf44444 committed 2020-11-17 11:26:28 +08:00
2 parents 8087a90118 b0f2133563
commit bfdbcd30f4
177 files changed
+18082 -26510
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bsp/imxrt/imxrt1052-nxp-evk/.config
+32 -15
View File
@@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
@@ -63,7 +64,8 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40001
CONFIG_RT_VER_NUM=0x40003
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
@@ -108,6 +110,7 @@ CONFIG_FINSH_ARG_MAX=10
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
@@ -115,12 +118,13 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_HWTIMER is not set
CONFIG_RT_USING_CPUTIME=y
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PHY=y
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
@@ -128,10 +132,10 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
#
# Using WiFi
#
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
@@ -145,6 +149,7 @@ CONFIG_RT_USING_PIN=y
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
@@ -155,15 +160,26 @@ CONFIG_RT_USING_LIBC=y
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
CONFIG_RT_USING_NETDEV=y
CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0
# CONFIG_NETDEV_IPV6_SCOPES is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
# CONFIG_RT_USING_LWIP141 is not set
# CONFIG_RT_USING_LWIP202 is not set
# CONFIG_RT_USING_LWIP212 is not set
#
# AT commands
@@ -178,7 +194,6 @@ CONFIG_RT_USING_LIBC=y
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
@@ -230,13 +245,12 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
#
# security packages
@@ -294,6 +308,7 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
@@ -310,7 +325,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
#
# miscellaneous packages
@@ -354,10 +368,13 @@ CONFIG_BSP_USING_LPUART=y
CONFIG_BSP_USING_LPUART1=y
# CONFIG_BSP_LPUART1_RX_USING_DMA is not set
# CONFIG_BSP_LPUART1_TX_USING_DMA is not set
# CONFIG_BSP_USING_LPUART3 is not set
#
# Onboard Peripheral Drivers
#
# CONFIG_BSP_USING_SDRAM is not set
# CONFIG_BSP_USING_ETH is not set
#
# Board extended module Drivers
bsp/imxrt/imxrt1052-nxp-evk/SConstruct
+3
View File
@@ -67,5 +67,8 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, imxrt_library, 'SCons
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
# include peripherals
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'peripherals', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)
bsp/imxrt/imxrt1052-nxp-evk/board/Kconfig
+28 -7
View File
@@ -225,7 +225,6 @@ menu "Onboard Peripheral Drivers"
menuconfig BSP_USING_ETH
bool "Enable Ethernet"
select PHY_USING_KSZ8081
select RT_USING_NETDEV
default n
@@ -238,14 +237,36 @@ menu "Onboard Peripheral Drivers"
default n
if BSP_USING_ETH
config PHY_USING_KSZ8081
bool "i.MX RT1050EVKB uses ksz8081 phy"
config BSP_USING_PHY
select RT_USING_PHY
bool "Enable ethernet phy"
default y
config FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE
bool "Enable the PHY ksz8081 RMII50M mode"
depends on PHY_USING_KSZ8081
default y
if BSP_USING_PHY
config PHY_DEVICE_ADDRESS
int "Specify address of phy device"
default 2
config PHY_USING_KSZ8081
bool "i.MX RT1064EVK uses ksz8081 phy"
default y
if PHY_USING_KSZ8081
config PHY_RESET_PORT
int "indicate port of reset"
default 1
config PHY_RESET_PIN
int "indicate pin of reset"
default 9
config FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE
bool "Enable the PHY ksz8081 RMII50M mode"
depends on PHY_USING_KSZ8081
default y
endif
endif
endif
config BSP_USING_RGB
bool "Enable RGB LED (PWM1_CH3A, PWM4_CH0A and PWM4_CH1A)"
bsp/imxrt/imxrt1052-nxp-evk/board/SConscript
-4
View File
@@ -12,10 +12,6 @@ MCUX_Config/pin_mux.c
CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports']
CPPDEFINES = ['CPU_MIMXRT1052DVL6B', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1','XIP_EXTERNAL_FLASH=1']
if GetDepend(['PHY_USING_KSZ8081']):
src += Glob('ports/phyksz8081/fsl_phy.c')
CPPPATH += [cwd + '/ports/phyksz8081']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
Return('group')
bsp/imxrt/imxrt1052-nxp-evk/board/ports/phyksz8081/fsl_phy.c
-315
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File diff suppressed because it is too large. Load diff
bsp/imxrt/imxrt1052-nxp-evk/board/ports/phyksz8081/fsl_phy.h
-200
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@@ -1,200 +0,0 @@
/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _FSL_PHY_H_
#define _FSL_PHY_H_
#include "fsl_enet.h"
/*!
* @addtogroup phy_driver
* @{
*/
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief PHY driver version */
#define FSL_PHY_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
/*! @brief Defines the PHY registers. */
#define PHY_BASICCONTROL_REG 0x00U /*!< The PHY basic control register. */
#define PHY_BASICSTATUS_REG 0x01U /*!< The PHY basic status register. */
#define PHY_ID1_REG 0x02U /*!< The PHY ID one register. */
#define PHY_ID2_REG 0x03U /*!< The PHY ID two register. */
#define PHY_AUTONEG_ADVERTISE_REG 0x04U /*!< The PHY auto-negotiate advertise register. */
#define PHY_CONTROL1_REG 0x1EU /*!< The PHY control one register. */
#define PHY_CONTROL2_REG 0x1FU /*!< The PHY control two register. */
#define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
/*! @brief Defines the mask flag in basic control register. */
#define PHY_BCTL_DUPLEX_MASK 0x0100U /*!< The PHY duplex bit mask. */
#define PHY_BCTL_RESTART_AUTONEG_MASK 0x0200U /*!< The PHY restart auto negotiation mask. */
#define PHY_BCTL_AUTONEG_MASK 0x1000U /*!< The PHY auto negotiation bit mask. */
#define PHY_BCTL_SPEED_MASK 0x2000U /*!< The PHY speed bit mask. */
#define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */
#define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */
#define PHY_BCTL_SPEED_100M_MASK 0x2000U /*!< The PHY 100M speed mask. */
/*!@brief Defines the mask flag of operation mode in control two register*/
#define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
#define PHY_CTL2_REFCLK_SELECT_MASK 0x0080U /*!< The PHY RMII reference clock select. */
#define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */
#define PHY_CTL1_100HALFDUPLEX_MASK 0x0002U /*!< The PHY 100M half duplex mask. */
#define PHY_CTL1_10FULLDUPLEX_MASK 0x0005U /*!< The PHY 10M full duplex mask. */
#define PHY_CTL1_100FULLDUPLEX_MASK 0x0006U /*!< The PHY 100M full duplex mask. */
#define PHY_CTL1_SPEEDUPLX_MASK 0x0007U /*!< The PHY speed and duplex mask. */
#define PHY_CTL1_ENERGYDETECT_MASK 0x10U /*!< The PHY signal present on rx differential pair. */
#define PHY_CTL1_LINKUP_MASK 0x100U /*!< The PHY link up. */
#define PHY_LINK_READY_MASK (PHY_CTL1_ENERGYDETECT_MASK | PHY_CTL1_LINKUP_MASK)
/*! @brief Defines the mask flag in basic status register. */
#define PHY_BSTATUS_LINKSTATUS_MASK 0x0004U /*!< The PHY link status mask. */
#define PHY_BSTATUS_AUTONEGABLE_MASK 0x0008U /*!< The PHY auto-negotiation ability mask. */
#define PHY_BSTATUS_AUTONEGCOMP_MASK 0x0020U /*!< The PHY auto-negotiation complete mask. */
/*! @brief Defines the mask flag in PHY auto-negotiation advertise register. */
#define PHY_100BaseT4_ABILITY_MASK 0x200U /*!< The PHY have the T4 ability. */
#define PHY_100BASETX_FULLDUPLEX_MASK 0x100U /*!< The PHY has the 100M full duplex ability.*/
#define PHY_100BASETX_HALFDUPLEX_MASK 0x080U /*!< The PHY has the 100M full duplex ability.*/
#define PHY_10BASETX_FULLDUPLEX_MASK 0x040U /*!< The PHY has the 10M full duplex ability.*/
#define PHY_10BASETX_HALFDUPLEX_MASK 0x020U /*!< The PHY has the 10M full duplex ability.*/
/*! @brief Defines the PHY status. */
enum _phy_status
{
kStatus_PHY_SMIVisitTimeout = MAKE_STATUS(kStatusGroup_PHY, 1), /*!< ENET PHY SMI visit timeout. */
kStatus_PHY_AutoNegotiateFail = MAKE_STATUS(kStatusGroup_PHY, 2) /*!< ENET PHY AutoNegotiate Fail. */
};
/*! @brief Defines the PHY link speed. This is align with the speed for ENET MAC. */
typedef enum _phy_speed
{
kPHY_Speed10M = 0U, /*!< ENET PHY 10M speed. */
kPHY_Speed100M /*!< ENET PHY 100M speed. */
} phy_speed_t;
/*! @brief Defines the PHY link duplex. */
typedef enum _phy_duplex
{
kPHY_HalfDuplex = 0U, /*!< ENET PHY half duplex. */
kPHY_FullDuplex /*!< ENET PHY full duplex. */
} phy_duplex_t;
/*! @brief Defines the PHY loopback mode. */
typedef enum _phy_loop
{
kPHY_LocalLoop = 0U, /*!< ENET PHY local loopback. */
kPHY_RemoteLoop /*!< ENET PHY remote loopback. */
} phy_loop_t;
/*******************************************************************************
* API
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @name PHY Driver
* @{
*/
/*!
* @brief Initializes PHY.
*
* This function initialize the SMI interface and initialize PHY.
* The SMI is the MII management interface between PHY and MAC, which should be
* firstly initialized before any other operation for PHY. The PHY initialize with auto-negotiation.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param srcClock_Hz The module clock frequency - system clock for MII management interface - SMI.
* @retval kStatus_Success PHY initialize success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
* @retval kStatus_PHY_AutoNegotiateFail PHY auto negotiate fail
*/
status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
/*!
* @brief PHY Write function. This function write data over the SMI to
* the specified PHY register. This function is called by all PHY interfaces.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param phyReg The PHY register.
* @param data The data written to the PHY register.
* @retval kStatus_Success PHY write success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
/*!
* @brief PHY Read function. This interface read data over the SMI from the
* specified PHY register. This function is called by all PHY interfaces.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param phyReg The PHY register.
* @param dataPtr The address to store the data read from the PHY register.
* @retval kStatus_Success PHY read success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
/*!
* @brief Enables/disables PHY loopback.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param mode The loopback mode to be enabled, please see "phy_loop_t".
* the two loopback mode should not be both set. when one loopback mode is set
* the other one should be disabled.
* @param speed PHY speed for loopback mode.
* @param enable True to enable, false to disable.
* @retval kStatus_Success PHY loopback success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, phy_speed_t speed, bool enable);
/*!
* @brief Gets the PHY link status.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param status The link up or down status of the PHY.
* - true the link is up.
* - false the link is down.
* @retval kStatus_Success PHY get link status success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
/*!
* @brief Gets the PHY link speed and duplex.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param speed The address of PHY link speed.
* @param duplex The link duplex of PHY.
* @retval kStatus_Success PHY get link speed and duplex success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t *duplex);
/* @} */
#if defined(__cplusplus)
}
#endif
/*! @}*/
#endif /* _FSL_PHY_H_ */
bsp/imxrt/imxrt1052-nxp-evk/rtconfig.h
+13 -7
View File
@@ -40,7 +40,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40001
#define RT_VER_NUM 0x40003
/* RT-Thread Components */
@@ -78,11 +78,9 @@
#define RT_USING_SERIAL
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_CPUTIME
#define RT_USING_PHY
#define RT_USING_PIN
/* Using WiFi */
/* Using USB */
@@ -95,12 +93,19 @@
/* Socket abstraction layer */
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
/* Modbus master and slave stack */
/* AT commands */
@@ -163,6 +168,7 @@
/* Onboard Peripheral Drivers */
/* Board extended module Drivers */
bsp/imxrt/imxrt1064-nxp-evk/README.md
+1 -1
View File
@@ -39,7 +39,7 @@
| :----------------- | :----------: | :------------------------------------- |
| USB 转串口 | 支持 | |
| SPI Flash | 支持 | |
| 以太网 | 暂不支持 | |
| 以太网 | 支持 | |
| SD卡 | 暂不支持 | |
| CAN | 暂不支持 | |
| **片上外设** | **支持情况** | **备注** |
bsp/imxrt/imxrt1064-nxp-evk/SConstruct
+3
View File
@@ -66,5 +66,8 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, imxrt_library, 'SCons
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
# include peripherals
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'peripherals', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)
bsp/imxrt/imxrt1064-nxp-evk/applications/main.c
+2
View File
@@ -18,6 +18,7 @@
int main(void)
{
#ifndef PHY_USING_KSZ8081
/* set LED0 pin mode to output */
rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
@@ -28,6 +29,7 @@ int main(void)
rt_pin_write(LED0_PIN, PIN_LOW);
rt_thread_mdelay(500);
}
#endif
}
void reboot(void)
bsp/imxrt/imxrt1064-nxp-evk/board/Kconfig
+42
View File
@@ -37,7 +37,49 @@ menu "On-chip Peripheral Drivers"
endmenu
menu "Onboard Peripheral Drivers"
config BSP_USING_SDRAM
bool "Enable SDRAM"
default n
menuconfig BSP_USING_ETH
bool "Enable Ethernet"
select RT_USING_NETDEV
default n
if BSP_USING_ETH
config BSP_USING_PHY
select RT_USING_PHY
bool "Enable ethernet phy"
default y
if BSP_USING_PHY
config PHY_DEVICE_ADDRESS
int "Specify address of phy device"
default 2
config PHY_USING_KSZ8081
bool "i.MX RT1064EVK uses ksz8081 phy"
default y
if PHY_USING_KSZ8081
config PHY_RESET_PORT
int "indicate port of reset"
default 1
config PHY_RESET_PIN
int "indicate pin of reset"
default 9
config FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE
bool "Enable the PHY ksz8081 RMII50M mode"
depends on PHY_USING_KSZ8081
default y
endif
endif
endif
endmenu
menu "Board extended module Drivers"
bsp/imxrt/imxrt1064-nxp-evk/board/MCUX_Config/clock_config.c
+98 -122
View File
File diff suppressed because it is too large. Load diff
bsp/imxrt/imxrt1064-nxp-evk/board/SConscript
+1 -1
View File
@@ -13,7 +13,7 @@ MCUX_Config/pin_mux.c
CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports']
CPPDEFINES = ['CPU_MIMXRT1064DVL6A', 'STD=C99', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL','XIP_EXTERNAL_FLASH=1', 'XIP_BOOT_HEADER_ENABLE=1']
CPPDEFINES = ['CPU_MIMXRT1064DVL6A', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1','XIP_EXTERNAL_FLASH=1', 'XIP_BOOT_HEADER_ENABLE=1', 'XIP_BOOT_HEADER_DCD_ENABLE=1']
if rtconfig.CROSS_TOOL == 'keil':
CPPDEFINES.append('__FPU_PRESENT=1')
bsp/imxrt/imxrt1064-nxp-evk/board/board.c
+355
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File diff suppressed because it is too large. Load diff
bsp/imxrt/imxrt1064-nxp-evk/board/board.h
+6
View File
@@ -45,5 +45,11 @@ extern int heap_end;
void rt_hw_board_init(void);
#ifdef BSP_USING_ETH
void imxrt_enet_pins_init(void);
void imxrt_enet_phy_reset_by_gpio(void);
#endif
#endif
bsp/imxrt/imxrt1064-nxp-evk/board/linker_scripts/link.sct
+3 -1
View File
@@ -66,6 +66,8 @@
#define m_data3_start 0x00000000 ; ITCM 128KB
#define m_data3_size 0x00020000
#define m_ncache_start 0x81E00000
#define m_ncache_size 0x00200000
/* Sizes */
#if (defined(__stack_size__))
@@ -124,7 +126,7 @@ LR_IROM1 m_text_start m_text_size
RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
; ncache RW data
RW_m_ncache m_data2_start m_data2_size
RW_m_ncache m_ncache_start m_ncache_size
{
* (NonCacheable.init)
* (NonCacheable)
bsp/imxrt/imxrt1064-nxp-evk/board/ports/sdram_port.h
+49
View File
@@ -0,0 +1,49 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-05 zylx The first version for STM32F4xx
* 2019-4-25 misonyo port to IMXRT
*/
#ifndef SDRAM_PORT_H__
#define SDRAM_PORT_H__
/* parameters for sdram peripheral */
#define SDRAM_BANK_ADDR ((uint32_t)0x80000000U)
/* region#0/1/2/3: kSEMC_SDRAM_CS0/1/2/3 */
#define SDRAM_REGION kSEMC_SDRAM_CS0
/* CS pin: kSEMC_MUXCSX0/1/2/3 */
#define SDRAM_CS_PIN kSEMC_MUXCSX0
/* size(kbyte):32MB = 32*1024*1KBytes */
#define SDRAM_SIZE ((uint32_t)0x8000)
/* data width: kSEMC_PortSize8Bit,kSEMC_PortSize16Bit */
#define SDRAM_DATA_WIDTH kSEMC_PortSize16Bit
/* column bit numbers: kSEMC_SdramColunm_9/10/11/12bit */
#define SDRAM_COLUMN_BITS kSEMC_SdramColunm_9bit
/* cas latency clock number: kSEMC_LatencyOne/Two/Three */
#define SDRAM_CAS_LATENCY kSEMC_LatencyThree
/* Timing configuration for W9825G6KH */
/* TRP:precharge to active command time (ns) */
#define SDRAM_TRP 18
/* TRCD:active to read/write command delay time (ns) */
#define SDRAM_TRCD 18
/* The time between two refresh commands,Use the maximum of the (Trfc , Txsr).(ns) */
#define SDRAM_REFRESH_RECOVERY 67
/* TWR:write recovery time (ns). */
#define SDRAM_TWR 12
/* TRAS:active to precharge command time (ns). */
#define SDRAM_TRAS 42
/* TRC time (ns). */
#define SDRAM_TRC 60
/* active to active time (ns). */
#define SDRAM_ACT2ACT 60
/* refresh time (ns). 64ms */
#define SDRAM_REFRESH_ROW 64 * 1000000 / 8192
#endif /* SDRAM_PORT_H__ */
bsp/imxrt/imxrt1064-nxp-evk/rtconfig.py
+3 -3
View File
@@ -48,7 +48,7 @@ if PLATFORM == 'gcc':
DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -Wall -D__FPU_PRESENT -eentry'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds -Xlinker -print-memory-usage'
CPATH = ''
LPATH = ''
@@ -57,8 +57,8 @@ if PLATFORM == 'gcc':
AFLAGS += ' -D__STARTUP_CLEAR_BSS'
if BUILD == 'debug':
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -g'
AFLAGS += ' -g'
CFLAGS += ' -O0'
else:
CFLAGS += ' -O2 -Os'
bsp/imxrt/libraries/drivers/SConscript
+3
View File
@@ -44,6 +44,9 @@ if GetDepend('BSP_USING_LCD'):
if GetDepend('BSP_USING_ETH'):
src += ['drv_eth.c']
if GetDepend('BSP_USING_PHY'):
src += ['drv_mdio.c']
if GetDepend('BSP_USING_AUDIO'):
src += ['drv_sai.c']
bsp/imxrt/libraries/drivers/drv_eth.c
+53 -37
View File
@@ -7,6 +7,7 @@
* Date Author Notes
* 2017-10-10 Tanek the first version
* 2019-5-10 misonyo add DMA TX and RX function
* 2020-10-14 wangqiang use phy device in phy monitor thread
*/
#include <rtthread.h>
@@ -19,7 +20,6 @@
#include "fsl_enet.h"
#include "fsl_gpio.h"
#include "fsl_phy.h"
#include "fsl_cache.h"
#include "fsl_iomuxc.h"
#include "fsl_common.h"
@@ -537,31 +537,47 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
return NULL;
}
#ifdef BSP_USING_PHY
static struct rt_phy_device *phy_dev = RT_NULL;
static void phy_monitor_thread_entry(void *parameter)
{
phy_speed_t speed;
phy_duplex_t duplex;
bool link = false;
rt_uint32_t speed;
rt_uint32_t duplex;
rt_bool_t link = RT_FALSE;
imxrt_enet_phy_reset_by_gpio();
PHY_Init(imxrt_eth_device.enet_base, PHY_ADDRESS, CLOCK_GetFreq(kCLOCK_AhbClk));
phy_dev = (struct rt_phy_device *)rt_device_find("rtt-phy");
if ((RT_NULL == phy_dev) || (RT_NULL == phy_dev->ops))
{
// TODO print warning information
LOG_E("Can not find phy device called \"rtt-phy\"");
return ;
}
if (RT_NULL == phy_dev->ops->init)
{
LOG_E("phy driver error!");
return ;
}
rt_phy_status status = phy_dev->ops->init(imxrt_eth_device.enet_base, PHY_DEVICE_ADDRESS, CLOCK_GetFreq(kCLOCK_AhbClk));
if (PHY_STATUS_OK != status)
{
LOG_E("Phy device initialize unsuccessful!\n");
return ;
}
while (1)
{
bool new_link = false;
status_t status = PHY_GetLinkStatus(imxrt_eth_device.enet_base, PHY_ADDRESS, &new_link);
rt_bool_t new_link = RT_FALSE;
rt_phy_status status = phy_dev->ops->get_link_status(&new_link);
if ((status == kStatus_Success) && (link != new_link))
if ((PHY_STATUS_OK == status) && (link != new_link))
{
link = new_link;
if (link) // link up
if (link) // link up
{
PHY_GetLinkSpeedDuplex(imxrt_eth_device.enet_base,
PHY_ADDRESS, &speed, &duplex);
phy_dev->ops->get_link_speed_duplex(&speed, &duplex);
if (kPHY_Speed10M == speed)
if (PHY_SPEED_10M == speed)
{
dbg_log(DBG_LOG, "10M\n");
}
@@ -570,7 +586,7 @@ static void phy_monitor_thread_entry(void *parameter)
dbg_log(DBG_LOG, "100M\n");
}
if (kPHY_HalfDuplex == duplex)
if (PHY_HALF_DUPLEX == duplex)
{
dbg_log(DBG_LOG, "half dumplex\n");
}
@@ -579,8 +595,7 @@ static void phy_monitor_thread_entry(void *parameter)
dbg_log(DBG_LOG, "full dumplex\n");
}
if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed)
|| (imxrt_eth_device.duplex != (enet_mii_duplex_t)duplex))
if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed) || (imxrt_eth_device.duplex != (enet_mii_duplex_t)duplex))
{
imxrt_eth_device.speed = (enet_mii_speed_t)speed;
imxrt_eth_device.duplex = (enet_mii_duplex_t)duplex;
@@ -605,6 +620,7 @@ static void phy_monitor_thread_entry(void *parameter)
rt_thread_delay(RT_TICK_PER_SECOND * 2);
}
}
#endif
static int rt_hw_imxrt_eth_init(void)
{
@@ -657,6 +673,7 @@ static int rt_hw_imxrt_eth_init(void)
/* start phy monitor */
{
#ifdef BSP_USING_PHY
rt_thread_t tid;
tid = rt_thread_create("phy",
phy_monitor_thread_entry,
@@ -666,6 +683,7 @@ static int rt_hw_imxrt_eth_init(void)
2);
if (tid != RT_NULL)
rt_thread_startup(tid);
#endif
}
return state;
@@ -673,50 +691,47 @@ static int rt_hw_imxrt_eth_init(void)
INIT_DEVICE_EXPORT(rt_hw_imxrt_eth_init);
#endif
#ifdef RT_USING_FINSH
#if defined(RT_USING_FINSH) && defined(RT_USING_PHY)
#include <finsh.h>
void phy_read(uint32_t phyReg)
void phy_read(rt_uint32_t phy_reg)
{
uint32_t data;
status_t status;
rt_uint32_t data;
status = PHY_Read(imxrt_eth_device.enet_base, PHY_ADDRESS, phyReg, &data);
if (kStatus_Success == status)
rt_phy_status status = phy_dev->ops->read(phy_reg, &data);
if (PHY_STATUS_OK == status)
{
rt_kprintf("PHY_Read: %02X --> %08X", phyReg, data);
rt_kprintf("PHY_Read: %02X --> %08X", phy_reg, data);
}
else
{
rt_kprintf("PHY_Read: %02X --> faild", phyReg);
rt_kprintf("PHY_Read: %02X --> faild", phy_reg);
}
}
void phy_write(uint32_t phyReg, uint32_t data)
void phy_write(rt_uint32_t phy_reg, rt_uint32_t data)
{
status_t status;
status = PHY_Write(imxrt_eth_device.enet_base, PHY_ADDRESS, phyReg, data);
if (kStatus_Success == status)
rt_phy_status status = phy_dev->ops->write(phy_reg, data);
if (PHY_STATUS_OK == status)
{
rt_kprintf("PHY_Write: %02X --> %08X\n", phyReg, data);
rt_kprintf("PHY_Write: %02X --> %08X\n", phy_reg, data);
}
else
{
rt_kprintf("PHY_Write: %02X --> faild\n", phyReg);
rt_kprintf("PHY_Write: %02X --> faild\n", phy_reg);
}
}
void phy_dump(void)
{
uint32_t data;
status_t status;
rt_uint32_t data;
rt_phy_status status;
int i;
for (i = 0; i < 32; i++)
{
status = PHY_Read(imxrt_eth_device.enet_base, PHY_ADDRESS, i, &data);
if (kStatus_Success != status)
status = phy_dev->ops->read(i, &data);
if (PHY_STATUS_OK != status)
{
rt_kprintf("phy_dump: %02X --> faild", i);
break;
@@ -730,10 +745,11 @@ void phy_dump(void)
{
rt_kprintf("%02X --> %08X\n", i, data);
}
}
}
#endif
#if defined(RT_USING_FINSH) && defined(RT_USING_LWIP)
void enet_reg_dump(void)
{
ENET_Type *enet_base = imxrt_eth_device.enet_base;
bsp/imxrt/libraries/drivers/drv_mdio.c
+160
View File
@@ -0,0 +1,160 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-09-29 WangQiang the first version
*
*/
#include <rtthread.h>
#ifdef BSP_USING_PHY
#define LOG_TAG "drv.mdio"
#include <drv_log.h>
#include <rtdevice.h>
#include "drv_mdio.h"
/*! @brief Defines the timeout macro. */
#define PHY_TIMEOUT_COUNT 0x3FFFFFFU
/*!
* @brief Get the ENET instance from peripheral base address.
*
* @param base ENET peripheral base address.
* @return ENET instance.
*/
extern uint32_t ENET_GetInstance(ENET_Type *base);
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to enet clocks for each instance. */
extern clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT];
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
static rt_bool_t rt_hw_mdio_init(void *bus, rt_uint32_t src_clock_hz)
{
struct rt_mdio_bus *bus_obj = (struct rt_mdio_bus *)bus;
uint32_t instance = ENET_GetInstance((ENET_Type *)(bus_obj->hw_obj));
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/* Set SMI first. */
CLOCK_EnableClock(s_enetClock[instance]);
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
ENET_SetSMI((ENET_Type *)(bus_obj->hw_obj), src_clock_hz, RT_FALSE);
return RT_TRUE;
}
static rt_size_t rt_hw_mdio_read(void *bus, rt_uint32_t addr, rt_uint32_t reg, void *data, rt_uint32_t size)
{
RT_ASSERT(data);
struct rt_mdio_bus *bus_obj = (struct rt_mdio_bus *)bus;
rt_uint32_t counter;
rt_uint32_t *data_ptr = (rt_uint32_t *)data;
if (4 != size)
{
return 0;
}
/* Clear the MII interrupt event. */
ENET_ClearInterruptStatus((ENET_Type *)(bus_obj->hw_obj), ENET_EIR_MII_MASK);
/* Starts a SMI read command operation. */
ENET_StartSMIRead((ENET_Type *)(bus_obj->hw_obj), addr, reg, kENET_MiiReadValidFrame);
/* Wait for MII complete. */
for (counter = PHY_TIMEOUT_COUNT; counter > 0; counter--)
{
if (ENET_GetInterruptStatus((ENET_Type *)(bus_obj->hw_obj)) & ENET_EIR_MII_MASK)
{
break;
}
}
/* Check for timeout. */
if (!counter)
{
// return kStatus_PHY_SMIVisitTimeout;
return 0;
}
/* Get data from MII register. */
*data_ptr = ENET_ReadSMIData((ENET_Type *)(bus_obj->hw_obj));
/* Clear MII interrupt event. */
ENET_ClearInterruptStatus((ENET_Type *)bus_obj->hw_obj, ENET_EIR_MII_MASK);
return 4;
}
static rt_size_t rt_hw_mdio_write(void *bus, rt_uint32_t addr, rt_uint32_t reg, void *data, rt_uint32_t size)
{
struct rt_mdio_bus *bus_obj = (struct rt_mdio_bus *)bus;
uint32_t counter;
rt_uint32_t *data_ptr = (rt_uint32_t *)data;
if (4 != size)
{
return 0;
}
/* Clear the SMI interrupt event. */
ENET_ClearInterruptStatus((ENET_Type *)(bus_obj->hw_obj), ENET_EIR_MII_MASK);
/* Starts a SMI write command. */
ENET_StartSMIWrite((ENET_Type *)(bus_obj->hw_obj), addr, reg, kENET_MiiWriteValidFrame, *data_ptr);
/* Wait for SMI complete. */
for (counter = PHY_TIMEOUT_COUNT; counter > 0; counter--)
{
if (ENET_GetInterruptStatus((ENET_Type *)(bus_obj->hw_obj)) & ENET_EIR_MII_MASK)
{
break;
}
}
/* Check for timeout. */
if (!counter)
{
return 0;
}
/* Clear MII interrupt event. */
ENET_ClearInterruptStatus((ENET_Type *)(bus_obj->hw_obj), ENET_EIR_MII_MASK);
return size;
}
static struct rt_mdio_bus_ops imxrt_mdio_ops =
{
.init = rt_hw_mdio_init,
.read = rt_hw_mdio_read,
.write = rt_hw_mdio_write,
.uninit = RT_NULL,
};
static rt_mdio_t mdio_bus;
rt_mdio_t *rt_hw_mdio_register(void *hw_obj, char *name)
{
mdio_bus.hw_obj = hw_obj;
mdio_bus.name = name;
mdio_bus.ops = &imxrt_mdio_ops;
return &mdio_bus;
}
rt_mdio_t *rt_hw_mdio_get(void)
{
return &mdio_bus;
}
#endif
bsp/imxrt/libraries/drivers/drv_mdio.h
+25
View File
@@ -0,0 +1,25 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-09-29 WangQiang the first version
*
*/
#ifndef DRV_MDIO_H__
#define DRV_MDIO_H__
#include <rtdevice.h>
#include "fsl_enet.h"
rt_mdio_t *rt_hw_mdio_register(void *hw_obj, char *name);
rt_mdio_t *rt_hw_mdio_get(void);
#endif /*DRV_MDIO_H__*/
bsp/imxrt/libraries/peripherals/SConscript
+16
View File
@@ -0,0 +1,16 @@
from building import *
src = []
cwd = []
CPPDEFINES = []
cwd = GetCurrentDir()
if GetDepend('BSP_USING_PHY') and GetDepend('PHY_USING_KSZ8081'):
src += ['phyksz8081.c']
path = [cwd]
group = DefineGroup('Peripherals', src, depend = [''], CPPPATH = path, CPPDEFINES=CPPDEFINES)
Return('group')
bsp/imxrt/libraries/peripherals/phyksz8081.c
+369
View File
File diff suppressed because it is too large. Load diff
bsp/imxrt/tools/sdk_dist.py
+3
View File
@@ -21,3 +21,6 @@ def dist_do_building(BSP_ROOT, dist_dir=None):
print("=> copy bsp drivers")
bsp_copy_files(os.path.join(library_path, 'drivers'), os.path.join(library_dir, 'drivers'))
shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig'))
print("=> copy bsp peripherals")
bsp_copy_files(os.path.join(library_path, 'peripherals'), os.path.join(library_dir, 'peripherals'))
bsp/nrf5x/libraries/drivers/SConscript
+4 -2
View File
@@ -9,8 +9,10 @@ src = Split("""
""")
if GetDepend(['BSP_USING_UART']):
src += ['drv_uart.c']
if GetDepend(['NRFX_USING_UART']):
src += ['drv_uart.c']
else:
src += ['drv_uarte.c']
if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
src += ['drv_flash.c']
bsp/nrf5x/libraries/drivers/drv_spi.c
+34 -20
View File
@@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2020-05-22 Sherman first version
* 2020-11-02 xckhmf fixed bug
*/
#include <stdint.h>
@@ -19,6 +20,7 @@
#ifdef BSP_USING_SPI
#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2)
static struct nrfx_drv_spi_config spi_config[] =
{
#ifdef BSP_USING_SPI0
@@ -117,12 +119,12 @@ static rt_err_t spi_configure(struct rt_spi_device *device,
nrfx_spi_t spi = spi_bus_obj[index].spi;
nrfx_spi_config_t config = NRFX_SPI_DEFAULT_CONFIG(bsp_spi_pin[index].sck_pin,
bsp_spi_pin[index].mosi_pin, bsp_spi_pin[index].miso_pin, bsp_spi_pin[index].ss_pin);
bsp_spi_pin[index].mosi_pin, bsp_spi_pin[index].miso_pin, NRFX_SPI_PIN_NOT_USED);
/* spi config ss pin */
if(device->user_data != RT_NULL)
if(device->parent.user_data != RT_NULL)
{
config.ss_pin = (rt_uint8_t)device->user_data;
nrf_gpio_cfg_output((uint32_t)device->parent.user_data);
}
/* spi config bit order */
if(configuration->mode & RT_SPI_MSB)
@@ -198,32 +200,43 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
RT_ASSERT(device->bus->parent.user_data != RT_NULL);
rt_uint8_t index = spi_index_find(device->bus);
nrfx_err_t nrf_ret;
RT_ASSERT(index != 0xFF);
nrfx_spi_t * p_instance = &spi_bus_obj[index].spi;
nrfx_spi_xfer_desc_t p_xfer_desc;
if(message->cs_take == 1)
{
nrf_gpio_pin_clear((uint32_t)device->parent.user_data);
}
p_xfer_desc.p_rx_buffer = message->recv_buf;
p_xfer_desc.rx_length = message->length;
p_xfer_desc.p_tx_buffer = message->send_buf;
p_xfer_desc.tx_length = message->length ;
if(message->send_buf == RT_NULL)
{
p_xfer_desc.p_rx_buffer = message->recv_buf;
p_xfer_desc.rx_length = message->length;
p_xfer_desc.p_tx_buffer = RT_NULL;
p_xfer_desc.tx_length = 0;
}
if(message->recv_buf == RT_NULL)
{
p_xfer_desc.rx_length = 0;
}
nrf_ret = nrfx_spi_xfer(p_instance, &p_xfer_desc, 0);
if(message->cs_release == 1)
{
nrf_gpio_pin_set((uint32_t)device->parent.user_data);
}
if( NRFX_SUCCESS != nrf_ret)
{
return 0;
}
else
{
p_xfer_desc.p_tx_buffer = message->send_buf;
p_xfer_desc.tx_length = message->length ;
p_xfer_desc.p_rx_buffer = RT_NULL;
p_xfer_desc.rx_length = 0;
return message->length;
}
nrfx_err_t nrf_ret = nrfx_spi_xfer(p_instance, &p_xfer_desc, 0);
if( NRFX_SUCCESS == nrf_ret)
return message->length;
else
return 0;
}
/* spi bus callback function */
@@ -260,6 +273,7 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name,
{
RT_ASSERT(bus_name != RT_NULL);
RT_ASSERT(device_name != RT_NULL);
RT_ASSERT(ss_pin != RT_NULL);
rt_err_t result;
struct rt_spi_device *spi_device;
@@ -267,8 +281,7 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name,
spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
RT_ASSERT(spi_device != RT_NULL);
/* initialize the cs pin */
spi_device->user_data = (void*)ss_pin;
result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, RT_NULL);
result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void*)ss_pin);
if (result != RT_EOK)
{
LOG_E("%s attach to %s faild, %d", device_name, bus_name, result);
@@ -278,4 +291,5 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name,
return result;
}
#endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 */
#endif /*BSP_USING_SPI*/
bsp/nrf5x/libraries/drivers/drv_uart.c
+26 -2
View File
@@ -165,7 +165,10 @@ static rt_err_t _uart_ctrl(struct rt_serial_device *serial, int cmd, void *arg)
return RT_EOK;
}
RT_WEAK int uart_putc_hook(rt_uint8_t *ch)
{
return -1;
}
static int _uart_putc(struct rt_serial_device *serial, char c)
{
drv_uart_cfg_t *instance = NULL;
@@ -180,6 +183,7 @@ static int _uart_putc(struct rt_serial_device *serial, char c)
nrf_uart_event_clear(instance->uart.p_reg, NRF_UART_EVENT_TXDRDY);
nrf_uart_task_trigger(instance->uart.p_reg, NRF_UART_TASK_STARTTX);
nrf_uart_txd_set(instance->uart.p_reg, (uint8_t)c);
uart_putc_hook((rt_uint8_t *)&c);
while (!nrf_uart_event_check(instance->uart.p_reg, NRF_UART_EVENT_TXDRDY))
{
//wait for TXD send
@@ -187,6 +191,11 @@ static int _uart_putc(struct rt_serial_device *serial, char c)
return rtn;
}
RT_WEAK int uart_getc_hook(rt_uint8_t *ch)
{
return -1;
};
static int _uart_getc(struct rt_serial_device *serial)
{
int ch = -1;
@@ -202,7 +211,22 @@ static int _uart_getc(struct rt_serial_device *serial)
ch = instance->rx_byte;
instance->rx_length--;
}
return ch;
if (-1 != ch)
{
return ch;
}
else
{
if (-1 == uart_getc_hook((rt_uint8_t *)&ch))
{
return -1;
}
else
{
return ch;
}
}
}
static struct rt_uart_ops _uart_ops = {
bsp/nrf5x/libraries/drivers/drv_uarte.c
+281
View File
File diff suppressed because it is too large. Load diff
bsp/nrf5x/libraries/drivers/drv_uarte.h
+33
View File
@@ -0,0 +1,33 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-04-28 xckhmf Modify for <nrfx>
* 2020-10-31 xckhmf Support for UART1
*
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
#ifdef __cplusplus
extern "C" {
#endif
#define RT_DEVICE_CTRL_CUSTOM 0x20
#define RT_DEVICE_CTRL_PIN 0x21
#define RT_DEVICE_POWERSAVE 0x22
#define RT_DEVICE_WAKEUP 0x23
#define UART_CONFIG_BAUD_RATE_9600 1
#define UART_CONFIG_BAUD_RATE_115200 2
void rt_hw_uart_init(void);
#ifdef __cplusplus
}
#endif
#endif /* __DRV_UART_H__ */
bsp/nrf5x/nrf52832/.config
+16 -23
View File
@@ -120,6 +120,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
@@ -195,15 +196,12 @@ CONFIG_RT_USING_LIBC=y
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
@@ -230,7 +228,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
@@ -243,7 +240,7 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
@@ -265,7 +262,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
#
# security packages
@@ -274,7 +270,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
@@ -309,8 +304,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
#
# system packages
@@ -321,7 +314,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
@@ -334,9 +326,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
#
# peripheral libraries and drivers
@@ -378,7 +367,6 @@ CONFIG_PKG_NRFX_VER="v2.1.0"
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
@@ -386,11 +374,6 @@ CONFIG_PKG_NRFX_VER="v2.1.0"
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
#
# miscellaneous packages
@@ -427,31 +410,36 @@ CONFIG_PKG_NRFX_VER="v2.1.0"
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
#
# Hardware Drivers Config
#
CONFIG_SOC_NRF52832=y
CONFIG_NRFX_CLOCK_ENABLED=1
CONFIG_NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY=7
CONFIG_NRFX_CLOCK_CONFIG_LF_SRC=1
CONFIG_SOC_NORDIC=y
#
# Onboard Peripheral Drivers
#
# CONFIG_BSP_USING_JLINK_TO_USART is not set
# CONFIG_BSP_USING_QSPI_FLASH is not set
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_NRFX_GPIOTE_ENABLED=1
# CONFIG_BSP_USING_SAADC is not set
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_SOFTDEVICE is not set
CONFIG_BSP_USING_UART=y
CONFIG_NRFX_USING_UART=y
# CONFIG_NRFX_USING_UARTE is not set
CONFIG_NRFX_UART_ENABLED=1
CONFIG_BSP_USING_UART0=y
CONFIG_NRFX_UART0_ENABLED=1
CONFIG_BSP_UART0_RX_PIN=8
CONFIG_BSP_UART0_TX_PIN=6
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
@@ -463,3 +451,8 @@ CONFIG_MCU_FLASH_SIZE_KB=1024
CONFIG_MCU_SRAM_START_ADDRESS=0x20000000
CONFIG_MCU_SRAM_SIZE_KB=256
CONFIG_MCU_FLASH_PAGE_SIZE=0x1000
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
CONFIG_BLE_STACK_USING_NULL=y
# CONFIG_BSP_USING_SOFTDEVICE is not set
# CONFIG_BSP_USING_NIMBLE is not set
bsp/nrf5x/nrf52832/board/Kconfig
+38 -7
View File
@@ -157,12 +157,24 @@ menu "On-chip Peripheral Drivers"
endif
menuconfig BSP_USING_UART
bool "Enable UART"
config BSP_USING_UART
bool "Enable UART"
default y
select RT_USING_SERIAL
if BSP_USING_UART
if BSP_USING_UART
choice
prompt "UART or UARTE"
default NRFX_USING_UART
help
Select the UART or UARTE
config NRFX_USING_UART
bool "UART"
config NRFX_USING_UARTE
bool "UARTE"
endchoice
endif
if BSP_USING_UART&&NRFX_USING_UART
config NRFX_UART_ENABLED
int
default 1
@@ -183,9 +195,28 @@ menu "On-chip Peripheral Drivers"
range 0 31
default 6
endif
config BSP_USING_UART1
bool "Enable UART1"
default n
endif
if BSP_USING_UART&&NRFX_USING_UARTE
config NRFX_UARTE_ENABLED
int
default 1
config BSP_USING_UART0
bool "Enable UARTE0"
default n
if BSP_USING_UART0
config NRFX_UARTE0_ENABLED
int
default 1
config BSP_UART0_RX_PIN
int "uarte0 rx pin number"
range 0 31
default 8
config BSP_UART0_TX_PIN
int "uarte0 tx pin number"
range 0 31
default 6
endif
endif
config BSP_USING_SPI
bsp/nrf5x/nrf52832/rtconfig.h
+8
View File
@@ -152,6 +152,9 @@
/* Hardware Drivers Config */
#define SOC_NRF52832
#define NRFX_CLOCK_ENABLED 1
#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY 7
#define NRFX_CLOCK_CONFIG_LF_SRC 1
#define SOC_NORDIC
/* Onboard Peripheral Drivers */
@@ -160,8 +163,12 @@
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define NRFX_GPIOTE_ENABLED 1
#define BSP_USING_UART
#define NRFX_USING_UART
#define NRFX_UART_ENABLED 1
#define BSP_USING_UART0
#define NRFX_UART0_ENABLED 1
#define BSP_UART0_RX_PIN 8
#define BSP_UART0_TX_PIN 6
@@ -172,5 +179,6 @@
#define MCU_SRAM_START_ADDRESS 0x20000000
#define MCU_SRAM_SIZE_KB 256
#define MCU_FLASH_PAGE_SIZE 0x1000
#define BLE_STACK_USING_NULL
#endif
bsp/nrf5x/nrf52840/.config
+19 -19
View File
@@ -65,7 +65,7 @@ CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40003
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@@ -120,6 +120,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
@@ -195,15 +196,12 @@ CONFIG_RT_USING_LIBC=y
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
@@ -230,7 +228,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
@@ -243,7 +240,7 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
@@ -273,7 +270,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
@@ -308,7 +304,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_URLENCODE is not set
#
# system packages
@@ -319,7 +314,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
@@ -332,8 +326,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
#
# peripheral libraries and drivers
@@ -353,8 +345,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRF5X_SDK_V1300 is not set
# CONFIG_PKG_USING_NRF5X_SDK_LATEST_VERSION is not set
CONFIG_PKG_USING_NRFX=y
CONFIG_PKG_NRFX_PATH="/packages/peripherals/nrfx"
CONFIG_PKG_USING_NRFX_V210=y
@@ -384,10 +374,6 @@ CONFIG_PKG_NRFX_VER="v2.1.0"
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
#
# miscellaneous packages
@@ -429,6 +415,10 @@ CONFIG_PKG_NRFX_VER="v2.1.0"
# Hardware Drivers Config
#
CONFIG_SOC_NRF52840=y
CONFIG_NRFX_CLOCK_ENABLED=1
CONFIG_NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY=7
CONFIG_NRFX_CLOCK_CONFIG_LF_SRC=1
CONFIG_SOC_NORDIC=y
#
# Onboard Peripheral Drivers
@@ -440,12 +430,17 @@ CONFIG_SOC_NRF52840=y
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
# CONFIG_BSP_USING_SOFTDEVICE is not set
CONFIG_NRFX_GPIOTE_ENABLED=1
# CONFIG_BSP_USING_SAADC is not set
# CONFIG_BSP_USING_PWM is not set
CONFIG_BSP_USING_UART=y
CONFIG_NRFX_USING_UART=y
# CONFIG_NRFX_USING_UARTE is not set
CONFIG_NRFX_UART_ENABLED=1
CONFIG_BSP_USING_UART0=y
CONFIG_NRFX_UART0_ENABLED=1
CONFIG_BSP_UART0_RX_PIN=8
CONFIG_BSP_UART0_TX_PIN=6
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
@@ -457,3 +452,8 @@ CONFIG_MCU_FLASH_SIZE_KB=1024
CONFIG_MCU_SRAM_START_ADDRESS=0x20000000
CONFIG_MCU_SRAM_SIZE_KB=256
CONFIG_MCU_FLASH_PAGE_SIZE=0x1000
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
CONFIG_BLE_STACK_USING_NULL=y
# CONFIG_BSP_USING_SOFTDEVICE is not set
# CONFIG_BSP_USING_NIMBLE is not set
bsp/nrf5x/nrf52840/board/Kconfig
+53 -6
View File
@@ -194,12 +194,24 @@ menu "On-chip Peripheral Drivers"
endif
menuconfig BSP_USING_UART
bool "Enable UART"
config BSP_USING_UART
bool "Enable UART"
default y
select RT_USING_SERIAL
if BSP_USING_UART
if BSP_USING_UART
choice
prompt "UART or UARTE"
default NRFX_USING_UART
help
Select the UART or UARTE
config NRFX_USING_UART
bool "UART"
config NRFX_USING_UARTE
bool "UARTE"
endchoice
endif
if BSP_USING_UART&&NRFX_USING_UART
config NRFX_UART_ENABLED
int
default 1
@@ -220,9 +232,44 @@ menu "On-chip Peripheral Drivers"
range 0 31
default 6
endif
endif
if BSP_USING_UART&&NRFX_USING_UARTE
config NRFX_UARTE_ENABLED
int
default 1
config BSP_USING_UART0
bool "Enable UARTE0"
default n
if BSP_USING_UART0
config NRFX_UARTE0_ENABLED
int
default 1
config BSP_UART0_RX_PIN
int "uarte0 rx pin number"
range 0 31
default 8
config BSP_UART0_TX_PIN
int "uarte0 tx pin number"
range 0 31
default 6
endif
config BSP_USING_UART1
bool "Enable UART1"
default n
bool "Enable UARTE1"
default n
if BSP_USING_UART1
config NRFX_UARTE1_ENABLED
int
default 1
config BSP_UART1_RX_PIN
int "uarte1 rx pin number"
range 0 31
default 7
config BSP_UART1_TX_PIN
int "uarte1 tx pin number"
range 0 31
default 5
endif
endif
config BSP_USING_SPI
bsp/nrf5x/nrf52840/rtconfig.h
+9
View File
@@ -152,6 +152,10 @@
/* Hardware Drivers Config */
#define SOC_NRF52840
#define NRFX_CLOCK_ENABLED 1
#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY 7
#define NRFX_CLOCK_CONFIG_LF_SRC 1
#define SOC_NORDIC
/* Onboard Peripheral Drivers */
@@ -159,8 +163,12 @@
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define NRFX_GPIOTE_ENABLED 1
#define BSP_USING_UART
#define NRFX_USING_UART
#define NRFX_UART_ENABLED 1
#define BSP_USING_UART0
#define NRFX_UART0_ENABLED 1
#define BSP_UART0_RX_PIN 8
#define BSP_UART0_TX_PIN 6
@@ -171,5 +179,6 @@
#define MCU_SRAM_START_ADDRESS 0x20000000
#define MCU_SRAM_SIZE_KB 256
#define MCU_FLASH_PAGE_SIZE 0x1000
#define BLE_STACK_USING_NULL
#endif
bsp/raspberry-pi/raspi4-32/.config
+134 -9
View File
File diff suppressed because it is too large. Load diff
bsp/raspberry-pi/raspi4-32/README.md
+85 -23
View File
@@ -20,17 +20,8 @@ scons
来编译这个板级支持包。如果编译正确无误，会产生rtthread.elf、kernel7.img文件。
## 3. 执行
### 3.1 下载**Raspberry Pi Imager**，生成可以运行的raspbian SD卡
首先下载镜像
* [Raspberry Pi Imager for Ubuntu](https://downloads.raspberrypi.org/imager/imager_amd64.deb)
* [Raspberry Pi Imager for Windows](https://downloads.raspberrypi.org/imager/imager.exe)
* [Raspberry Pi Imager for macOS](https://downloads.raspberrypi.org/imager/imager.dmg)
### 3.2 准备好串口线
## 3. 环境搭建
### 3.1 准备好串口线
目前版本是使用raspi4的 GPIO 14, GPIO 15来作路口输出，连线情况如下图所示：
@@ -38,27 +29,90 @@ scons
串口参数： 115200 8N1 ，硬件和软件流控为关。
### 3.3 程序下载
### 3.2 RTT固件放在SD卡运行
当编译生成了rtthread.bin文件后，我们可以将该文件放到sd卡上，并修改sd卡中的`config.txt`文件如下：
首先需要准备一张空的32GB以下的SD卡，如果不想自己制作启动固件，可以直接从百度网盘上下载boot的固件。
```
enable_uart=1
arm_64bit=0
kernel_addr=0x8000
kernel=kernel7.img
core_freq=250
链接：https://pan.baidu.com/s/1PxgvXAChUIOgueNXhgMs8w
提取码：pioj
```
按上面的方法做好SD卡后，插入树莓派4，通电可以在串口上看到如下所示的输出信息：
解压后将sd目录下的文件拷贝到sd卡即可。以后每次编译后，将生成的kernel7.img进行替换即可。上电后可以看到程序正常运行。
```text
heap: 0x00044270 - 0x04044270
### 3.3 RTT程序用uboot加载
为了调试方便，已经将uboot引导程序放入uboot目录下，直接将这些文件放到sd卡中即可。
需要注意的以下步骤：
**1.电脑上启动tftp服务器**
windows系统电脑上可以安装tftpd搭建tftp服务器。将目录指定到`bsp\raspberry-pi\raspi4-32`。
**2.修改设置uboot**
在控制台输入下列命令：
```
setenv bootcmd "dhcp 0x00200000 x.x.x.x:kernel7.img;dcache flush;go 0x00200000"
saveenv
reset
```
其中`x.x.x.x`为tftp服务器的pc的ip地址。
**3.修改链接脚本**
将树莓派`bsp\raspberry-pi\raspi4-32\link.ld`的文件链接地址改为`0x200000`。
```
SECTIONS
{
. = 0x8000;
. = ALIGN(4096);
.
.
.
}
```
改为
```
SECTIONS
{
. = 0x200000;
. = ALIGN(4096);
.
.
.
}
```
重新编译程序：
```
scons -c
scons
```
**3.插入网线**
上述准备完成后，将网线插入，保证开发板和tftp服务器在同一个网段的路由器上。上电后uboot可以自动从tftp服务器上获取固件，然后开始执行了。
完成后可以看到串口的输出信息
```
heap: 0x000607e8 - 0x040607e8
\ | /
- RT - Thread Operating System
/ | \ 4.0.3 build May 25 2020
/ | \ 4.0.3 build Oct 27 2020
2006 - 2020 Copyright by rt-thread team
[I/SDIO] SD card capacity 31205376 KB.
found part[0], begin: 1048576, size: 29.777GB
file system initialization done!
Hi, this is RT-Thread!!
msh />
```
@@ -71,8 +125,16 @@ msh />
| GPIO | 支持 | - |
| SPI | 支持 | SPI0 |
| MAILBOX | 支持 | - |
| WATCHDOG | 支持 | - |
| HDMI | 支持 | - |
| SDIO | 支持 | - |
| ETH | 支持 | - |
## 5. 联系人信息
## 5. 注意事项
目前rt-thread程序可以使用的内存在100MB以内，可以通过调整`board.c`中`platform_mem_desc`表的数据进行相关内存的映射以及修改`board.h`来确定程序使用的堆栈大小。目前在地址`0x08000000`处的1M空间被映射成非cache区供树莓派4的CPU与GPU通信的消息管道。若需要扩大系统内存使用，可自行修改代码进行调整。
## 6. 联系人信息
维护人：[bernard][5]
bsp/raspberry-pi/raspi4-32/applications/main.c
+13 -1
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@@ -12,8 +12,20 @@
#include <rtdevice.h>
#include <board.h>
#define ACTLED (42)
int main(int argc, char** argv)
{
rt_kprintf("Hi, this is RT-Thread!!\n");
return 0;
rt_pin_mode(ACTLED, PIN_MODE_OUTPUT);
while(1)
{
rt_pin_write(ACTLED, PIN_HIGH);
rt_thread_mdelay(1000);
rt_pin_write(ACTLED, PIN_LOW);
rt_thread_mdelay(1000);
}
return RT_EOK;
}
bsp/raspberry-pi/raspi4-32/applications/mnt.c
+27
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@@ -0,0 +1,27 @@
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2017-5-30 bernard the first version
*/
#include <rtthread.h>
#ifdef BSP_USING_SDIO0
#include <dfs_fs.h>
int mnt_init(void)
{
rt_thread_delay(RT_TICK_PER_SECOND);
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
{
rt_kprintf("file system initialization done!\n");
}
return 0;
}
INIT_ENV_EXPORT(mnt_init);
#endif
bsp/raspberry-pi/raspi4-32/driver/board.c
+5 -2
View File
@@ -19,8 +19,11 @@
struct mem_desc platform_mem_desc[] = {
{0x0, 0x6400000, 0x0, NORMAL_MEM},
{0xFE000000, 0xFE400000, 0xFE000000, DEVICE_MEM},//uart gpio
{0xFF800000, 0xFFA00000, 0xFF800000, DEVICE_MEM} //gic
{0x8000000, 0x8800000, 0x8000000, DEVICE_MEM}, //mbox msg
{0x0EA00000, 0x0EE00000, 0x0EA00000, DEVICE_MEM}, //framebuffer
{0xFD500000, 0xFDA00000, 0xFD500000, DEVICE_MEM}, //gmac
{0xFE000000, 0xFE400000, 0xFE000000, DEVICE_MEM}, //peripheral
{0xFF800000, 0xFFA00000, 0xFF800000, DEVICE_MEM} //gic
};
const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc)/sizeof(platform_mem_desc[0]);
bsp/raspberry-pi/raspi4-32/driver/drv_eth.c
+637
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bsp/raspberry-pi/raspi4-32/driver/drv_eth.h
+214
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bsp/raspberry-pi/raspi4-32/driver/drv_hdmi.c
+309
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bsp/raspberry-pi/raspi4-32/driver/drv_hdmi.h
+27
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@@ -0,0 +1,27 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-26 bigmagic first version
*/
#ifndef __DRV_HDMI_H__
#define __DRV_HDMI_H__
#define RGB(r, g, b) ((((r))<<16) | (((g))<<8) | ((b)))
struct rt_hdmi_fb_device
{
struct rt_device parent;
rt_uint32_t width;
rt_uint32_t height;
rt_uint32_t depth;
rt_uint32_t pitch;
rt_uint32_t pixel_format;
rt_uint8_t *fb;
};
#endif/* __DRV_HDMI_H__ */
bsp/raspberry-pi/raspi4-32/driver/drv_sdio.c
+656
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bsp/raspberry-pi/raspi4-32/driver/drv_sdio.h
+253
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bsp/raspberry-pi/raspi4-32/driver/drv_wdt.c
+135
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@@ -0,0 +1,135 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-26 bigmagic first version
*/
#include <rthw.h>
#include "drv_wdt.h"
#include "raspi4.h"
#ifdef BSP_USING_WDT
#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
static struct raspi_wdt_driver bcm_wdt;
void raspi_watchdog_init(rt_uint32_t time_init)
{
bcm_wdt.timeout = time_init;
}
void raspi_watchdog_start()
{
volatile rt_uint32_t cur;
PM_WDOG = PM_PASSWORD | (SECS_TO_WDOG_TICKS(bcm_wdt.timeout) & PM_WDOG_TIME_SET);
cur = (PM_RSTC);
PM_RSTC = PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET;
}
void raspi_watchdog_stop()
{
PM_RSTC = PM_PASSWORD | PM_RSTC_RESET;
}
void raspi_watchdog_clr()
{
bcm_wdt.timeout = 0;
}
void raspi_watchdog_set_timeout(rt_uint32_t timeout_us)
{
bcm_wdt.timeout = timeout_us;
}
rt_uint64_t raspi_watchdog_get_timeout()
{
return bcm_wdt.timeout;
}
rt_uint64_t raspi_watchdog_get_timeleft()
{
rt_uint32_t ret = (PM_WDOG);
return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
}
static rt_err_t raspi_wdg_init(rt_watchdog_t *wdt)
{
/*init for 10S*/
raspi_watchdog_init(1000000);
raspi_watchdog_start();
raspi_watchdog_stop();
return RT_EOK;
}
static rt_err_t raspi_wdg_control(rt_watchdog_t *wdt, int cmd, void *arg)
{
rt_uint64_t timeout_us = 0;
switch (cmd)
{
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
timeout_us = *((rt_uint32_t *)arg) * 1000000;
if (timeout_us >= 0xFFFFFFFF)
timeout_us = 0xFFFFFFFF;
raspi_watchdog_set_timeout((rt_uint32_t)timeout_us);
break;
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
timeout_us = raspi_watchdog_get_timeout();
*((rt_uint32_t *)arg) = timeout_us / 1000000;
break;
case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
timeout_us = raspi_watchdog_get_timeleft();
*((rt_uint32_t *)arg) = timeout_us / 1000000;
break;
case RT_DEVICE_CTRL_WDT_KEEPALIVE:
raspi_watchdog_clr();
break;
case RT_DEVICE_CTRL_WDT_START:
raspi_watchdog_start();
break;
case RT_DEVICE_CTRL_WDT_STOP:
raspi_watchdog_stop();
break;
default:
return RT_EIO;
}
return RT_EOK;
}
static const struct rt_watchdog_ops raspi_wdg_pos =
{
raspi_wdg_init,
raspi_wdg_control,
};
static rt_watchdog_t raspi_wdg;
int rt_hw_wdt_init(void)
{
raspi_wdg.ops = &raspi_wdg_pos;
rt_hw_watchdog_register(&raspi_wdg, "wdg", 0, RT_NULL);
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_wdt_init);
void reboot(void)
{
unsigned int r;
rt_kprintf("reboot system...\n");
rt_thread_mdelay(100);
r = PM_RSTS;
// trigger a restart by instructing the GPU to boot from partition 0
r &= ~0xfffffaaa;
PM_RSTS |= (PM_PASSWORD | r); // boot from partition 0
PM_WDOG |= (PM_PASSWORD | 0x0A);
PM_RSTC |= (PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET);
while (1);
}
MSH_CMD_EXPORT(reboot,reboot system...);
#endif /*BSP_USING_WDT */
bsp/raspberry-pi/raspi4-32/driver/drv_wdt.h
+25
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@@ -0,0 +1,25 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-26 bigmagic first version
*/
#ifndef __DRV_WDT_H__
#define __DRV_WDT_H__
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
struct raspi_wdt_driver
{
rt_uint32_t timeout;
};
int rt_hw_wdt_init(void);
#endif
bsp/raspberry-pi/raspi4-32/driver/mbox.c
+46
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@@ -49,6 +49,52 @@ int mbox_call(unsigned char ch, int mmu_enable)
return 0;
}
int bcm271x_notify_reboot(void)
{
mbox[0] = 7*4; // length of the message
mbox[1] = MBOX_REQUEST; // this is a request message
mbox[2] = MBOX_TAG_NOTIFY_REBOOT; // (the tag id)
mbox[3] = 0x00000004; // length + 4
mbox[4] = 0x00000000; // size of the data
mbox[5] = 0x00000000; // request
mbox[6] = MBOX_TAG_LAST;
mbox_call(8, MMU_DISABLE);
return 0;
}
int bcm271x_notify_xhci_reset(void)
{
mbox[0] = 7*4; // length of the message
mbox[1] = MBOX_REQUEST; // this is a request message
mbox[2] = MBOX_TAG_NOTIFY_XHCI_RESET; // (the tag id)
mbox[3] = 0x00000004; // length + 4
mbox[4] = 0x00000004; // size of the data
mbox[5] = 0x00100000; // request
mbox[6] = MBOX_TAG_LAST;
mbox_call(8, MMU_DISABLE);
return 0;
}
int bcm271x_gpu_enable(void)
{
mbox[0] = 12*4; // length of the message
mbox[1] = MBOX_REQUEST; // this is a request message
mbox[2] = MBOX_TAG_CLOCK_SET_RATE;
mbox[3] = 0x00000008; // (the tag id)
mbox[4] = 0x00000008; // (the tag id)
mbox[5] = 5; // V3D
mbox[6] = 250 * 1000 * 1000;
mbox[7] = MBOX_TAG_ENABLE_QPU; // (the tag id)
mbox[8] = 0x00000004; // (size of the buffer)
mbox[9] = 0x00000004; // (size of the data)
mbox[10] = 0x00000001;
mbox[11] = MBOX_TAG_LAST; // end tag
mbox_call(8, MMU_DISABLE);
return mbox[1];
}
int bcm271x_mbox_hardware_get_model(void)
{
mbox[0] = 8*4; // length of the message
bsp/raspberry-pi/raspi4-32/driver/mbox.h
+43 -10
View File
@@ -35,7 +35,7 @@ extern volatile unsigned int* mbox;
/* tags */
#define MBOX_TAG_SETPOWER 0x28001
#define MBOX_TAG_SETCLKRATE 0x38002
#define MBOX_GET_MAC_ADDRESS 0x10003
#define MBOX_GET_MAC_ADDRESS 0x10003
#define MBOX_TAG_LAST 0
#define MMIO_BASE 0xFE000000
@@ -50,14 +50,14 @@ extern volatile unsigned int* mbox;
#define MBOX_FULL 0x80000000
#define MBOX_EMPTY 0x40000000
#define DEVICE_ID_SD_CARD 0
#define DEVICE_ID_USB_HCD 3
#define POWER_STATE_OFF (0 << 0)
#define POWER_STATE_ON (1 << 0)
#define POWER_STATE_WAIT (1 << 1)
#define POWER_STATE_NO_DEVICE (1 << 1) // in response
#define MMU_ENABLE 1
#define MMU_DISABLE 0
#define DEVICE_ID_SD_CARD (0)
#define DEVICE_ID_USB_HCD (3)
#define POWER_STATE_OFF (0 << 0)
#define POWER_STATE_ON (1 << 0)
#define POWER_STATE_WAIT (1 << 1)
#define POWER_STATE_NO_DEVICE (1 << 1) // in response
#define MMU_ENABLE (1)
#define MMU_DISABLE (0)
/*
* raspi hardware info
@@ -102,9 +102,42 @@ enum {
MBOX_TAG_TEMP_GET_MAX = 0x0003000A,
};
#define MBOX_ADDR 0xc00000
/*
* raspi Memory
*/
enum {
MBOX_TAG_ALLOCATE_MEMORY = 0x0003000C, // Memory: Allocates Contiguous Memory On The GPU (Response: Handle)
MBOX_TAG_LOCK_MEMORY = 0x0003000D, // Memory: Unlock Buffer (Response: Status)
MBOX_TAG_UNLOCK_MEMORY = 0x0003000E, // Memory: Unlock Buffer (Response: Status)
MBOX_TAG_RELEASE_MEMORY = 0x0003000F, // Memory: Free The Memory Buffer (Response: Status)
MBOX_TAG_EXECUTE_CODE = 0x00030010, // Memory: Calls The Function At Given (Bus) Address And With Arguments Given
};
/*
* raspi GPU
*/
enum {
MBOX_TAG_EXECUTE_QPU = 0x00030011, // QPU: Calls The QPU Function At Given (Bus) Address And With Arguments Given (Response: Number Of QPUs, Control, No Flush, Timeout In ms)
MBOX_TAG_ENABLE_QPU = 0x00030012, // QPU: Enables The QPU (Response: Enable State)
};
/*
* raspi HDMI
*/
#define MBOX_TAG_GET_EDID_BLOCK 0x00030020 // HDMI: Read Specificed EDID Block From Attached HDMI/DVI Device (Response: Block Number, Status, EDID Block (128 Bytes))
/*
* raspi NOTIFY
*/
#define MBOX_TAG_NOTIFY_REBOOT 0x00030048
#define MBOX_TAG_NOTIFY_XHCI_RESET 0x00030058
#define MBOX_ADDR 0x08000000
int mbox_call(unsigned char ch, int mmu_enable);
int bcm271x_notify_reboot(void);
int bcm271x_notify_xhci_reset(void);
int bcm271x_gpu_enable(void);
int bcm271x_mbox_hardware_get_model(void);
int bcm271x_mbox_hardware_get_revison(void);
int bcm271x_mbox_hardware_get_mac_address(uint8_t * mac);
bsp/raspberry-pi/raspi4-32/driver/raspi4.h
+33
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@@ -119,6 +119,39 @@ typedef enum {
#define GIC_ACK_INTID_MASK 0x000003ff
//watchdog
#define PM_RSTC HWREG32(PER_BASE + 0x0010001c)
#define PM_RSTS HWREG32(PER_BASE + 0x00100020)
#define PM_WDOG HWREG32(PER_BASE + 0x00100024)
#define PM_PASSWORD (0x5A000000)
#define PM_WDOG_TIME_SET (0x000fffff)
#define PM_RSTS_HADWRH_SET (0x00000040)
#define PM_RSTC_WRCFG_FULL_RESET (0x00000020)
#define PM_RSTC_WRCFG_CLR (0xffffffcf)
#define PM_RSTC_RESET (0x00000102)
//timer
#define ST_BASE_OFFSET (0x003000)
#define STIMER_BASE (PER_BASE + ST_BASE_OFFSET)
#define STIMER_CS __REG32(STIMER_BASE + 0x0000)
#define STIMER_CLO __REG32(STIMER_BASE + 0x0004)
#define STIMER_CHI __REG32(STIMER_BASE + 0x0008)
#define STIMER_C0 __REG32(STIMER_BASE + 0x000C)
#define STIMER_C1 __REG32(STIMER_BASE + 0x0010)
#define STIMER_C2 __REG32(STIMER_BASE + 0x0014)
#define STIMER_C3 __REG32(STIMER_BASE + 0x0018)
#define DELAY_MICROS(micros) \
do{ \
rt_uint32_t compare = STIMER_CLO + micros * 25; \
while (STIMER_CLO < compare); \
} while (0) \
//External Mass Media Controller (SD Card)
#define MMC0_BASE_ADDR (PER_BASE+0x300000)
#define MMC2_BASE_ADDR (PER_BASE+0x340000)
/* the basic constants and interfaces needed by gic */
rt_inline rt_uint32_t platform_get_gic_dist_base(void)
{
bsp/raspberry-pi/raspi4-32/rtconfig.h
+72
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@@ -76,6 +76,18 @@
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 2
#define DFS_FD_MAX 16
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_USING_DFS_DEVFS
/* Device Drivers */
@@ -86,7 +98,14 @@
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 512
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 1024
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_WDT
/* Using USB */
@@ -103,9 +122,57 @@
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
#define RT_USING_LWIP
#define RT_USING_LWIP202
#define RT_LWIP_MEM_ALIGNMENT 4
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
#define RT_LWIP_DHCP
#define IP_SOF_BROADCAST 1
#define IP_SOF_BROADCAST_RECV 1
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.1.30"
#define RT_LWIP_GWADDR "192.168.1.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 16
#define RT_LWIP_RAW_PCB_NUM 4
#define RT_LWIP_UDP_PCB_NUM 4
#define RT_LWIP_TCP_PCB_NUM 4
#define RT_LWIP_TCP_SEG_NUM 40
#define RT_LWIP_TCP_SND_BUF 8196
#define RT_LWIP_TCP_WND 8196
#define RT_LWIP_TCPTHREAD_PRIORITY 10
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define LWIP_NETIF_LOOPBACK 0
#define RT_LWIP_USING_PING
/* AT commands */
@@ -178,8 +245,13 @@
#define BSP_USING_SPI0_BUS
#define BSP_USING_SPI0_DEVICE0
#define BSP_USING_CORETIMER
#define BSP_USING_WDT
#define BSP_USING_SDIO
#define BSP_USING_SDIO0
/* Board Peripheral Drivers */
#define BSP_USING_HDMI
#define BSP_USING_HDMI_DISPLAY
#endif
bsp/stm32/README.md
+2
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@@ -58,6 +58,8 @@ STM32 系列 BSP 目前支持情况如下表所示：
| **MP1 系列** | |
| [stm32mp157a-st-discovery](stm32mp157a-st-discovery) | ST 官方 STM32MP157A-DK1 开发板 |
| [stm32mp157a-st-ev1](stm32mp157a-st-ev1) | ST 官方 STM32MP157A-EV1 开发板 |
| **WB 系列** | |
| [stm32wb55-st-nucleo](stm32wb55-st-nucleo) | ST 官方 STM32WB55-nucleo 开发板 |
可以通过阅读相应 BSP 下的 README 来快速上手，如果想要使用 BSP 更多功能可参考 docs 文件夹下提供的说明文档，如下表所示：
bsp/stm32/docs/STM32_Nucleo-144_BSP_Introduction.md
+128
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@@ -0,0 +1,128 @@
# STM32 Nucleo-144 BSP Introduction
This document records the instruction of the BSP (board support package) that provided by the RT-Thread development team for the STM32 Nucleo-144 development boards.
The document is covered in three parts:
- Resources Introduction
- Quickly Get Started
- Advanced Features
By reading the ***Quickly Get Started*** section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.
## Resources Introduction
[<img src="figures/stm32-nucleo-144.png" alt="board" style="zoom:50%;" />](figures/stm32-nucleo-144.jpg)
### Description
The STM32 Nucleo-144 board provides an affordable and flexible way for users to try out new concepts and build prototypes by choosing from the various combinations of performance and power consumption features, provided by the STM32 microcontroller. For the compatible boards, the internal or external SMPS significantly reduces power consumption in Run mode. The ST Zio connector, which extends the ARDUINO® Uno V3 connectivity, and the ST morpho headers provide an easy means of expanding the functionality of the Nucleo open development platform with a wide choice of specialized shields. The STM32 Nucleo-144 board does not require any separate probe as it integrates the ST-LINK debugger/programmer. The STM32 Nucleo-144 board comes with the STM32 comprehensive free software libraries and examples available with the STM32Cube MCU Package.
### Features
- Common features
- STM32 microcontroller in LQFP144 package
- 3 user LEDs
- 2 user and reset push-buttons
- 32.768 kHz crystal oscillator
- Board connectors:
- SWD
- ST Zio expansion connector including ARDUINO® Uno V3
- ST morpho expansion connector
- Flexible power-supply options: ST-LINK, USB VBUS or external sources
- On-board ST-LINK debugger/programmer with USB re-enumeration capability: mass storage, Virtual COM port, and debug port
- Comprehensive free software libraries and examples available with the STM32Cube MCU Package
- Support of a wide choice of Integrated Development Environments (IDEs) including IAR™, Keil®, and STM32CubeIDE
- Board-specific features
- External or internal SMPS to generate Vcore logic supply
- Ethernet compliant with IEEE-802.3-2002
- USB OTG full speed or device only
- Board connectors:
- USB with Micro-AB or USB Type-C™
- Ethernet RJ45
- Arm® Mbed Enabled™ compliant
### **For more details about these boards, please refer to [ST Nucleo Official Website](https://www.st.com/en/evaluation-tools/stm32-nucleo-boards.html?querycriteria=productId=LN1847).**
## Quickly Get Started
This BSP provides MDK4, MDK5, and IAR projects for developers and it supports the GCC development environment. Here's an example of the MDK5 development environment, to introduce how to run the system.
![nucleo144_layout](figures/nucleo144_layout.jpg)
### Hardware connection
Use a Type-A to Mini-B cable to connect the development board to the PC and turn on the power switch. The LD3 (PWR) and LD1 (COM) will light.
### Compile and Download
- Double-click the `project.uvprojx` file to open the MDK-Keil5 project (**NOT** `template.uvprojx` file)
- Click the “option for target” button
- Debug: Choose "ST-LINK Debugger" and Click "Setting" button:
- Port: choose "SW (Serial Wire)"
- Flash Download: check "Reset and Run"
- Compile and download the program to the board
### Running Results
After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, the LD3 and LD1 will light all the time, and LD2 will flash periodically.
The USB virtual COM port connects to **USART2 by default**, and when the corresponding serial port (**115200-8-1-N**) is opened in the terminal tool, the output information of RT-Thread can be seen when the device is reset:
```shell
\ | /
- RT - Thread Operating System
/ | \ 4.0.0 build Dec 21 2018
2006 - 2018 Copyright by rt-thread team
msh >
```
### Terminal tool - PuTTy
If you don't have a terminal tool software available, you can download *PuTTy*:
> https://www.chiark.greenend.org.uk/~sgtatham/putty/latest.html
![putty](figures/putty.png)
Follow these tutorial videos to learn PuTTy:
> https://www.youtube.com/watch?v=ab4ilbsteWU
>
> https://www.youtube.com/watch?v=dO-BMOzNKcI
## Advanced Features
This BSP only enables GPIO and USART2 by default. If you need more advanced features such as SPI, I2C, you need to configure the BSP with RT-Thread [ENV tool](https://www.rt-thread.io/download.html?download=Env) , as follows:
1. Open the Env tool under the specific BSP folder;
2. Enter `menuconfig` command to configure the project, then save and exit;
3. Enter `pkgs --update` command to update the package;
4. Enter `scons --target=mdk4/mdk5/iar` command to regenerate the project.
Learn how to use RT-Thread Env, click [Here](https://github.com/RT-Thread/rtthread-manual-doc/blob/master/env/env.md).
## Translated & Maintained By
Cathy Lee @ RT-Thread Team
> https://github.com/Cathy-lulu
>
> contact@rt-thread.org
Meco Man @ RT-Thread Community
> jiantingman@foxmail.com
>
> https://github.com/mysterywolf
bsp/stm32/docs/STM32_Nucleo-64_BSP_Introduction.md
+126
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@@ -0,0 +1,126 @@
# STM32 Nucleo-64 BSP Introduction
This document records the instruction of the BSP (board support package) that provided by the RT-Thread development team for the STM32 Nucleo-64 development boards.
The document is covered in three parts:
- Resources Introduction
- Quickly Get Started
- Advanced Features
By reading the ***Quickly Get Started*** section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.
## Resources Introduction
[![board](figures/stm32-nucleo-64.jpg)](figures/stm32-nucleo-64.jpg)
### Description
The STM32 Nucleo-64 board provides an affordable and flexible way for users to try out new concepts and build prototypes by choosing from the various combinations of performance and power consumption features, provided by the STM32 microcontroller. For the compatible boards, the external SMPS significantly reduces power consumption in Run mode. The ARDUINO® Uno V3 connectivity support and the ST morpho headers allow the easy expansion of the functionality of the STM32 Nucleo open development platform with a wide choice of specialized shields. The STM32 Nucleo-64 board does not require any separate probe as it integrates the ST-LINK debugger/programmer. The STM32 Nucleo-64 board comes with the STM32 comprehensive free software libraries and examples available with the STM32Cube MCU Package.
### Features
- Common features
- STM32 microcontroller in LQFP64 package
- 1 user LED shared with ARDUINO®
- 1 user and 1 reset push-buttons
- 32.768 kHz crystal oscillator
- Board connectors:
- ARDUINO® Uno V3 expansion connector
- ST morpho extension pin headers for full access to all STM32 I/Os
- Flexible power-supply options: ST-LINK, USB VBUS, or external sources
- On-board ST-LINK debugger/programmer with USB re-enumeration capability: mass storage, Virtual COM port and debug port
- Comprehensive free software libraries and examples available with the STM32Cube MCU Package
- Support of a wide choice of Integrated Development Environments (IDEs) including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE
- Board-specific features
- External SMPS to generate Vcore logic supply
- 24 MHz HSE – Board connectors:
- External SMPS experimentation dedicated connector
- Micro-AB or Mini-AB USB connector for the ST-LINK
- MIPI® debug connector
- Arm® Mbed Enabled™ compliant
### **For more details about these boards, please refer to [ST Nucleo Official Website](https://www.st.com/en/evaluation-tools/stm32-nucleo-boards.html?querycriteria=productId=LN1847).**
## Quickly Get Started
This BSP provides MDK4, MDK5, and IAR projects for developers and it supports the GCC development environment. Here's an example of the MDK5 development environment, to introduce how to run the system.
![nucleo64_layout](figures/nucleo64_layout.jpg)
### Hardware connection
Use a Type-A to Mini-B cable to connect the development board to the PC and turn on the power switch. The LD3 (PWR) and LD1 (COM) will light.
### Compile and Download
- Double-click the `project.uvprojx` file to open the MDK-Keil5 project (**NOT** `template.uvprojx` file)
- Click the “option for target” button
- Debug: Choose "ST-LINK Debugger" and Click "Setting" button:
- Port: choose "SW (Serial Wire)"
- Flash Download: check "Reset and Run"
- Compile and download the program to the board
### Running Results
After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, the LD3 and LD1 will light all the time, and LD2 will flash periodically.
The USB virtual COM port connects to **USART2 by default**, and when the corresponding serial port (**115200-8-1-N**) is opened in the terminal tool, the output information of RT-Thread can be seen when the device is reset:
```shell
\ | /
- RT - Thread Operating System
/ | \ 4.0.0 build Dec 21 2018
2006 - 2018 Copyright by rt-thread team
msh >
```
### Terminal tool - PuTTy
If you don't have a terminal tool software available, you can download *PuTTy*:
> https://www.chiark.greenend.org.uk/~sgtatham/putty/latest.html
![putty](figures/putty.png)
Follow these tutorial videos to learn PuTTy:
> https://www.youtube.com/watch?v=ab4ilbsteWU
>
> https://www.youtube.com/watch?v=dO-BMOzNKcI
## Advanced Features
This BSP only enables GPIO and USART2 by default. If you need more advanced features such as SPI, I2C, you need to configure the BSP with RT-Thread [ENV tool](https://www.rt-thread.io/download.html?download=Env) , as follows:
1. Open the Env tool under the specific BSP folder;
2. Enter `menuconfig` command to configure the project, then save and exit;
3. Enter `pkgs --update` command to update the package;
4. Enter `scons --target=mdk4/mdk5/iar` command to regenerate the project.
Learn how to use RT-Thread Env, click [Here](https://github.com/RT-Thread/rtthread-manual-doc/blob/master/env/env.md).
## Translated & Maintained By
Cathy Lee @ RT-Thread Team
> https://github.com/Cathy-lulu
>
> contact@rt-thread.org
Meco Man @ RT-Thread Community
> jiantingman@foxmail.com
>
> https://github.com/mysterywolf
bsp/stm32/docs/STM32系列BSP外设驱动使用教程.md
+2 -2
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@@ -1,4 +1,4 @@
# BSP 外设驱动使用教程
# STM32系列BSP外设驱动使用教程
## 简介
@@ -12,7 +12,7 @@
## 前提要求
- 学会如何使用 ENV 工具，参考：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/rtthread-development-guide/rtthread-tool-manual/env/env-user-manual/)
- 学会如何使用 ENV 工具，参考：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/programming-manual/env/env/)
## 如何使用更多的板载资源
bsp/stm32/docs/STM32系列驱动介绍.md
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@@ -1,4 +1,4 @@
# 外设驱动介绍与应用
# STM32系列驱动介绍
在 RT-Thread 实时操作系统中，各种各样的设备驱动是通过一套 I/O 设备管理框架来管理的。设备管理框架给上层应用提供了一套标准的设备操作 API，开发者通过调用这些标准设备操作 API，可以高效地完成和底层硬件外设的交互。设备管理框架的结构如下图所示：
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bsp/stm32/libraries/HAL_Drivers/drv_adc.c
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@@ -193,7 +193,7 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
return -RT_ERROR;
}
#if defined(SOC_SERIES_STM32MP1) || defined (SOC_SERIES_STM32H7)
#if defined(SOC_SERIES_STM32MP1) || defined (SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
ADC_ChanConf.Rank = ADC_REGULAR_RANK_1;
#else
ADC_ChanConf.Rank = 1;
@@ -205,22 +205,24 @@ static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_112CYCLES;
#elif defined(SOC_SERIES_STM32L4) || defined (SOC_SERIES_STM32WB)
#elif defined(SOC_SERIES_STM32L4)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
#elif defined(SOC_SERIES_STM32MP1)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
#elif defined(SOC_SERIES_STM32H7)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_64CYCLES_5;
#elif defined (SOC_SERIES_STM32WB)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
#endif
#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined (SOC_SERIES_STM32WB)
ADC_ChanConf.Offset = 0;
#endif
#if defined(SOC_SERIES_STM32L4) || defined (SOC_SERIES_STM32WB)
#if defined(SOC_SERIES_STM32L4)
ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE;
ADC_ChanConf.SingleDiff = LL_ADC_SINGLE_ENDED;
#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7)
#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE; /* ADC channel affected to offset number */
ADC_ChanConf.Offset = 0;
ADC_ChanConf.SingleDiff = ADC_SINGLE_ENDED; /* ADC channel differential mode */
bsp/stm32/libraries/HAL_Drivers/drv_gpio.c
+1 -1
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@@ -26,7 +26,7 @@
#define gpioz_port_base (175) /* PIN_STPORT_MAX * 16 - 16 */
#define PIN_STPORT(pin) ((pin > gpioz_port_base) ? ((GPIO_TypeDef *)(GPIOZ_BASE )) : ((GPIO_TypeDef *)(GPIOA_BASE + (0x1000u * PIN_PORT(pin)))))
#else
#define PIN_STPORT(pin) ((GPIO_TypeDef *)(GPIOA_BASE + (0x1000u * PIN_PORT(pin)))))
#define PIN_STPORT(pin) ((GPIO_TypeDef *)(GPIOA_BASE + (0x1000u * PIN_PORT(pin))))
#endif /* GPIOZ */
#else
#define PIN_STPORT(pin) ((GPIO_TypeDef *)(GPIOA_BASE + (0x400u * PIN_PORT(pin))))
bsp/stm32/libraries/STM32WBxx_HAL/SConscript
+44 -44
View File
@@ -8,73 +8,73 @@ cwd = GetCurrentDir()
src = Split('''
CMSIS/Device/ST/STM32WBxx/Source/Templates/system_stm32wbxx.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_comp.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_cortex.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_crc.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_crc_ex.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_cryp.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_cryp_ex.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_dma.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_dma_ex.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_exti.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_pwr.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_pwr_ex.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_rcc.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_rcc_ex.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_rng.c
STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_gpio.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_comp.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_crc.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_crc_ex.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp_ex.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr_ex.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rng.c
STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c
''')
if GetDepend(['RT_USING_SERIAL']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_uart.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_uart_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_usart.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_usart_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart_ex.c']
if GetDepend(['RT_USING_I2C']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_i2c.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_i2c_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c_ex.c']
if GetDepend(['RT_USING_SPI']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_spi.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_spi_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_qspi.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_qspi.c']
if GetDepend(['RT_USING_USB_HOST']) or GetDepend(['RT_USING_USB_DEVICE']):
# src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_hcd.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_pcd.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_pcd_ex.c']
# src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_ll_usb.c']
# src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hcd.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd_ex.c']
# src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c']
if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_lptim.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_tim.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_tim_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_lptim.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c']
if GetDepend(['RT_USING_ADC']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_adc.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_adc_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_adc.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_adc_ex.c']
if GetDepend(['RT_USING_RTC']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_rtc.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_rtc_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c']
if GetDepend(['RT_USING_WDT']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_iwdg.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_wwdg.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_iwdg.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_wwdg.c']
if GetDepend(['RT_USING_AUDIO']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_sai.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_sai_ex.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_sai.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_sai_ex.c']
if GetDepend(['RT_USING_PM']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_lptim.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_lptim.c']
if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_flash.c']
src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_flash_ex.c']
# src += ['STM32WBxx_HAL_Driver/Src/STM32wbxx_hal_flash_ramfunc.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash.c']
src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ex.c']
# src += ['STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ramfunc.c']
bsp/stm32/stm32f072-st-nucleo/README.md
+75 -70
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@@ -1,105 +1,110 @@
# NUCLEO-F072RB 开发板 BSP 说明
# STM32F072-Nucleo BSP Introduction
## 简介
[中文](README_zh.md)
本文档为刘恒为 NUCLEO-F072RB 开发板提供的 BSP (板级支持包) 说明。
## MCU: STM32F072RB @48MHz, 128KB FLASH, 16KB RAM
主要内容如下：
The STM32F072x8/xB microcontrollers incorporate the high-performance ARM®Cortex®-M0 32-bit RISC core operating at up to 48 MHz frequency, high-speed embedded memories (up to 128 Kbytes of Flash memory and 16 Kbytes of SRAM), and an extensive range of enhanced peripherals and I/Os. All devices offer standard communication interfaces (two I2Cs, two SPI/I2S, one HDMI CEC and four USARTs), one USB Full-speed device (crystal-less), one CAN, one 12-bit ADC, one 12-bit DAC with two channels, seven 16-bit timers, one 32-bit timer and an advanced-control PWM timer.
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
The STM32F072x8/xB microcontrollers operate in the -40 to +85 °C and -40 to +105 °C temperature ranges, from a 2.0 to 3.6 V power supply. A comprehensive set of power-saving modes allows the design of low-power applications.
The STM32F072x8/xB microcontrollers include devices in seven different packages ranging from 48 pins to 100 pins with a die form also available upon request. Depending on the device chosen, different sets of peripherals are included.
These features make the STM32F072x8/xB microcontrollers suitable for a wide range of applications such as application control and user interfaces, hand-held equipment, A/V receivers and digital TV, PC peripherals, gaming and GPS platforms, industrial applications, PLCs, inverters, printers, scanners, alarm systems, video intercoms and HVACs.
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
#### KEY FEATURES
## 开发板介绍
- Core: ARM®32-bit Cortex®-M0 CPU, frequency up to 48 MHz
NUCLEO-F072RB 是 ST 官方推出的开发板，搭载 STM32F072RBT6 芯片，基于 ARM Cortex-M0 内核，最高主频 48 MHz，具有丰富的板载资源，可以充分发挥 STM32F072RBT6 的芯片性能。
- Memories
开发板外观如下图所示：
- 64 to 128 Kbytes of Flash memory
- 16 Kbytes of SRAM with HW parity
![board](figures/board.jpg)
- CRC calculation unit
NUCLEO-F072RB 开发板常用 **板载资源** 如下：
- Reset and power management
- MCU：STM32F072RBT6，主频 48MHz，128KB FLASH ，16KB RAM
- 常用外设
- LED：3 个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
- 按键：2 个，USER and RESET 。
- 常用接口：USB 转串口、Arduino Uno 和 ST morpho 两类扩展接口
- 调试接口：板载 ST-LINK/V2-1 调试器。
- Digital and I/O supply: VDD= 2.0 V to 3.6 V
- Analog supply: VDDA= VDDto 3.6 V
- Selected I/Os: VDDIO2= 1.65 V to 3.6 V
- Power-on/Power down reset (POR/PDR)
- Programmable voltage detector (PVD)
- Low power modes: Sleep, Stop, Standby
- VBATsupply for RTC and backup registers
开发板更多详细信息请参考意法半导体[NUCLEO-F072RB](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f072rb.html)
- Clock management
## 外设支持
- 4 to 32 MHz crystal oscillator
- 32 kHz oscillator for RTC with calibration
- Internal 8 MHz RC with x6 PLL option
- Internal 40 kHz RC oscillator
- Internal 48 MHz oscillator with automatic trimming based on ext. synchronization
本 BSP 目前对外设的支持情况如下：
- Up to 87 fast I/Os
| **片上外设** | **支持情况** | **备注** |
| :------------ | :----------: | :-----------------------------------: |
| GPIO | 支持 | PA0, PA1... PH1 ---> PIN: 0, 1...63 |
| UART | 支持 | UART2 |
| LED | 支持 | LED2 |
- All mappable on external interrupt vectors
- Up to 68 I/Os with 5V tolerant capability and 19 with independent supply VDDIO2
## 使用说明
- Seven-channel DMA controller
使用说明分为如下两个章节：
- One 12-bit, 1.0 μs ADC (up to 16 channels)
- 快速上手
- Conversion range: 0 to 3.6 V
- Separate analog supply: 2.4 V to 3.6 V
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- One 12-bit D/A converter (with 2 channels)
- 进阶使用
- Two fast low-power analog comparators with programmable input and output
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
- Up to 24 capacitive sensing channels for touchkey, linear and rotary touch sensors
- Calendar RTC with alarm and periodic wakeup from Stop/Standby
- 12 timers
- One 16-bit advanced-control timer for six-channel PWM output
- One 32-bit and seven 16-bit timers, with up to four IC/OC, OCN, usable for IR control decoding or DAC control
- Independent and system watchdog timers
- SysTick timer
- Communication interfaces
- Two I2C interfaces supporting Fast Mode Plus (1 Mbit/s) with 20 mA current sink, one supporting SMBus/PMBus and wakeup
- Four USARTs supporting master synchronous SPI and modem control, two with ISO7816 interface, LIN, IrDA, auto baud rate detection and wakeup feature
- Two SPIs (18 Mbit/s) with 4 to 16 programmable bit frames, and with I2S interface multiplexed
- CAN interface
- USB 2.0 full-speed interface, able to run from internal 48 MHz oscillator and with BCD and LPM support
- HDMI CEC wakeup on header reception
- Serial wire debug (SWD)
- 96-bit unique ID
- All packages ECOPACK®2
### 快速上手
本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
## Read more
#### 硬件连接
| Documents | Description |
| :----------------------------------------------------------: | :----------------------------------------------------------: |
| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) |
| [STM32F072RB ST Official Website](https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f0-series/stm32f0x2/stm32f072rb.html#documentation) | STM32F072RB datasheet and other resources |
使用 Type-A to Mini-B 线连接开发板和 PC 供电，红色 LED LD3 (PWR) 和 LD1 (COM) 会点亮。
#### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
## Maintained By
> 工程默认配置使用 ST-LINK 下载程序，点击下载按钮即可下载程序到开发板。
[刘恒](https://github.com/lhxzui)
#### 运行结果
iuzxhl@qq.com
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 和 LD1 常亮、绿色 LD2 会周期性闪烁。
USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```
\ | /
- RT - Thread Operating System
/ | \ 4.0.2 build May 30 2019
2006 - 2019 Copyright by rt-thread team
msh >
```
## Translated By
### 进阶使用
Meco Man @ RT-Thread Community
此 BSP 默认只开启了 GPIO 和 串口 2 的功能，更多高级功能需要利用 env 工具对 BSP 进行配置，步骤如下：
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
## 注意事项
## 联系人信息
维护人:
- [刘恒](https://github.com/lhxzui), 邮箱：<iuzxhl@qq.com>
> jiantingman@foxmail.com
>
> https://github.com/mysterywolf
bsp/stm32/stm32f072-st-nucleo/README_zh.md
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# NUCLEO-F072RB 开发板 BSP 说明
## 简介
本文档为刘恒为 NUCLEO-F072RB 开发板提供的 BSP (板级支持包) 说明。
主要内容如下：
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
## 开发板介绍
NUCLEO-F072RB 是 ST 官方推出的开发板，搭载 STM32F072RBT6 芯片，基于 ARM Cortex-M0 内核，最高主频 48 MHz，具有丰富的板载资源，可以充分发挥 STM32F072RBT6 的芯片性能。
开发板外观如下图所示：
![board](figures/board.jpg)
NUCLEO-F072RB 开发板常用 **板载资源** 如下：
- MCU：STM32F072RBT6，主频 48MHz，128KB FLASH ，16KB RAM
- 常用外设
- LED：3 个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
- 按键：2 个，USER and RESET 。
- 常用接口：USB 转串口、Arduino Uno 和 ST morpho 两类扩展接口
- 调试接口：板载 ST-LINK/V2-1 调试器。
开发板更多详细信息请参考意法半导体[NUCLEO-F072RB](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f072rb.html)
## 外设支持
本 BSP 目前对外设的支持情况如下：
| **片上外设** | **支持情况** | **备注** |
| :------------ | :----------: | :-----------------------------------: |
| GPIO | 支持 | PA0, PA1... PH1 ---> PIN: 0, 1...63 |
| UART | 支持 | UART2 |
| LED | 支持 | LED2 |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
### 快速上手
本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
#### 硬件连接
使用 Type-A to Mini-B 线连接开发板和 PC 供电，红色 LED LD3 (PWR) 和 LD1 (COM) 会点亮。
#### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
> 工程默认配置使用 ST-LINK 下载程序，点击下载按钮即可下载程序到开发板。
#### 运行结果
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 和 LD1 常亮、绿色 LD2 会周期性闪烁。
USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```
\ | /
- RT - Thread Operating System
/ | \ 4.0.2 build May 30 2019
2006 - 2019 Copyright by rt-thread team
msh >
```
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口 2 的功能，更多高级功能需要利用 env 工具对 BSP 进行配置，步骤如下：
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
## 注意事项
## 联系人信息
维护人:
- [刘恒](https://github.com/lhxzui), 邮箱：<iuzxhl@qq.com>
bsp/stm32/stm32f091-st-nucleo/README.md
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# STM32F091RC-Nucleo BSP (Board Support Package) Execution Instruction
# STM32F091-Nucleo BSP Introduction
[中文页](README_zh.md) |
@@ -14,11 +14,13 @@ The document is covered in three parts:
By reading the Quickly Get Started section developers can quickly get their hands on this BSP and run RT-Thread on the board. More advanced features will be introduced in the Advanced Features section to help developers take advantage of RT-Thread to drive more on-board resources.
## STM32F091RC-Nucleo Resources Introduction
The STM32F091RC-Nucleo is a development board that contains a ARM Cortex-M0. The maximum main frequency is 48 MHz, and it has a wealth of on-board resources that can take full advantage of the STM32F091's chip performance.
[![board](https://github.com/RT-Thread/rt-thread/raw/master/bsp/stm32/stm32f091-st-nucleo/figures/board.jpg)](https://github.com/RT-Thread/rt-thread/blob/master/bsp/stm32/stm32f091-st-nucleo/figures/board.jpg)
[![board](figures\board.jpg)](https://github.com/RT-Thread/rt-thread/blob/master/bsp/stm32/stm32f091-st-nucleo/figures/board.jpg)
The mainly-used resources of this board are shown as follows:
@@ -27,7 +29,11 @@ The mainly-used resources of this board are shown as follows:
- External FLASH: None
- Common peripherals -Button: one, user (has the wake-up feature, PC13)
- Common-used interfaces: USB, Arduino interface, etc.
- Debug interface: standard SWD For more details about this board, please refer to [ST official](https://www.st.com/en/evaluation-tools/stm32-nucleo-boards.html?querycriteria=productId=LN1847).
- Debug interface: Standard SWD interface.
### For more details about this board, please refer to [ST official](https://www.st.com/en/evaluation-tools/stm32-nucleo-boards.html?querycriteria=productId=LN1847).
## **Peripheral Condition**
@@ -48,9 +54,9 @@ Each peripheral supporting condition for this BSP is as follows:
| FLASH | Support | |
| IWGSupport | | |
## Execution Instruction
### Quickly Get Started
## Quickly Get Started
This BSP provides MDK4, MDK5, and IAR projects for developers and it supports the GCC development environment. Here's an example of the MDK5 development environment, to introduce how to run the system.
bsp/stm32/stm32f103-atk-warshipv3/project.uvoptx
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## Onboard Resources
## MCU Resources
The Blue Pill is a STM32F103 based development board with Cortex-M3 ARM CPU that runs at 72 MHz, 20 KB of RAM and 64 or 128 KB of flash memory. The microcontroller (MCU) has a USB port, two serial ports, 16 bit PWM pins and 12 bit ADC pins. It runs at 3.3V, but some of its pins are 5V tolerant.
The STM32F103xx medium-density performance line family incorporates the high-performance ARM®Cortex®-M3 32-bit RISC core operating at a 72 MHz frequency, high-speed embedded memories (Flash memory up to 128 Kbytes and SRAM up to 20 Kbytes), and an extensive range of enhanced I/Os and peripherals connected to two APB buses. All devices offer two 12-bit ADCs, three general purpose 16-bit timers plus one PWM timer, as well as standard and advanced communication interfaces: up to two I2Cs and SPIs, three USARTs, an USB and a CAN.
The devices operate from a 2.0 to 3.6 V power supply. They are available in both the –40 to +85 °C temperature range and the –40 to +105 °C extended temperature range. A comprehensive set of power-saving mode allows the design of low-power applications.
The STM32F103xx medium-density performance line family includes devices in six different package types: from 36 pins to 100 pins. Depending on the device chosen, different sets of peripherals are included, the description below gives an overview of the complete range of peripherals proposed in this family.
These features make the STM32F103xx medium-density performance line microcontroller family suitable for a wide range of applications such as motor drives, application control, medical and handheld equipment, PC and gaming peripherals, GPS platforms, industrial applications, PLCs, inverters, printers, scanners, alarm systems, video intercoms, and HVACs.
KEY FEATURES
- ARM® 32-bit Cortex®-M3 CPU Core
- 72 MHz maximum frequency,1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
- Single-cycle multiplication and hardware division
- Memories
- 64 or 128 Kbytes of Flash memory
- 20 Kbytes of SRAM
- Clock, reset and supply management
- 2.0 to 3.6 V application supply and I/Os
- POR, PDR, and programmable voltage detector (PVD)
- 4-to-16 MHz crystal oscillator
- Internal 8 MHz factory-trimmed RC
- Internal 40 kHz RC
- PLL for CPU clock
- 32 kHz oscillator for RTC with calibration
- Low-power
- Sleep, Stop and Standby modes
- VBAT supply for RTC and backup registers
- 2 x 12-bit, 1 μs A/D converters (up to 16 channels)
- Conversion range: 0 to 3.6 V
- Dual-sample and hold capability
- Temperature sensor
- DMA
- 7-channel DMA controller
- Peripherals supported: Timers, ADC, SPIs, I2Cs and USARTs
- Up to 80 fast I/O ports
- 26/37/51/80 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant
- Debug mode
- Serial wire debug (SWD) & JTAG interfaces
- 7 timers
- Three 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- 16-bit, motor control PWM timer with dead-time generation and emergency stop
- 2 watchdog timers (Independent and Window)
- SysTick timer 24-bit downcounter
- Up to 9 communication interfaces
- Up to 2 x I2C interfaces (SMBus/PMBus)
- Up to 3 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
- Up to 2 SPIs (18 Mbit/s)
- CAN interface (2.0B Active)
- USB 2.0 full-speed interface
- CRC calculation unit, 96-bit unique ID
- Packages are ECOPACK®
## Onboard Resources
- MCU：STM32F103C8T6 @72MHz, 64KB FLASH , 20KB RAM
@@ -40,7 +93,9 @@ This BSP provides MDK4, MDK5, and IAR projects for developers and it supports th
### Use ST-LINK Debugger to connect the Blue Pill Board
ST-LINK driver: https://www.st.com/en/development-tools/stsw-link009.html
ST-LINK driver:
> https://www.st.com/en/development-tools/stsw-link009.html
| ST-LINK Debugger | Blue Pill 4-Pin SWD |
| :--------------: | :-----------------: |
@@ -59,7 +114,9 @@ ST-LINK driver: https://www.st.com/en/development-tools/stsw-link009.html
### Use FTDI adapter(USB to UART) to connect the Blue Pill Board's PA9(Tx) and PA10(Rx) pins
FTDI adapter driver: https://www.ftdichip.com/FTDrivers.htm
FTDI adapter driver:
> https://www.ftdichip.com/FTDrivers.htm
You can use other USB to UART adapters to replace FTDI adapter.
@@ -90,7 +147,7 @@ You can use other USB to UART adapters to replace FTDI adapter.
### Compile and Download
- Double-click the `project.uvprojx` file to open the MDK5 project (**NOT** `template.uvprojx` file)
- Double-click the `project.uvprojx` file to open the MDK-Keil5 project (**NOT** `template.uvprojx` file)
- Click the “option for target” button
- Debug: Choose "ST-LINK Debugger" and Click "Setting" button:
- Port: choose "SW (Serial Wire)"
@@ -98,13 +155,17 @@ You can use other USB to UART adapters to replace FTDI adapter.
- Compile and download the program to the board
You can also follow this video to configurate *Blue Pill BSP* Keil5 project:
> https://www.youtube.com/watch?v=0PwBBYXQ08g&t
### Running Results
After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, and you will see the LED is flashing periodically.
The USB virtual COM port connects to **USART1 (PA9-Tx, PA10-Rx) by default**, and when the corresponding serial port (**115200**-8-1-N) is opened in the terminal tool, the output information of RT-Thread can be seen when the device is reset:
The COM port connects to **USART1 (PA9-Tx, PA10-Rx) by default**, and when the corresponding serial port (**115200**-8-1-N) is opened in the terminal tool, the output information of RT-Thread can be seen when the device is reset:
```shell
\ | /
@@ -114,13 +175,29 @@ The USB virtual COM port connects to **USART1 (PA9-Tx, PA10-Rx) by default**, an
msh >
```
- If you have no terminal tool software available, you can download *Putty*: https://www.chiark.greenend.org.uk/~sgtatham/putty/latest.html
### Terminal tool - PuTTy
If you have no terminal tool software available, you can download *PuTTy*:
> https://www.chiark.greenend.org.uk/~sgtatham/putty/latest.html
![putty](figures/putty.png)
These two videos will show you how to use PuTTy:
> https://www.youtube.com/watch?v=ab4ilbsteWU
>
> https://www.youtube.com/watch?v=dO-BMOzNKcI
## **Advanced Features**
This BSP only enables GPIO and USART1 by default. If you need more advanced features such as SPI, ADC, or to add software packages, you need to configure the BSP with RT-Thread [ENV tools](https://www.rt-thread.io/download.html?download=Env), as follows:
This BSP only enables GPIO and USART1 by default. If you need more advanced features such as SPI, ADC, or to add software packages, you need to configure the BSP with RT-Thread [ENV tool](https://www.rt-thread.io/download.html?download=Env), as follows:
1. Open the ENV tool under the specific BSP folder, eg: *bsp/stm32/stm32f103-blue-pill* ;
2. Enter `menuconfig` command to configure the project, then save and exit;
@@ -133,10 +210,11 @@ Learn how to use RT-Thread ENV, click [Here](https://github.com/RT-Thread/rtthre
## Read more
- [[Schematic]](https://stm32duinoforum.com/forum/images/c/c1/wiki_subdomain/Vcc-gnd.com-STM32F103C8-schematic.pdf)
- [[STM32 Blue Pill Board Schematic]](https://stm32duinoforum.com/forum/images/c/c1/wiki_subdomain/Vcc-gnd.com-STM32F103C8-schematic.pdf)
- [[STM32 Blue Pill vs Black Pill Microcontroller Boards]](https://www.youtube.com/watch?v=QCdnO43RBK4&t=875s)
- [[STM32F103C8 datasheet]]( https://www.st.com/resource/en/datasheet/stm32f103c8.pdf)
- [[STM32F103C8 More Information]](https://www.st.com/en/microcontrollers-microprocessors/stm32f103c8.html#overview)
- [[STM32F103C8 More Information (ST official)]](https://www.st.com/en/microcontrollers-microprocessors/stm32f103c8.html#overview)
- [[RT-Thread document center]](https://www.rt-thread.io/document/site/introduction/introduction/)
@@ -147,4 +225,4 @@ Meco Man @ RT-Thread Community
jiantingman@foxmail.com
https://github.com/mysterywolf
https://github.com/mysterywolf
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## 联系人信息
## 感谢 & 维护
维护人:
- [obito0](https://github.com/obito0), 邮箱：<496420502@qq.com>
- Meco Man: jiantingman@foxmail.com https://github.com/mysterywolf
- 感谢[obito0](https://github.com/obito0)提供的[原始工程](../stm32f103-mini-system)
- [Meco Man](https://github.com/mysterywolf): jiantingman@foxmail.com
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# STM32F410-Nucleo-64 开发板 BSP 说明
# STM32F410-Nucleo BSP Introduction
## 简介
[中文](README_zh.md)
本文档为 RT-Thread 开发团队为 STM32F410-Nucleo-64 开发板提供的 BSP (板级支持包) 说明。
## MCU: STM32F410RB @100MHz, 128KB FLASH, 32KB RAM
主要内容如下：
The STM32F410x8/B devices are based on the high-performance ARM®Cortex® -M4 32-bit RISC core operating at a frequency of up to 100 MHz. Their Cortex®-M4 core features a Floating point unit (FPU) single precision which supports all ARM single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
The STM32F410x8/B belong to the STM32 Dynamic Efficiency™ product line (with products combining power efficiency, performance and integration) while adding a new innovative feature called Batch Acquisition Mode (BAM) allowing to save even more power consumption during data batching.
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
The STM32F410x8/B incorporate high-speed embedded memories (up to 128 Kbytes of Flash memory, 32 Kbytes of SRAM), and an extensive range of enhanced I/Os and peripherals connected to two APB buses, one AHB bus and a 32-bit multi-AHB bus matrix.
## 开发板介绍
All devices offer one 12-bit ADC, one 12-bit DAC, a low-power RTC, three general-purpose 16-bit timers, one PWM timer for motor control, one general-purpose 32-bit timers and one 16-bit low-power timer. They also feature standard and advanced communication interfaces.
探索者 STM32F410-Nucleo-64 是意法半导体推出的一款基于 ARM Cortex-M4 内核的开发板，最高主频为 84Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32F410RB 的芯片性能。
#### KEY FEATURES
开发板外观如下图所示：
- Dynamic Efficiency Line with BAM (Batch Acquisition Mode)
- Core: ARM®32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 100 MHz, memory protection unit, 125 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Memories
- Up to 128 Kbytes of Flash memory
- 512 bytes of OTP memory
- 32 Kbytes of SRAM
- Clock, reset and supply management
- 1.7 V to 3.6 V application supply and I/Os
- POR, PDR, PVD and BOR
- 4-to-26 MHz crystal oscillator
- Internal 16 MHz factory-trimmed RC
- 32 kHz oscillator for RTC with calibration
- Internal 32 kHz RC with calibration
- Power consumption
- Run: 89 μA/MHz (peripheral off)
- Stop (Flash in Stop mode, fast wakeup time): 40 μA Typ @ 25 °C; 49 μA max @25 °C
- Stop (Flash in Deep power down mode, fast wakeup time): down to 6 μA @ 25 °C; 14 μA max @25 °C
- Standby: 2.4 μA @25 °C / 1.7 V without RTC; 12 μA @85 °C @1.7 V
- VBATsupply for RTC: 1 μA @25 °C
- 1×12-bit, 2.4 MSPS ADC: up to 16 channels
- 1×12-bit D/A converter
- General-purpose DMA: 16-stream DMA controllers with FIFOs and burst support
- Up to 9 timers
- One 16-bit advanced motor-control timer
- One low-power timer (available in Stop mode)
- Three 16-bit general purpose timers
- One 32-bit timer up to 100 MHz with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- Two watchdog timers (independent window)
- SysTick timer
![board](figures/board.png)
该开发板常用 **板载资源** 如下：
- MCU：STM32F410RBT6，主频 84MHz，128KB FLASH ，32KB RAM。
- 常用外设
- LED：3 个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
- 按键，2 个，USER and RESET 。
- 调试接口，板载 ST-LINK/V2-1 调试器。
开发板更多详细信息请参考意法半导体 [STM32F410-Nucleo-64 开发板介绍](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f410rb.html)。
## 外设支持
本 BSP 目前对外设的支持情况如下：
| **片上外设** | **支持情况** | **备注** |
| :------------ | :----------: | :-----------------------------------: |
| GPIO | 支持 | PA0, PA1... ---> PIN: 0, 1...63 |
| UART | 支持 | UART2 |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
- Debug mode
- Serial wire debug (SWD) & JTAG interfaces
- Cortex®-M4 Embedded Trace Macrocell™
- Up to 50 I/O ports with interrupt capability
- Up to 45 fast I/Os up to 100 MHz
- Up to 49 5 V-tolerant I/Os
- Up to 9 communication interfaces
- Up to 3x I2C interfaces (SMBus/PMBus) including 1x I2C Fast-mode at 1 MHz
- Up to 3 USARTs (2 x 12.5 Mbit/s, 1 x 6.25 Mbit/s), ISO 7816 interface, LIN, IrDA, modem control)
- Up to 3 SPI/I2Ss (up to 50 Mbit/s SPI or I2S audio protocol)
- True random number generator
- CRC calculation unit
- 96-bit unique ID
- RTC: subsecond accuracy, hardware calendar
- All packages are ECOPACK®2
### 快速上手
本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
## Read more
#### 硬件连接
| Documents | Description |
| :----------------------------------------------------------: | :----------------------------------------------------------: |
| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) |
| [STM32F410RB ST Official Website](https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32f4-series/stm32f410/stm32f410rb.html#documentation) | STM32F410RB datasheet and other resources |
使用 Type-A to Mini-B 线连接开发板和 PC 供电，红色 LED LD3 (PWR) 和 LD1 (COM) 会点亮。
#### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
## Maintained By
> 工程默认配置使用 ST-LINK 下载程序，点击下载按钮即可下载程序到开发板。
[tanglj86](https://github.com/tanglj86/rt-thread)
#### 运行结果
tanglj86@gmail.com
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 和 LD1 常亮、绿色 LD2 会周期性闪烁。
USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.3 build Mar 7 2020
2006 - 2020 Copyright by rt-thread team
msh >
```
### 进阶使用
## Translated By
此 BSP 默认只开启了 GPIO 和 串口 2 的功能，更多高级功能需要利用 ENV 工具对 BSP 进行配置，步骤如下：
Meco Man @ RT-Thread Community
1. 在 BSP 下打开 env 工具。
2. 输入 `menuconfig` 命令配置工程，配置好之后保存退出。
3. 输入 `pkgs --update` 命令更新软件包。
4. 输入 `scons --target=mdk4/mdk5/iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
## 注意事项
暂无
## 联系人信息
维护人:
- [tanglj86](https://github.com/tanglj86/rt-thread) ，邮箱：<tanglj86@gmail.com>
> jiantingman@foxmail.com
>
> https://github.com/mysterywolf
bsp/stm32/stm32f410-st-nucleo/README_zh.md
+104
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@@ -0,0 +1,104 @@
# STM32F410-Nucleo-64 开发板 BSP 说明
## 简介
本文档为 RT-Thread 开发团队为 STM32F410-Nucleo-64 开发板提供的 BSP (板级支持包) 说明。
主要内容如下：
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
## 开发板介绍
探索者 STM32F410-Nucleo-64 是意法半导体推出的一款基于 ARM Cortex-M4 内核的开发板，最高主频为 84Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32F410RB 的芯片性能。
开发板外观如下图所示：
![board](figures/board.png)
该开发板常用 **板载资源** 如下：
- MCU：STM32F410RBT6，主频 100MHz，128KB FLASH ，32KB RAM。
- 常用外设
- LED：3 个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
- 按键，2 个，USER and RESET 。
- 调试接口，板载 ST-LINK/V2-1 调试器。
开发板更多详细信息请参考意法半导体 [STM32F410-Nucleo-64 开发板介绍](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f410rb.html)。
## 外设支持
本 BSP 目前对外设的支持情况如下：
| **片上外设** | **支持情况** | **备注** |
| :------------ | :----------: | :-----------------------------------: |
| GPIO | 支持 | PA0, PA1... ---> PIN: 0, 1...63 |
| UART | 支持 | UART2 |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
### 快速上手
本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
#### 硬件连接
使用 Type-A to Mini-B 线连接开发板和 PC 供电，红色 LED LD3 (PWR) 和 LD1 (COM) 会点亮。
#### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
> 工程默认配置使用 ST-LINK 下载程序，点击下载按钮即可下载程序到开发板。
#### 运行结果
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 和 LD1 常亮、绿色 LD2 会周期性闪烁。
USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.3 build Mar 7 2020
2006 - 2020 Copyright by rt-thread team
msh >
```
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口 2 的功能，更多高级功能需要利用 ENV 工具对 BSP 进行配置，步骤如下：
1. 在 BSP 下打开 env 工具。
2. 输入 `menuconfig` 命令配置工程，配置好之后保存退出。
3. 输入 `pkgs --update` 命令更新软件包。
4. 输入 `scons --target=mdk4/mdk5/iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
## 注意事项
暂无
## 联系人信息
维护人:
- [tanglj86](https://github.com/tanglj86/rt-thread) ，邮箱：<tanglj86@gmail.com>
bsp/stm32/stm32f411-atk-nano/project.ewp
+192 -89
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bsp/stm32/stm32f411-st-nucleo/README.md
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# STM32F411-Nucleo-64 开发板 BSP 说明
# STM32F411-Nucleo BSP Introduction
## 简介
[中文](README_zh.md)
本文档为 RT-Thread 开发团队为 STM32F411-Nucleo-64 开发板提供的 BSP (板级支持包) 说明。
## MCU: STM32F411RE @100MHz, 512KB FLASH, 128KB RAM
主要内容如下：
The STM32F411xC/xE devices are based on the high-performance Arm® Cortex® -M4 32-bit RISC core operating at a frequency of up to 100 MHz. The Cortex®-M4 core features a Floating point unit (FPU) single precision which supports all Arm single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
The STM32F411xC/xE belongs to the STM32 Dynamic Efficiency™ product line (with products combining power efficiency, performance and integration) while adding a new innovative feature called Batch Acquisition Mode (BAM) allowing to save even more power consumption during data batching.
The STM32F411xC/xE incorporate high-speed embedded memories (up to 512 Kbytes of Flash memory, 128 Kbytes of SRAM), and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB bus and a 32-bit multi-AHB bus matrix.
All devices offer one 12-bit ADC, a low-power RTC, six general-purpose 16-bit timers including one PWM timer for motor control, two general-purpose 32-bit timers. They also feature standard and advanced communication interfaces.
The STM32F411xC/xE operate in the - 40 to + 125 °C temperature range from a 1.7 (PDR OFF) to 3.6 V power supply. A comprehensive set of power-saving mode allows the design of low-power applications.
These features make the STM32F411xC/xE microcontrollers suitable for a wide range of applications.
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
#### KEY FEATURES
## 开发板介绍
探索者 STM32F411-Nucleo-64 是意法半导体推出的一款基于 ARM Cortex-M4 内核的开发板，最高主频为 100Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32F411RE 的芯片性能。
开发板外观如下图所示：
![board](figures/board.png)
该开发板常用 ** 板载资源 ** 如下：
- MCU：STM32F407ZGT6，主频 100MHz，512KB FLASH ，128KB RAM。
- 常用外设
- LED：3 个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
- 按键，2 个，USER and RESET 。
- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口。
- 调试接口，板载 ST-LINK/V2-1 调试器。
开发板更多详细信息请参考意法半导体 [STM32F411-Nucleo-64 开发板介绍](https://www.st.com/en/evaluation-tools/nucleo-f411re.html)。
## 外设支持
本 BSP 目前对外设的支持情况如下：
| **片上外设** | **支持情况** | **备注** |
| :------------ | :----------: | :-----------------------------------: |
| GPIO | 支持 | PA0, PA1... PH1 ---> PIN: 0, 1...63 |
| UART | 支持 | UART2 |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
- Dynamic Efficiency Line with BAM (Batch Acquisition Mode)
- 1.7 V to 3.6 V power supply
- 40°C to 85/105/125 °C temperature range
- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 100 MHz, memory protection unit, 125 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Memories
- Up to 512 Kbytes of Flash memory
- 128 Kbytes of SRAM
- Clock, reset and supply management
- 1.7 V to 3.6 V application supply and I/Os
- POR, PDR, PVD and BOR
- 4-to-26 MHz crystal oscillator
- Internal 16 MHz factory-trimmed RC
- 32 kHz oscillator for RTC with calibration
- Internal 32 kHz RC with calibration
- Power consumption
- Run: 100 μA/MHz (peripheral off)
- Stop (Flash in Stop mode, fast wakeup time): 42 μA Typ @ 25C; 65 μA max @25 °C
- Stop (Flash in Deep power down mode, slow wakeup time): down to 9 μA @ 25 °C; 28 μA max @25 °C
- Standby: 1.8 μA @25 °C / 1.7 V without RTC; 11 μA @85 °C @1.7 V
- VBAT supply for RTC: 1 μA @25 °C
- 1×12-bit, 2.4 MSPS A/D converter: up to 16 channels
- General-purpose DMA: 16-stream DMA controllers with FIFOs and burst support
- Up to 11 timers: up to six 16-bit, two 32-bit timers up to 100 MHz, each with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input, two watchdog timers (independent and window) and a SysTick timer
- Debug mode
- Serial wire debug (SWD) & JTAG interfaces
- Cortex®-M4 Embedded Trace Macrocell™
- Up to 81 I/O ports with interrupt capability
- Up to 78 fast I/Os up to 100 MHz
- Up to 77 5 V-tolerant I/Os
- Up to 13 communication interfaces
- Up to 3 x I2C interfaces (SMBus/PMBus)
- Up to 3 USARTs (2 x 12.5 Mbit/s, 1 x 6.25 Mbit/s), ISO 7816 interface, LIN, IrDA, modem control)
- Up to 5 SPI/I2Ss (up to 50 Mbit/s, SPI or I2S audio protocol), SPI2 and SPI3 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock
- SDIO interface (SD/MMC/eMMC)
- Advanced connectivity: USB 2.0 full-speed device/host/OTG controller with on-chip PHY
- CRC calculation unit
- 96-bit unique ID
- RTC: subsecond accuracy, hardware calendar
- All packages (WLCSP49, LQFP64/100, UFQFPN48, UFBGA100) are ECOPACK®2
### 快速上手
本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
## Read more
#### 硬件连接
| Documents | Description |
| :----------------------------------------------------------: | :----------------------------------------------------------: |
| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) |
| [STM32F411RE ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32f411re.html#documentation) | STM32F411RE datasheet and other resources |
使用 Type-A to Mini-B 线连接开发板和 PC 供电，红色 LED LD3 (PWR) 和 LD1 (COM) 会点亮。
#### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
## Maintained By
> 工程默认配置使用 ST-LINK 下载程序，点击下载按钮即可下载程序到开发板。
[misonyo](https://github.com/misonyo)
#### 运行结果
misonyo@foxmail.com
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 和 LD1 常亮、绿色 LD2 会周期性闪烁。
USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```bash
\ | /
- RT - Thread Operating System
/ | \ 3.1.1 build Nov 19 2018
2006 - 2018 Copyright by rt-thread team
msh >
```
### 进阶使用
## Translated By
此 BSP 默认只开启了 GPIO 和 串口 2 的功能，更多高级功能需要利用 ENV 工具对 BSP 进行配置，步骤如下：
Meco Man @ RT-Thread Community
1. 在 BSP 下打开 env 工具。
2. 输入 `menuconfig` 命令配置工程，配置好之后保存退出。
3. 输入 `pkgs --update` 命令更新软件包。
4. 输入 `scons --target=mdk4/mdk5/iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32 系列 BSP 外设驱动使用教程. md)。
## 注意事项
暂无
## 联系人信息
维护人:
- [misonyo](https://github.com/misonyo) ，邮箱：<misonyo@foxmail.com>
> jiantingman@foxmail.com
>
> https://github.com/mysterywolf
bsp/stm32/stm32f411-st-nucleo/README_zh.md
+105
View File
@@ -0,0 +1,105 @@
# STM32F411-Nucleo-64 开发板 BSP 说明
## 简介
本文档为 RT-Thread 开发团队为 STM32F411-Nucleo-64 开发板提供的 BSP (板级支持包) 说明。
主要内容如下：
- 开发板资源介绍
- BSP 快速上手
- 进阶使用方法
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
## 开发板介绍
探索者 STM32F411-Nucleo-64 是意法半导体推出的一款基于 ARM Cortex-M4 内核的开发板，最高主频为 100Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32F411RE 的芯片性能。
开发板外观如下图所示：
![board](figures/board.png)
该开发板常用 ** 板载资源 ** 如下：
- MCU：STM32F407ZGT6，主频 100MHz，512KB FLASH ，128KB RAM。
- 常用外设
- LED：3 个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
- 按键，2 个，USER and RESET 。
- 常用接口：USB 支持 3 种不同接口：虚拟 COM 端口、大容量存储和调试端口。
- 调试接口，板载 ST-LINK/V2-1 调试器。
开发板更多详细信息请参考意法半导体 [STM32F411-Nucleo-64 开发板介绍](https://www.st.com/en/evaluation-tools/nucleo-f411re.html)。
## 外设支持
本 BSP 目前对外设的支持情况如下：
| **片上外设** | **支持情况** | **备注** |
| :------------ | :----------: | :-----------------------------------: |
| GPIO | 支持 | PA0, PA1... PH1 ---> PIN: 0, 1...63 |
| UART | 支持 | UART2 |
## 使用说明
使用说明分为如下两个章节：
- 快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
- 进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
### 快速上手
本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
#### 硬件连接
使用 Type-A to Mini-B 线连接开发板和 PC 供电，红色 LED LD3 (PWR) 和 LD1 (COM) 会点亮。
#### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
> 工程默认配置使用 ST-LINK 下载程序，点击下载按钮即可下载程序到开发板。
#### 运行结果
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LD3 和 LD1 常亮、绿色 LD2 会周期性闪烁。
USB 虚拟 COM 端口默认连接串口 2，在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
```bash
\ | /
- RT - Thread Operating System
/ | \ 3.1.1 build Nov 19 2018
2006 - 2018 Copyright by rt-thread team
msh >
```
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口 2 的功能，更多高级功能需要利用 ENV 工具对 BSP 进行配置，步骤如下：
1. 在 BSP 下打开 env 工具。
2. 输入 `menuconfig` 命令配置工程，配置好之后保存退出。
3. 输入 `pkgs --update` 命令更新软件包。
4. 输入 `scons --target=mdk4/mdk5/iar` 命令重新生成工程。
本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32 系列 BSP 外设驱动使用教程. md)。
## 注意事项
暂无
## 联系人信息
维护人:
- [misonyo](https://github.com/misonyo) ，邮箱：<misonyo@foxmail.com>
bsp/stm32/stm32f427-robomaster-a/board/linker_scripts/link.icf
+1 -1
View File
@@ -18,7 +18,7 @@ define symbol __ICFEDIT_size_heap__ = 0x0000;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
bsp/stm32/stm32f429-st-disco/project.ewp
+2450 -2451
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File diff suppressed because it is too large. Load diff
bsp/stm32/stm32f429-st-disco/project.uvprojx
+419 -264
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File diff suppressed because it is too large. Load diff
bsp/stm32/stm32f429-st-disco/template.ewp
+2028 -1815
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File diff suppressed because it is too large. Load diff
bsp/stm32/stm32f429-st-disco/template.eww
+10
View File
@@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\template.ewp</path>
</project>
<batchBuild/>
</workspace>
bsp/stm32/stm32f429-st-disco/template.uvprojx
+3 -3
View File
@@ -16,8 +16,8 @@
<TargetCommonOption>
<Device>STM32F429ZITx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F4xx_DFP.2.14.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<PackID>Keil.STM32F4xx_DFP.2.13.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<Cpu>IRAM(0x20000000,0x30000) IRAM2(0x10000000,0x10000) IROM(0x08000000,0x200000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
@@ -54,7 +54,7 @@
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
bsp/stm32/stm32f469-st-disco/project.ewp
+136 -147
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File diff suppressed because it is too large. Load diff
bsp/stm32/stm32f746-st-disco/project.uvoptx
+14 -78
View File
@@ -78,78 +78,6 @@
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<Books>
<Book>
<Number>0</Number>
<Title>BSP User Manual (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\Drivers\BSP\STM32746G-Discovery\STM32746G-Discovery_BSP_User_Manual.chm</Path>
</Book>
<Book>
<Number>1</Number>
<Title>BSP User Manual (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\Drivers\BSP\STM32756G_EVAL\STM32756G_EVAL_BSP_User_Manual.chm</Path>
</Book>
<Book>
<Number>2</Number>
<Title>User Manual (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\DM00188617.pdf</Path>
</Book>
<Book>
<Number>3</Number>
<Title>STM32F756G-Eval Quick Start Guide (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\STM32F756G-EVAL_QSG.pdf</Path>
</Book>
<Book>
<Number>4</Number>
<Title>Bill of Materials (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\stm327x6g-eval_bom.zip</Path>
</Book>
<Book>
<Number>5</Number>
<Title>Gerber Files (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\stm327x6g-eval_gerber.zip</Path>
</Book>
<Book>
<Number>6</Number>
<Title>Schematics (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\stm327x6g-eval_sch.zip</Path>
</Book>
<Book>
<Number>7</Number>
<Title>STM32F746G-Discovery Quick Start Guide (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\32F746GDISCOVERY_QSG.pdf</Path>
</Book>
<Book>
<Number>8</Number>
<Title>User Manual (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\DM00190424.pdf</Path>
</Book>
<Book>
<Number>9</Number>
<Title>Bill of Materials (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\stm32f746g-disco_bom.zip</Path>
</Book>
<Book>
<Number>10</Number>
<Title>Gerber Files (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\stm32f746g-disco_gerber.zip</Path>
</Book>
<Book>
<Number>11</Number>
<Title>Schematics (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\stm32f746g-disco_sch.zip</Path>
</Book>
<Book>
<Number>12</Number>
<Title>STM32F746G_Discovery Web Page (STM32F746G-Discovery)</Title>
<Path>http://www.st.com/en/evaluation-tools/32f746gdiscovery.html</Path>
</Book>
<Book>
<Number>13</Number>
<Title>STM32756G_EVAL Evaluation Board Web Page (STM32756G-EVAL)</Title>
<Path>http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF261640</Path>
</Book>
</Books>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
@@ -173,7 +101,9 @@
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>5</nTsel>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>6</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
@@ -200,7 +130,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U59400616 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F7x_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F767BGTx$CMSIS\Flash\STM32F7x_1024.FLM)</Name>
<Name>-U59400616 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F7x_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F746NGHx$CMSIS\Flash\STM32F7x_1024.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
@@ -236,13 +166,19 @@
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
<bAutoGenD>0</bAutoGenD>
<bAuto2GenD>0</bAuto2GenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
bsp/stm32/stm32f746-st-disco/project.uvprojx
+172 -164
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bsp/stm32/stm32f746-st-disco/template.uvoptx
+14 -78
View File
@@ -78,78 +78,6 @@
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<Books>
<Book>
<Number>0</Number>
<Title>BSP User Manual (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\Drivers\BSP\STM32746G-Discovery\STM32746G-Discovery_BSP_User_Manual.chm</Path>
</Book>
<Book>
<Number>1</Number>
<Title>BSP User Manual (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\Drivers\BSP\STM32756G_EVAL\STM32756G_EVAL_BSP_User_Manual.chm</Path>
</Book>
<Book>
<Number>2</Number>
<Title>User Manual (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\DM00188617.pdf</Path>
</Book>
<Book>
<Number>3</Number>
<Title>STM32F756G-Eval Quick Start Guide (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\STM32F756G-EVAL_QSG.pdf</Path>
</Book>
<Book>
<Number>4</Number>
<Title>Bill of Materials (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\stm327x6g-eval_bom.zip</Path>
</Book>
<Book>
<Number>5</Number>
<Title>Gerber Files (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\stm327x6g-eval_gerber.zip</Path>
</Book>
<Book>
<Number>6</Number>
<Title>Schematics (STM32756G-EVAL)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32756G_EVAL\Documentation\stm327x6g-eval_sch.zip</Path>
</Book>
<Book>
<Number>7</Number>
<Title>STM32F746G-Discovery Quick Start Guide (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\32F746GDISCOVERY_QSG.pdf</Path>
</Book>
<Book>
<Number>8</Number>
<Title>User Manual (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\DM00190424.pdf</Path>
</Book>
<Book>
<Number>9</Number>
<Title>Bill of Materials (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\stm32f746g-disco_bom.zip</Path>
</Book>
<Book>
<Number>10</Number>
<Title>Gerber Files (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\stm32f746g-disco_gerber.zip</Path>
</Book>
<Book>
<Number>11</Number>
<Title>Schematics (STM32F746G-Discovery)</Title>
<Path>D:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.9.0\MDK\Boards\ST\STM32F746G_Discovery\Documentation\stm32f746g-disco_sch.zip</Path>
</Book>
<Book>
<Number>12</Number>
<Title>STM32F746G_Discovery Web Page (STM32F746G-Discovery)</Title>
<Path>http://www.st.com/en/evaluation-tools/32f746gdiscovery.html</Path>
</Book>
<Book>
<Number>13</Number>
<Title>STM32756G_EVAL Evaluation Board Web Page (STM32756G-EVAL)</Title>
<Path>http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1199/PF261640</Path>
</Book>
</Books>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
@@ -173,7 +101,9 @@
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<nTsel>5</nTsel>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>6</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
@@ -200,7 +130,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U59400616 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F7x_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F767BGTx$CMSIS\Flash\STM32F7x_1024.FLM)</Name>
<Name>-U59400616 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F7x_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F746NGHx$CMSIS\Flash\STM32F7x_1024.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
@@ -236,13 +166,19 @@
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<Lin2Executable></Lin2Executable>
<Lin2ConfigFile></Lin2ConfigFile>
<bLin2Auto>0</bLin2Auto>
<bAutoGenD>0</bAutoGenD>
<bAuto2GenD>0</bAuto2GenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
bsp/stm32/stm32f746-st-disco/template.uvprojx
+12 -3
View File
@@ -11,12 +11,13 @@
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F746NGHx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F7xx_DFP.2.9.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<PackID>Keil.STM32F7xx_DFP.2.13.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20010000,0x40000) IRAM2(0x20000000,0x10000) IROM(0x08000000,0x100000) IROM2(0x00200000,0x100000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
@@ -53,7 +54,7 @@
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\build\keil\List\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
@@ -183,6 +184,7 @@
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>1</hadIROM2>
<StupSel>8</StupSel>
@@ -323,6 +325,7 @@
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
@@ -383,4 +386,10 @@
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
</Project>
bsp/stm32/stm32f767-st-nucleo/project.ewp
+171 -168
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bsp/stm32/stm32f767-st-nucleo/project.uvoptx
+1
View File
@@ -178,6 +178,7 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
bsp/stm32/stm32f767-st-nucleo/project.uvprojx
+217 -209
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bsp/stm32/stm32f767-st-nucleo/template.uvoptx
+1
View File
@@ -178,6 +178,7 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
bsp/stm32/stm32f767-st-nucleo/template.uvprojx
+4 -3
View File
@@ -16,8 +16,8 @@
<TargetCommonOption>
<Device>STM32F767ZITx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F7xx_DFP.2.11.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<PackID>Keil.STM32F7xx_DFP.2.13.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20020000,0x60000) IRAM2(0x20000000,0x20000) IROM(0x08000000,0x200000) IROM2(0x00200000,0x200000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
@@ -54,7 +54,7 @@
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\build\keil\List\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
@@ -184,6 +184,7 @@
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>3</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>1</hadIROM2>
<StupSel>8</StupSel>
bsp/stm32/stm32f769-st-disco/project.uvprojx
+429 -157
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bsp/stm32/stm32f769-st-disco/template.uvprojx
+3 -3
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@@ -16,8 +16,8 @@
<TargetCommonOption>
<Device>STM32F769NIHx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F7xx_DFP.2.11.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<PackID>Keil.STM32F7xx_DFP.2.13.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20020000,0x60000) IRAM2(0x20000000,0x20000) IROM(0x08000000,0x200000) IROM2(0x00200000,0x200000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
@@ -54,7 +54,7 @@
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\build\keil\List\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
bsp/stm32/stm32g070-st-nucleo/project.uvprojx
+67 -67
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