mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-09-20 17:44:20 +08:00
Meco Jianting Man
@@ -78,6 +78,7 @@ jobs:
|
||||
- {RTT_BSP: "stm32/stm32f103-onenet-nbiot", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32/stm32f103-yf-ufun", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32/stm32f107-uc-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32/stm32f207-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32/stm32f401-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32/stm32f405-smdz-breadfruit", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32/stm32f407-atk-explorer", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
@@ -119,7 +120,6 @@ jobs:
|
||||
- {RTT_BSP: "stm32/stm32mp157a-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32/stm32mp157a-st-ev1", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32/stm32wb55-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "stm32f20x", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "swm320", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "swm320-lq100", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
- {RTT_BSP: "beaglebone", RTT_TOOL_CHAIN: "sourcery-arm"}
|
||||
|
||||
@@ -35,3 +35,6 @@ ncscope.*
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||||
#ctag files
|
||||
tags
|
||||
|
||||
.idea
|
||||
CMakeLists.txt
|
||||
cmake-build-debug
|
||||
|
||||
@@ -1,27 +1,12 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file at32f4xx_comp.h
|
||||
* @author Artery
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @brief This file contains all the functions prototypes for the COMP firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 Artery</center></h2>
|
||||
*
|
||||
* Licensed under Artery Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
**************************************************************************
|
||||
* File Name : at32f4xx_comp.h
|
||||
* Description : at32f4xx COMP header file
|
||||
* Date : 2018-10-08
|
||||
* Version : V1.0.5
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F4XX_COMP_H
|
||||
|
||||
@@ -1,15 +1,4 @@
|
||||
/*
|
||||
**************************************************************************
|
||||
* Copyright (C) 2016 by ARTERY Technology Co., Ltd. All Rights Reserved.
|
||||
**************************************************************************
|
||||
* THIS SOURCE FILE IS DISTRIBUTED IN THE HOPE THAT CAN REDUCE EFFORTS AND
|
||||
* TIME, BUT WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
|
||||
* INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
**************************************************************************
|
||||
* File Name : misc.h
|
||||
* Description : at32f4xx MISC header file
|
||||
|
||||
@@ -1,95 +1,11 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file at32f4xx_comp.c
|
||||
* @author Artery
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the comparators (COMP1 and COMP2) peripheral:
|
||||
* + Comparators configuration
|
||||
* + Window mode control
|
||||
*
|
||||
* @verbatim
|
||||
*
|
||||
===============================================================================
|
||||
##### How to use this driver #####
|
||||
===============================================================================
|
||||
[..]
|
||||
|
||||
The device integrates two analog comparators COMP1 and COMP2:
|
||||
(+) The non inverting input is set to PA1 for COMP1 and to PA3
|
||||
for COMP2.
|
||||
|
||||
(+) The inverting input can be selected among: DAC_OUT1,
|
||||
1/4 VREFINT, 1/2 VERFINT, 3/4 VREFINT, VREFINT,
|
||||
I/O (PA0 for COMP1 and PA2 for COMP2)
|
||||
|
||||
(+) The COMP output is internally is available using COMP_GetOutputState()
|
||||
and can be set on GPIO pins: PA0, PA6, PA11 for COMP1
|
||||
and PA2, PA7, PA12 for COMP2
|
||||
|
||||
(+) The COMP output can be redirected to embedded timers (TIM1, TIM2
|
||||
and TIM3)
|
||||
|
||||
(+) The two comparators COMP1 and COMP2 can be combined in window
|
||||
mode and only COMP1 non inverting (PA1) can be used as non-
|
||||
inverting input.
|
||||
|
||||
(+) The two comparators COMP1 and COMP2 have interrupt capability
|
||||
with wake-up from Sleep and Stop modes (through the EXTI controller).
|
||||
COMP1 and COMP2 outputs are internally connected to EXTI Line 21
|
||||
and EXTI Line 22 respectively.
|
||||
|
||||
|
||||
##### How to configure the comparator #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This driver provides functions to configure and program the Comparators
|
||||
of all AT32F4xx devices.
|
||||
|
||||
[..] To use the comparator, perform the following steps:
|
||||
|
||||
(#) Enable the SYSCFG APB clock to get write access to comparator
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||||
register using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
|
||||
|
||||
(#) Configure the comparator input in analog mode using GPIO_Init()
|
||||
|
||||
(#) Configure the comparator output in alternate function mode
|
||||
using GPIO_Init() and use GPIO_PinAFConfig() function to map the
|
||||
comparator output to the GPIO pin
|
||||
|
||||
(#) Configure the comparator using COMP_Init() function:
|
||||
(++) Select the inverting input
|
||||
(++) Select the output polarity
|
||||
(++) Select the output redirection
|
||||
(++) Select the hysteresis level
|
||||
(++) Select the power mode
|
||||
|
||||
(#) Enable the comparator using COMP_Cmd() function
|
||||
|
||||
(#) If required enable the COMP interrupt by configuring and enabling
|
||||
EXTI line in Interrupt mode and selecting the desired sensitivity
|
||||
level using EXTI_Init() function. After that enable the comparator
|
||||
interrupt vector using NVIC_Init() function.
|
||||
|
||||
@endverbatim
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 Artery</center></h2>
|
||||
*
|
||||
* Licensed under Artery Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
**************************************************************************
|
||||
* File Name : at32f4xx_comp.c
|
||||
* Description : at32f4xx COMP source file
|
||||
* Date : 2018-02-26
|
||||
* Version : V1.0.4
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "at32f4xx_comp.h"
|
||||
|
||||
@@ -6,17 +6,6 @@
|
||||
* @date 2019-05-27
|
||||
* @brief CMSIS Cortex-M4 system source file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
|
||||
@@ -1,23 +1,12 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file at32_msp.c
|
||||
* @author Artery Technology
|
||||
* @version V1.0.1
|
||||
* @date 2021-02-09
|
||||
* @brief Msp source file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-04-13 shelton first version
|
||||
*/
|
||||
|
||||
#include <at32f4xx.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
@@ -1,24 +1,13 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file at32_msp.h
|
||||
* @author Artery Technology
|
||||
* @version V1.0.1
|
||||
* @date 2021-02-09
|
||||
* @brief Msp header file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-04-13 shelton first version
|
||||
*/
|
||||
|
||||
#ifndef __AT32_MSP_H__
|
||||
#define __AT32_MSP_H__
|
||||
|
||||
|
||||
@@ -1,23 +1,12 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_at32f4xx.c
|
||||
* @author Artery Technology
|
||||
* @version V1.0.0
|
||||
* @date 2019-05-27
|
||||
* @brief CMSIS Cortex-M4 system source file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-04-13 shelton first version
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
|
||||
@@ -1,23 +1,12 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file at32_msp.c
|
||||
* @author Artery Technology
|
||||
* @version V1.0.1
|
||||
* @date 2021-02-09
|
||||
* @brief Msp source file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-04-13 shelton first version
|
||||
*/
|
||||
|
||||
#include <at32f4xx.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
@@ -1,23 +1,12 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file at32_msp.h
|
||||
* @author Artery Technology
|
||||
* @version V1.0.1
|
||||
* @date 2021-02-09
|
||||
* @brief Msp header file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-04-13 shelton first version
|
||||
*/
|
||||
|
||||
#ifndef __AT32_MSP_H__
|
||||
#define __AT32_MSP_H__
|
||||
|
||||
@@ -1,23 +1,12 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_at32f4xx.c
|
||||
* @author Artery Technology
|
||||
* @version V1.0.0
|
||||
* @date 2019-05-27
|
||||
* @brief CMSIS Cortex-M4 system source file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 ArteryTek</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-04-13 shelton first version
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
|
||||
@@ -19,7 +19,6 @@
|
||||
|
||||
int main(void)
|
||||
{
|
||||
uint32_t cnt = 0;
|
||||
uint8_t pin = rt_pin_get("PE.1");
|
||||
|
||||
rt_pin_mode(pin, PIN_MODE_OUTPUT);
|
||||
@@ -27,14 +26,9 @@ int main(void)
|
||||
|
||||
while (1)
|
||||
{
|
||||
if (cnt % 2 == 0) {
|
||||
rt_pin_write(pin, PIN_LOW);
|
||||
} else {
|
||||
rt_pin_write(pin, PIN_HIGH);
|
||||
}
|
||||
cnt++;
|
||||
rt_thread_mdelay(1000);
|
||||
rt_pin_write(pin, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(pin, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
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@@ -0,0 +1,92 @@
|
||||
# Nordic 系列 BSP 制作教程
|
||||
|
||||
为了让广大开发者更好、更方便地使用 BSP 进行开发，重新整理了现有的 Nordic 系列的 BSP，推出了新的 BSP 框架。新的 BSP 框架在易用性、移植便利性、驱动完整性、代码规范性等方面都有较大提升，在新的 BSP 框架下进行开发，可以大大提高应用的开发效率。
|
||||
|
||||
这边参考了官方stm32的相关制作流程，熟悉STM32的可以参考[STM32](https://github.com/RT-Thread/rt-thread/blob/master/bsp/stm32/docs/STM32%E7%B3%BB%E5%88%97BSP%E5%88%B6%E4%BD%9C%E6%95%99%E7%A8%8B.md)
|
||||
|
||||
## 1. 知识准备
|
||||
|
||||
制作一个 BSP 的过程就是构建一个新系统的过程，因此想要制作出好用的 BSP，要对 RT-Thread 系统的构建过程有一定了解，需要的知识准备如下所示：
|
||||
|
||||
- 掌握 Nordic系列 BSP 的使用方法
|
||||
|
||||
了解 BSP 的使用方法，可以阅读 [Nordic 说明文档](../README.md) 中使用教程表格内的文档。
|
||||
|
||||
- 了解 scons 工程构建方法
|
||||
|
||||
RT-Thread 使用 scons 作为系统的构建工具，因此了解 scons 的常用命令对制作新 BSP 是基本要求。
|
||||
|
||||
- 了解设备驱动框架
|
||||
|
||||
在 RT-Thread 系统中，应用程序通过设备驱动框架来操作硬件，因此了解设备驱动框架，对添加 BSP 驱动是很重要的。
|
||||
|
||||
- 了解 kconfig 语法
|
||||
|
||||
RT-Thread 系统通过 menuconfig 的方式进行配置，而 menuconfig 中的选项是由 kconfig 文件决定的，因此想要对 RT-Thread 系统进行配置，需要对 kconfig 语法有一定了解。
|
||||
|
||||
|
||||
## BSP 制作方法
|
||||
|
||||
本节以制作microbit添加 BSP。在接下来的章节中将会详细介绍具体步骤，帮助开发者快速创建所需要的 BSP。
|
||||
|
||||
### 复制通用模板
|
||||
制作新 BSP 的第一步是复制一份同系列的 BSP 模板作为基础，通过对 BSP 模板的修改来获得新 BSP。目前提供的 BSP 模板系列如下表所示：
|
||||
|
||||
| 工程模板 | 说明 |
|
||||
| ------- | ---- |
|
||||
| libraries/templates/nrfx | nrfx系列 BSP 模板 |
|
||||
|
||||
### 修改芯片类型
|
||||
|
||||
打开board/Kconfig找到SOC_NRF52840
|
||||
|
||||
SOC_NRF52840 要改成你对应的芯片类型，例如SOC_NRF51822 这个时候要确认[nrfx](https://github.com/xckhmf/nrfx)软件包中的SConscript中有对应的配置选项，没用的话，可以pr到对应的软件包
|
||||
|
||||
```
|
||||
elif GetDepend('SOC_NRF51822') == True:
|
||||
define += ['NRF51822_XXAA']
|
||||
src += ['./mdk/system_nrf51.c']
|
||||
|
||||
if rtconfig.PLATFORM == 'armcc':
|
||||
src += ['./mdk/arm_startup_nrf51.s']
|
||||
|
||||
if rtconfig.PLATFORM == 'gcc':
|
||||
src += ['./mdk/gcc_startup_nrf51.S']
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
D_SRC += ['./mdk/iar_startup_nrf51.s']
|
||||
```
|
||||
|
||||
### 修改templete.uvprojx模板
|
||||
|
||||
修改template.uvprojx中的soc和jlink等配置选项，这个可以参考官方SDK sample的keil配置
|
||||
|
||||
这边如果要配置jlink的话，要注意flash download算法是否需要修改。
|
||||
|
||||
### 检查rtconfig.py
|
||||
|
||||
检查rtconfig.py中的CPU类型，nrf52是`cortex-m4` 如果是nrf51需要改成`cortex-m0`
|
||||
|
||||
### 修改menuconfig中的相关配置
|
||||
|
||||
menuconfig中修改RAM size大小。并且修改link.sct文件，这个可以参考官方sample
|
||||
|
||||
|
||||
|
||||
配置UART0相关的的引脚配置， 选中对应的UART0 TX RX引脚
|
||||
|
||||
|
||||
|
||||
最后调试`scons --target=mdk5`
|
||||
|
||||
### 修改整理readme.md
|
||||
|
||||
修改readme.md, 将你的开发板常用的链接信息整理到readme.md中
|
||||
|
||||
|
||||
|
||||
## FAQ:
|
||||
|
||||
1. 编译keil遇到 `No section matches selector - no section to be FIRST`
|
||||
|
||||
这个因为package里面的nrfx中的Sconscript未添加好对应的芯片，没有加载arm_startup_nrf51.s等文件导致
|
||||
@@ -2,12 +2,12 @@
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. October 2015
|
||||
* $Revision: V.1.4.5 a
|
||||
* $Revision: V.1.4.5 a
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_common_tables.h
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_common_tables.h
|
||||
*
|
||||
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
|
||||
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
|
||||
@@ -2,12 +2,12 @@
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015
|
||||
* $Revision: V.1.4.5
|
||||
* $Revision: V.1.4.5
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
*
|
||||
* Description: This file has constant structs that are initialized for
|
||||
* Description: This file has constant structs that are initialized for
|
||||
* user convenience. For example, some can be given as
|
||||
* arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
|
||||
@@ -464,7 +464,7 @@ __attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t v
|
||||
/**
|
||||
\brief Set Base Priority with condition (non_secure)
|
||||
\details Assigns the given value to the non-secure Base Priority register when in secure state only if BASEPRI masking is disabled,
|
||||
or the new value increases the BASEPRI priority level.
|
||||
or the new value increases the BASEPRI priority level.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_MAX_NS(uint32_t value)
|
||||
|
||||
@@ -1,44 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2015-03-01 Yangfs the first version
|
||||
* 2015-03-27 Bernard code cleanup.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup NRF52832
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
#include <finsh.h>
|
||||
#include <shell.h>
|
||||
#endif
|
||||
|
||||
void rt_init_thread_entry(void* parameter)
|
||||
{
|
||||
extern rt_err_t ble_init(void);
|
||||
|
||||
ble_init();
|
||||
}
|
||||
|
||||
int rt_application_init(void)
|
||||
{
|
||||
rt_thread_t tid;
|
||||
|
||||
tid = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 1024,
|
||||
RT_THREAD_PRIORITY_MAX / 3, 20);
|
||||
if (tid != RT_NULL)
|
||||
rt_thread_startup(tid);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*@}*/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,92 +0,0 @@
|
||||
/*
|
||||
* File : startup.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2015, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2015-03-01 Yangfs the first version
|
||||
* 2015-03-27 Bernard code cleanup.
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "board.h"
|
||||
|
||||
/**
|
||||
* @addtogroup NRF52832
|
||||
*/
|
||||
|
||||
/*@{*/
|
||||
|
||||
extern int rt_application_init(void);
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define NRF_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define NRF_SRAM_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define NRF_SRAM_BEGIN (&__bss_end)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* This function will startup RT-Thread RTOS.
|
||||
*/
|
||||
void rtthread_startup(void)
|
||||
{
|
||||
/* init board */
|
||||
rt_hw_board_init();
|
||||
|
||||
/* show version */
|
||||
rt_show_version();
|
||||
|
||||
/* init timer system */
|
||||
rt_system_timer_init();
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_system_heap_init((void*)NRF_SRAM_BEGIN, (void*)CHIP_SRAM_END);
|
||||
#endif
|
||||
|
||||
/* init scheduler system */
|
||||
rt_system_scheduler_init();
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_init();
|
||||
#endif
|
||||
|
||||
/* init application */
|
||||
rt_application_init();
|
||||
|
||||
/* init timer thread */
|
||||
rt_system_timer_thread_init();
|
||||
|
||||
/* init idle thread */
|
||||
rt_thread_idle_init();
|
||||
|
||||
/* start scheduler */
|
||||
rt_system_scheduler_start();
|
||||
|
||||
/* never reach here */
|
||||
return ;
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/* disable interrupt first */
|
||||
// rt_hw_interrupt_disable();
|
||||
|
||||
/* startup RT-Thread RTOS */
|
||||
rtthread_startup();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
@@ -1,22 +0,0 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_NRF52832
|
||||
bool
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
# select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
@@ -1,227 +0,0 @@
|
||||
#include "board.h"
|
||||
#include "drv_uart.h"
|
||||
#include "app_util_platform.h"
|
||||
#include "nrf_drv_common.h"
|
||||
#include "nrf_systick.h"
|
||||
#include "nrf_rtc.h"
|
||||
#include "nrf_drv_clock.h"
|
||||
#include "softdevice_handler.h"
|
||||
#include "nrf_drv_uart.h"
|
||||
#include "nrf_gpio.h"
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
|
||||
#define TICK_RATE_HZ RT_TICK_PER_SECOND
|
||||
#define SYSTICK_CLOCK_HZ ( 32768UL )
|
||||
|
||||
#define NRF_RTC_REG NRF_RTC1
|
||||
/* IRQn used by the selected RTC */
|
||||
#define NRF_RTC_IRQn RTC1_IRQn
|
||||
/* Constants required to manipulate the NVIC. */
|
||||
#define NRF_RTC_PRESCALER ( (uint32_t) (ROUNDED_DIV(SYSTICK_CLOCK_HZ, TICK_RATE_HZ) - 1) )
|
||||
/* Maximum RTC ticks */
|
||||
#define NRF_RTC_MAXTICKS ((1U<<24)-1U)
|
||||
|
||||
static volatile uint32_t m_tick_overflow_count = 0;
|
||||
#define NRF_RTC_BITWIDTH 24
|
||||
#define OSTick_Handler RTC1_IRQHandler
|
||||
#define EXPECTED_IDLE_TIME_BEFORE_SLEEP 2
|
||||
|
||||
void SysTick_Configuration(void)
|
||||
{
|
||||
nrf_drv_clock_lfclk_request(NULL);
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
nrf_rtc_prescaler_set(NRF_RTC_REG, NRF_RTC_PRESCALER);
|
||||
nrf_rtc_int_enable (NRF_RTC_REG, RTC_INTENSET_TICK_Msk);
|
||||
nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_CLEAR);
|
||||
nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_START);
|
||||
nrf_rtc_event_enable(NRF_RTC_REG, RTC_EVTEN_OVRFLW_Msk);
|
||||
|
||||
NVIC_SetPriority(NRF_RTC_IRQn, 0xF);
|
||||
NVIC_EnableIRQ(NRF_RTC_IRQn);
|
||||
}
|
||||
|
||||
static rt_tick_t _tick_distance(void)
|
||||
{
|
||||
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
|
||||
|
||||
uint32_t systick_counter = nrf_rtc_counter_get(NRF_RTC_REG);
|
||||
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK);
|
||||
|
||||
/* check for overflow in TICK counter */
|
||||
if(nrf_rtc_event_pending(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW))
|
||||
{
|
||||
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW);
|
||||
m_tick_overflow_count++;
|
||||
}
|
||||
|
||||
return ((m_tick_overflow_count << NRF_RTC_BITWIDTH) + systick_counter) - rt_tick_get();
|
||||
}
|
||||
|
||||
void OSTick_Handler( void )
|
||||
{
|
||||
uint32_t diff;
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
diff = _tick_distance();
|
||||
|
||||
while((diff--) > 0)
|
||||
{
|
||||
if (rt_thread_self() != RT_NULL)
|
||||
{
|
||||
rt_tick_increase();
|
||||
}
|
||||
}
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
static void _wakeup_tick_adjust(void)
|
||||
{
|
||||
uint32_t diff;
|
||||
uint32_t level;
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
diff = _tick_distance();
|
||||
|
||||
rt_tick_set(rt_tick_get() + diff);
|
||||
|
||||
if (rt_thread_self() != RT_NULL)
|
||||
{
|
||||
struct rt_thread *thread;
|
||||
|
||||
/* check time slice */
|
||||
thread = rt_thread_self();
|
||||
|
||||
if (thread->remaining_tick <= diff)
|
||||
{
|
||||
/* change to initialized tick */
|
||||
thread->remaining_tick = thread->init_tick;
|
||||
|
||||
/* yield */
|
||||
rt_thread_yield();
|
||||
}
|
||||
else
|
||||
{
|
||||
thread->remaining_tick -= diff;
|
||||
}
|
||||
|
||||
/* check timer */
|
||||
rt_timer_check();
|
||||
}
|
||||
|
||||
rt_hw_interrupt_enable(level);
|
||||
}
|
||||
|
||||
static void _sleep_ongo( uint32_t sleep_tick )
|
||||
{
|
||||
uint32_t enterTime;
|
||||
uint32_t entry_tick;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
if ( sleep_tick > NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP )
|
||||
{
|
||||
sleep_tick = NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP;
|
||||
}
|
||||
|
||||
rt_enter_critical();
|
||||
|
||||
enterTime = nrf_rtc_counter_get(NRF_RTC_REG);
|
||||
|
||||
{
|
||||
uint32_t wakeupTime = (enterTime + sleep_tick) & NRF_RTC_MAXTICKS;
|
||||
|
||||
/* Stop tick events */
|
||||
nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_TICK_MASK);
|
||||
|
||||
/* Configure CTC interrupt */
|
||||
nrf_rtc_cc_set(NRF_RTC_REG, 0, wakeupTime);
|
||||
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
|
||||
nrf_rtc_int_enable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
|
||||
|
||||
entry_tick = rt_tick_get();
|
||||
|
||||
__DSB();
|
||||
|
||||
if ( sleep_tick > 0 )
|
||||
{
|
||||
#ifdef SOFTDEVICE_PRESENT
|
||||
if (softdevice_handler_is_enabled())
|
||||
{
|
||||
uint32_t err_code = sd_app_evt_wait();
|
||||
APP_ERROR_CHECK(err_code);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* No SD - we would just block interrupts globally.
|
||||
* BASEPRI cannot be used for that because it would prevent WFE from wake up.
|
||||
*/
|
||||
do{
|
||||
__WFE();
|
||||
} while (0 == (NVIC->ISPR[0] | NVIC->ISPR[1]));
|
||||
}
|
||||
}
|
||||
|
||||
nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
|
||||
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
|
||||
|
||||
_wakeup_tick_adjust();
|
||||
|
||||
/* Correct the system ticks */
|
||||
{
|
||||
|
||||
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK);
|
||||
nrf_rtc_int_enable (NRF_RTC_REG, NRF_RTC_INT_TICK_MASK);
|
||||
/* It is important that we clear pending here so that our corrections are latest and in sync with tick_interrupt handler */
|
||||
NVIC_ClearPendingIRQ(NRF_RTC_IRQn);
|
||||
}
|
||||
|
||||
// rt_kprintf("entry tick:%u, expected:%u, current tick:%u\n", entry_tick, sleep_tick, rt_tick_get());
|
||||
}
|
||||
|
||||
rt_exit_critical();
|
||||
}
|
||||
|
||||
|
||||
void rt_hw_system_powersave(void)
|
||||
{
|
||||
uint32_t sleep_tick;
|
||||
|
||||
sleep_tick = rt_timer_next_timeout_tick() - rt_tick_get();
|
||||
|
||||
if ( sleep_tick >= EXPECTED_IDLE_TIME_BEFORE_SLEEP)
|
||||
{
|
||||
// rt_kprintf("sleep entry:%u\n", rt_tick_get());
|
||||
_sleep_ongo( sleep_tick );
|
||||
}
|
||||
}
|
||||
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
// sd_power_dcdc_mode_set(NRF_POWER_DCDC_ENABLE);
|
||||
/* Activate deep sleep mode */
|
||||
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||
|
||||
nrf_drv_clock_init();
|
||||
// nrf_drv_clock_hfclk_request(0);
|
||||
|
||||
SysTick_Configuration();
|
||||
|
||||
rt_thread_idle_sethook(rt_hw_system_powersave);
|
||||
|
||||
rt_hw_uart_init();
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -1,13 +0,0 @@
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "nrf.h"
|
||||
|
||||
#define CHIP_SRAM_END (0x20000000 + 64*1024)
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# RT-Thread Project Configuration
|
||||
# RT-Thread Configuration
|
||||
#
|
||||
|
||||
#
|
||||
@@ -20,8 +20,22 @@ CONFIG_RT_USING_HOOK=y
|
||||
CONFIG_RT_USING_IDLE_HOOK=y
|
||||
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
|
||||
CONFIG_IDLE_THREAD_STACK_SIZE=256
|
||||
# CONFIG_RT_USING_TIMER_SOFT is not set
|
||||
# CONFIG_RT_DEBUG is not set
|
||||
CONFIG_RT_USING_TIMER_SOFT=y
|
||||
CONFIG_RT_TIMER_THREAD_PRIO=4
|
||||
CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
|
||||
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
|
||||
CONFIG_RT_DEBUG=y
|
||||
# CONFIG_RT_DEBUG_COLOR is not set
|
||||
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
|
||||
|
||||
#
|
||||
# Inter-Thread communication
|
||||
@@ -53,19 +67,18 @@ CONFIG_RT_USING_DEVICE=y
|
||||
# CONFIG_RT_USING_INTERRUPT_INFO is not set
|
||||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
|
||||
CONFIG_RT_VER_NUM=0x40003
|
||||
CONFIG_ARCH_ARM=y
|
||||
CONFIG_RT_USING_CPU_FFS=y
|
||||
CONFIG_ARCH_ARM_CORTEX_M=y
|
||||
CONFIG_ARCH_ARM_CORTEX_M3=y
|
||||
# CONFIG_RT_USING_CPU_FFS is not set
|
||||
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
|
||||
|
||||
#
|
||||
# RT-Thread Components
|
||||
#
|
||||
# CONFIG_RT_USING_COMPONENTS_INIT is not set
|
||||
# CONFIG_RT_USING_USER_MAIN is not set
|
||||
CONFIG_RT_USING_COMPONENTS_INIT=y
|
||||
CONFIG_RT_USING_USER_MAIN=y
|
||||
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
|
||||
CONFIG_RT_MAIN_THREAD_PRIORITY=10
|
||||
|
||||
#
|
||||
# C++ features
|
||||
@@ -88,21 +101,13 @@ CONFIG_FINSH_CMD_SIZE=80
|
||||
# CONFIG_FINSH_USING_AUTH is not set
|
||||
CONFIG_FINSH_USING_MSH=y
|
||||
CONFIG_FINSH_USING_MSH_DEFAULT=y
|
||||
# CONFIG_FINSH_USING_MSH_ONLY is not set
|
||||
CONFIG_FINSH_USING_MSH_ONLY=y
|
||||
CONFIG_FINSH_ARG_MAX=10
|
||||
|
||||
#
|
||||
# Device virtual file system
|
||||
#
|
||||
# CONFIG_RT_USING_DFS is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_0 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
@@ -110,7 +115,9 @@ CONFIG_FINSH_ARG_MAX=10
|
||||
CONFIG_RT_USING_DEVICE_IPC=y
|
||||
CONFIG_RT_PIPE_BUFSZ=512
|
||||
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
|
||||
# CONFIG_RT_USING_SERIAL is not set
|
||||
CONFIG_RT_USING_SERIAL=y
|
||||
# CONFIG_RT_SERIAL_USING_DMA is not set
|
||||
CONFIG_RT_SERIAL_RB_BUFSZ=64
|
||||
# CONFIG_RT_USING_CAN is not set
|
||||
# CONFIG_RT_USING_HWTIMER is not set
|
||||
# CONFIG_RT_USING_CPUTIME is not set
|
||||
@@ -123,9 +130,7 @@ CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_RT_USING_MTD_NOR is not set
|
||||
# CONFIG_RT_USING_MTD_NAND is not set
|
||||
# CONFIG_RT_USING_PM is not set
|
||||
CONFIG_RT_USING_RTC=y
|
||||
# CONFIG_RT_USING_ALARM is not set
|
||||
# CONFIG_RT_USING_SOFT_RTC is not set
|
||||
# CONFIG_RT_USING_RTC is not set
|
||||
# CONFIG_RT_USING_SDIO is not set
|
||||
# CONFIG_RT_USING_SPI is not set
|
||||
# CONFIG_RT_USING_WDT is not set
|
||||
@@ -148,7 +153,7 @@ CONFIG_RT_USING_RTC=y
|
||||
#
|
||||
# CONFIG_RT_USING_LIBC is not set
|
||||
# CONFIG_RT_USING_PTHREADS is not set
|
||||
CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_RT_LIBC_USING_TIME is not set
|
||||
|
||||
#
|
||||
# Network
|
||||
@@ -185,7 +190,6 @@ CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_RT_USING_RYM is not set
|
||||
# CONFIG_RT_USING_ULOG is not set
|
||||
# CONFIG_RT_USING_UTEST is not set
|
||||
# CONFIG_RT_USING_LWP is not set
|
||||
|
||||
#
|
||||
# RT-Thread online packages
|
||||
@@ -254,8 +258,6 @@ CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_PKG_USING_LIBRWS is not set
|
||||
# CONFIG_PKG_USING_TCPSERVER is not set
|
||||
# CONFIG_PKG_USING_PROTOBUF_C is not set
|
||||
# CONFIG_PKG_USING_ONNX_PARSER is not set
|
||||
# CONFIG_PKG_USING_ONNX_BACKEND is not set
|
||||
# CONFIG_PKG_USING_DLT645 is not set
|
||||
# CONFIG_PKG_USING_QXWZ is not set
|
||||
# CONFIG_PKG_USING_SMTP_CLIENT is not set
|
||||
@@ -270,6 +272,8 @@ CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_PKG_USING_BTSTACK is not set
|
||||
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
|
||||
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
|
||||
# CONFIG_PKG_USING_MAVLINK is not set
|
||||
# CONFIG_PKG_USING_RAPIDJSON is not set
|
||||
|
||||
#
|
||||
# security packages
|
||||
@@ -398,7 +402,11 @@ CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_PKG_USING_LITTLED is not set
|
||||
# CONFIG_PKG_USING_LKDGUI is not set
|
||||
# CONFIG_PKG_USING_NRF5X_SDK is not set
|
||||
# CONFIG_PKG_USING_NRFX is not set
|
||||
CONFIG_PKG_USING_NRFX=y
|
||||
CONFIG_PKG_NRFX_PATH="/packages/peripherals/nrfx"
|
||||
# CONFIG_PKG_USING_NRFX_V210 is not set
|
||||
CONFIG_PKG_USING_NRFX_LATEST_VERSION=y
|
||||
CONFIG_PKG_NRFX_VER="latest"
|
||||
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||
# CONFIG_PKG_USING_INFRARED is not set
|
||||
@@ -440,6 +448,18 @@ CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
|
||||
# CONFIG_PKG_USING_VDEVICE is not set
|
||||
# CONFIG_PKG_USING_SGM706 is not set
|
||||
# CONFIG_PKG_USING_RDA58XX is not set
|
||||
|
||||
#
|
||||
# AI packages
|
||||
#
|
||||
# CONFIG_PKG_USING_LIBANN is not set
|
||||
# CONFIG_PKG_USING_NNOM is not set
|
||||
# CONFIG_PKG_USING_ONNX_BACKEND is not set
|
||||
# CONFIG_PKG_USING_ONNX_PARSER is not set
|
||||
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
|
||||
# CONFIG_PKG_USING_ELAPACK is not set
|
||||
# CONFIG_PKG_USING_ULAPACK is not set
|
||||
|
||||
#
|
||||
# miscellaneous packages
|
||||
@@ -471,12 +491,8 @@ CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_PKG_USING_HELLO is not set
|
||||
# CONFIG_PKG_USING_VI is not set
|
||||
# CONFIG_PKG_USING_KI is not set
|
||||
# CONFIG_PKG_USING_NNOM is not set
|
||||
# CONFIG_PKG_USING_LIBANN is not set
|
||||
# CONFIG_PKG_USING_ELAPACK is not set
|
||||
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||
# CONFIG_PKG_USING_VT100 is not set
|
||||
# CONFIG_PKG_USING_ULAPACK is not set
|
||||
# CONFIG_PKG_USING_UKAL is not set
|
||||
# CONFIG_PKG_USING_CRCLIB is not set
|
||||
|
||||
@@ -488,11 +504,37 @@ CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_PKG_USING_SNAKE is not set
|
||||
# CONFIG_PKG_USING_TETRIS is not set
|
||||
# CONFIG_PKG_USING_LWGPS is not set
|
||||
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
|
||||
# CONFIG_PKG_USING_STATE_MACHINE is not set
|
||||
# CONFIG_PKG_USING_MCURSES is not set
|
||||
# CONFIG_PKG_USING_COWSAY is not set
|
||||
CONFIG_SOC_STM32F2=y
|
||||
CONFIG_RT_USING_UART1=y
|
||||
# CONFIG_RT_USING_UART6 is not set
|
||||
CONFIG_SOC_STM32F20X=y
|
||||
|
||||
#
|
||||
# Hardware Drivers Config
|
||||
#
|
||||
CONFIG_SOC_NRF52840=y
|
||||
CONFIG_NRFX_CLOCK_ENABLED=1
|
||||
CONFIG_NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY=7
|
||||
CONFIG_NRFX_CLOCK_CONFIG_LF_SRC=1
|
||||
CONFIG_SOC_NORDIC=y
|
||||
|
||||
#
|
||||
# On-chip Peripheral Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_GPIO is not set
|
||||
CONFIG_BSP_USING_UART=y
|
||||
CONFIG_NRFX_USING_UART=y
|
||||
# CONFIG_NRFX_USING_UARTE is not set
|
||||
CONFIG_NRFX_UART_ENABLED=1
|
||||
CONFIG_BSP_USING_UART0=y
|
||||
CONFIG_NRFX_UART0_ENABLED=1
|
||||
CONFIG_BSP_UART0_RX_PIN=8
|
||||
CONFIG_BSP_UART0_TX_PIN=6
|
||||
|
||||
#
|
||||
# On-chip flash config
|
||||
#
|
||||
CONFIG_MCU_FLASH_START_ADDRESS=0x00000000
|
||||
CONFIG_MCU_FLASH_SIZE_KB=1024
|
||||
CONFIG_MCU_SRAM_START_ADDRESS=0x20000000
|
||||
CONFIG_MCU_SRAM_SIZE_KB=256
|
||||
CONFIG_MCU_FLASH_PAGE_SIZE=0x1000
|
||||
@@ -0,0 +1,77 @@
|
||||
# nRF52840-PCA10056 BSP说明
|
||||
|
||||
## 简介
|
||||
|
||||
该文件夹主要存放所有主芯片为nRF52840的板级支持包。目前默认支持的开发板是官方[PCA10056](https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52840-DK)
|
||||
本文主要内容如下：
|
||||
|
||||
- 开发板资源介绍
|
||||
- 进阶使用方法
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
PCA10056-nRF52840是Nordic 官方的开发板，搭载nRF52840 芯片，基于ARM Cortex-M4内核，最高主频64 MHz，具有丰富的外设资源。
|
||||
|
||||
开发板外观如下图所示
|
||||
|
||||
|
||||
|
||||
PCA10056-nrf52840 开发板常用 **板载资源** 如下：
|
||||
|
||||
- MCU：NRF52840，主频 64MHz，1MB FLASH ，256kB RAM
|
||||
- MCU 外设: GPIO, UART, SPI, I2C(TWI), RTC,TIMER,NFC,QSPI,PWM,ADC,USB,I2S
|
||||
- 板载设
|
||||
- LED：4个，USB communication (LD1), user LED (LD2), power LED (LD3) 。
|
||||
- 按键：5个，4个USER and 1个RESET 。
|
||||
- USB: 1个
|
||||
- 常用接口：USB device、Arduino Uno 接口
|
||||
- 调试接口：板载 J-LINK 调试器。
|
||||
|
||||
开发板更多详细信息请参考NORDIC官方[PCA10056](https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52840-DK)
|
||||
|
||||
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| :----------- | :----------: | :--------------------: |
|
||||
| GPIO | 支持 | GPION |
|
||||
| UART | 支持 | UART0 |
|
||||
| PWM | 支持 | 支持 |
|
||||
| SPI | 支持 | 支持 |
|
||||
| QSPI | 支持 | 支持开发板上QSPI FLASH |
|
||||
| RTC | 支持 | |
|
||||
| ADC | 支持 | |
|
||||
| | | |
|
||||
| | | |
|
||||
| | | |
|
||||
|
||||
|
||||
|
||||
### 进阶使用
|
||||
|
||||
此 BSP 默认只开启了 GPIO 和 串口 0 的功能，更多高级功能需要利用 env 工具对 BSP 进行配置，步骤如下：
|
||||
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
|
||||
4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
|
||||
|
||||
|
||||
|
||||
## 支持其他开发板
|
||||
|
||||
客户可以将自己的开发板的.config文件和board/Kconfig文件到board/$(board_name)下面添加README.md即可，使用的时候替换.config文件
|
||||
|
||||
## 注意事项
|
||||
|
||||
## 联系人信息
|
||||
|
||||
维护人:
|
||||
|
||||
- [supperthomas], 邮箱：<78900636@qq.com>
|
||||
+3
@@ -50,5 +50,8 @@ objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
|
||||
|
||||
# include cmsis
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'cmsis', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
+11
-7
@@ -5,15 +5,19 @@
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard the first version
|
||||
* 2020-04-29 supperthomas first version
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __USART_H__
|
||||
#define __USART_H__
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
void rt_hw_usart_init(void);
|
||||
int main(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,97 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_NRF52840
|
||||
bool
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
config SOC_NORDIC
|
||||
bool
|
||||
default y
|
||||
|
||||
choice
|
||||
prompt "Select BSP board "
|
||||
default BSP_BOARD_PCA_10056
|
||||
|
||||
config BSP_BOARD_PCA_10056
|
||||
bool "NRF52840 pca10056 "
|
||||
|
||||
endchoice
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
config BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
config BSP_USING_UART0
|
||||
bool "Enable UART0"
|
||||
default y
|
||||
depends on BSP_USING_UART
|
||||
|
||||
config BSP_UART0_RX_PIN
|
||||
depends on BSP_USING_UART0
|
||||
int "uart0 rx pin number"
|
||||
default 8 if BSP_BOARD_PCA_10056
|
||||
|
||||
config BSP_UART0_TX_PIN
|
||||
depends on BSP_USING_UART0
|
||||
int "uart0 tx pin number"
|
||||
default 6 if BSP_BOARD_PCA_10056
|
||||
|
||||
menu "On-chip flash config"
|
||||
|
||||
config MCU_FLASH_START_ADDRESS
|
||||
hex "MCU FLASH START ADDRESS"
|
||||
default 0x00000000
|
||||
|
||||
config MCU_FLASH_SIZE_KB
|
||||
int "MCU FLASH SIZE, MAX size 1024 KB"
|
||||
default 1024
|
||||
|
||||
config MCU_SRAM_START_ADDRESS
|
||||
hex "MCU RAM START ADDRESS"
|
||||
default 0x20000000
|
||||
|
||||
config MCU_SRAM_SIZE_KB
|
||||
int "MCU RAM SIZE"
|
||||
default 256
|
||||
|
||||
config MCU_FLASH_PAGE_SIZE
|
||||
hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000"
|
||||
default 0x1000
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
if SOC_NORDIC
|
||||
config NRFX_CLOCK_ENABLED
|
||||
int
|
||||
default 1
|
||||
config NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
|
||||
int
|
||||
default 7
|
||||
config NRFX_CLOCK_CONFIG_LF_SRC
|
||||
int
|
||||
default 1
|
||||
endif
|
||||
|
||||
if BSP_USING_UART
|
||||
config NRFX_USING_UART
|
||||
bool
|
||||
default y
|
||||
|
||||
config NRFX_UART_ENABLED
|
||||
int
|
||||
default 1
|
||||
|
||||
config NRFX_UART0_ENABLED
|
||||
int
|
||||
default 1
|
||||
depends on BSP_USING_UART0
|
||||
endif
|
||||
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
+2
-1
@@ -5,6 +5,7 @@ from building import *
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
define = ['USE_APP_CONFIG']
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,)
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,CPPDEFINES = define)
|
||||
Return('group')
|
||||
@@ -0,0 +1,90 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-04-29 supperthomas first version
|
||||
*
|
||||
*/
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
#include <nrfx_systick.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "drv_uart.h"
|
||||
#include <nrfx_clock.h>
|
||||
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
static void clk_event_handler(nrfx_clock_evt_type_t event){}
|
||||
|
||||
void SysTick_Configuration(void)
|
||||
{
|
||||
nrfx_clock_init(clk_event_handler);
|
||||
nrfx_clock_enable();
|
||||
nrfx_clock_lfclk_start();
|
||||
/* Set interrupt priority */
|
||||
NVIC_SetPriority(SysTick_IRQn, 0xf);
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
nrf_systick_load_set(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
nrf_systick_val_clear();
|
||||
nrf_systick_csr_set(NRF_SYSTICK_CSR_CLKSOURCE_CPU | NRF_SYSTICK_CSR_TICKINT_ENABLE
|
||||
| NRF_SYSTICK_CSR_ENABLE);
|
||||
|
||||
}
|
||||
|
||||
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
rt_hw_interrupt_enable(0);
|
||||
|
||||
SysTick_Configuration();
|
||||
|
||||
#if defined(RT_USING_HEAP)
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_uart_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SOFTDEVICE
|
||||
extern uint32_t Image$$RW_IRAM1$$Base;
|
||||
uint32_t const *const m_ram_start = &Image$$RW_IRAM1$$Base;
|
||||
if ((uint32_t)m_ram_start == 0x20000000)
|
||||
{
|
||||
rt_kprintf("\r\n using softdevice the RAM couldn't be %p,please use the templete from package\r\n", m_ram_start);
|
||||
while (1);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("\r\n using softdevice the RAM at %p\r\n", m_ram_start);
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
@@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-04-29 supperthomas first version
|
||||
*
|
||||
*/
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
#include "nrf.h"
|
||||
|
||||
#define MCU_FLASH_SIZE MCU_FLASH_SIZE_KB*1024
|
||||
#define MCU_FLASH_END_ADDRESS ((uint32_t)(MCU_FLASH_START_ADDRESS + MCU_FLASH_SIZE))
|
||||
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
|
||||
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end__;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end__)
|
||||
#endif
|
||||
|
||||
|
||||
#define HEAP_END (MCU_SRAM_END_ADDRESS)
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,15 @@
|
||||
/* Linker script to configure memory regions. */
|
||||
|
||||
SEARCH_DIR(.)
|
||||
GROUP(-lgcc -lc -lnosys)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x100000
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x40000
|
||||
}
|
||||
|
||||
INCLUDE "packages/nrfx-v2.1.0/mdk/nrf_common.ld"
|
||||
|
||||
|
||||
|
||||
+3
-3
@@ -2,13 +2,13 @@
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x0001F000 0x00061000 { ; load region size_region
|
||||
ER_IROM1 0x0001F000 0x00061000 { ; load address = execution address
|
||||
LR_IROM1 0x00000000 0x100000 { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x100000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x200025F8 0x0000DA08 { ; RW data
|
||||
RW_IRAM1 0x20000000 0x40000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,47 @@
|
||||
/**
|
||||
* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form, except as embedded into a Nordic
|
||||
* Semiconductor ASA integrated circuit in a product or a software update for
|
||||
* such product, must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* 4. This software, with or without modification, must only be used with a
|
||||
* Nordic Semiconductor ASA integrated circuit.
|
||||
*
|
||||
* 5. Any software provided in binary form under this license must not be reverse
|
||||
* engineered, decompiled, modified and/or disassembled.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
|
||||
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
|
||||
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef NRFX_CONFIG_H__
|
||||
#define NRFX_CONFIG_H__
|
||||
|
||||
// TODO - temporary redirection
|
||||
#include <sdk_config.h>
|
||||
|
||||
#endif // NRFX_CONFIG_H__
|
||||
@@ -0,0 +1,269 @@
|
||||
/*
|
||||
* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef NRFX_GLUE_H__
|
||||
#define NRFX_GLUE_H__
|
||||
|
||||
// THIS IS A TEMPLATE FILE.
|
||||
// It should be copied to a suitable location within the host environment into
|
||||
// which nrfx is integrated, and the following macros should be provided with
|
||||
// appropriate implementations.
|
||||
// And this comment should be removed from the customized file.
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#include <stdbool.h>
|
||||
#include "nrf.h"
|
||||
/**
|
||||
* @defgroup nrfx_glue nrfx_glue.h
|
||||
* @{
|
||||
* @ingroup nrfx
|
||||
*
|
||||
* @brief This file contains macros that should be implemented according to
|
||||
* the needs of the host environment into which @em nrfx is integrated.
|
||||
*/
|
||||
|
||||
// Uncomment this line to use the standard MDK way of binding IRQ handlers
|
||||
// at linking time.
|
||||
#include <soc/nrfx_irqs.h>
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/**
|
||||
* @brief Macro for placing a runtime assertion.
|
||||
*
|
||||
* @param expression Expression to be evaluated.
|
||||
*/
|
||||
#define NRFX_ASSERT(expression)
|
||||
|
||||
/**
|
||||
* @brief Macro for placing a compile time assertion.
|
||||
*
|
||||
* @param expression Expression to be evaluated.
|
||||
*/
|
||||
#define NRFX_STATIC_ASSERT(expression)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/**
|
||||
* @brief Macro for setting the priority of a specific IRQ.
|
||||
*
|
||||
* @param irq_number IRQ number.
|
||||
* @param priority Priority to be set.
|
||||
*/
|
||||
#define NRFX_IRQ_PRIORITY_SET(irq_number, priority) NVIC_SetPriority(irq_number, priority)
|
||||
|
||||
/**
|
||||
* @brief Macro for enabling a specific IRQ.
|
||||
*
|
||||
* @param irq_number IRQ number.
|
||||
*/
|
||||
#define NRFX_IRQ_ENABLE(irq_number) NVIC_EnableIRQ(irq_number)
|
||||
|
||||
/**
|
||||
* @brief Macro for checking if a specific IRQ is enabled.
|
||||
*
|
||||
* @param irq_number IRQ number.
|
||||
*
|
||||
* @retval true If the IRQ is enabled.
|
||||
* @retval false Otherwise.
|
||||
*/
|
||||
#define NRFX_IRQ_IS_ENABLED(irq_number) _NRFX_IRQ_IS_ENABLED(irq_number)
|
||||
static inline bool _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number)
|
||||
{
|
||||
return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32)));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro for disabling a specific IRQ.
|
||||
*
|
||||
* @param irq_number IRQ number.
|
||||
*/
|
||||
#define NRFX_IRQ_DISABLE(irq_number) _NRFX_IRQ_DISABLE(irq_number)
|
||||
static inline void _NRFX_IRQ_DISABLE(IRQn_Type irq_number)
|
||||
{
|
||||
NVIC_DisableIRQ(irq_number);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro for setting a specific IRQ as pending.
|
||||
*
|
||||
* @param irq_number IRQ number.
|
||||
*/
|
||||
#define NRFX_IRQ_PENDING_SET(irq_number)
|
||||
|
||||
/**
|
||||
* @brief Macro for clearing the pending status of a specific IRQ.
|
||||
*
|
||||
* @param irq_number IRQ number.
|
||||
*/
|
||||
#define NRFX_IRQ_PENDING_CLEAR(irq_number)
|
||||
|
||||
/**
|
||||
* @brief Macro for checking the pending status of a specific IRQ.
|
||||
*
|
||||
* @retval true If the IRQ is pending.
|
||||
* @retval false Otherwise.
|
||||
*/
|
||||
#define NRFX_IRQ_IS_PENDING(irq_number)
|
||||
|
||||
/** @brief Macro for entering into a critical section. */
|
||||
#define NRFX_CRITICAL_SECTION_ENTER()
|
||||
|
||||
/** @brief Macro for exiting from a critical section. */
|
||||
#define NRFX_CRITICAL_SECTION_EXIT()
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/**
|
||||
* @brief When set to a non-zero value, this macro specifies that
|
||||
* @ref nrfx_coredep_delay_us uses a precise DWT-based solution.
|
||||
* A compilation error is generated if the DWT unit is not present
|
||||
* in the SoC used.
|
||||
*/
|
||||
#define NRFX_DELAY_DWT_BASED 0
|
||||
|
||||
/**
|
||||
* @brief Macro for delaying the code execution for at least the specified time.
|
||||
*
|
||||
* @param us_time Number of microseconds to wait.
|
||||
*/
|
||||
#define NRFX_DELAY_US(us_time)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/** @brief Atomic 32-bit unsigned type. */
|
||||
#define nrfx_atomic_t
|
||||
|
||||
/**
|
||||
* @brief Macro for storing a value to an atomic object and returning its previous value.
|
||||
*
|
||||
* @param[in] p_data Atomic memory pointer.
|
||||
* @param[in] value Value to store.
|
||||
*
|
||||
* @return Previous value of the atomic object.
|
||||
*/
|
||||
#define NRFX_ATOMIC_FETCH_STORE(p_data, value)
|
||||
|
||||
/**
|
||||
* @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value.
|
||||
*
|
||||
* @param[in] p_data Atomic memory pointer.
|
||||
* @param[in] value Value of the second operand in the OR operation.
|
||||
*
|
||||
* @return Previous value of the atomic object.
|
||||
*/
|
||||
#define NRFX_ATOMIC_FETCH_OR(p_data, value)
|
||||
|
||||
/**
|
||||
* @brief Macro for running a bitwise AND operation on an atomic object
|
||||
* and returning its previous value.
|
||||
*
|
||||
* @param[in] p_data Atomic memory pointer.
|
||||
* @param[in] value Value of the second operand in the AND operation.
|
||||
*
|
||||
* @return Previous value of the atomic object.
|
||||
*/
|
||||
#define NRFX_ATOMIC_FETCH_AND(p_data, value)
|
||||
|
||||
/**
|
||||
* @brief Macro for running a bitwise XOR operation on an atomic object
|
||||
* and returning its previous value.
|
||||
*
|
||||
* @param[in] p_data Atomic memory pointer.
|
||||
* @param[in] value Value of the second operand in the XOR operation.
|
||||
*
|
||||
* @return Previous value of the atomic object.
|
||||
*/
|
||||
#define NRFX_ATOMIC_FETCH_XOR(p_data, value)
|
||||
|
||||
/**
|
||||
* @brief Macro for running an addition operation on an atomic object
|
||||
* and returning its previous value.
|
||||
*
|
||||
* @param[in] p_data Atomic memory pointer.
|
||||
* @param[in] value Value of the second operand in the ADD operation.
|
||||
*
|
||||
* @return Previous value of the atomic object.
|
||||
*/
|
||||
#define NRFX_ATOMIC_FETCH_ADD(p_data, value)
|
||||
|
||||
/**
|
||||
* @brief Macro for running a subtraction operation on an atomic object
|
||||
* and returning its previous value.
|
||||
*
|
||||
* @param[in] p_data Atomic memory pointer.
|
||||
* @param[in] value Value of the second operand in the SUB operation.
|
||||
*
|
||||
* @return Previous value of the atomic object.
|
||||
*/
|
||||
#define NRFX_ATOMIC_FETCH_SUB(p_data, value)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/**
|
||||
* @brief When set to a non-zero value, this macro specifies that the
|
||||
* @ref nrfx_error_codes and the @ref nrfx_err_t type itself are defined
|
||||
* in a customized way and the default definitions from @c <nrfx_error.h>
|
||||
* should not be used.
|
||||
*/
|
||||
#define NRFX_CUSTOM_ERROR_CODES 0
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */
|
||||
#define NRFX_DPPI_CHANNELS_USED 0
|
||||
|
||||
/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */
|
||||
#define NRFX_DPPI_GROUPS_USED 0
|
||||
|
||||
/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */
|
||||
#define NRFX_PPI_CHANNELS_USED 0
|
||||
|
||||
/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */
|
||||
#define NRFX_PPI_GROUPS_USED 0
|
||||
|
||||
/** @brief Bitmask that defines EGU instances that are reserved for use outside of the nrfx library. */
|
||||
#define NRFX_EGUS_USED 0
|
||||
|
||||
/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */
|
||||
#define NRFX_TIMERS_USED 0
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // NRFX_GLUE_H__
|
||||
@@ -0,0 +1,135 @@
|
||||
/*
|
||||
* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef NRFX_LOG_H__
|
||||
#define NRFX_LOG_H__
|
||||
|
||||
// THIS IS A TEMPLATE FILE.
|
||||
// It should be copied to a suitable location within the host environment into
|
||||
// which nrfx is integrated, and the following macros should be provided with
|
||||
// appropriate implementations.
|
||||
// And this comment should be removed from the customized file.
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @defgroup nrfx_log nrfx_log.h
|
||||
* @{
|
||||
* @ingroup nrfx
|
||||
*
|
||||
* @brief This file contains macros that should be implemented according to
|
||||
* the needs of the host environment into which @em nrfx is integrated.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro for logging a message with the severity level ERROR.
|
||||
*
|
||||
* @param format printf-style format string, optionally followed by arguments
|
||||
* to be formatted and inserted in the resulting string.
|
||||
*/
|
||||
#define NRFX_LOG_ERROR(format, ...)
|
||||
|
||||
/**
|
||||
* @brief Macro for logging a message with the severity level WARNING.
|
||||
*
|
||||
* @param format printf-style format string, optionally followed by arguments
|
||||
* to be formatted and inserted in the resulting string.
|
||||
*/
|
||||
#define NRFX_LOG_WARNING(format, ...)
|
||||
|
||||
/**
|
||||
* @brief Macro for logging a message with the severity level INFO.
|
||||
*
|
||||
* @param format printf-style format string, optionally followed by arguments
|
||||
* to be formatted and inserted in the resulting string.
|
||||
*/
|
||||
#define NRFX_LOG_INFO(format, ...)
|
||||
|
||||
/**
|
||||
* @brief Macro for logging a message with the severity level DEBUG.
|
||||
*
|
||||
* @param format printf-style format string, optionally followed by arguments
|
||||
* to be formatted and inserted in the resulting string.
|
||||
*/
|
||||
#define NRFX_LOG_DEBUG(format, ...)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro for logging a memory dump with the severity level ERROR.
|
||||
*
|
||||
* @param[in] p_memory Pointer to the memory region to be dumped.
|
||||
* @param[in] length Length of the memory region in bytes.
|
||||
*/
|
||||
#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length)
|
||||
|
||||
/**
|
||||
* @brief Macro for logging a memory dump with the severity level WARNING.
|
||||
*
|
||||
* @param[in] p_memory Pointer to the memory region to be dumped.
|
||||
* @param[in] length Length of the memory region in bytes.
|
||||
*/
|
||||
#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length)
|
||||
|
||||
/**
|
||||
* @brief Macro for logging a memory dump with the severity level INFO.
|
||||
*
|
||||
* @param[in] p_memory Pointer to the memory region to be dumped.
|
||||
* @param[in] length Length of the memory region in bytes.
|
||||
*/
|
||||
#define NRFX_LOG_HEXDUMP_INFO(p_memory, length)
|
||||
|
||||
/**
|
||||
* @brief Macro for logging a memory dump with the severity level DEBUG.
|
||||
*
|
||||
* @param[in] p_memory Pointer to the memory region to be dumped.
|
||||
* @param[in] length Length of the memory region in bytes.
|
||||
*/
|
||||
#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro for getting the textual representation of a given error code.
|
||||
*
|
||||
* @param[in] error_code Error code.
|
||||
*
|
||||
* @return String containing the textual representation of the error code.
|
||||
*/
|
||||
#define NRFX_LOG_ERROR_STRING_GET(error_code)
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // NRFX_LOG_H__
|
||||
File diff suppressed because it is too large
Load Diff
+713
-674
File diff suppressed because it is too large
Load Diff
+338
-328
File diff suppressed because one or more lines are too long
@@ -2,7 +2,7 @@
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Project Configuration */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
@@ -16,6 +16,10 @@
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
#define RT_DEBUG
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
@@ -36,15 +40,15 @@
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
#define RT_VER_NUM 0x40003
|
||||
#define ARCH_ARM
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M3
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
@@ -62,6 +66,7 @@
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
@@ -71,15 +76,15 @@
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_RTC
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_LIBC_USING_TIME
|
||||
|
||||
/* Network */
|
||||
|
||||
@@ -137,6 +142,11 @@
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
#define PKG_USING_NRFX
|
||||
#define PKG_USING_NRFX_LATEST_VERSION
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
@@ -146,8 +156,31 @@
|
||||
|
||||
/* games: games run on RT-Thread console */
|
||||
|
||||
#define SOC_STM32F2
|
||||
#define RT_USING_UART1
|
||||
#define SOC_STM32F20X
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_NRF52840
|
||||
#define NRFX_CLOCK_ENABLED 1
|
||||
#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY 7
|
||||
#define NRFX_CLOCK_CONFIG_LF_SRC 1
|
||||
#define SOC_NORDIC
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_UART
|
||||
#define NRFX_USING_UART
|
||||
#define NRFX_UART_ENABLED 1
|
||||
#define BSP_USING_UART0
|
||||
#define NRFX_UART0_ENABLED 1
|
||||
#define BSP_UART0_RX_PIN 8
|
||||
#define BSP_UART0_TX_PIN 6
|
||||
|
||||
/* On-chip flash config */
|
||||
|
||||
#define MCU_FLASH_START_ADDRESS 0x00000000
|
||||
#define MCU_FLASH_SIZE_KB 1024
|
||||
#define MCU_SRAM_START_ADDRESS 0x20000000
|
||||
#define MCU_SRAM_SIZE_KB 256
|
||||
#define MCU_FLASH_PAGE_SIZE 0x1000
|
||||
|
||||
#endif
|
||||
+10
-2
@@ -40,10 +40,10 @@ if PLATFORM == 'gcc':
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
|
||||
DEVICE = ' -mcpu='+CPU + ' -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-nrf52832.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
@@ -82,3 +82,11 @@ elif PLATFORM == 'armcc':
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
@@ -0,0 +1,184 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rtthread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>5</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>4</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U683349164 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 ) -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableFlashSeq>1</EnableFlashSeq>
|
||||
<EnableLog>0</EnableLog>
|
||||
<Protocol>2</Protocol>
|
||||
<DbgClock>10000000</DbgClock>
|
||||
</DebugDescription>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user