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Merge pull request #37 from RT-Thread/master

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This commit is contained in:
Meco Jianting Man authored and GitHub committed 2021-04-10 14:00:43 +08:00
2 parents 342b0a3b1f 4dc6d00216
commit b2f23f2a96
374 files changed
+18735 -19017
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bsp/CME_M7/applications/application.c
+5 -9
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@@ -1,11 +1,7 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2014, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -32,10 +28,10 @@ int rt_application_init()
tid = rt_thread_create("init",
rt_init_thread_entry,
RT_NULL,
RT_NULL,
2048,
RT_THREAD_PRIORITY_MAX/3,
20);
RT_THREAD_PRIORITY_MAX/3,
20);
if (tid != RT_NULL)
rt_thread_startup(tid);
bsp/CME_M7/drivers/board.c
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009-2014, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/CME_M7/drivers/board.h
+3 -7
View File
@@ -1,11 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009-2014, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -18,7 +14,7 @@
#include "cmem7_includes.h"
//#include "cmem7_retarget.h"
#define SRAM_SIZE 64 // KB
#define SRAM_SIZE 64 // KB
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
//#define RT_USING_UART0
bsp/allwinner_tina/libcpu/context_gcc.S
+2 -16
View File
@@ -1,21 +1,7 @@
;/*
; * File : context_iar.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2006, RT-Thread Development Team
; * Copyright (c) 2006-2021, RT-Thread Development Team
; *
; * This program is free software; you can redistribute it and/or modify
; * it under the terms of the GNU General Public License as published by
; * the Free Software Foundation; either version 2 of the License, or
; * (at your option) any later version.
; *
; * This program is distributed in the hope that it will be useful,
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; * GNU General Public License for more details.
; *
; * You should have received a copy of the GNU General Public License along
; * with this program; if not, write to the Free Software Foundation, Inc.,
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
; * SPDX-License-Identifier: Apache-2.0
; *
; * Change Logs:
; * Date Author Notes
bsp/amebaz/libraries/smartconfig/inc/smartconfig.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : smartconfig.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/applications/application.c
+4 -18
View File
@@ -1,25 +1,11 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety first version
* Date Author Notes
* 2011-01-13 weety first version
* 2015-04-27 ArdaFu Port bsp from at91sam9260 to asm9260t
*/
bsp/asm9260t/drivers/board.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/drivers/board.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/drivers/led.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : led.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/drivers/led.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : led.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/drivers/usart.c
+5 -19
View File
@@ -1,21 +1,7 @@
/*
* File : usart.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -72,12 +58,12 @@ static rt_err_t asm_usart_configure(struct rt_serial_device *serial,
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = (asm_uart_t *)serial->parent.user_data;
Hw_UartDisable(uart->port);
Hw_UartReset(uart->port);
Hw_UartConfig(uart->port, cfg->baud_rate, cfg->data_bits,
Hw_UartConfig(uart->port, cfg->baud_rate, cfg->data_bits,
cfg->stop_bits, cfg->parity);
Hw_UartEnable(uart->port);
bsp/asm9260t/platform/gpio.c
+3 -17
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@@ -1,27 +1,13 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
#include "asm9260t.h"
#include "rtthread.h"
bsp/asm9260t/platform/gpio.h
+2 -16
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@@ -1,21 +1,7 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/platform/interrupt.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/platform/interrupt.h
+65 -79
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -29,69 +15,69 @@
// IRQ Source
#define INT_ARM_COMMRX 0
#define INT_ARM_COMMTX 1
#define INT_RTC 2
#define INT_GPIO0 3
#define INT_GPIO1 4
#define INT_GPIO2 5
#define INT_GPIO3 6
#define INT_GPIO4_IIS1 7
#define INT_USB0 8
#define INT_USB1 9
#define INT_USB0_DMA 10
#define INT_USB1_DMA 11
#define INT_MAC 12
#define INT_MAC_PMT 13
#define INT_NAND 14
#define INT_UART0 15
#define INT_UART1 16
#define INT_UART2 17
#define INT_UART3 18
#define INT_UART4 19
#define INT_UART5 20
#define INT_UART6 21
#define INT_UART7 22
#define INT_UART8 23
#define INT_UART9 24
#define INT_I2S0 25
#define INT_I2C0 26
#define INT_I2C1 27
#define INT_CAMIF 28
#define INT_TIMER0 29
#define INT_TIMER1 30
#define INT_TIMER2 31
#define INT_TIMER3 32
#define INT_ADC0 33
#define INT_DAC0 34
#define INT_USB0_RESUME_HOSTDISCONNECT 35
#define INT_USB0_VBUSVALID 36
#define INT_USB1_RESUME_HOSTDISCONNECT 37
#define INT_USB1_VBUSVALID 38
#define INT_DMA0_CH0 39
#define INT_DMA0_CH1 40
#define INT_DMA0_CH2 41
#define INT_DMA0_CH3 42
#define INT_DMA0_CH4 43
#define INT_DMA0_CH5 44
#define INT_DMA0_CH6 45
#define INT_DMA0_CH7 46
#define INT_DMA1_CH0 47
#define INT_DMA1_CH1 48
#define INT_DMA1_CH2 49
#define INT_DMA1_CH3 50
#define INT_DMA1_CH4 51
#define INT_DMA1_CH5 52
#define INT_DMA1_CH6 53
#define INT_DMA1_CH7 54
#define INT_WATCHDOG 55
#define INT_CAN0 56
#define INT_CAN1 57
#define INT_QEI 58
#define INT_MCPWM 59
#define INT_SPI0 60
#define INT_SPI1 61
#define INT_QUADSPI0 62
#define INT_ARM_COMMRX 0
#define INT_ARM_COMMTX 1
#define INT_RTC 2
#define INT_GPIO0 3
#define INT_GPIO1 4
#define INT_GPIO2 5
#define INT_GPIO3 6
#define INT_GPIO4_IIS1 7
#define INT_USB0 8
#define INT_USB1 9
#define INT_USB0_DMA 10
#define INT_USB1_DMA 11
#define INT_MAC 12
#define INT_MAC_PMT 13
#define INT_NAND 14
#define INT_UART0 15
#define INT_UART1 16
#define INT_UART2 17
#define INT_UART3 18
#define INT_UART4 19
#define INT_UART5 20
#define INT_UART6 21
#define INT_UART7 22
#define INT_UART8 23
#define INT_UART9 24
#define INT_I2S0 25
#define INT_I2C0 26
#define INT_I2C1 27
#define INT_CAMIF 28
#define INT_TIMER0 29
#define INT_TIMER1 30
#define INT_TIMER2 31
#define INT_TIMER3 32
#define INT_ADC0 33
#define INT_DAC0 34
#define INT_USB0_RESUME_HOSTDISCONNECT 35
#define INT_USB0_VBUSVALID 36
#define INT_USB1_RESUME_HOSTDISCONNECT 37
#define INT_USB1_VBUSVALID 38
#define INT_DMA0_CH0 39
#define INT_DMA0_CH1 40
#define INT_DMA0_CH2 41
#define INT_DMA0_CH3 42
#define INT_DMA0_CH4 43
#define INT_DMA0_CH5 44
#define INT_DMA0_CH6 45
#define INT_DMA0_CH7 46
#define INT_DMA1_CH0 47
#define INT_DMA1_CH1 48
#define INT_DMA1_CH2 49
#define INT_DMA1_CH3 50
#define INT_DMA1_CH4 51
#define INT_DMA1_CH5 52
#define INT_DMA1_CH6 53
#define INT_DMA1_CH7 54
#define INT_WATCHDOG 55
#define INT_CAN0 56
#define INT_CAN1 57
#define INT_QEI 58
#define INT_MCPWM 59
#define INT_SPI0 60
#define INT_SPI1 61
#define INT_QUADSPI0 62
#define INT_SSP0 63
#endif
bsp/asm9260t/platform/reset.c
+2 -16
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@@ -1,21 +1,7 @@
/*
* File : reset.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/platform/rt_low_level_init.c
+2 -16
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@@ -1,21 +1,7 @@
/*
* File : rt_low_level_init.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/platform/rt_low_level_init.h
+3 -17
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@@ -1,21 +1,7 @@
/*
* File : rt_low_level_init.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -23,7 +9,7 @@
*/
#ifndef __RT_LOW_LEVEL_INIT_H__
#define __RT_LOW_LEVEL_INIT_H__
/*-------- Stack size of CPU modes -------------------------------------------*/
#define UND_STK_SIZE 512
#define SVC_STK_SIZE 4096
bsp/asm9260t/platform/system_clock.c
+182 -196
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bsp/asm9260t/platform/timer0.c
+2 -16
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@@ -1,21 +1,7 @@
/*
* File : timer0.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/platform/timer0.h
+2 -16
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@@ -1,21 +1,7 @@
/*
* File : timer0.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/asm9260t/platform/uart.c
+3 -17
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@@ -1,27 +1,13 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
#include "asm9260t.h"
#include "rtthread.h"
#include "uart.h"
bsp/asm9260t/platform/uart.h
+13 -27
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -50,16 +36,16 @@ typedef struct
volatile rt_uint32_t ISO7816STATUS[4];
} HW_USART_TypeDef;
#define USART0 ((HW_USART_TypeDef *)UART0_BASE)
#define USART1 ((HW_USART_TypeDef *)UART1_BASE)
#define USART2 ((HW_USART_TypeDef *)UART2_BASE)
#define USART3 ((HW_USART_TypeDef *)UART3_BASE)
#define USART4 ((HW_USART_TypeDef *)UART4_BASE)
#define USART5 ((HW_USART_TypeDef *)UART5_BASE)
#define USART6 ((HW_USART_TypeDef *)UART6_BASE)
#define USART7 ((HW_USART_TypeDef *)UART7_BASE)
#define USART8 ((HW_USART_TypeDef *)UART8_BASE)
#define USART9 ((HW_USART_TypeDef *)UART9_BASE)
#define USART0 ((HW_USART_TypeDef *)UART0_BASE)
#define USART1 ((HW_USART_TypeDef *)UART1_BASE)
#define USART2 ((HW_USART_TypeDef *)UART2_BASE)
#define USART3 ((HW_USART_TypeDef *)UART3_BASE)
#define USART4 ((HW_USART_TypeDef *)UART4_BASE)
#define USART5 ((HW_USART_TypeDef *)UART5_BASE)
#define USART6 ((HW_USART_TypeDef *)UART6_BASE)
#define USART7 ((HW_USART_TypeDef *)UART7_BASE)
#define USART8 ((HW_USART_TypeDef *)UART8_BASE)
#define USART9 ((HW_USART_TypeDef *)UART9_BASE)
#define ASM_UART_INTR_RXIS (1UL << 4)
@@ -105,7 +91,7 @@ typedef struct
extern void Hw_UartDisable(HW_USART_TypeDef* uartBase);
extern void Hw_UartEnable(HW_USART_TypeDef* uartBase);
extern void Hw_UartReset(HW_USART_TypeDef* uartBase);
extern void Hw_UartConfig(HW_USART_TypeDef* uartBase, int baudRate,
extern void Hw_UartConfig(HW_USART_TypeDef* uartBase, int baudRate,
int dataBits, int stopBits, int parity);
extern void Hw_UartInit(int index);
#endif
bsp/at91sam9260/applications/application.c
+78 -92
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bsp/at91sam9260/drivers/at91_i2c_gpio.c
+64 -78
View File
@@ -1,25 +1,11 @@
/*
* File : at91_i2c_gpio.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-04-25 weety first version
* Date Author Notes
* 2012-04-25 weety first version
*/
#include <rtdevice.h>
@@ -29,101 +15,101 @@
static void at91_i2c_gpio_init()
{
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA); //enable PIOA clock
at91_sys_write(AT91_PIOA + PIO_PUER, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_PER, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_MDER, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_PUER, (1 << 24));
at91_sys_write(AT91_PIOA + PIO_PER, (1 << 24));
at91_sys_write(AT91_PIOA + PIO_MDER, (1 << 24));
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA); //enable PIOA clock
at91_sys_write(AT91_PIOA + PIO_PUER, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_PER, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_MDER, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_PUER, (1 << 24));
at91_sys_write(AT91_PIOA + PIO_PER, (1 << 24));
at91_sys_write(AT91_PIOA + PIO_MDER, (1 << 24));
at91_sys_write(AT91_PIOA + PIO_OER, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_OER, (1 << 24));
at91_sys_write(AT91_PIOA + PIO_OER, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_OER, (1 << 24));
at91_sys_write(AT91_PIOA + PIO_SODR, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_SODR, (1 << 24));
at91_sys_write(AT91_PIOA + PIO_SODR, (1 << 23));
at91_sys_write(AT91_PIOA + PIO_SODR, (1 << 24));
}
static void at91_set_sda(void *data, rt_int32_t state)
{
if (state)
{
at91_sys_write(AT91_PIOA + PIO_SODR, (1 << 23));
}
else
{
at91_sys_write(AT91_PIOA + PIO_CODR, (1 << 23));
}
if (state)
{
at91_sys_write(AT91_PIOA + PIO_SODR, (1 << 23));
}
else
{
at91_sys_write(AT91_PIOA + PIO_CODR, (1 << 23));
}
}
static void at91_set_scl(void *data, rt_int32_t state)
{
if (state)
{
at91_sys_write(AT91_PIOA + PIO_SODR, (1 << 24));
}
else
{
at91_sys_write(AT91_PIOA + PIO_CODR, (1 << 24));
}
if (state)
{
at91_sys_write(AT91_PIOA + PIO_SODR, (1 << 24));
}
else
{
at91_sys_write(AT91_PIOA + PIO_CODR, (1 << 24));
}
}
static rt_int32_t at91_get_sda(void *data)
{
return at91_sys_read(AT91_PIOA + PIO_PDSR) & (1 << 23);
return at91_sys_read(AT91_PIOA + PIO_PDSR) & (1 << 23);
}
static rt_int32_t at91_get_scl(void *data)
{
return at91_sys_read(AT91_PIOA + PIO_PDSR) & (1 << 24);
return at91_sys_read(AT91_PIOA + PIO_PDSR) & (1 << 24);
}
static void at91_udelay (rt_uint32_t us)
{
rt_int32_t i;
for (; us > 0; us--)
{
i = 50000;
while(i > 0)
{
i--;
}
}
rt_int32_t i;
for (; us > 0; us--)
{
i = 50000;
while(i > 0)
{
i--;
}
}
}
static const struct rt_i2c_bit_ops bit_ops = {
RT_NULL,
at91_set_sda,
at91_set_scl,
at91_get_sda,
at91_get_scl,
at91_udelay,
RT_NULL,
at91_set_sda,
at91_set_scl,
at91_get_sda,
at91_get_scl,
5,
100
at91_udelay,
5,
100
};
int at91_i2c_init(void)
{
struct rt_i2c_bus_device *bus;
struct rt_i2c_bus_device *bus;
bus = rt_malloc(sizeof(struct rt_i2c_bus_device));
if (bus == RT_NULL)
{
rt_kprintf("rt_malloc failed\n");
return -RT_ENOMEM;
}
rt_memset((void *)bus, 0, sizeof(struct rt_i2c_bus_device));
bus = rt_malloc(sizeof(struct rt_i2c_bus_device));
if (bus == RT_NULL)
{
rt_kprintf("rt_malloc failed\n");
return -RT_ENOMEM;
}
bus->priv = (void *)&bit_ops;
rt_memset((void *)bus, 0, sizeof(struct rt_i2c_bus_device));
at91_i2c_gpio_init();
bus->priv = (void *)&bit_ops;
rt_i2c_bit_add_bus(bus, "i2c0");
at91_i2c_gpio_init();
return 0;
rt_i2c_bit_add_bus(bus, "i2c0");
return 0;
}
INIT_DEVICE_EXPORT(at91_i2c_init);
bsp/at91sam9260/drivers/at91_mci.c
+636 -650
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File diff suppressed because it is too large. Load diff
bsp/at91sam9260/drivers/at91_mci.h
+86 -100
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File diff suppressed because it is too large. Load diff
bsp/at91sam9260/drivers/board.c
+124 -138
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File diff suppressed because it is too large. Load diff
bsp/at91sam9260/drivers/board.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/at91sam9260/drivers/led.c
+44 -58
View File
@@ -1,21 +1,7 @@
/*
* File : led.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -28,59 +14,59 @@
#if 1
// GB9260 board
#define PIO_LED AT91_PIOB
#define LED1 (1 << 25) // LED_SYS
#define LED2 (0)
#define LED3 (1 << 23) // LED_USR
#define LED_ALL (LED1 | LED2 | LED3)
#define PIO_LED AT91_PIOB
#define LED1 (1 << 25) // LED_SYS
#define LED2 (0)
#define LED3 (1 << 23) // LED_USR
#define LED_ALL (LED1 | LED2 | LED3)
#else
#define PIO_LED AT91_PIOC
#define LED1 (1 << 8)
#define LED2 (1 << 11)
#define LED3 (1 << 6)
#define LED_ALL (LED1 | LED2 | LED3)
#define PIO_LED AT91_PIOC
#define LED1 (1 << 8)
#define LED2 (1 << 11)
#define LED3 (1 << 6)
#define LED_ALL (LED1 | LED2 | LED3)
#endif
void led_init(void)
{
at91_sys_write(PIO_LED+0x00, LED_ALL);
at91_sys_write(PIO_LED+0x10, LED_ALL);
at91_sys_write(PIO_LED+0x64, LED_ALL);
at91_sys_write(PIO_LED+0x30, LED_ALL);
at91_sys_write(PIO_LED+0x00, LED_ALL);
at91_sys_write(PIO_LED+0x10, LED_ALL);
at91_sys_write(PIO_LED+0x64, LED_ALL);
at91_sys_write(PIO_LED+0x30, LED_ALL);
}
void led_on(int num)
{
switch(num)
{
case 1:
at91_sys_write(PIO_LED+0x34, LED1);
break;
case 2:
at91_sys_write(PIO_LED+0x34, LED2);
break;
case 3:
at91_sys_write(PIO_LED+0x34, LED3);
break;
default:
break;
}
switch(num)
{
case 1:
at91_sys_write(PIO_LED+0x34, LED1);
break;
case 2:
at91_sys_write(PIO_LED+0x34, LED2);
break;
case 3:
at91_sys_write(PIO_LED+0x34, LED3);
break;
default:
break;
}
}
void led_off(int num)
{
switch(num)
{
case 1:
at91_sys_write(PIO_LED+0x30, LED1);
break;
case 2:
at91_sys_write(PIO_LED+0x30, LED2);
break;
case 3:
at91_sys_write(PIO_LED+0x30, LED3);
break;
default:
break;
}
switch(num)
{
case 1:
at91_sys_write(PIO_LED+0x30, LED1);
break;
case 2:
at91_sys_write(PIO_LED+0x30, LED2);
break;
case 3:
at91_sys_write(PIO_LED+0x30, LED3);
break;
default:
break;
}
}
bsp/at91sam9260/drivers/led.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : led.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/at91sam9260/drivers/macb.c
+622 -636
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File diff suppressed because it is too large. Load diff
bsp/at91sam9260/drivers/macb.h
+279 -293
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File diff suppressed because it is too large. Load diff
bsp/at91sam9260/drivers/mii.h
+12 -26
View File
@@ -1,21 +1,7 @@
/*
* File : mii.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -36,7 +22,7 @@
#define MII_EXPANSION 0x06 /* Expansion register */
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
@@ -51,7 +37,7 @@
/* Basic mode control register. */
#define BMCR_RESV 0x003f /* Unused... */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /* Collision test */
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
@@ -70,7 +56,7 @@
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
#define BMSR_RESV 0x00c0 /* Unused... */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
@@ -99,7 +85,7 @@
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
@@ -121,8 +107,8 @@
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
@@ -132,8 +118,8 @@
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /* Unused... */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /* Unused... */
@@ -151,8 +137,8 @@
#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
/* Flow control flags */
#define FLOW_CTRL_TX 0x01
#define FLOW_CTRL_RX 0x02
#define FLOW_CTRL_TX 0x01
#define FLOW_CTRL_RX 0x02
/**
* mii_nway_result
bsp/at91sam9260/drivers/usart.c
+188 -202
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bsp/at91sam9260/platform/at91_aic.h
+32 -46
View File
@@ -1,21 +1,7 @@
/*
* File : at91_aic.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -29,41 +15,41 @@
extern "C" {
#endif
#define AIC_IRQS 32
#define AIC_IRQS 32
#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */
#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */
#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */
#define AT91_AIC_SRCTYPE_LOW (0 << 5)
#define AT91_AIC_SRCTYPE_FALLING (1 << 5)
#define AT91_AIC_SRCTYPE_HIGH (2 << 5)
#define AT91_AIC_SRCTYPE_RISING (3 << 5)
#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */
#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */
#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */
#define AT91_AIC_SRCTYPE_LOW (0 << 5)
#define AT91_AIC_SRCTYPE_FALLING (1 << 5)
#define AT91_AIC_SRCTYPE_HIGH (2 << 5)
#define AT91_AIC_SRCTYPE_RISING (3 << 5)
#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */
#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */
#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */
#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */
#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */
#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */
#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */
#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */
#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */
#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */
#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */
#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */
#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */
#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */
#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */
#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */
#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */
#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */
#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */
#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */
#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */
#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */
#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */
#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */
#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */
#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */
#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */
#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */
#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */
#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */
#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */
#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */
#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */
#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */
#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */
#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */
#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */
#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */
#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */
#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */
#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */
#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */
#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */
#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */
#ifdef __cplusplus
}
bsp/at91sam9260/platform/at91_pdc.h
+16 -30
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@@ -1,21 +1,7 @@
/*
* File : at91_pdc.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -25,21 +11,21 @@
#ifndef __AT91_PDC_H__
#define __AT91_PDC_H__
#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */
#define AT91_PDC_RCR 0x104 /* Receive Counter Register */
#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */
#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */
#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */
#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */
#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */
#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */
#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */
#define AT91_PDC_RCR 0x104 /* Receive Counter Register */
#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */
#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */
#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */
#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */
#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */
#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */
#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */
#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */
#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */
#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */
#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */
#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */
#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */
#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */
#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */
#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */
#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */
#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */
#endif
bsp/at91sam9260/platform/at91_pio.h
+31 -46
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@@ -1,22 +1,7 @@
/*
* File : at91_pio.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -30,35 +15,35 @@
extern "C" {
#endif
#define PIO_PER 0x00 /* Enable Register */
#define PIO_PDR 0x04 /* Disable Register */
#define PIO_PSR 0x08 /* Status Register */
#define PIO_OER 0x10 /* Output Enable Register */
#define PIO_ODR 0x14 /* Output Disable Register */
#define PIO_OSR 0x18 /* Output Status Register */
#define PIO_IFER 0x20 /* Glitch Input Filter Enable */
#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
#define PIO_IFSR 0x28 /* Glitch Input Filter Status */
#define PIO_SODR 0x30 /* Set Output Data Register */
#define PIO_CODR 0x34 /* Clear Output Data Register */
#define PIO_ODSR 0x38 /* Output Data Status Register */
#define PIO_PDSR 0x3c /* Pin Data Status Register */
#define PIO_IER 0x40 /* Interrupt Enable Register */
#define PIO_IDR 0x44 /* Interrupt Disable Register */
#define PIO_IMR 0x48 /* Interrupt Mask Register */
#define PIO_ISR 0x4c /* Interrupt Status Register */
#define PIO_MDER 0x50 /* Multi-driver Enable Register */
#define PIO_MDDR 0x54 /* Multi-driver Disable Register */
#define PIO_MDSR 0x58 /* Multi-driver Status Register */
#define PIO_PUDR 0x60 /* Pull-up Disable Register */
#define PIO_PUER 0x64 /* Pull-up Enable Register */
#define PIO_PUSR 0x68 /* Pull-up Status Register */
#define PIO_ASR 0x70 /* Peripheral A Select Register */
#define PIO_BSR 0x74 /* Peripheral B Select Register */
#define PIO_ABSR 0x78 /* AB Status Register */
#define PIO_OWER 0xa0 /* Output Write Enable Register */
#define PIO_OWDR 0xa4 /* Output Write Disable Register */
#define PIO_OWSR 0xa8 /* Output Write Status Register */
#define PIO_PER 0x00 /* Enable Register */
#define PIO_PDR 0x04 /* Disable Register */
#define PIO_PSR 0x08 /* Status Register */
#define PIO_OER 0x10 /* Output Enable Register */
#define PIO_ODR 0x14 /* Output Disable Register */
#define PIO_OSR 0x18 /* Output Status Register */
#define PIO_IFER 0x20 /* Glitch Input Filter Enable */
#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
#define PIO_IFSR 0x28 /* Glitch Input Filter Status */
#define PIO_SODR 0x30 /* Set Output Data Register */
#define PIO_CODR 0x34 /* Clear Output Data Register */
#define PIO_ODSR 0x38 /* Output Data Status Register */
#define PIO_PDSR 0x3c /* Pin Data Status Register */
#define PIO_IER 0x40 /* Interrupt Enable Register */
#define PIO_IDR 0x44 /* Interrupt Disable Register */
#define PIO_IMR 0x48 /* Interrupt Mask Register */
#define PIO_ISR 0x4c /* Interrupt Status Register */
#define PIO_MDER 0x50 /* Multi-driver Enable Register */
#define PIO_MDDR 0x54 /* Multi-driver Disable Register */
#define PIO_MDSR 0x58 /* Multi-driver Status Register */
#define PIO_PUDR 0x60 /* Pull-up Disable Register */
#define PIO_PUER 0x64 /* Pull-up Enable Register */
#define PIO_PUSR 0x68 /* Pull-up Status Register */
#define PIO_ASR 0x70 /* Peripheral A Select Register */
#define PIO_BSR 0x74 /* Peripheral B Select Register */
#define PIO_ABSR 0x78 /* AB Status Register */
#define PIO_OWER 0xa0 /* Output Write Enable Register */
#define PIO_OWDR 0xa4 /* Output Write Disable Register */
#define PIO_OWSR 0xa8 /* Output Write Status Register */
#ifdef __cplusplus
}
bsp/at91sam9260/platform/at91_pit.h
+12 -26
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@@ -1,21 +1,7 @@
/*
* File : at91_pit.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -29,18 +15,18 @@
extern "C" {
#endif
#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */
#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */
#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */
#define AT91_PIT_PITS (1 << 0) /* Timer Status */
#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */
#define AT91_PIT_PITS (1 << 0) /* Timer Status */
#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */
#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */
#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */
#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */
#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
#ifdef __cplusplus
}
bsp/at91sam9260/platform/at91_pmc.h
+103 -117
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bsp/at91sam9260/platform/at91_rstc.h
+21 -35
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@@ -1,21 +1,7 @@
/*
* File : at91_rstc.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -29,27 +15,27 @@
extern "C" {
#endif
#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */
#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */
#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */
#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */
#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */
#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */
#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */
#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */
#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */
#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */
#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */
#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */
#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
#define AT91_RSTC_RSTTYP_USER (4 << 8)
#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */
#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */
#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */
#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */
#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
#define AT91_RSTC_RSTTYP_USER (4 << 8)
#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */
#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */
#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */
#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */
#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */
#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */
#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */
#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */
#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */
#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */
#ifdef __cplusplus
}
bsp/at91sam9260/platform/at91_serial.h
+102 -116
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bsp/at91sam9260/platform/at91_shdwc.h
+18 -32
View File
@@ -1,21 +1,7 @@
/*
* File : at91_shdwc.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -29,24 +15,24 @@
extern "C" {
#endif
#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */
#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */
#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */
#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
#define AT91_SHDW_WKMODE0_NONE 0
#define AT91_SHDW_WKMODE0_HIGH 1
#define AT91_SHDW_WKMODE0_LOW 2
#define AT91_SHDW_WKMODE0_ANYLEVEL 3
#define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */
#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */
#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
#define AT91_SHDW_WKMODE0_NONE 0
#define AT91_SHDW_WKMODE0_HIGH 1
#define AT91_SHDW_WKMODE0_LOW 2
#define AT91_SHDW_WKMODE0_ANYLEVEL 3
#define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */
#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */
#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */
#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
#ifdef __cplusplus
}
bsp/at91sam9260/platform/at91_tc.h
+121 -135
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bsp/at91sam9260/platform/at91sam9260_matrix.h
+59 -73
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@@ -1,21 +1,7 @@
/*
* File : at91sam9260_matrix.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -29,67 +15,67 @@
extern "C" {
#endif
#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
#define AT91_MATRIX_ULBT_FOUR (2 << 0)
#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
#define AT91_MATRIX_ULBT_FOUR (2 << 0)
#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */
#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_CS1A_SMC (0 << 1)
#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
#define AT91_MATRIX_CS3A_SMC (0 << 3)
#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
#define AT91_MATRIX_CS4A_SMC (0 << 4)
#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
#define AT91_MATRIX_CS5A_SMC (0 << 5)
#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */
#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */
#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_CS1A_SMC (0 << 1)
#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
#define AT91_MATRIX_CS3A_SMC (0 << 3)
#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
#define AT91_MATRIX_CS4A_SMC (0 << 4)
#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
#define AT91_MATRIX_CS5A_SMC (0 << 5)
#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */
#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
#ifdef __cplusplus
}
bsp/at91sam9260/platform/at91sam926x.h
+127 -141
View File
File diff suppressed because it is too large. Load diff
bsp/at91sam9260/platform/gpio.h
+102 -116
View File
File diff suppressed because it is too large. Load diff
bsp/at91sam9260/platform/interrupt.c
+14 -28
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -189,7 +175,7 @@ static void at91_gpio_irq_init()
rt_snprintf(irq_desc[idx].name, RT_NAME_MAX - 1, name[i]);
irq_desc[idx].counter = 0;
#endif
idx++;
idx++;
}
rt_hw_interrupt_umask(AT91SAM9260_ID_PIOA);
@@ -322,7 +308,7 @@ void rt_hw_interrupt_umask(int irq)
* @param name the interrupt name
* @return old handler
*/
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
void *param, const char *name)
{
rt_isr_handler_t old_handler = RT_NULL;
@@ -336,7 +322,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
irq_desc[vector].param = param;
#ifdef RT_USING_INTERRUPT_INFO
rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
irq_desc[vector].counter = 0;
irq_desc[vector].counter = 0;
#endif
}
}
@@ -414,16 +400,16 @@ void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
#ifdef RT_USING_INTERRUPT_INFO
void list_irq(void)
{
int irq;
int irq;
rt_kprintf("number\tcount\tname\n");
for (irq = 0; irq < MAX_HANDLERS; irq++)
{
if (rt_strncmp(irq_desc[irq].name, "default", sizeof("default")))
{
rt_kprintf("%02ld: %10ld %s\n", irq, irq_desc[irq].counter, irq_desc[irq].name);
}
}
rt_kprintf("number\tcount\tname\n");
for (irq = 0; irq < MAX_HANDLERS; irq++)
{
if (rt_strncmp(irq_desc[irq].name, "default", sizeof("default")))
{
rt_kprintf("%02ld: %10ld %s\n", irq, irq_desc[irq].counter, irq_desc[irq].name);
}
}
}
#include <finsh.h>
bsp/at91sam9260/platform/interrupt.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/at91sam9260/platform/io.h
+14 -28
View File
@@ -1,21 +1,7 @@
/*
* File : io.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -25,31 +11,31 @@
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#define AT91_BASE_SYS 0xffffe800
#define AT91_BASE_SYS 0xffffe800
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define readb(a) (*(volatile unsigned char *)(a))
#define readw(a) (*(volatile unsigned short *)(a))
#define readl(a) (*(volatile unsigned int *)(a))
#define readb(a) (*(volatile unsigned char *)(a))
#define readw(a) (*(volatile unsigned short *)(a))
#define readl(a) (*(volatile unsigned int *)(a))
#define writeb(v,a) (*(volatile unsigned char *)(a) = (v))
#define writew(v,a) (*(volatile unsigned short *)(a) = (v))
#define writel(v,a) (*(volatile unsigned int *)(a) = (v))
#define writeb(v,a) (*(volatile unsigned char *)(a) = (v))
#define writew(v,a) (*(volatile unsigned short *)(a) = (v))
#define writel(v,a) (*(volatile unsigned int *)(a) = (v))
rt_inline unsigned int at91_sys_read(unsigned int reg_offset)
{
unsigned int addr = AT91_BASE_SYS;
unsigned int addr = AT91_BASE_SYS;
return readl(addr + reg_offset);
return readl(addr + reg_offset);
}
rt_inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
{
unsigned int addr = AT91_BASE_SYS;
unsigned int addr = AT91_BASE_SYS;
writel(value, addr + reg_offset);
writel(value, addr + reg_offset);
}
bsp/at91sam9260/platform/irq.h
+11 -25
View File
@@ -1,27 +1,13 @@
/*
* File : irq.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety first version
*/
#ifndef __IRQ_H__
#define __IRQ_H__
@@ -32,18 +18,18 @@ extern "C" {
/*
* IRQ line status.
*
* Bits 0-7 are reserved
* Bits 0-7 are reserved
*
* IRQ types
*/
#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
#ifdef __cplusplus
}
bsp/at91sam9260/platform/reset.c
+8 -22
View File
@@ -1,21 +1,7 @@
/*
* File : reset.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -33,12 +19,12 @@
void machine_reset(void)
{
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
}
void machine_shutdown(void)
{
at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
}
#ifdef RT_USING_FINSH
@@ -49,14 +35,14 @@ FINSH_FUNCTION_EXPORT_ALIAS(rt_hw_cpu_reset, reset, restart the system);
#ifdef FINSH_USING_MSH
int cmd_reset(int argc, char** argv)
{
rt_hw_cpu_reset();
return 0;
rt_hw_cpu_reset();
return 0;
}
int cmd_shutdown(int argc, char** argv)
{
rt_hw_cpu_shutdown();
return 0;
rt_hw_cpu_shutdown();
return 0;
}
FINSH_FUNCTION_EXPORT_ALIAS(cmd_reset, __cmd_reset, restart the system.);
bsp/at91sam9260/platform/rt_low_level_init.c
+4 -18
View File
@@ -1,29 +1,15 @@
/*
* File : rt_low_level_init.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
/* write register a=address, v=value */
#define write_reg(a,v) (*(volatile unsigned int *)(a) = (v))
#define write_reg(a,v) (*(volatile unsigned int *)(a) = (v))
/* Processor Reset */
#define AT91_RSTC_PROCRST (1 << 0)
#define AT91_RSTC_PERRST (1 << 2)
bsp/at91sam9260/platform/rt_low_level_init.h
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : rt_low_level_init.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -23,7 +9,7 @@
*/
#ifndef __RT_LOW_LEVEL_INIT_H__
#define __RT_LOW_LEVEL_INIT_H__
/*-------- Stack size of CPU modes -------------------------------------------*/
#define UND_STK_SIZE 512
#define SVC_STK_SIZE 4096
bsp/at91sam9260/platform/system_clock.c
+183 -197
View File
File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/applications/application.c
+78 -92
View File
File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/drivers/at91_i2c_gpio.c
+64 -78
View File
@@ -1,25 +1,11 @@
/*
* File : at91_i2c_gpio.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-04-25 weety first version
* Date Author Notes
* 2012-04-25 weety first version
*/
#include <rtdevice.h>
@@ -29,101 +15,101 @@
static void at91_i2c_gpio_init()
{
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA; //enable PIOA clock
AT91C_BASE_PIOA->PIO_PUER = (1 << 23);
AT91C_BASE_PIOA->PIO_PER = (1 << 23);
AT91C_BASE_PIOA->PIO_MDER = (1 << 23);
AT91C_BASE_PIOA->PIO_PUER = (1 << 24);
AT91C_BASE_PIOA->PIO_PER = (1 << 24);
AT91C_BASE_PIOA->PIO_MDER = (1 << 24);
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA; //enable PIOA clock
AT91C_BASE_PIOA->PIO_PUER = (1 << 23);
AT91C_BASE_PIOA->PIO_PER = (1 << 23);
AT91C_BASE_PIOA->PIO_MDER = (1 << 23);
AT91C_BASE_PIOA->PIO_PUER = (1 << 24);
AT91C_BASE_PIOA->PIO_PER = (1 << 24);
AT91C_BASE_PIOA->PIO_MDER = (1 << 24);
AT91C_BASE_PIOA->PIO_OER = (1 << 23);
AT91C_BASE_PIOA->PIO_OER = (1 << 24);
AT91C_BASE_PIOA->PIO_OER = (1 << 23);
AT91C_BASE_PIOA->PIO_OER = (1 << 24);
AT91C_BASE_PIOA->PIO_SODR = (1 << 23);
AT91C_BASE_PIOA->PIO_SODR = (1 << 24);
AT91C_BASE_PIOA->PIO_SODR = (1 << 23);
AT91C_BASE_PIOA->PIO_SODR = (1 << 24);
}
static void at91_set_sda(void *data, rt_int32_t state)
{
if (state)
{
AT91C_BASE_PIOA->PIO_SODR = (1 << 23);
}
else
{
AT91C_BASE_PIOA->PIO_CODR = (1 << 23);
}
if (state)
{
AT91C_BASE_PIOA->PIO_SODR = (1 << 23);
}
else
{
AT91C_BASE_PIOA->PIO_CODR = (1 << 23);
}
}
static void at91_set_scl(void *data, rt_int32_t state)
{
if (state)
{
AT91C_BASE_PIOA->PIO_SODR = (1 << 24);
}
else
{
AT91C_BASE_PIOA->PIO_CODR = (1 << 24);
}
if (state)
{
AT91C_BASE_PIOA->PIO_SODR = (1 << 24);
}
else
{
AT91C_BASE_PIOA->PIO_CODR = (1 << 24);
}
}
static rt_int32_t at91_get_sda(void *data)
{
return AT91C_BASE_PIOA->PIO_PDSR & (1 << 23);
return AT91C_BASE_PIOA->PIO_PDSR & (1 << 23);
}
static rt_int32_t at91_get_scl(void *data)
{
return AT91C_BASE_PIOA->PIO_PDSR & (1 << 24);
return AT91C_BASE_PIOA->PIO_PDSR & (1 << 24);
}
static void at91_udelay (rt_uint32_t us)
{
rt_int32_t i;
for (; us > 0; us--)
{
i = 50000;
while(i > 0)
{
i--;
}
}
rt_int32_t i;
for (; us > 0; us--)
{
i = 50000;
while(i > 0)
{
i--;
}
}
}
static const struct rt_i2c_bit_ops bit_ops = {
RT_NULL,
at91_set_sda,
at91_set_scl,
at91_get_sda,
at91_get_scl,
at91_udelay,
RT_NULL,
at91_set_sda,
at91_set_scl,
at91_get_sda,
at91_get_scl,
5,
100
at91_udelay,
5,
100
};
int at91_i2c_init(void)
{
struct rt_i2c_bus_device *bus;
struct rt_i2c_bus_device *bus;
bus = rt_malloc(sizeof(struct rt_i2c_bus_device));
if (bus == RT_NULL)
{
rt_kprintf("rt_malloc failed\n");
return -RT_ENOMEM;
}
rt_memset((void *)bus, 0, sizeof(struct rt_i2c_bus_device));
bus = rt_malloc(sizeof(struct rt_i2c_bus_device));
if (bus == RT_NULL)
{
rt_kprintf("rt_malloc failed\n");
return -RT_ENOMEM;
}
bus->priv = (void *)&bit_ops;
rt_memset((void *)bus, 0, sizeof(struct rt_i2c_bus_device));
at91_i2c_gpio_init();
bus->priv = (void *)&bit_ops;
rt_i2c_bit_add_bus(bus, "i2c0");
at91_i2c_gpio_init();
return 0;
rt_i2c_bit_add_bus(bus, "i2c0");
return 0;
}
INIT_DEVICE_EXPORT(at91_i2c_init);
bsp/at91sam9g45/drivers/at91_mci.c
+636 -650
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File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/drivers/at91_mci.h
+86 -100
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File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/drivers/board.c
+108 -122
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File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/drivers/board.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/at91sam9g45/drivers/led.c
+6 -20
View File
@@ -1,21 +1,7 @@
/*
* File : led.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -35,10 +21,10 @@
void led_init(void)
{
AT91C_BASE_PIOC->PIO_PER = LED_ALL;
AT91C_BASE_PIOC->PIO_OER = LED_ALL;
AT91C_BASE_PIOC->PIO_PPUER = LED_ALL;
AT91C_BASE_PIOC->PIO_SODR = LED_ALL;
AT91C_BASE_PIOC->PIO_PER = LED_ALL;
AT91C_BASE_PIOC->PIO_OER = LED_ALL;
AT91C_BASE_PIOC->PIO_PPUER = LED_ALL;
AT91C_BASE_PIOC->PIO_SODR = LED_ALL;
}
const static rt_uint32_t m_leds[] = { LED0, LED1, LED2, LED3 };
bsp/at91sam9g45/drivers/led.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : led.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/at91sam9g45/drivers/macb.c
+622 -636
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File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/drivers/macb.h
+279 -293
View File
File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/drivers/mii.h
+12 -26
View File
@@ -1,21 +1,7 @@
/*
* File : mii.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -36,7 +22,7 @@
#define MII_EXPANSION 0x06 /* Expansion register */
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
@@ -51,7 +37,7 @@
/* Basic mode control register. */
#define BMCR_RESV 0x003f /* Unused... */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /* Collision test */
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
@@ -70,7 +56,7 @@
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
#define BMSR_RESV 0x00c0 /* Unused... */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
@@ -99,7 +85,7 @@
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
@@ -121,8 +107,8 @@
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
@@ -132,8 +118,8 @@
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /* Unused... */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /* Unused... */
@@ -151,8 +137,8 @@
#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
/* Flow control flags */
#define FLOW_CTRL_TX 0x01
#define FLOW_CTRL_RX 0x02
#define FLOW_CTRL_TX 0x01
#define FLOW_CTRL_RX 0x02
/**
* mii_nway_result
bsp/at91sam9g45/drivers/usart.c
+162 -176
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File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/platform/gpio.h
+166 -180
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File diff suppressed because it is too large. Load diff
bsp/at91sam9g45/platform/interrupt.c
+27 -41
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -26,7 +12,7 @@
#include "at91sam9g45.h"
#include "interrupt.h"
#define AIC_IRQS 32
#define AIC_IRQS 32
#define MAX_HANDLERS (AIC_IRQS + PIN_IRQS)
extern rt_uint32_t rt_interrupt_nest;
@@ -101,17 +87,17 @@ rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector, void *param)
rt_isr_handler_t at91_gpio_irq_handle(rt_uint32_t bank, void *param)
{
rt_uint32_t isr, irq_n;
AT91PS_PIO pio;
AT91PS_PIO pio;
void *parameter;
switch (bank)
{
case 0: pio = AT91C_BASE_PIOA; break;
case 1: pio = AT91C_BASE_PIOB; break;
case 2: pio = AT91C_BASE_PIOC; break;
case 3: pio = AT91C_BASE_PIOD; break;
case 4: pio = AT91C_BASE_PIOE; break;
default: return RT_NULL;
case 0: pio = AT91C_BASE_PIOA; break;
case 1: pio = AT91C_BASE_PIOB; break;
case 2: pio = AT91C_BASE_PIOC; break;
case 3: pio = AT91C_BASE_PIOD; break;
case 4: pio = AT91C_BASE_PIOE; break;
default: return RT_NULL;
}
irq_n = AIC_IRQS + 32*bank;
isr = readl(pio->PIO_ISR);
@@ -133,21 +119,21 @@ rt_isr_handler_t at91_gpio_irq_handle(rt_uint32_t bank, void *param)
unsigned int SpuriousCount = 0;
static void DefaultSpuriousHandler( void )
{
SpuriousCount++;
rt_kprintf("Spurious interrupt %d occured!!!\n", SpuriousCount);
return ;
SpuriousCount++;
rt_kprintf("Spurious interrupt %d occured!!!\n", SpuriousCount);
return ;
}
static void DefaultFiqHandler(void)
{
rt_kprintf("Unhandled FIQ occured!!!\n");
while (1);
rt_kprintf("Unhandled FIQ occured!!!\n");
while (1);
}
static void DefaultIrqHandler(void)
{
rt_kprintf("Unhandled IRQ %d occured!!!\n", AT91C_BASE_AIC->AIC_ISR);
while (1);
rt_kprintf("Unhandled IRQ %d occured!!!\n", AT91C_BASE_AIC->AIC_ISR);
while (1);
}
/*
@@ -345,7 +331,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
irq_desc[vector].param = param;
#ifdef RT_USING_INTERRUPT_INFO
rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
irq_desc[vector].counter = 0;
irq_desc[vector].counter = 0;
#endif
}
}
@@ -446,16 +432,16 @@ void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
#ifdef RT_USING_INTERRUPT_INFO
void list_irq(void)
{
int irq;
int irq;
rt_kprintf("number\tcount\tname\n");
for (irq = 0; irq < MAX_HANDLERS; irq++)
{
if (rt_strncmp(irq_desc[irq].name, "default", sizeof("default")))
{
rt_kprintf("%02ld: %10ld %s\n", irq, irq_desc[irq].counter, irq_desc[irq].name);
}
}
rt_kprintf("number\tcount\tname\n");
for (irq = 0; irq < MAX_HANDLERS; irq++)
{
if (rt_strncmp(irq_desc[irq].name, "default", sizeof("default")))
{
rt_kprintf("%02ld: %10ld %s\n", irq, irq_desc[irq].counter, irq_desc[irq].name);
}
}
}
#include <finsh.h>
bsp/at91sam9g45/platform/interrupt.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/at91sam9g45/platform/io.h
+9 -23
View File
@@ -1,21 +1,7 @@
/*
* File : io.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -25,15 +11,15 @@
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define readb(a) (*(volatile unsigned char *)(a))
#define readw(a) (*(volatile unsigned short *)(a))
#define readl(a) (*(volatile unsigned int *)(a))
#define readb(a) (*(volatile unsigned char *)(a))
#define readw(a) (*(volatile unsigned short *)(a))
#define readl(a) (*(volatile unsigned int *)(a))
#define writeb(v,a) (*(volatile unsigned char *)(a) = (v))
#define writew(v,a) (*(volatile unsigned short *)(a) = (v))
#define writel(v,a) (*(volatile unsigned int *)(a) = (v))
#define writeb(v,a) (*(volatile unsigned char *)(a) = (v))
#define writew(v,a) (*(volatile unsigned short *)(a) = (v))
#define writel(v,a) (*(volatile unsigned int *)(a) = (v))
#endif
bsp/at91sam9g45/platform/irq.h
+11 -25
View File
@@ -1,27 +1,13 @@
/*
* File : irq.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-01-13 weety first version
*/
#ifndef __IRQ_H__
#define __IRQ_H__
@@ -32,18 +18,18 @@ extern "C" {
/*
* IRQ line status.
*
* Bits 0-7 are reserved
* Bits 0-7 are reserved
*
* IRQ types
*/
#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
#ifdef __cplusplus
}
bsp/at91sam9g45/platform/reset.c
+8 -22
View File
@@ -1,21 +1,7 @@
/*
* File : reset.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -33,12 +19,12 @@
void machine_reset(void)
{
AT91C_BASE_RSTC->RSTC_RCR = AT91C_RSTC_KEY | AT91C_RSTC_PROCRST | AT91C_RSTC_PERRST;
AT91C_BASE_RSTC->RSTC_RCR = AT91C_RSTC_KEY | AT91C_RSTC_PROCRST | AT91C_RSTC_PERRST;
}
void machine_shutdown(void)
{
AT91C_BASE_SHDWC->SHDWC_SHCR = AT91C_SHDWC_KEY | AT91C_SHDWC_SHDW;
AT91C_BASE_SHDWC->SHDWC_SHCR = AT91C_SHDWC_KEY | AT91C_SHDWC_SHDW;
}
#ifdef RT_USING_FINSH
@@ -49,14 +35,14 @@ FINSH_FUNCTION_EXPORT_ALIAS(rt_hw_cpu_reset, reset, restart the system);
#ifdef FINSH_USING_MSH
int cmd_reset(int argc, char** argv)
{
rt_hw_cpu_reset();
return 0;
rt_hw_cpu_reset();
return 0;
}
int cmd_shutdown(int argc, char** argv)
{
rt_hw_cpu_shutdown();
return 0;
rt_hw_cpu_shutdown();
return 0;
}
FINSH_FUNCTION_EXPORT_ALIAS(cmd_reset, __cmd_reset, restart the system.);
bsp/at91sam9g45/platform/rt_low_level_init.c
+4 -18
View File
@@ -1,29 +1,15 @@
/*
* File : rt_low_level_init.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-04-14 ArdaFu first version
*/
/* write register a=address, v=value */
#define write_reg(a,v) (*(volatile unsigned int *)(a) = (v))
#define write_reg(a,v) (*(volatile unsigned int *)(a) = (v))
/* Processor Reset */
#define AT91C_RSTC_PROCRST (1 << 0)
#define AT91C_RSTC_PERRST (1 << 2)
bsp/at91sam9g45/platform/rt_low_level_init.h
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : rt_low_level_init.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -23,7 +9,7 @@
*/
#ifndef __RT_LOW_LEVEL_INIT_H__
#define __RT_LOW_LEVEL_INIT_H__
/*-------- Stack size of CPU modes -------------------------------------------*/
#define UND_STK_SIZE 512
#define SVC_STK_SIZE 4096
bsp/at91sam9g45/platform/system_clock.c
+154 -168
View File
File diff suppressed because it is too large. Load diff
bsp/avr32uc3b0/application.c
+3 -7
View File
@@ -1,11 +1,7 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2010, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -56,7 +52,7 @@ int rt_application_init()
{
/* create led1 thread */
rt_thread_init(&thread_led1,
"led1",
"led1",
rt_thread_entry_led1,
RT_NULL,
&thread_led1_stack[0],
bsp/avr32uc3b0/board.c
+47 -51
View File
@@ -1,11 +1,7 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2010, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -20,11 +16,11 @@
#include "intc.h"
#include "serial.h"
#define FOSC0 12000000
#define FCPU 60000000
#define FHSB FCPU
#define FPBA FCPU
#define FPBB FCPU
#define FOSC0 12000000
#define FCPU 60000000
#define FHSB FCPU
#define FPBA FCPU
#define FPBB FCPU
extern void rt_hw_serial_isr(void);
extern void rt_hw_usart_init(void);
@@ -34,10 +30,10 @@ extern void rt_hw_usart_init(void);
*/
static void rt_hw_timer_handler(void)
{
// Clears the interrupt request.
Set_system_register(AVR32_COMPARE, FCPU / RT_TICK_PER_SECOND);
// Clears the interrupt request.
Set_system_register(AVR32_COMPARE, FCPU / RT_TICK_PER_SECOND);
rt_tick_increase();
rt_tick_increase();
}
/**
@@ -45,35 +41,35 @@ static void rt_hw_timer_handler(void)
*/
static void peripherals_init(void)
{
/*
* PM initialization: OSC0 = 12MHz XTAL, PLL0 = 60MHz System Clock
*/
pm_freq_param_t pm_freq_param =
{
.cpu_f = FCPU,
.pba_f = FPBA,
.osc0_f = FOSC0,
.osc0_startup = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC
};
pm_configure_clocks(&pm_freq_param);
/*
* PM initialization: OSC0 = 12MHz XTAL, PLL0 = 60MHz System Clock
*/
pm_freq_param_t pm_freq_param =
{
.cpu_f = FCPU,
.pba_f = FPBA,
.osc0_f = FOSC0,
.osc0_startup = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC
};
pm_configure_clocks(&pm_freq_param);
/*
* USART1 initialization
*/
gpio_enable_module_pin(AVR32_USART1_TXD_0_1_PIN, AVR32_USART1_TXD_0_1_FUNCTION);
gpio_enable_module_pin(AVR32_USART1_RXD_0_1_PIN, AVR32_USART1_RXD_0_1_FUNCTION);
static const usart_options_t usartOptions = {
.baudrate = 115200,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
usart_init_rs232(&AVR32_USART1, &usartOptions, FCPU);
/*
* USART1 initialization
*/
gpio_enable_module_pin(AVR32_USART1_TXD_0_1_PIN, AVR32_USART1_TXD_0_1_FUNCTION);
gpio_enable_module_pin(AVR32_USART1_RXD_0_1_PIN, AVR32_USART1_RXD_0_1_FUNCTION);
static const usart_options_t usartOptions = {
.baudrate = 115200,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
usart_init_rs232(&AVR32_USART1, &usartOptions, FCPU);
INTC_init_interrupts();
INTC_register_interrupt(&rt_hw_serial_isr, AVR32_USART1_IRQ, AVR32_INTC_INT0);
AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
INTC_init_interrupts();
INTC_register_interrupt(&rt_hw_serial_isr, AVR32_USART1_IRQ, AVR32_INTC_INT0);
AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
}
/**
@@ -81,21 +77,21 @@ static void peripherals_init(void)
*/
static void cpu_counter_init(void)
{
INTC_register_interrupt(&rt_hw_timer_handler, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT3);
Set_system_register(AVR32_COMPARE, FCPU / RT_TICK_PER_SECOND);
Set_system_register(AVR32_COUNT, 0);
INTC_register_interrupt(&rt_hw_timer_handler, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT3);
Set_system_register(AVR32_COMPARE, FCPU / RT_TICK_PER_SECOND);
Set_system_register(AVR32_COUNT, 0);
}
void rt_hw_board_init(void)
{
extern struct rt_device _rt_usart_device;
extern struct avr32_serial_device uart;
extern struct rt_device _rt_usart_device;
extern struct avr32_serial_device uart;
Disable_global_interrupt();
Disable_global_interrupt();
peripherals_init();
cpu_counter_init();
peripherals_init();
cpu_counter_init();
rt_hw_serial_register(&_rt_usart_device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, &uart);
rt_console_set_device("uart1");
rt_hw_serial_register(&_rt_usart_device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, &uart);
rt_console_set_device("uart1");
}
bsp/avr32uc3b0/rtconfig.h
+15 -19
View File
@@ -1,11 +1,7 @@
/*
* File : rtconfig.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2010, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -16,16 +12,16 @@
#define RTCONFIG_H_
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX*/
#define RT_THREAD_PRIORITY_MAX 32
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second*/
#define RT_TICK_PER_SECOND 100
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug*/
@@ -73,7 +69,7 @@
/* SECTION: Console options */
/* the buffer size of console*/
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: FinSH shell options */
/* Using FinSH as Shell*/
@@ -88,21 +84,21 @@
#define RT_USING_DFS_ELMFAT
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_DRIVES 2
/* SECTION: DFS options */
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 8
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 8
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
/* SECTION: RT-Thread/GUI */
//#define RT_USING_RTGUI
/* name length of RTGUI object */
#define RTGUI_NAME_MAX 12
#define RTGUI_NAME_MAX 12
/* support 16 weight font */
#define RTGUI_USING_FONT16
/* support Chinese font */
@@ -116,6 +112,6 @@
/* use mouse cursor */
/* #define RTGUI_USING_MOUSE_CURSOR */
/* default font size in RTGUI */
#define RTGUI_DEFAULT_FONT_SIZE 16
#define RTGUI_DEFAULT_FONT_SIZE 16
#endif /* RTCONFIG_H_ */
bsp/avr32uc3b0/startup.c
+11 -15
View File
@@ -1,11 +1,7 @@
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2010, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -25,19 +21,19 @@ extern void finsh_set_device(const char* device);
int main(void)
{
#ifdef RT_USING_HEAP
extern void __heap_start__;
extern void __heap_end__;
extern void __heap_start__;
extern void __heap_end__;
#endif
rt_hw_board_init();
rt_system_timer_init();
rt_hw_board_init();
rt_system_timer_init();
#ifdef RT_USING_HEAP
rt_system_heap_init(&__heap_start__, &__heap_end__);
rt_system_heap_init(&__heap_start__, &__heap_end__);
#endif
rt_system_scheduler_init();
rt_application_init();
rt_system_scheduler_init();
rt_application_init();
#ifdef RT_USING_FINSH
/* init finsh */
@@ -46,7 +42,7 @@ int main(void)
#endif
rt_thread_idle_init();
rt_system_scheduler_start();
rt_system_scheduler_start();
return 0;
return 0;
}
bsp/beaglebone/applications/board.c
+44 -48
View File
@@ -1,11 +1,7 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2012, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -49,7 +45,7 @@ static rt_uint32_t DMTIMER = 0;
static void rt_hw_timer_isr(int vector, void* param)
{
rt_tick_increase();
rt_tick_increase();
DMTIMER_IRQSTATUS(TIMER_HW_BASE) = DMTIMER_IRQSTATUS_RAW_OVF_IT_FLAG;
}
@@ -71,73 +67,73 @@ static void timer_clk_init(void)
while (!(CM_PER_L4LS_CLKSTCTRL_REG(prcm_base) & (1<<8)))
;
/* Select the clock source for the Timer2 instance. */
CM_DPLL_CLKSEL_TIMER7_CLK(prcm_base) &= ~(CM_DPLL_CLKSEL_CLK_CLKSEL);
/* 32k clock source */
CM_DPLL_CLKSEL_TIMER7_CLK(prcm_base) |= CM_DPLL_CLKSEL_CLK_CLKSEL_SEL3;
/* Select the clock source for the Timer2 instance. */
CM_DPLL_CLKSEL_TIMER7_CLK(prcm_base) &= ~(CM_DPLL_CLKSEL_CLK_CLKSEL);
/* 32k clock source */
CM_DPLL_CLKSEL_TIMER7_CLK(prcm_base) |= CM_DPLL_CLKSEL_CLK_CLKSEL_SEL3;
while ((CM_DPLL_CLKSEL_TIMER7_CLK(prcm_base) & CM_DPLL_CLKSEL_CLK_CLKSEL) !=
CM_DPLL_CLKSEL_CLK_CLKSEL_SEL3);
while ((CM_DPLL_CLKSEL_TIMER7_CLK(prcm_base) & CM_DPLL_CLKSEL_CLK_CLKSEL) !=
CM_DPLL_CLKSEL_CLK_CLKSEL_SEL3);
/* Writing to MODULEMODE field of CM_PER_TIMER7_CLKCTRL register. */
CM_PER_TIMER7_CLKCTRL(prcm_base) |= CM_PER_CLKCTRL_MODULEMODE_ENABLE;
/* Writing to MODULEMODE field of CM_PER_TIMER7_CLKCTRL register. */
CM_PER_TIMER7_CLKCTRL(prcm_base) |= CM_PER_CLKCTRL_MODULEMODE_ENABLE;
/* Waiting for MODULEMODE field to reflect the written value. */
while ((CM_PER_TIMER7_CLKCTRL(prcm_base) & CM_PER_CLKCTRL_MODULEMODE) !=
CM_PER_CLKCTRL_MODULEMODE_ENABLE);
/* Waiting for MODULEMODE field to reflect the written value. */
while ((CM_PER_TIMER7_CLKCTRL(prcm_base) & CM_PER_CLKCTRL_MODULEMODE) !=
CM_PER_CLKCTRL_MODULEMODE_ENABLE);
/*
* Waiting for IDLEST field in CM_PER_TIMER7_CLKCTRL register
* for the module is fully functional.
*/
while ((CM_PER_TIMER7_CLKCTRL(prcm_base) & CM_PER_CLKCTRL_IDLEST) !=
CM_PER_CLKCTRL_IDLEST_FUNC);
/*
* Waiting for IDLEST field in CM_PER_TIMER7_CLKCTRL register
* for the module is fully functional.
*/
while ((CM_PER_TIMER7_CLKCTRL(prcm_base) & CM_PER_CLKCTRL_IDLEST) !=
CM_PER_CLKCTRL_IDLEST_FUNC);
/* Waiting for the L4LS clock */
while (!(CM_PER_L4LS_CLKSTCTRL_REG(prcm_base) & CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_L4LS_GCLK));
/* Waiting for the TIMER7 clock */
while (!(CM_PER_L4LS_CLKSTCTRL_REG(prcm_base) & CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_TIMER7_GCLK));
/* Waiting for the L4LS clock */
while (!(CM_PER_L4LS_CLKSTCTRL_REG(prcm_base) & CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_L4LS_GCLK));
/* Waiting for the TIMER7 clock */
while (!(CM_PER_L4LS_CLKSTCTRL_REG(prcm_base) & CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_TIMER7_GCLK));
}
int rt_hw_timer_init(void)
{
rt_uint32_t counter;
rt_uint32_t counter;
#ifdef RT_USING_VMM
DMTIMER = vmm_find_iomap("TIMER7");
#endif
timer_clk_init();
timer_clk_init();
/* soft reset the timer */
DMTIMER_TIOCP_CFG(TIMER_HW_BASE) |= 1;
/* soft reset the timer */
DMTIMER_TIOCP_CFG(TIMER_HW_BASE) |= 1;
while ((DMTIMER_TIOCP_CFG(TIMER_HW_BASE) & 0x1) == 1)
;
/* calculate count */
counter = 0xffffffff - (32768UL/RT_TICK_PER_SECOND);
/* calculate count */
counter = 0xffffffff - (32768UL/RT_TICK_PER_SECOND);
/* set initial count */
DMTIMER_TCRR(TIMER_HW_BASE) = counter;
/* set reload count */
DMTIMER_TLDR(TIMER_HW_BASE) = counter;
/* set initial count */
DMTIMER_TCRR(TIMER_HW_BASE) = counter;
/* set reload count */
DMTIMER_TLDR(TIMER_HW_BASE) = counter;
/* set mode: auto reload */
DMTIMER_TCLR(TIMER_HW_BASE) |= DMTIMER_TCLR_AR;
/* set mode: auto reload */
DMTIMER_TCLR(TIMER_HW_BASE) |= DMTIMER_TCLR_AR;
/* interrupt enable for match */
DMTIMER_IRQENABLE_SET(TIMER_HW_BASE) = DMTIMER_IRQENABLE_SET_OVF_EN_FLAG;
/* interrupt enable for match */
DMTIMER_IRQENABLE_SET(TIMER_HW_BASE) = DMTIMER_IRQENABLE_SET_OVF_EN_FLAG;
DMTIMER_IRQSTATUS(TIMER_HW_BASE) = DMTIMER_IRQSTATUS_RAW_OVF_IT_FLAG;
rt_hw_interrupt_install(TINT7, rt_hw_timer_isr, RT_NULL, "tick");
rt_hw_interrupt_control(TINT7, 0, 0);
rt_hw_interrupt_umask(TINT7);
rt_hw_interrupt_install(TINT7, rt_hw_timer_isr, RT_NULL, "tick");
rt_hw_interrupt_control(TINT7, 0, 0);
rt_hw_interrupt_umask(TINT7);
while (DMTIMER_TWPS(TIMER_HW_BASE) != 0)
;
/* start timer */
DMTIMER_TCLR(TIMER_HW_BASE) |= DMTIMER_TCLR_ST;
/* start timer */
DMTIMER_TCLR(TIMER_HW_BASE) |= DMTIMER_TCLR_ST;
while (DMTIMER_TWPS(TIMER_HW_BASE) != 0)
;
@@ -152,7 +148,7 @@ INIT_BOARD_EXPORT(rt_hw_timer_init);
void rt_hw_board_init(void)
{
rt_components_board_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
}
void rt_hw_cpu_reset(void)
bsp/beaglebone/applications/board.h
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2013, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/beaglebone/drivers/gpio.c
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : gpio.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
*/
bsp/beaglebone/drivers/gpio.h
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : gpio.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
*/
bsp/beaglebone/drivers/uart.c
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : serial.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2013, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/beaglebone/drivers/uart.h
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : serial.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2013, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/bf533/application.c
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2012, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/bf533/application.h
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2012, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/bf533/board.c
+3 -7
View File
@@ -1,11 +1,7 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2012, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -242,7 +238,7 @@ void rt_hw_isr_install(void)
*pSIC_IAR1 &= IVG_CLR(IAR1_DMA6_UARTRX_IVG);
*pSIC_IAR1 |= IVG_SET(IAR1_DMA6_UARTRX_IVG,ik_ivg9);
register_handler(ik_ivg9,uart_rx_isr);
*pSIC_IMASK |= DMA6_UART_RX_INT_MASK;/* ¿ªÖÐ¶Ï */
*pSIC_IMASK |= DMA6_UART_RX_INT_MASK;/* 开中断 */
}
void rt_hw_board_init(void)
bsp/bf533/board.h
+3 -7
View File
@@ -1,11 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2012, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -23,7 +19,7 @@
#define CLOCKS_PER_SECD CCLKSPEED
#define SCLOCKS_PER_SEC SCLKSPEED
//SIC_IMASK¼Ä´æÆ÷
//SIC_IMASK寄存器
#define PLL_WAKEUP_INT_MASK 0x00000001
#define DMA_ERROR_INT_MASK 0x00000002
#define PPI_ERROR_INT_MASK 0x00000004
bsp/bf533/startup.c
+2 -6
View File
@@ -1,11 +1,7 @@
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2012, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/bluetrum/ab32vg1-ab-prougen/.config
+45 -11
View File
@@ -23,6 +23,7 @@ CONFIG_IDLE_THREAD_STACK_SIZE=512
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=256
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
@@ -258,8 +259,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
@@ -274,6 +273,12 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
#
# security packages
@@ -332,6 +337,13 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set
#
# system packages
@@ -339,7 +351,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
@@ -349,6 +360,9 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
# CONFIG_PKG_USING_DFS_UFFS is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
@@ -370,12 +384,13 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_RT_PRINTF is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
#
# peripheral libraries and drivers
@@ -438,6 +453,24 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
#
# miscellaneous packages
@@ -469,25 +502,24 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
#
# games: games run on RT-Thread console
# entertainment: terminal games and other interesting software packages
#
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_COWSAY is not set
#
# Hardware Drivers Config
@@ -496,14 +528,16 @@ CONFIG_RT_USING_LIBC=y
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_USB_TO_USART=y
# CONFIG_BSP_USING_AUDIO is not set
# CONFIG_BSP_USING_SDCARD is not set
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_SDIO is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_PWM is not set
bsp/bluetrum/ab32vg1-ab-prougen/.cproject
+154 -155
View File
File diff suppressed because it is too large. Load diff
bsp/bluetrum/ab32vg1-ab-prougen/README.md
+25 -11
View File
@@ -35,19 +35,20 @@ ab32vg1-prougen 是 中科蓝讯(Bluetrum) 推出的一款基于 RISC-V 内核
| USB 转串口 | 支持 | |
| SD卡 | 支持 | |
| IRDA | 即将支持 | |
| 音频接口 | 支持 | |
| 音频接口 | 支持 | 支持音频输出 |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | PA PB PE PF |
| UART | 支持 | UART0/1/2 |
| SDIO | 支持 | |
| ADC | 即将支持 | |
| ADC | 支持 | 10bit ADC |
| SPI | 即将支持 | 软件 SPI |
| I2C | 支持 | 软件 I2C |
| RTC | 即将支持 | |
| RTC | 支持 | |
| WDT | 支持 | |
| FLASH | 即将支持 | |
| FLASH | 即将支持 | 对接 FAL |
| TIMER | 支持 | |
| PWM | 支持 | LPWM 的 G1 G2 G3 之间是互斥的，只能三选一 |
| FM receive | 即将支持 | |
| USB Device | 暂不支持 | |
| USB Host | 暂不支持 | |
@@ -68,8 +69,6 @@ ab32vg1-prougen 是 中科蓝讯(Bluetrum) 推出的一款基于 RISC-V 内核
本 BSP 为开发者提供 GCC 开发环境。下面介绍如何将系统运行起来。
教学视频：https://www.bilibili.com/video/BV1RV411v75P/
#### 硬件连接
使用数据线连接开发板到 PC，打开电源开关。
@@ -96,11 +95,12 @@ msh >
此 BSP 默认只开启了 GPIO 和 串口0 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons` 命令重新编译工程。
更多细节请参见使用指南：https://ab32vg1-example.readthedocs.io/zh/latest/introduction.html
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons` 命令重新编译工程。
## 注意事项
@@ -110,12 +110,26 @@ msh >
编译报错的时候，如果出现重复定义的报错，可能需要在 `cconfig.h` 中手动添加以下配置
```
``` c
#define HAVE_SIGEVENT 1
#define HAVE_SIGINFO 1
#define HAVE_SIGVAL 1
```
所有在中断中使用的函数或数据需要放在 RAM 中，否则会导致系统运行报错。具体做法可以参考下面
``` c
RT_SECTION(".irq.example.str")
static const char example_info[] = "example 0x%x";
RT_SECTION(".irq.example")
void example_isr(void)
{
rt_kprintf(example_info, 11);
...
}
```
## 维护人信息
- [greedyhao](https://github.com/greedyhao)
bsp/bluetrum/ab32vg1-ab-prougen/applications/main.c
+6
View File
@@ -8,6 +8,12 @@
* 2020/12/10 greedyhao The first version
*/
/**
* Notice!
* All functions or data that are called during an interrupt need to be in RAM.
* You can do it the way exception_isr() does.
*/
#include <rtthread.h>
#include "board.h"
bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig
+8 -8
View File
@@ -90,16 +90,16 @@ menu "On-chip Peripheral Drivers"
if BSP_USING_T4_PWM
config BSP_USING_T4_PWM1
bool "Enable Timer4 PWM1 (PA6)(Confit with uart0 rx)"
default n
default y
endif
menuconfig BSP_USING_T5_PWM
bool "Enable Timer5 PWM"
default n
default y
if BSP_USING_T5_PWM
config BSP_USING_T5_PWM0
bool "Enable Timer5 PWM2 (PE1)"
default n
default y
endif
menuconfig BSP_USING_LPWM0
@@ -109,7 +109,7 @@ menu "On-chip Peripheral Drivers"
comment "G1, G2 and G3 are mutually exclusive"
config BSP_USING_LPWM0_G1
bool "Enable LPWM0 G1 (PE4)"
default n
default y
endif
menuconfig BSP_USING_LPWM1
@@ -119,7 +119,7 @@ menu "On-chip Peripheral Drivers"
comment "G1, G2 and G3 are mutually exclusive"
config BSP_USING_LPWM1_G3
bool "Enable LPWM1 G3 (PA1)"
default n
default y
endif
menuconfig BSP_USING_LPWM2
@@ -129,7 +129,7 @@ menu "On-chip Peripheral Drivers"
comment "G1, G2 and G3 are mutually exclusive"
config BSP_USING_LPWM2_G2
bool "Enable LPWM2 G2 (PE0)"
default n
default y
config BSP_USING_LPWM2_G3
bool "Enable LPWM2 G3 (PA2)"
default n
@@ -148,7 +148,7 @@ menu "On-chip Peripheral Drivers"
if BSP_USING_TIM
config BSP_USING_TIM1
bool "Enable TIM1"
default n
default y
config BSP_USING_TIM2
bool "Enable TIM2"
@@ -189,7 +189,7 @@ menu "On-chip Peripheral Drivers"
if BSP_USING_ADC
config BSP_USING_ADC0
bool "Enable ADC0"
default n
default y
endif
endmenu
bsp/bluetrum/ab32vg1-ab-prougen/board/board.c
+61
View File
@@ -13,10 +13,21 @@
int rt_hw_usart_init(void);
void my_printf(const char *format, ...);
void my_print_r(const void *buf, uint16_t cnt);
void timer0_cfg(uint32_t ticks);
void rt_soft_isr(int vector, void *param);
void cpu_irq_comm(void);
void set_cpu_irq_comm(void (*irq_hook)(void));
void load_cache();
void sys_error_hook(uint8_t err_no);
typedef void (*os_cache_setfunc_func)(void *load_cache_func, void *io_read);
typedef void (*spiflash_init_func)(uint8_t sf_read, uint8_t dummy);
#define os_cache_setfunc ((os_cache_setfunc_func) 0x84024)
static struct rt_mutex mutex_spiflash = {0};
extern volatile rt_uint8_t rt_interrupt_nest;
extern uint32_t __heap_start, __heap_end;
void hal_printf(const char *fmt, ...)
@@ -55,6 +66,7 @@ void hal_printf(const char *fmt, ...)
va_end(args);
}
RT_SECTION(".irq.timer")
void timer0_isr(int vector, void *param)
{
rt_interrupt_enter();
@@ -132,3 +144,52 @@ void rt_hw_us_delay(rt_uint32_t us)
{
}
RT_SECTION(".irq.cache")
void cache_init(void)
{
os_cache_setfunc(load_cache, NULL);
rt_mutex_init(&mutex_spiflash, "flash_mutex", RT_IPC_FLAG_FIFO);
}
RT_SECTION(".irq.cache")
void os_spiflash_lock(void)
{
// if (rt_thread_self()->stat == RT_THREAD_RUNNING) {
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
rt_mutex_take(&mutex_spiflash, RT_WAITING_FOREVER);
}
}
RT_SECTION(".irq.cache")
void os_spiflash_unlock(void)
{
// if (rt_thread_self()->stat == RT_THREAD_RUNNING) {
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
rt_mutex_release(&mutex_spiflash);
}
}
RT_SECTION(".irq.err.str")
static const char stack_info[] = "thread sp=0x%x name=%s";
void rt_hw_console_output(const char *str)
{
my_printf(str);
}
/**
* @brief print exception error
* @note Every message needed to print, must put in .comm exction.
*/
RT_SECTION(".irq.err")
void exception_isr(void)
{
extern long list_thread(void);
sys_error_hook(1);
rt_console_set_device(RT_NULL);
rt_kprintf(stack_info, rt_thread_self()->sp, rt_thread_self()->name);
while(1);
}
bsp/bluetrum/ab32vg1-ab-prougen/board/ports/audio/drv_sound.c
+56 -6
View File
@@ -15,15 +15,17 @@
#define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100u)
#define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000u)
#define TX_FIFO_SIZE (1024)
#define TX_FIFO_SIZE (1024)
struct sound_device
{
struct rt_audio_device audio;
struct rt_audio_configure replay_config;
rt_sem_t semaphore;
rt_thread_t thread;
rt_uint8_t *tx_fifo;
rt_uint8_t *rx_fifo;
rt_uint8_t volume;
rt_uint8_t volume;
};
static struct sound_device snd_dev = {0};
@@ -105,6 +107,17 @@ void dac_start(void)
//AUANGCON1 |= BIT(3); // pa mute
}
RT_SECTION(".irq.audio")
void audio_sem_post(void)
{
rt_sem_release(snd_dev.semaphore);
}
void audio_sem_pend(void)
{
rt_sem_take(snd_dev.semaphore, RT_WAITING_FOREVER);
}
void saia_frequency_set(uint32_t frequency)
{
if (frequency == SAI_AUDIO_FREQUENCY_48K) {
@@ -359,7 +372,7 @@ static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
DACVOLCON = 0x7fff; // -60DB
DACVOLCON |= BIT(20);
AUBUFCON |= BIT(1) | BIT(4);
AUBUFCON |= BIT(1);
}
return RT_EOK;
@@ -391,7 +404,10 @@ rt_size_t sound_transmit(struct rt_audio_device *audio, const void *writeBuf, vo
snd_dev = (struct sound_device *)audio->parent.user_data;
while (tmp_size-- > 0) {
while(AUBUFCON & BIT(8)); // aubuf full
if (AUBUFCON & BIT(8)) { // aubuf full
AUBUFCON |= BIT(1) | BIT(4);
audio_sem_pend();
}
AUBUFDATA = ((const uint32_t *)writeBuf)[count++];
}
@@ -429,18 +445,32 @@ static struct rt_audio_ops ops =
.buffer_info = sound_buffer_info,
};
void audio_isr(int vector, void *param)
RT_SECTION(".irq.audio")
static void audio_isr(int vector, void *param)
{
rt_interrupt_enter();
//Audio buffer pend
if (AUBUFCON & BIT(5)) {
AUBUFCON |= BIT(1); //Audio Buffer Pend Clear
rt_audio_tx_complete(&snd_dev.audio);
AUBUFCON &= ~BIT(4);
audio_sem_post();
}
rt_interrupt_leave();
}
static void audio_thread_entry(void *parameter)
{
while (1)
{
if (snd_dev.audio.replay->activated == RT_TRUE) {
rt_audio_tx_complete(&snd_dev.audio);
} else {
rt_thread_mdelay(50);
}
}
}
static int rt_hw_sound_init(void)
{
rt_uint8_t *tx_fifo = RT_NULL;
@@ -464,6 +494,26 @@ static int rt_hw_sound_init(void)
snd_dev.rx_fifo = rx_fifo;
snd_dev.semaphore = rt_sem_create("snd", 0, RT_IPC_FLAG_FIFO);
if (snd_dev.semaphore == RT_NULL)
{
return -RT_ENOMEM;
}
snd_dev.thread = rt_thread_create(
"audio",
audio_thread_entry,
RT_NULL,
1024,
20, // must equal or lower than tshell priority
5
);
if (snd_dev.thread != RT_NULL)
{
rt_thread_startup(snd_dev.thread);
}
/* init default configuration */
{
snd_dev.replay_config.samplerate = 48000;
bsp/bluetrum/ab32vg1-ab-prougen/link.lds
+33 -16
View File
@@ -3,8 +3,8 @@ __max_flash_size = 1024k;
__data_ram_size = 8k;
__stack_ram_size = 4k;
__comm_ram_size = 83k;
__heap_ram_size = 29k;
__comm_ram_size = 42k;
__heap_ram_size = 70k;
__base = 0x10000000;
@@ -47,26 +47,43 @@ SECTIONS
PROVIDE(__ctors_end__ = .);
. = ALIGN(4);
*components*drivers**.o (.text*)
*components.o (.text*)
*save-restore.o (.text* .rodata*)
*libcpu*cpu*context_gcc.o (.text* .rodata*)
*libcpu*cpu*interrupt.o (.text* .rodata*)
*libcpu**.o (.rodata*)
*components*drivers*misc*pin.o(.text*)
*components*drivers*misc*adc.o(.text*)
. = ALIGN(4);
*src*ipc.o (.text* .rodata*)
*src*irq.o (.text* .rodata*)
*src*object.o (.text* .rodata*)
*src*thread.o (.text* .rodata*)
*src*timer.o (.text* .rodata*)
*src*mempool.o (.text* .rodata*)
*src*scheduler.o (.text* .rodata*)
*src*clock.o (.text* .rodata*)
*src*kservice.o (.text* .rodata*)
*src*device.o (.text* .rodata*)
*src*idle.o (.text* .rodata*)
*src*components.o (.text* .rodata*)
} > ram1 AT > flash
.comm __comm_vma : {
. = ALIGN(4);
KEEP(*(.vector))
EXCLUDE_FILE(*components*finsh**.o *components*libc**.o *dfs*filesystems**.o
*romfs.o *lib_a**.o *divdi3.o *moddi3.o *divdf3.o *muldf3.o *eqtf2.o *getf2.o
*letf2.o *multf3.o *subtf3.o *fixtfsi.o *floatsitf.o *extenddftf2.o
*trunctfdf2.o *_clzsi2.o *cp-demangle.o *unwind*.o
*fixdfsi.o *addsf3.o *divsf3.o *eqsf2.o *gesf2.o *float*.o
*lesf2.o *mulsf3.o *subsf3.o *fixsfsi.o *fixunssfsi.o) *(.text)
*finsh*shell.o (.text*)
*(.irq*)
/*applications**.o (.text .rodata)*/
*hal_libraries*ab32vg1_hal**.o (.text .rodata)
*(.text.unlikely)
*(.text.startup)
EXCLUDE_FILE (*components*libc**.o *dfs*filesystems**.o *romfs.o *lib_a**.o
*cp-demangle.o *divdf3.o *muldf3.o *multf3.o *unwind*.o *_clz.o) *(.rodata)
*(.rodata.name)
EXCLUDE_FILE(*lib_a**.o *cp-demangle.o *cp-demangle.o) *(.rodata.str1.4)
*hal_drivers**.o (.rodata)
*audio*drv_sound.o (.rodata)
*system_ab32vgx.o (.rodata)
EXCLUDE_FILE(*lib_a**.o *cp-demangle.o *cp-demangle.o
*src*mem.o *src*memheap.o *dfs**.o *components.o *drivers*sdio**.o *cmd.o *msh_file.o
*drv_sdio.o *drv_wdt.o) *(.rodata.str1.4)
EXCLUDE_FILE(*lib_a**.o *unwind*.o) *(.srodata)
*(.rela*)
*(.data*)
@@ -98,7 +115,6 @@ SECTIONS
} > heap
.flash : {
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
@@ -109,6 +125,7 @@ SECTIONS
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
*(.text*)
*(.rodata*)
*(.srodata*)
bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h
+5 -2
View File
@@ -145,23 +145,26 @@
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* games: games run on RT-Thread console */
/* entertainment: terminal games and other interesting software packages */
/* Hardware Drivers Config */
/* Onboard Peripheral Drivers */
#define BSP_USING_USB_TO_USART
/* On-chip Peripheral Drivers */
#define BSP_USING_UART
#define BSP_USING_UART0
/* Board extended module Drivers */
Loaded 100 of 374 files, more files were not shown because too many files have changed in this diff. Show more